mwl8k.c 88 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737
  1. /*
  2. * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
  3. *
  4. * Copyright (C) 2008 Marvell Semiconductor Inc.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/list.h>
  15. #include <linux/pci.h>
  16. #include <linux/delay.h>
  17. #include <linux/completion.h>
  18. #include <linux/etherdevice.h>
  19. #include <net/mac80211.h>
  20. #include <linux/moduleparam.h>
  21. #include <linux/firmware.h>
  22. #include <linux/workqueue.h>
  23. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  24. #define MWL8K_NAME KBUILD_MODNAME
  25. #define MWL8K_VERSION "0.9.1"
  26. MODULE_DESCRIPTION(MWL8K_DESC);
  27. MODULE_VERSION(MWL8K_VERSION);
  28. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  29. MODULE_LICENSE("GPL");
  30. static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
  31. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
  32. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
  33. { }
  34. };
  35. MODULE_DEVICE_TABLE(pci, mwl8k_table);
  36. /* Register definitions */
  37. #define MWL8K_HIU_GEN_PTR 0x00000c10
  38. #define MWL8K_MODE_STA 0x0000005a
  39. #define MWL8K_MODE_AP 0x000000a5
  40. #define MWL8K_HIU_INT_CODE 0x00000c14
  41. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  42. #define MWL8K_FWAP_READY 0xf1f2f4a5
  43. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  44. #define MWL8K_HIU_SCRATCH 0x00000c40
  45. /* Host->device communications */
  46. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  47. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  48. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  49. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  50. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  51. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  52. #define MWL8K_H2A_INT_RESET (1 << 15)
  53. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  54. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  55. /* Device->host communications */
  56. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  57. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  58. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  59. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  60. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  61. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  62. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  63. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  64. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  65. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  66. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  67. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  68. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  69. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  70. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  71. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  72. MWL8K_A2H_INT_CHNL_SWITCHED | \
  73. MWL8K_A2H_INT_QUEUE_EMPTY | \
  74. MWL8K_A2H_INT_RADAR_DETECT | \
  75. MWL8K_A2H_INT_RADIO_ON | \
  76. MWL8K_A2H_INT_RADIO_OFF | \
  77. MWL8K_A2H_INT_MAC_EVENT | \
  78. MWL8K_A2H_INT_OPC_DONE | \
  79. MWL8K_A2H_INT_RX_READY | \
  80. MWL8K_A2H_INT_TX_DONE)
  81. /* WME stream classes */
  82. #define WME_AC_BE 0 /* best effort */
  83. #define WME_AC_BK 1 /* background */
  84. #define WME_AC_VI 2 /* video */
  85. #define WME_AC_VO 3 /* voice */
  86. #define MWL8K_RX_QUEUES 1
  87. #define MWL8K_TX_QUEUES 4
  88. struct mwl8k_rx_queue {
  89. int rx_desc_count;
  90. /* hw receives here */
  91. int rx_head;
  92. /* refill descs here */
  93. int rx_tail;
  94. struct mwl8k_rx_desc *rx_desc_area;
  95. dma_addr_t rx_desc_dma;
  96. struct sk_buff **rx_skb;
  97. };
  98. struct mwl8k_skb {
  99. /*
  100. * The DMA engine requires a modification to the payload.
  101. * If the skbuff is shared/cloned, it needs to be unshared.
  102. * This method is used to ensure the stack always gets back
  103. * the skbuff it sent for transmission.
  104. */
  105. struct sk_buff *clone;
  106. struct sk_buff *skb;
  107. };
  108. struct mwl8k_tx_queue {
  109. /* hw transmits here */
  110. int tx_head;
  111. /* sw appends here */
  112. int tx_tail;
  113. struct ieee80211_tx_queue_stats tx_stats;
  114. struct mwl8k_tx_desc *tx_desc_area;
  115. dma_addr_t tx_desc_dma;
  116. struct mwl8k_skb *tx_skb;
  117. };
  118. /* Pointers to the firmware data and meta information about it. */
  119. struct mwl8k_firmware {
  120. /* Microcode */
  121. struct firmware *ucode;
  122. /* Boot helper code */
  123. struct firmware *helper;
  124. };
  125. struct mwl8k_priv {
  126. void __iomem *regs;
  127. struct ieee80211_hw *hw;
  128. struct pci_dev *pdev;
  129. u8 name[16];
  130. /* firmware access lock */
  131. spinlock_t fw_lock;
  132. /* firmware files and meta data */
  133. struct mwl8k_firmware fw;
  134. u32 part_num;
  135. /* lock held over TX and TX reap */
  136. spinlock_t tx_lock;
  137. struct ieee80211_vif *vif;
  138. struct ieee80211_channel *current_channel;
  139. /* power management status cookie from firmware */
  140. u32 *cookie;
  141. dma_addr_t cookie_dma;
  142. u16 num_mcaddrs;
  143. u8 hw_rev;
  144. __le32 fw_rev;
  145. /*
  146. * Running count of TX packets in flight, to avoid
  147. * iterating over the transmit rings each time.
  148. */
  149. int pending_tx_pkts;
  150. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  151. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  152. /* PHY parameters */
  153. struct ieee80211_supported_band band;
  154. struct ieee80211_channel channels[14];
  155. struct ieee80211_rate rates[12];
  156. /* RF preamble: Short, Long or Auto */
  157. u8 radio_preamble;
  158. u8 radio_state;
  159. /* WMM MODE 1 for enabled; 0 for disabled */
  160. bool wmm_mode;
  161. /* Set if PHY config is in progress */
  162. bool inconfig;
  163. /* XXX need to convert this to handle multiple interfaces */
  164. bool capture_beacon;
  165. u8 capture_bssid[ETH_ALEN];
  166. struct sk_buff *beacon_skb;
  167. /*
  168. * This FJ worker has to be global as it is scheduled from the
  169. * RX handler. At this point we don't know which interface it
  170. * belongs to until the list of bssids waiting to complete join
  171. * is checked.
  172. */
  173. struct work_struct finalize_join_worker;
  174. /* Tasklet to reclaim TX descriptors and buffers after tx */
  175. struct tasklet_struct tx_reclaim_task;
  176. /* Work thread to serialize configuration requests */
  177. struct workqueue_struct *config_wq;
  178. struct completion *hostcmd_wait;
  179. struct completion *tx_wait;
  180. };
  181. /* Per interface specific private data */
  182. struct mwl8k_vif {
  183. /* backpointer to parent config block */
  184. struct mwl8k_priv *priv;
  185. /* BSS config of AP or IBSS from mac80211*/
  186. struct ieee80211_bss_conf bss_info;
  187. /* BSSID of AP or IBSS */
  188. u8 bssid[ETH_ALEN];
  189. u8 mac_addr[ETH_ALEN];
  190. /*
  191. * Subset of supported legacy rates.
  192. * Intersection of AP and STA supported rates.
  193. */
  194. struct ieee80211_rate legacy_rates[12];
  195. /* number of supported legacy rates */
  196. u8 legacy_nrates;
  197. /* Index into station database.Returned by update_sta_db call */
  198. u8 peer_id;
  199. /* Non AMPDU sequence number assigned by driver */
  200. u16 seqno;
  201. };
  202. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  203. static const struct ieee80211_channel mwl8k_channels[] = {
  204. { .center_freq = 2412, .hw_value = 1, },
  205. { .center_freq = 2417, .hw_value = 2, },
  206. { .center_freq = 2422, .hw_value = 3, },
  207. { .center_freq = 2427, .hw_value = 4, },
  208. { .center_freq = 2432, .hw_value = 5, },
  209. { .center_freq = 2437, .hw_value = 6, },
  210. { .center_freq = 2442, .hw_value = 7, },
  211. { .center_freq = 2447, .hw_value = 8, },
  212. { .center_freq = 2452, .hw_value = 9, },
  213. { .center_freq = 2457, .hw_value = 10, },
  214. { .center_freq = 2462, .hw_value = 11, },
  215. };
  216. static const struct ieee80211_rate mwl8k_rates[] = {
  217. { .bitrate = 10, .hw_value = 2, },
  218. { .bitrate = 20, .hw_value = 4, },
  219. { .bitrate = 55, .hw_value = 11, },
  220. { .bitrate = 60, .hw_value = 12, },
  221. { .bitrate = 90, .hw_value = 18, },
  222. { .bitrate = 110, .hw_value = 22, },
  223. { .bitrate = 120, .hw_value = 24, },
  224. { .bitrate = 180, .hw_value = 36, },
  225. { .bitrate = 240, .hw_value = 48, },
  226. { .bitrate = 360, .hw_value = 72, },
  227. { .bitrate = 480, .hw_value = 96, },
  228. { .bitrate = 540, .hw_value = 108, },
  229. };
  230. /* Radio settings */
  231. #define MWL8K_RADIO_FORCE 0x2
  232. #define MWL8K_RADIO_ENABLE 0x1
  233. #define MWL8K_RADIO_DISABLE 0x0
  234. #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
  235. #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
  236. #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
  237. /* WMM */
  238. #define MWL8K_WMM_ENABLE 1
  239. #define MWL8K_WMM_DISABLE 0
  240. #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
  241. /* Slot time */
  242. /* Short Slot: 9us slot time */
  243. #define MWL8K_SHORT_SLOTTIME 1
  244. /* Long slot: 20us slot time */
  245. #define MWL8K_LONG_SLOTTIME 0
  246. /* Set or get info from Firmware */
  247. #define MWL8K_CMD_SET 0x0001
  248. #define MWL8K_CMD_GET 0x0000
  249. /* Firmware command codes */
  250. #define MWL8K_CMD_CODE_DNLD 0x0001
  251. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  252. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  253. #define MWL8K_CMD_GET_STAT 0x0014
  254. #define MWL8K_CMD_RADIO_CONTROL 0x001C
  255. #define MWL8K_CMD_RF_TX_POWER 0x001E
  256. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  257. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  258. #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
  259. #define MWL8K_CMD_SET_SLOT 0x0114
  260. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  261. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  262. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  263. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  264. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  265. #define MWL8K_CMD_UPDATE_STADB 0x1123
  266. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  267. #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
  268. #define MWL8K_CMD_SET_AID 0x010d
  269. #define MWL8K_CMD_SET_RATE 0x0110
  270. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  271. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  272. #define MWL8K_CMD_ENCRYPTION 0x1122
  273. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  274. {
  275. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  276. snprintf(buf, bufsize, "%s", #x);\
  277. return buf;\
  278. } while (0)
  279. switch (cmd & (~0x8000)) {
  280. MWL8K_CMDNAME(CODE_DNLD);
  281. MWL8K_CMDNAME(GET_HW_SPEC);
  282. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  283. MWL8K_CMDNAME(GET_STAT);
  284. MWL8K_CMDNAME(RADIO_CONTROL);
  285. MWL8K_CMDNAME(RF_TX_POWER);
  286. MWL8K_CMDNAME(SET_PRE_SCAN);
  287. MWL8K_CMDNAME(SET_POST_SCAN);
  288. MWL8K_CMDNAME(SET_RF_CHANNEL);
  289. MWL8K_CMDNAME(SET_SLOT);
  290. MWL8K_CMDNAME(MIMO_CONFIG);
  291. MWL8K_CMDNAME(ENABLE_SNIFFER);
  292. MWL8K_CMDNAME(SET_WMM_MODE);
  293. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  294. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  295. MWL8K_CMDNAME(UPDATE_STADB);
  296. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  297. MWL8K_CMDNAME(SET_LINKADAPT_MODE);
  298. MWL8K_CMDNAME(SET_AID);
  299. MWL8K_CMDNAME(SET_RATE);
  300. MWL8K_CMDNAME(USE_FIXED_RATE);
  301. MWL8K_CMDNAME(RTS_THRESHOLD);
  302. MWL8K_CMDNAME(ENCRYPTION);
  303. default:
  304. snprintf(buf, bufsize, "0x%x", cmd);
  305. }
  306. #undef MWL8K_CMDNAME
  307. return buf;
  308. }
  309. /* Hardware and firmware reset */
  310. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  311. {
  312. iowrite32(MWL8K_H2A_INT_RESET,
  313. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  314. iowrite32(MWL8K_H2A_INT_RESET,
  315. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  316. msleep(20);
  317. }
  318. /* Release fw image */
  319. static void mwl8k_release_fw(struct firmware **fw)
  320. {
  321. if (*fw == NULL)
  322. return;
  323. release_firmware(*fw);
  324. *fw = NULL;
  325. }
  326. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  327. {
  328. mwl8k_release_fw(&priv->fw.ucode);
  329. mwl8k_release_fw(&priv->fw.helper);
  330. }
  331. /* Request fw image */
  332. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  333. const char *fname, struct firmware **fw)
  334. {
  335. /* release current image */
  336. if (*fw != NULL)
  337. mwl8k_release_fw(fw);
  338. return request_firmware((const struct firmware **)fw,
  339. fname, &priv->pdev->dev);
  340. }
  341. static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
  342. {
  343. u8 filename[64];
  344. int rc;
  345. priv->part_num = part_num;
  346. snprintf(filename, sizeof(filename),
  347. "mwl8k/helper_%u.fw", priv->part_num);
  348. rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
  349. if (rc) {
  350. printk(KERN_ERR
  351. "%s Error requesting helper firmware file %s\n",
  352. pci_name(priv->pdev), filename);
  353. return rc;
  354. }
  355. snprintf(filename, sizeof(filename),
  356. "mwl8k/fmimage_%u.fw", priv->part_num);
  357. rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
  358. if (rc) {
  359. printk(KERN_ERR "%s Error requesting firmware file %s\n",
  360. pci_name(priv->pdev), filename);
  361. mwl8k_release_fw(&priv->fw.helper);
  362. return rc;
  363. }
  364. return 0;
  365. }
  366. struct mwl8k_cmd_pkt {
  367. __le16 code;
  368. __le16 length;
  369. __le16 seq_num;
  370. __le16 result;
  371. char payload[0];
  372. } __attribute__((packed));
  373. /*
  374. * Firmware loading.
  375. */
  376. static int
  377. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  378. {
  379. void __iomem *regs = priv->regs;
  380. dma_addr_t dma_addr;
  381. int rc;
  382. int loops;
  383. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  384. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  385. return -ENOMEM;
  386. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  387. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  388. iowrite32(MWL8K_H2A_INT_DOORBELL,
  389. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  390. iowrite32(MWL8K_H2A_INT_DUMMY,
  391. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  392. rc = -ETIMEDOUT;
  393. loops = 1000;
  394. do {
  395. u32 int_code;
  396. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  397. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  398. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  399. rc = 0;
  400. break;
  401. }
  402. udelay(1);
  403. } while (--loops);
  404. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  405. /*
  406. * Clear 'command done' interrupt bit.
  407. */
  408. loops = 1000;
  409. do {
  410. u32 status;
  411. status = ioread32(priv->regs +
  412. MWL8K_HIU_A2H_INTERRUPT_STATUS);
  413. if (status & MWL8K_A2H_INT_OPC_DONE) {
  414. iowrite32(~MWL8K_A2H_INT_OPC_DONE,
  415. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  416. ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  417. break;
  418. }
  419. udelay(1);
  420. } while (--loops);
  421. return rc;
  422. }
  423. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  424. const u8 *data, size_t length)
  425. {
  426. struct mwl8k_cmd_pkt *cmd;
  427. int done;
  428. int rc = 0;
  429. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  430. if (cmd == NULL)
  431. return -ENOMEM;
  432. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  433. cmd->seq_num = 0;
  434. cmd->result = 0;
  435. done = 0;
  436. while (length) {
  437. int block_size = length > 256 ? 256 : length;
  438. memcpy(cmd->payload, data + done, block_size);
  439. cmd->length = cpu_to_le16(block_size);
  440. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  441. sizeof(*cmd) + block_size);
  442. if (rc)
  443. break;
  444. done += block_size;
  445. length -= block_size;
  446. }
  447. if (!rc) {
  448. cmd->length = 0;
  449. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  450. }
  451. kfree(cmd);
  452. return rc;
  453. }
  454. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  455. const u8 *data, size_t length)
  456. {
  457. unsigned char *buffer;
  458. int may_continue, rc = 0;
  459. u32 done, prev_block_size;
  460. buffer = kmalloc(1024, GFP_KERNEL);
  461. if (buffer == NULL)
  462. return -ENOMEM;
  463. done = 0;
  464. prev_block_size = 0;
  465. may_continue = 1000;
  466. while (may_continue > 0) {
  467. u32 block_size;
  468. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  469. if (block_size & 1) {
  470. block_size &= ~1;
  471. may_continue--;
  472. } else {
  473. done += prev_block_size;
  474. length -= prev_block_size;
  475. }
  476. if (block_size > 1024 || block_size > length) {
  477. rc = -EOVERFLOW;
  478. break;
  479. }
  480. if (length == 0) {
  481. rc = 0;
  482. break;
  483. }
  484. if (block_size == 0) {
  485. rc = -EPROTO;
  486. may_continue--;
  487. udelay(1);
  488. continue;
  489. }
  490. prev_block_size = block_size;
  491. memcpy(buffer, data + done, block_size);
  492. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  493. if (rc)
  494. break;
  495. }
  496. if (!rc && length != 0)
  497. rc = -EREMOTEIO;
  498. kfree(buffer);
  499. return rc;
  500. }
  501. static int mwl8k_load_firmware(struct mwl8k_priv *priv)
  502. {
  503. int loops, rc;
  504. const u8 *ucode = priv->fw.ucode->data;
  505. size_t ucode_len = priv->fw.ucode->size;
  506. const u8 *helper = priv->fw.helper->data;
  507. size_t helper_len = priv->fw.helper->size;
  508. if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
  509. rc = mwl8k_load_fw_image(priv, helper, helper_len);
  510. if (rc) {
  511. printk(KERN_ERR "%s: unable to load firmware "
  512. "helper image\n", pci_name(priv->pdev));
  513. return rc;
  514. }
  515. msleep(1);
  516. rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
  517. } else {
  518. rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
  519. }
  520. if (rc) {
  521. printk(KERN_ERR "%s: unable to load firmware data\n",
  522. pci_name(priv->pdev));
  523. return rc;
  524. }
  525. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  526. msleep(1);
  527. loops = 200000;
  528. do {
  529. if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
  530. == MWL8K_FWSTA_READY)
  531. break;
  532. udelay(1);
  533. } while (--loops);
  534. return loops ? 0 : -ETIMEDOUT;
  535. }
  536. /*
  537. * Defines shared between transmission and reception.
  538. */
  539. /* HT control fields for firmware */
  540. struct ewc_ht_info {
  541. __le16 control1;
  542. __le16 control2;
  543. __le16 control3;
  544. } __attribute__((packed));
  545. /* Firmware Station database operations */
  546. #define MWL8K_STA_DB_ADD_ENTRY 0
  547. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  548. #define MWL8K_STA_DB_DEL_ENTRY 2
  549. #define MWL8K_STA_DB_FLUSH 3
  550. /* Peer Entry flags - used to define the type of the peer node */
  551. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  552. #define MWL8K_IEEE_LEGACY_DATA_RATES 12
  553. #define MWL8K_MCS_BITMAP_SIZE 16
  554. struct peer_capability_info {
  555. /* Peer type - AP vs. STA. */
  556. __u8 peer_type;
  557. /* Basic 802.11 capabilities from assoc resp. */
  558. __le16 basic_caps;
  559. /* Set if peer supports 802.11n high throughput (HT). */
  560. __u8 ht_support;
  561. /* Valid if HT is supported. */
  562. __le16 ht_caps;
  563. __u8 extended_ht_caps;
  564. struct ewc_ht_info ewc_info;
  565. /* Legacy rate table. Intersection of our rates and peer rates. */
  566. __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
  567. /* HT rate table. Intersection of our rates and peer rates. */
  568. __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
  569. __u8 pad[16];
  570. /* If set, interoperability mode, no proprietary extensions. */
  571. __u8 interop;
  572. __u8 pad2;
  573. __u8 station_id;
  574. __le16 amsdu_enabled;
  575. } __attribute__((packed));
  576. /* Inline functions to manipulate QoS field in data descriptor. */
  577. static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
  578. {
  579. u16 val_mask = 1 << 4;
  580. /* End of Service Period Bit 4 */
  581. return qos | val_mask;
  582. }
  583. static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
  584. {
  585. u16 val_mask = 0x3;
  586. u8 shift = 5;
  587. u16 qos_mask = ~(val_mask << shift);
  588. /* Ack Policy Bit 5-6 */
  589. return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
  590. }
  591. static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
  592. {
  593. u16 val_mask = 1 << 7;
  594. /* AMSDU present Bit 7 */
  595. return qos | val_mask;
  596. }
  597. static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
  598. {
  599. u16 val_mask = 0xff;
  600. u8 shift = 8;
  601. u16 qos_mask = ~(val_mask << shift);
  602. /* Queue Length Bits 8-15 */
  603. return (qos & qos_mask) | ((len & val_mask) << shift);
  604. }
  605. /* DMA header used by firmware and hardware. */
  606. struct mwl8k_dma_data {
  607. __le16 fwlen;
  608. struct ieee80211_hdr wh;
  609. } __attribute__((packed));
  610. /* Routines to add/remove DMA header from skb. */
  611. static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
  612. {
  613. struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
  614. void *dst, *src = &tr->wh;
  615. __le16 fc = tr->wh.frame_control;
  616. int hdrlen = ieee80211_hdrlen(fc);
  617. u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
  618. dst = (void *)tr + space;
  619. if (dst != src) {
  620. memmove(dst, src, hdrlen);
  621. skb_pull(skb, space);
  622. }
  623. return 0;
  624. }
  625. static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
  626. {
  627. struct ieee80211_hdr *wh;
  628. u32 hdrlen, pktlen;
  629. struct mwl8k_dma_data *tr;
  630. wh = (struct ieee80211_hdr *)skb->data;
  631. hdrlen = ieee80211_hdrlen(wh->frame_control);
  632. pktlen = skb->len;
  633. /*
  634. * Copy up/down the 802.11 header; the firmware requires
  635. * we present a 2-byte payload length followed by a
  636. * 4-address header (w/o QoS), followed (optionally) by
  637. * any WEP/ExtIV header (but only filled in for CCMP).
  638. */
  639. if (hdrlen != sizeof(struct mwl8k_dma_data))
  640. skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
  641. tr = (struct mwl8k_dma_data *)skb->data;
  642. if (wh != &tr->wh)
  643. memmove(&tr->wh, wh, hdrlen);
  644. /* Clear addr4 */
  645. memset(tr->wh.addr4, 0, ETH_ALEN);
  646. /*
  647. * Firmware length is the length of the fully formed "802.11
  648. * payload". That is, everything except for the 802.11 header.
  649. * This includes all crypto material including the MIC.
  650. */
  651. tr->fwlen = cpu_to_le16(pktlen - hdrlen);
  652. return skb;
  653. }
  654. /*
  655. * Packet reception.
  656. */
  657. #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
  658. struct mwl8k_rx_desc {
  659. __le16 pkt_len;
  660. __u8 link_quality;
  661. __u8 noise_level;
  662. __le32 pkt_phys_addr;
  663. __le32 next_rx_desc_phys_addr;
  664. __le16 qos_control;
  665. __le16 rate_info;
  666. __le32 pad0[4];
  667. __u8 rssi;
  668. __u8 channel;
  669. __le16 pad1;
  670. __u8 rx_ctrl;
  671. __u8 rx_status;
  672. __u8 pad2[2];
  673. } __attribute__((packed));
  674. #define MWL8K_RX_DESCS 256
  675. #define MWL8K_RX_MAXSZ 3800
  676. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  677. {
  678. struct mwl8k_priv *priv = hw->priv;
  679. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  680. int size;
  681. int i;
  682. rxq->rx_desc_count = 0;
  683. rxq->rx_head = 0;
  684. rxq->rx_tail = 0;
  685. size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
  686. rxq->rx_desc_area =
  687. pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
  688. if (rxq->rx_desc_area == NULL) {
  689. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  690. priv->name);
  691. return -ENOMEM;
  692. }
  693. memset(rxq->rx_desc_area, 0, size);
  694. rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
  695. sizeof(*rxq->rx_skb), GFP_KERNEL);
  696. if (rxq->rx_skb == NULL) {
  697. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  698. priv->name);
  699. pci_free_consistent(priv->pdev, size,
  700. rxq->rx_desc_area, rxq->rx_desc_dma);
  701. return -ENOMEM;
  702. }
  703. memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
  704. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  705. struct mwl8k_rx_desc *rx_desc;
  706. int nexti;
  707. rx_desc = rxq->rx_desc_area + i;
  708. nexti = (i + 1) % MWL8K_RX_DESCS;
  709. rx_desc->next_rx_desc_phys_addr =
  710. cpu_to_le32(rxq->rx_desc_dma
  711. + nexti * sizeof(*rx_desc));
  712. rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
  713. }
  714. return 0;
  715. }
  716. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  717. {
  718. struct mwl8k_priv *priv = hw->priv;
  719. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  720. int refilled;
  721. refilled = 0;
  722. while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
  723. struct sk_buff *skb;
  724. int rx;
  725. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  726. if (skb == NULL)
  727. break;
  728. rxq->rx_desc_count++;
  729. rx = rxq->rx_tail;
  730. rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
  731. rxq->rx_desc_area[rx].pkt_phys_addr =
  732. cpu_to_le32(pci_map_single(priv->pdev, skb->data,
  733. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
  734. rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
  735. rxq->rx_skb[rx] = skb;
  736. wmb();
  737. rxq->rx_desc_area[rx].rx_ctrl = 0;
  738. refilled++;
  739. }
  740. return refilled;
  741. }
  742. /* Must be called only when the card's reception is completely halted */
  743. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  744. {
  745. struct mwl8k_priv *priv = hw->priv;
  746. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  747. int i;
  748. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  749. if (rxq->rx_skb[i] != NULL) {
  750. unsigned long addr;
  751. addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
  752. pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
  753. PCI_DMA_FROMDEVICE);
  754. kfree_skb(rxq->rx_skb[i]);
  755. rxq->rx_skb[i] = NULL;
  756. }
  757. }
  758. kfree(rxq->rx_skb);
  759. rxq->rx_skb = NULL;
  760. pci_free_consistent(priv->pdev,
  761. MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
  762. rxq->rx_desc_area, rxq->rx_desc_dma);
  763. rxq->rx_desc_area = NULL;
  764. }
  765. /*
  766. * Scan a list of BSSIDs to process for finalize join.
  767. * Allows for extension to process multiple BSSIDs.
  768. */
  769. static inline int
  770. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  771. {
  772. return priv->capture_beacon &&
  773. ieee80211_is_beacon(wh->frame_control) &&
  774. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  775. }
  776. static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
  777. struct sk_buff *skb)
  778. {
  779. priv->capture_beacon = false;
  780. memset(priv->capture_bssid, 0, ETH_ALEN);
  781. /*
  782. * Use GFP_ATOMIC as rxq_process is called from
  783. * the primary interrupt handler, memory allocation call
  784. * must not sleep.
  785. */
  786. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  787. if (priv->beacon_skb != NULL)
  788. queue_work(priv->config_wq,
  789. &priv->finalize_join_worker);
  790. }
  791. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  792. {
  793. struct mwl8k_priv *priv = hw->priv;
  794. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  795. int processed;
  796. processed = 0;
  797. while (rxq->rx_desc_count && limit--) {
  798. struct mwl8k_rx_desc *rx_desc;
  799. struct sk_buff *skb;
  800. struct ieee80211_rx_status status;
  801. unsigned long addr;
  802. struct ieee80211_hdr *wh;
  803. rx_desc = rxq->rx_desc_area + rxq->rx_head;
  804. if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
  805. break;
  806. rmb();
  807. skb = rxq->rx_skb[rxq->rx_head];
  808. if (skb == NULL)
  809. break;
  810. rxq->rx_skb[rxq->rx_head] = NULL;
  811. rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
  812. rxq->rx_desc_count--;
  813. addr = le32_to_cpu(rx_desc->pkt_phys_addr);
  814. pci_unmap_single(priv->pdev, addr,
  815. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  816. skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
  817. if (mwl8k_remove_dma_header(skb)) {
  818. dev_kfree_skb(skb);
  819. continue;
  820. }
  821. wh = (struct ieee80211_hdr *)skb->data;
  822. /*
  823. * Check for pending join operation. save a copy of
  824. * the beacon and schedule a tasklet to send finalize
  825. * join command to the firmware.
  826. */
  827. if (mwl8k_capture_bssid(priv, wh))
  828. mwl8k_save_beacon(priv, skb);
  829. memset(&status, 0, sizeof(status));
  830. status.mactime = 0;
  831. status.signal = -rx_desc->rssi;
  832. status.noise = -rx_desc->noise_level;
  833. status.qual = rx_desc->link_quality;
  834. status.antenna = 1;
  835. status.rate_idx = 1;
  836. status.flag = 0;
  837. status.band = IEEE80211_BAND_2GHZ;
  838. status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
  839. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  840. ieee80211_rx_irqsafe(hw, skb);
  841. processed++;
  842. }
  843. return processed;
  844. }
  845. /*
  846. * Packet transmission.
  847. */
  848. /* Transmit queue assignment. */
  849. enum {
  850. MWL8K_WME_AC_BK = 0, /* background access */
  851. MWL8K_WME_AC_BE = 1, /* best effort access */
  852. MWL8K_WME_AC_VI = 2, /* video access */
  853. MWL8K_WME_AC_VO = 3, /* voice access */
  854. };
  855. /* Transmit packet ACK policy */
  856. #define MWL8K_TXD_ACK_POLICY_NORMAL 0
  857. #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
  858. #define GET_TXQ(_ac) (\
  859. ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
  860. ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
  861. ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
  862. MWL8K_WME_AC_BE)
  863. #define MWL8K_TXD_STATUS_OK 0x00000001
  864. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  865. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  866. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  867. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  868. struct mwl8k_tx_desc {
  869. __le32 status;
  870. __u8 data_rate;
  871. __u8 tx_priority;
  872. __le16 qos_control;
  873. __le32 pkt_phys_addr;
  874. __le16 pkt_len;
  875. __u8 dest_MAC_addr[ETH_ALEN];
  876. __le32 next_tx_desc_phys_addr;
  877. __le32 reserved;
  878. __le16 rate_info;
  879. __u8 peer_id;
  880. __u8 tx_frag_cnt;
  881. } __attribute__((packed));
  882. #define MWL8K_TX_DESCS 128
  883. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  884. {
  885. struct mwl8k_priv *priv = hw->priv;
  886. struct mwl8k_tx_queue *txq = priv->txq + index;
  887. int size;
  888. int i;
  889. memset(&txq->tx_stats, 0,
  890. sizeof(struct ieee80211_tx_queue_stats));
  891. txq->tx_stats.limit = MWL8K_TX_DESCS;
  892. txq->tx_head = 0;
  893. txq->tx_tail = 0;
  894. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  895. txq->tx_desc_area =
  896. pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
  897. if (txq->tx_desc_area == NULL) {
  898. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  899. priv->name);
  900. return -ENOMEM;
  901. }
  902. memset(txq->tx_desc_area, 0, size);
  903. txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
  904. GFP_KERNEL);
  905. if (txq->tx_skb == NULL) {
  906. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  907. priv->name);
  908. pci_free_consistent(priv->pdev, size,
  909. txq->tx_desc_area, txq->tx_desc_dma);
  910. return -ENOMEM;
  911. }
  912. memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
  913. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  914. struct mwl8k_tx_desc *tx_desc;
  915. int nexti;
  916. tx_desc = txq->tx_desc_area + i;
  917. nexti = (i + 1) % MWL8K_TX_DESCS;
  918. tx_desc->status = 0;
  919. tx_desc->next_tx_desc_phys_addr =
  920. cpu_to_le32(txq->tx_desc_dma +
  921. nexti * sizeof(*tx_desc));
  922. }
  923. return 0;
  924. }
  925. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  926. {
  927. iowrite32(MWL8K_H2A_INT_PPA_READY,
  928. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  929. iowrite32(MWL8K_H2A_INT_DUMMY,
  930. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  931. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  932. }
  933. static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
  934. {
  935. return priv->pending_tx_pkts;
  936. }
  937. struct mwl8k_txq_info {
  938. u32 fw_owned;
  939. u32 drv_owned;
  940. u32 unused;
  941. u32 len;
  942. u32 head;
  943. u32 tail;
  944. };
  945. static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
  946. struct mwl8k_txq_info txinfo[],
  947. u32 num_queues)
  948. {
  949. int count, desc, status;
  950. struct mwl8k_tx_queue *txq;
  951. struct mwl8k_tx_desc *tx_desc;
  952. int ndescs = 0;
  953. memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
  954. spin_lock_bh(&priv->tx_lock);
  955. for (count = 0; count < num_queues; count++) {
  956. txq = priv->txq + count;
  957. txinfo[count].len = txq->tx_stats.len;
  958. txinfo[count].head = txq->tx_head;
  959. txinfo[count].tail = txq->tx_tail;
  960. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  961. tx_desc = txq->tx_desc_area + desc;
  962. status = le32_to_cpu(tx_desc->status);
  963. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  964. txinfo[count].fw_owned++;
  965. else
  966. txinfo[count].drv_owned++;
  967. if (tx_desc->pkt_len == 0)
  968. txinfo[count].unused++;
  969. }
  970. }
  971. spin_unlock_bh(&priv->tx_lock);
  972. return ndescs;
  973. }
  974. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
  975. {
  976. u32 count = 0;
  977. unsigned long timeout = 0;
  978. struct mwl8k_priv *priv = hw->priv;
  979. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  980. might_sleep();
  981. if (priv->tx_wait != NULL)
  982. printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
  983. spin_lock_bh(&priv->tx_lock);
  984. count = mwl8k_txq_busy(priv);
  985. if (count) {
  986. priv->tx_wait = &cmd_wait;
  987. if (priv->radio_state)
  988. mwl8k_tx_start(priv);
  989. }
  990. spin_unlock_bh(&priv->tx_lock);
  991. if (count) {
  992. struct mwl8k_txq_info txinfo[4];
  993. int index;
  994. int newcount;
  995. timeout = wait_for_completion_timeout(&cmd_wait,
  996. msecs_to_jiffies(delay_ms));
  997. if (timeout)
  998. return 0;
  999. spin_lock_bh(&priv->tx_lock);
  1000. priv->tx_wait = NULL;
  1001. newcount = mwl8k_txq_busy(priv);
  1002. spin_unlock_bh(&priv->tx_lock);
  1003. printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
  1004. __func__, __LINE__, delay_ms, count, newcount);
  1005. mwl8k_scan_tx_ring(priv, txinfo, 4);
  1006. for (index = 0 ; index < 4; index++)
  1007. printk(KERN_ERR
  1008. "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
  1009. index,
  1010. txinfo[index].len,
  1011. txinfo[index].head,
  1012. txinfo[index].tail,
  1013. txinfo[index].fw_owned,
  1014. txinfo[index].drv_owned,
  1015. txinfo[index].unused);
  1016. return -ETIMEDOUT;
  1017. }
  1018. return 0;
  1019. }
  1020. #define MWL8K_TXD_SUCCESS(status) \
  1021. ((status) & (MWL8K_TXD_STATUS_OK | \
  1022. MWL8K_TXD_STATUS_OK_RETRY | \
  1023. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1024. static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
  1025. {
  1026. struct mwl8k_priv *priv = hw->priv;
  1027. struct mwl8k_tx_queue *txq = priv->txq + index;
  1028. int wake = 0;
  1029. while (txq->tx_stats.len > 0) {
  1030. int tx;
  1031. int rc;
  1032. struct mwl8k_tx_desc *tx_desc;
  1033. unsigned long addr;
  1034. size_t size;
  1035. struct sk_buff *skb;
  1036. struct ieee80211_tx_info *info;
  1037. u32 status;
  1038. rc = 0;
  1039. tx = txq->tx_head;
  1040. tx_desc = txq->tx_desc_area + tx;
  1041. status = le32_to_cpu(tx_desc->status);
  1042. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1043. if (!force)
  1044. break;
  1045. tx_desc->status &=
  1046. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1047. }
  1048. txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
  1049. BUG_ON(txq->tx_stats.len == 0);
  1050. txq->tx_stats.len--;
  1051. priv->pending_tx_pkts--;
  1052. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1053. size = (u32)(le16_to_cpu(tx_desc->pkt_len));
  1054. skb = txq->tx_skb[tx].skb;
  1055. txq->tx_skb[tx].skb = NULL;
  1056. BUG_ON(skb == NULL);
  1057. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1058. rc = mwl8k_remove_dma_header(skb);
  1059. /* Mark descriptor as unused */
  1060. tx_desc->pkt_phys_addr = 0;
  1061. tx_desc->pkt_len = 0;
  1062. if (txq->tx_skb[tx].clone) {
  1063. /* Replace with original skb
  1064. * before returning to stack
  1065. * as buffer has been cloned
  1066. */
  1067. dev_kfree_skb(skb);
  1068. skb = txq->tx_skb[tx].clone;
  1069. txq->tx_skb[tx].clone = NULL;
  1070. }
  1071. if (rc) {
  1072. /* Something has gone wrong here.
  1073. * Failed to remove DMA header.
  1074. * Print error message and drop packet.
  1075. */
  1076. printk(KERN_ERR "%s: Error removing DMA header from "
  1077. "tx skb 0x%p.\n", priv->name, skb);
  1078. dev_kfree_skb(skb);
  1079. continue;
  1080. }
  1081. info = IEEE80211_SKB_CB(skb);
  1082. ieee80211_tx_info_clear_status(info);
  1083. /* Convert firmware status stuff into tx_status */
  1084. if (MWL8K_TXD_SUCCESS(status)) {
  1085. /* Transmit OK */
  1086. info->flags |= IEEE80211_TX_STAT_ACK;
  1087. }
  1088. ieee80211_tx_status_irqsafe(hw, skb);
  1089. wake = !priv->inconfig && priv->radio_state;
  1090. }
  1091. if (wake)
  1092. ieee80211_wake_queue(hw, index);
  1093. }
  1094. /* must be called only when the card's transmit is completely halted */
  1095. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1096. {
  1097. struct mwl8k_priv *priv = hw->priv;
  1098. struct mwl8k_tx_queue *txq = priv->txq + index;
  1099. mwl8k_txq_reclaim(hw, index, 1);
  1100. kfree(txq->tx_skb);
  1101. txq->tx_skb = NULL;
  1102. pci_free_consistent(priv->pdev,
  1103. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1104. txq->tx_desc_area, txq->tx_desc_dma);
  1105. txq->tx_desc_area = NULL;
  1106. }
  1107. static int
  1108. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1109. {
  1110. struct mwl8k_priv *priv = hw->priv;
  1111. struct ieee80211_tx_info *tx_info;
  1112. struct ieee80211_hdr *wh;
  1113. struct mwl8k_tx_queue *txq;
  1114. struct mwl8k_tx_desc *tx;
  1115. struct mwl8k_dma_data *tr;
  1116. struct mwl8k_vif *mwl8k_vif;
  1117. struct sk_buff *org_skb = skb;
  1118. dma_addr_t dma;
  1119. u16 qos = 0;
  1120. bool qosframe = false, ampduframe = false;
  1121. bool mcframe = false, eapolframe = false;
  1122. bool amsduframe = false;
  1123. __le16 fc;
  1124. txq = priv->txq + index;
  1125. tx = txq->tx_desc_area + txq->tx_tail;
  1126. BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
  1127. /*
  1128. * Append HW DMA header to start of packet. Drop packet if
  1129. * there is not enough space or a failure to unshare/unclone
  1130. * the skb.
  1131. */
  1132. skb = mwl8k_add_dma_header(skb);
  1133. if (skb == NULL) {
  1134. printk(KERN_DEBUG "%s: failed to prepend HW DMA "
  1135. "header, dropping TX frame.\n", priv->name);
  1136. dev_kfree_skb(org_skb);
  1137. return NETDEV_TX_OK;
  1138. }
  1139. tx_info = IEEE80211_SKB_CB(skb);
  1140. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1141. tr = (struct mwl8k_dma_data *)skb->data;
  1142. wh = &tr->wh;
  1143. fc = wh->frame_control;
  1144. qosframe = ieee80211_is_data_qos(fc);
  1145. mcframe = is_multicast_ether_addr(wh->addr1);
  1146. ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
  1147. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1148. u16 seqno = mwl8k_vif->seqno;
  1149. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1150. wh->seq_ctrl |= cpu_to_le16(seqno << 4);
  1151. mwl8k_vif->seqno = seqno++ % 4096;
  1152. }
  1153. if (qosframe)
  1154. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1155. dma = pci_map_single(priv->pdev, skb->data,
  1156. skb->len, PCI_DMA_TODEVICE);
  1157. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1158. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1159. "dropping TX frame.\n", priv->name);
  1160. if (org_skb != NULL)
  1161. dev_kfree_skb(org_skb);
  1162. if (skb != NULL)
  1163. dev_kfree_skb(skb);
  1164. return NETDEV_TX_OK;
  1165. }
  1166. /* Set desc header, cpu bit order. */
  1167. tx->status = 0;
  1168. tx->data_rate = 0;
  1169. tx->tx_priority = index;
  1170. tx->qos_control = 0;
  1171. tx->rate_info = 0;
  1172. tx->peer_id = mwl8k_vif->peer_id;
  1173. amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
  1174. /* Setup firmware control bit fields for each frame type. */
  1175. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
  1176. tx->data_rate = 0;
  1177. qos = mwl8k_qos_setbit_eosp(qos);
  1178. /* Set Queue size to unspecified */
  1179. qos = mwl8k_qos_setbit_qlen(qos, 0xff);
  1180. } else if (ieee80211_is_data(fc)) {
  1181. tx->data_rate = 1;
  1182. if (mcframe)
  1183. tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1184. /*
  1185. * Tell firmware to not send EAPOL pkts in an
  1186. * aggregate. Verify against mac80211 tx path. If
  1187. * stack turns off AMPDU for an EAPOL frame this
  1188. * check will be removed.
  1189. */
  1190. if (eapolframe) {
  1191. qos = mwl8k_qos_setbit_ack(qos,
  1192. MWL8K_TXD_ACK_POLICY_NORMAL);
  1193. } else {
  1194. /* Send pkt in an aggregate if AMPDU frame. */
  1195. if (ampduframe)
  1196. qos = mwl8k_qos_setbit_ack(qos,
  1197. MWL8K_TXD_ACK_POLICY_BLOCKACK);
  1198. else
  1199. qos = mwl8k_qos_setbit_ack(qos,
  1200. MWL8K_TXD_ACK_POLICY_NORMAL);
  1201. if (amsduframe)
  1202. qos = mwl8k_qos_setbit_amsdu(qos);
  1203. }
  1204. }
  1205. /* Convert to little endian */
  1206. tx->qos_control = cpu_to_le16(qos);
  1207. tx->status = cpu_to_le32(tx->status);
  1208. tx->pkt_phys_addr = cpu_to_le32(dma);
  1209. tx->pkt_len = cpu_to_le16(skb->len);
  1210. txq->tx_skb[txq->tx_tail].skb = skb;
  1211. txq->tx_skb[txq->tx_tail].clone =
  1212. skb == org_skb ? NULL : org_skb;
  1213. spin_lock_bh(&priv->tx_lock);
  1214. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
  1215. MWL8K_TXD_STATUS_FW_OWNED);
  1216. wmb();
  1217. txq->tx_stats.len++;
  1218. priv->pending_tx_pkts++;
  1219. txq->tx_stats.count++;
  1220. txq->tx_tail++;
  1221. if (txq->tx_tail == MWL8K_TX_DESCS)
  1222. txq->tx_tail = 0;
  1223. if (txq->tx_head == txq->tx_tail)
  1224. ieee80211_stop_queue(hw, index);
  1225. if (priv->inconfig) {
  1226. /*
  1227. * Silently queue packet when we are in the middle of
  1228. * a config cycle. Notify firmware only if we are
  1229. * waiting for TXQs to empty. If a packet is sent
  1230. * before .config() is complete, perhaps it is better
  1231. * to drop the packet, as the channel is being changed
  1232. * and the packet will end up on the wrong channel.
  1233. */
  1234. printk(KERN_ERR "%s(): WARNING TX activity while "
  1235. "in config\n", __func__);
  1236. if (priv->tx_wait != NULL)
  1237. mwl8k_tx_start(priv);
  1238. } else
  1239. mwl8k_tx_start(priv);
  1240. spin_unlock_bh(&priv->tx_lock);
  1241. return NETDEV_TX_OK;
  1242. }
  1243. /*
  1244. * Command processing.
  1245. */
  1246. /* Timeout firmware commands after 2000ms */
  1247. #define MWL8K_CMD_TIMEOUT_MS 2000
  1248. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1249. {
  1250. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1251. struct mwl8k_priv *priv = hw->priv;
  1252. void __iomem *regs = priv->regs;
  1253. dma_addr_t dma_addr;
  1254. unsigned int dma_size;
  1255. int rc;
  1256. u16 __iomem *result;
  1257. unsigned long timeout = 0;
  1258. u8 buf[32];
  1259. cmd->result = 0xFFFF;
  1260. dma_size = le16_to_cpu(cmd->length);
  1261. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1262. PCI_DMA_BIDIRECTIONAL);
  1263. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1264. return -ENOMEM;
  1265. if (priv->hostcmd_wait != NULL)
  1266. printk(KERN_ERR "WARNING host command in progress\n");
  1267. spin_lock_irq(&priv->fw_lock);
  1268. priv->hostcmd_wait = &cmd_wait;
  1269. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1270. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1271. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1272. iowrite32(MWL8K_H2A_INT_DUMMY,
  1273. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1274. spin_unlock_irq(&priv->fw_lock);
  1275. timeout = wait_for_completion_timeout(&cmd_wait,
  1276. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1277. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1278. PCI_DMA_BIDIRECTIONAL);
  1279. result = &cmd->result;
  1280. if (!timeout) {
  1281. spin_lock_irq(&priv->fw_lock);
  1282. priv->hostcmd_wait = NULL;
  1283. spin_unlock_irq(&priv->fw_lock);
  1284. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1285. priv->name,
  1286. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1287. MWL8K_CMD_TIMEOUT_MS);
  1288. rc = -ETIMEDOUT;
  1289. } else {
  1290. rc = *result ? -EINVAL : 0;
  1291. if (rc)
  1292. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1293. priv->name,
  1294. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1295. *result);
  1296. }
  1297. return rc;
  1298. }
  1299. /*
  1300. * GET_HW_SPEC.
  1301. */
  1302. struct mwl8k_cmd_get_hw_spec {
  1303. struct mwl8k_cmd_pkt header;
  1304. __u8 hw_rev;
  1305. __u8 host_interface;
  1306. __le16 num_mcaddrs;
  1307. __u8 perm_addr[ETH_ALEN];
  1308. __le16 region_code;
  1309. __le32 fw_rev;
  1310. __le32 ps_cookie;
  1311. __le32 caps;
  1312. __u8 mcs_bitmap[16];
  1313. __le32 rx_queue_ptr;
  1314. __le32 num_tx_queues;
  1315. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1316. __le32 caps2;
  1317. __le32 num_tx_desc_per_queue;
  1318. __le32 total_rx_desc;
  1319. } __attribute__((packed));
  1320. static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
  1321. {
  1322. struct mwl8k_priv *priv = hw->priv;
  1323. struct mwl8k_cmd_get_hw_spec *cmd;
  1324. int rc;
  1325. int i;
  1326. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1327. if (cmd == NULL)
  1328. return -ENOMEM;
  1329. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1330. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1331. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1332. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1333. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
  1334. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1335. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1336. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
  1337. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1338. cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
  1339. rc = mwl8k_post_cmd(hw, &cmd->header);
  1340. if (!rc) {
  1341. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1342. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1343. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1344. priv->hw_rev = cmd->hw_rev;
  1345. }
  1346. kfree(cmd);
  1347. return rc;
  1348. }
  1349. /*
  1350. * CMD_MAC_MULTICAST_ADR.
  1351. */
  1352. struct mwl8k_cmd_mac_multicast_adr {
  1353. struct mwl8k_cmd_pkt header;
  1354. __le16 action;
  1355. __le16 numaddr;
  1356. __u8 addr[1][ETH_ALEN];
  1357. };
  1358. #define MWL8K_ENABLE_RX_MULTICAST 0x000F
  1359. static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
  1360. int mc_count,
  1361. struct dev_addr_list *mclist)
  1362. {
  1363. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1364. int index = 0;
  1365. int rc;
  1366. int size = sizeof(*cmd) + ((mc_count - 1) * ETH_ALEN);
  1367. cmd = kzalloc(size, GFP_KERNEL);
  1368. if (cmd == NULL)
  1369. return -ENOMEM;
  1370. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1371. cmd->header.length = cpu_to_le16(size);
  1372. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1373. cmd->numaddr = cpu_to_le16(mc_count);
  1374. while ((index < mc_count) && mclist) {
  1375. if (mclist->da_addrlen != ETH_ALEN) {
  1376. rc = -EINVAL;
  1377. goto mwl8k_cmd_mac_multicast_adr_exit;
  1378. }
  1379. memcpy(cmd->addr[index], mclist->da_addr, ETH_ALEN);
  1380. index++;
  1381. mclist = mclist->next;
  1382. }
  1383. rc = mwl8k_post_cmd(hw, &cmd->header);
  1384. mwl8k_cmd_mac_multicast_adr_exit:
  1385. kfree(cmd);
  1386. return rc;
  1387. }
  1388. /*
  1389. * CMD_802_11_GET_STAT.
  1390. */
  1391. struct mwl8k_cmd_802_11_get_stat {
  1392. struct mwl8k_cmd_pkt header;
  1393. __le16 action;
  1394. __le32 stats[64];
  1395. } __attribute__((packed));
  1396. #define MWL8K_STAT_ACK_FAILURE 9
  1397. #define MWL8K_STAT_RTS_FAILURE 12
  1398. #define MWL8K_STAT_FCS_ERROR 24
  1399. #define MWL8K_STAT_RTS_SUCCESS 11
  1400. static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
  1401. struct ieee80211_low_level_stats *stats)
  1402. {
  1403. struct mwl8k_cmd_802_11_get_stat *cmd;
  1404. int rc;
  1405. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1406. if (cmd == NULL)
  1407. return -ENOMEM;
  1408. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1409. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1410. cmd->action = cpu_to_le16(MWL8K_CMD_GET);
  1411. rc = mwl8k_post_cmd(hw, &cmd->header);
  1412. if (!rc) {
  1413. stats->dot11ACKFailureCount =
  1414. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1415. stats->dot11RTSFailureCount =
  1416. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1417. stats->dot11FCSErrorCount =
  1418. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1419. stats->dot11RTSSuccessCount =
  1420. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1421. }
  1422. kfree(cmd);
  1423. return rc;
  1424. }
  1425. /*
  1426. * CMD_802_11_RADIO_CONTROL.
  1427. */
  1428. struct mwl8k_cmd_802_11_radio_control {
  1429. struct mwl8k_cmd_pkt header;
  1430. __le16 action;
  1431. __le16 control;
  1432. __le16 radio_on;
  1433. } __attribute__((packed));
  1434. static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
  1435. {
  1436. struct mwl8k_priv *priv = hw->priv;
  1437. struct mwl8k_cmd_802_11_radio_control *cmd;
  1438. int rc;
  1439. if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
  1440. !(enable & MWL8K_RADIO_FORCE))
  1441. return 0;
  1442. enable &= MWL8K_RADIO_ENABLE;
  1443. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1444. if (cmd == NULL)
  1445. return -ENOMEM;
  1446. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1447. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1448. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1449. cmd->control = cpu_to_le16(priv->radio_preamble);
  1450. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1451. rc = mwl8k_post_cmd(hw, &cmd->header);
  1452. kfree(cmd);
  1453. if (!rc)
  1454. priv->radio_state = enable;
  1455. return rc;
  1456. }
  1457. static int
  1458. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1459. {
  1460. struct mwl8k_priv *priv;
  1461. if (hw == NULL || hw->priv == NULL)
  1462. return -EINVAL;
  1463. priv = hw->priv;
  1464. priv->radio_preamble = (short_preamble ?
  1465. MWL8K_RADIO_SHORT_PREAMBLE :
  1466. MWL8K_RADIO_LONG_PREAMBLE);
  1467. return mwl8k_cmd_802_11_radio_control(hw,
  1468. MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
  1469. }
  1470. /*
  1471. * CMD_802_11_RF_TX_POWER.
  1472. */
  1473. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1474. struct mwl8k_cmd_802_11_rf_tx_power {
  1475. struct mwl8k_cmd_pkt header;
  1476. __le16 action;
  1477. __le16 support_level;
  1478. __le16 current_level;
  1479. __le16 reserved;
  1480. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1481. } __attribute__((packed));
  1482. static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1483. {
  1484. struct mwl8k_cmd_802_11_rf_tx_power *cmd;
  1485. int rc;
  1486. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1487. if (cmd == NULL)
  1488. return -ENOMEM;
  1489. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1490. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1491. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1492. cmd->support_level = cpu_to_le16(dBm);
  1493. rc = mwl8k_post_cmd(hw, &cmd->header);
  1494. kfree(cmd);
  1495. return rc;
  1496. }
  1497. /*
  1498. * CMD_SET_PRE_SCAN.
  1499. */
  1500. struct mwl8k_cmd_set_pre_scan {
  1501. struct mwl8k_cmd_pkt header;
  1502. } __attribute__((packed));
  1503. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1504. {
  1505. struct mwl8k_cmd_set_pre_scan *cmd;
  1506. int rc;
  1507. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1508. if (cmd == NULL)
  1509. return -ENOMEM;
  1510. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1511. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1512. rc = mwl8k_post_cmd(hw, &cmd->header);
  1513. kfree(cmd);
  1514. return rc;
  1515. }
  1516. /*
  1517. * CMD_SET_POST_SCAN.
  1518. */
  1519. struct mwl8k_cmd_set_post_scan {
  1520. struct mwl8k_cmd_pkt header;
  1521. __le32 isibss;
  1522. __u8 bssid[ETH_ALEN];
  1523. } __attribute__((packed));
  1524. static int
  1525. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[ETH_ALEN])
  1526. {
  1527. struct mwl8k_cmd_set_post_scan *cmd;
  1528. int rc;
  1529. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1530. if (cmd == NULL)
  1531. return -ENOMEM;
  1532. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1533. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1534. cmd->isibss = 0;
  1535. memcpy(cmd->bssid, mac, ETH_ALEN);
  1536. rc = mwl8k_post_cmd(hw, &cmd->header);
  1537. kfree(cmd);
  1538. return rc;
  1539. }
  1540. /*
  1541. * CMD_SET_RF_CHANNEL.
  1542. */
  1543. struct mwl8k_cmd_set_rf_channel {
  1544. struct mwl8k_cmd_pkt header;
  1545. __le16 action;
  1546. __u8 current_channel;
  1547. __le32 channel_flags;
  1548. } __attribute__((packed));
  1549. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1550. struct ieee80211_channel *channel)
  1551. {
  1552. struct mwl8k_cmd_set_rf_channel *cmd;
  1553. int rc;
  1554. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1555. if (cmd == NULL)
  1556. return -ENOMEM;
  1557. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1558. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1559. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1560. cmd->current_channel = channel->hw_value;
  1561. if (channel->band == IEEE80211_BAND_2GHZ)
  1562. cmd->channel_flags = cpu_to_le32(0x00000081);
  1563. else
  1564. cmd->channel_flags = cpu_to_le32(0x00000000);
  1565. rc = mwl8k_post_cmd(hw, &cmd->header);
  1566. kfree(cmd);
  1567. return rc;
  1568. }
  1569. /*
  1570. * CMD_SET_SLOT.
  1571. */
  1572. struct mwl8k_cmd_set_slot {
  1573. struct mwl8k_cmd_pkt header;
  1574. __le16 action;
  1575. __u8 short_slot;
  1576. } __attribute__((packed));
  1577. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
  1578. {
  1579. struct mwl8k_cmd_set_slot *cmd;
  1580. int rc;
  1581. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1582. if (cmd == NULL)
  1583. return -ENOMEM;
  1584. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  1585. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1586. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1587. cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
  1588. rc = mwl8k_post_cmd(hw, &cmd->header);
  1589. kfree(cmd);
  1590. return rc;
  1591. }
  1592. /*
  1593. * CMD_MIMO_CONFIG.
  1594. */
  1595. struct mwl8k_cmd_mimo_config {
  1596. struct mwl8k_cmd_pkt header;
  1597. __le32 action;
  1598. __u8 rx_antenna_map;
  1599. __u8 tx_antenna_map;
  1600. } __attribute__((packed));
  1601. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  1602. {
  1603. struct mwl8k_cmd_mimo_config *cmd;
  1604. int rc;
  1605. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1606. if (cmd == NULL)
  1607. return -ENOMEM;
  1608. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  1609. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1610. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  1611. cmd->rx_antenna_map = rx;
  1612. cmd->tx_antenna_map = tx;
  1613. rc = mwl8k_post_cmd(hw, &cmd->header);
  1614. kfree(cmd);
  1615. return rc;
  1616. }
  1617. /*
  1618. * CMD_ENABLE_SNIFFER.
  1619. */
  1620. struct mwl8k_cmd_enable_sniffer {
  1621. struct mwl8k_cmd_pkt header;
  1622. __le32 action;
  1623. } __attribute__((packed));
  1624. static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  1625. {
  1626. struct mwl8k_cmd_enable_sniffer *cmd;
  1627. int rc;
  1628. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1629. if (cmd == NULL)
  1630. return -ENOMEM;
  1631. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  1632. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1633. cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
  1634. rc = mwl8k_post_cmd(hw, &cmd->header);
  1635. kfree(cmd);
  1636. return rc;
  1637. }
  1638. /*
  1639. * CMD_SET_RATE_ADAPT_MODE.
  1640. */
  1641. struct mwl8k_cmd_set_rate_adapt_mode {
  1642. struct mwl8k_cmd_pkt header;
  1643. __le16 action;
  1644. __le16 mode;
  1645. } __attribute__((packed));
  1646. static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
  1647. {
  1648. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  1649. int rc;
  1650. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1651. if (cmd == NULL)
  1652. return -ENOMEM;
  1653. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  1654. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1655. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1656. cmd->mode = cpu_to_le16(mode);
  1657. rc = mwl8k_post_cmd(hw, &cmd->header);
  1658. kfree(cmd);
  1659. return rc;
  1660. }
  1661. /*
  1662. * CMD_SET_WMM_MODE.
  1663. */
  1664. struct mwl8k_cmd_set_wmm {
  1665. struct mwl8k_cmd_pkt header;
  1666. __le16 action;
  1667. } __attribute__((packed));
  1668. static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
  1669. {
  1670. struct mwl8k_priv *priv = hw->priv;
  1671. struct mwl8k_cmd_set_wmm *cmd;
  1672. int rc;
  1673. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1674. if (cmd == NULL)
  1675. return -ENOMEM;
  1676. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  1677. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1678. cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
  1679. rc = mwl8k_post_cmd(hw, &cmd->header);
  1680. kfree(cmd);
  1681. if (!rc)
  1682. priv->wmm_mode = enable;
  1683. return rc;
  1684. }
  1685. /*
  1686. * CMD_SET_RTS_THRESHOLD.
  1687. */
  1688. struct mwl8k_cmd_rts_threshold {
  1689. struct mwl8k_cmd_pkt header;
  1690. __le16 action;
  1691. __le16 threshold;
  1692. } __attribute__((packed));
  1693. static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
  1694. u16 action, u16 *threshold)
  1695. {
  1696. struct mwl8k_cmd_rts_threshold *cmd;
  1697. int rc;
  1698. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1699. if (cmd == NULL)
  1700. return -ENOMEM;
  1701. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  1702. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1703. cmd->action = cpu_to_le16(action);
  1704. cmd->threshold = cpu_to_le16(*threshold);
  1705. rc = mwl8k_post_cmd(hw, &cmd->header);
  1706. kfree(cmd);
  1707. return rc;
  1708. }
  1709. /*
  1710. * CMD_SET_EDCA_PARAMS.
  1711. */
  1712. struct mwl8k_cmd_set_edca_params {
  1713. struct mwl8k_cmd_pkt header;
  1714. /* See MWL8K_SET_EDCA_XXX below */
  1715. __le16 action;
  1716. /* TX opportunity in units of 32 us */
  1717. __le16 txop;
  1718. /* Log exponent of max contention period: 0...15*/
  1719. __u8 log_cw_max;
  1720. /* Log exponent of min contention period: 0...15 */
  1721. __u8 log_cw_min;
  1722. /* Adaptive interframe spacing in units of 32us */
  1723. __u8 aifs;
  1724. /* TX queue to configure */
  1725. __u8 txq;
  1726. } __attribute__((packed));
  1727. #define MWL8K_SET_EDCA_CW 0x01
  1728. #define MWL8K_SET_EDCA_TXOP 0x02
  1729. #define MWL8K_SET_EDCA_AIFS 0x04
  1730. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  1731. MWL8K_SET_EDCA_TXOP | \
  1732. MWL8K_SET_EDCA_AIFS)
  1733. static int
  1734. mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  1735. __u16 cw_min, __u16 cw_max,
  1736. __u8 aifs, __u16 txop)
  1737. {
  1738. struct mwl8k_cmd_set_edca_params *cmd;
  1739. u32 log_cw_min, log_cw_max;
  1740. int rc;
  1741. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1742. if (cmd == NULL)
  1743. return -ENOMEM;
  1744. log_cw_min = ilog2(cw_min+1);
  1745. log_cw_max = ilog2(cw_max+1);
  1746. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  1747. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1748. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  1749. cmd->txop = cpu_to_le16(txop);
  1750. cmd->log_cw_max = (u8)log_cw_max;
  1751. cmd->log_cw_min = (u8)log_cw_min;
  1752. cmd->aifs = aifs;
  1753. cmd->txq = qnum;
  1754. rc = mwl8k_post_cmd(hw, &cmd->header);
  1755. kfree(cmd);
  1756. return rc;
  1757. }
  1758. /*
  1759. * CMD_FINALIZE_JOIN.
  1760. */
  1761. /* FJ beacon buffer size is compiled into the firmware. */
  1762. #define MWL8K_FJ_BEACON_MAXLEN 128
  1763. struct mwl8k_cmd_finalize_join {
  1764. struct mwl8k_cmd_pkt header;
  1765. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1766. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1767. } __attribute__((packed));
  1768. static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
  1769. __u16 framelen, __u16 dtim)
  1770. {
  1771. struct mwl8k_cmd_finalize_join *cmd;
  1772. struct ieee80211_mgmt *payload = frame;
  1773. u16 hdrlen;
  1774. u32 payload_len;
  1775. int rc;
  1776. if (frame == NULL)
  1777. return -EINVAL;
  1778. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1779. if (cmd == NULL)
  1780. return -ENOMEM;
  1781. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1782. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1783. if (dtim)
  1784. cmd->sleep_interval = cpu_to_le32(dtim);
  1785. else
  1786. cmd->sleep_interval = cpu_to_le32(1);
  1787. hdrlen = ieee80211_hdrlen(payload->frame_control);
  1788. payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
  1789. /* XXX TBD Might just have to abort and return an error */
  1790. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1791. printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
  1792. "sent to firmware. Sz=%u MAX=%u\n", __func__,
  1793. payload_len, MWL8K_FJ_BEACON_MAXLEN);
  1794. payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
  1795. MWL8K_FJ_BEACON_MAXLEN : payload_len;
  1796. if (payload && payload_len)
  1797. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1798. rc = mwl8k_post_cmd(hw, &cmd->header);
  1799. kfree(cmd);
  1800. return rc;
  1801. }
  1802. /*
  1803. * CMD_UPDATE_STADB.
  1804. */
  1805. struct mwl8k_cmd_update_sta_db {
  1806. struct mwl8k_cmd_pkt header;
  1807. /* See STADB_ACTION_TYPE */
  1808. __le32 action;
  1809. /* Peer MAC address */
  1810. __u8 peer_addr[ETH_ALEN];
  1811. __le32 reserved;
  1812. /* Peer info - valid during add/update. */
  1813. struct peer_capability_info peer_info;
  1814. } __attribute__((packed));
  1815. static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
  1816. struct ieee80211_vif *vif, __u32 action)
  1817. {
  1818. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1819. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1820. struct mwl8k_cmd_update_sta_db *cmd;
  1821. struct peer_capability_info *peer_info;
  1822. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1823. int rc;
  1824. __u8 count, *rates;
  1825. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1826. if (cmd == NULL)
  1827. return -ENOMEM;
  1828. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  1829. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1830. cmd->action = cpu_to_le32(action);
  1831. peer_info = &cmd->peer_info;
  1832. memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
  1833. switch (action) {
  1834. case MWL8K_STA_DB_ADD_ENTRY:
  1835. case MWL8K_STA_DB_MODIFY_ENTRY:
  1836. /* Build peer_info block */
  1837. peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  1838. peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
  1839. peer_info->interop = 1;
  1840. peer_info->amsdu_enabled = 0;
  1841. rates = peer_info->legacy_rates;
  1842. for (count = 0 ; count < mv_vif->legacy_nrates; count++)
  1843. rates[count] = bitrates[count].hw_value;
  1844. rc = mwl8k_post_cmd(hw, &cmd->header);
  1845. if (rc == 0)
  1846. mv_vif->peer_id = peer_info->station_id;
  1847. break;
  1848. case MWL8K_STA_DB_DEL_ENTRY:
  1849. case MWL8K_STA_DB_FLUSH:
  1850. default:
  1851. rc = mwl8k_post_cmd(hw, &cmd->header);
  1852. if (rc == 0)
  1853. mv_vif->peer_id = 0;
  1854. break;
  1855. }
  1856. kfree(cmd);
  1857. return rc;
  1858. }
  1859. /*
  1860. * CMD_SET_AID.
  1861. */
  1862. #define MWL8K_RATE_INDEX_MAX_ARRAY 14
  1863. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1864. #define MWL8K_FRAME_PROT_11G 0x07
  1865. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1866. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1867. struct mwl8k_cmd_update_set_aid {
  1868. struct mwl8k_cmd_pkt header;
  1869. __le16 aid;
  1870. /* AP's MAC address (BSSID) */
  1871. __u8 bssid[ETH_ALEN];
  1872. __le16 protection_mode;
  1873. __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1874. } __attribute__((packed));
  1875. static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1876. struct ieee80211_vif *vif)
  1877. {
  1878. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1879. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1880. struct mwl8k_cmd_update_set_aid *cmd;
  1881. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1882. int count;
  1883. u16 prot_mode;
  1884. int rc;
  1885. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1886. if (cmd == NULL)
  1887. return -ENOMEM;
  1888. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1889. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1890. cmd->aid = cpu_to_le16(info->aid);
  1891. memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
  1892. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1893. if (info->use_cts_prot) {
  1894. prot_mode = MWL8K_FRAME_PROT_11G;
  1895. } else {
  1896. switch (info->ht_operation_mode &
  1897. IEEE80211_HT_OP_MODE_PROTECTION) {
  1898. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1899. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1900. break;
  1901. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1902. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1903. break;
  1904. default:
  1905. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1906. break;
  1907. }
  1908. }
  1909. cmd->protection_mode = cpu_to_le16(prot_mode);
  1910. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1911. cmd->supp_rates[count] = bitrates[count].hw_value;
  1912. rc = mwl8k_post_cmd(hw, &cmd->header);
  1913. kfree(cmd);
  1914. return rc;
  1915. }
  1916. /*
  1917. * CMD_SET_RATE.
  1918. */
  1919. struct mwl8k_cmd_update_rateset {
  1920. struct mwl8k_cmd_pkt header;
  1921. __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1922. /* Bitmap for supported MCS codes. */
  1923. __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
  1924. __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
  1925. } __attribute__((packed));
  1926. static int mwl8k_update_rateset(struct ieee80211_hw *hw,
  1927. struct ieee80211_vif *vif)
  1928. {
  1929. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1930. struct mwl8k_cmd_update_rateset *cmd;
  1931. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1932. int count;
  1933. int rc;
  1934. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1935. if (cmd == NULL)
  1936. return -ENOMEM;
  1937. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1938. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1939. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1940. cmd->legacy_rates[count] = bitrates[count].hw_value;
  1941. rc = mwl8k_post_cmd(hw, &cmd->header);
  1942. kfree(cmd);
  1943. return rc;
  1944. }
  1945. /*
  1946. * CMD_USE_FIXED_RATE.
  1947. */
  1948. #define MWL8K_RATE_TABLE_SIZE 8
  1949. #define MWL8K_UCAST_RATE 0
  1950. #define MWL8K_USE_AUTO_RATE 0x0002
  1951. struct mwl8k_rate_entry {
  1952. /* Set to 1 if HT rate, 0 if legacy. */
  1953. __le32 is_ht_rate;
  1954. /* Set to 1 to use retry_count field. */
  1955. __le32 enable_retry;
  1956. /* Specified legacy rate or MCS. */
  1957. __le32 rate;
  1958. /* Number of allowed retries. */
  1959. __le32 retry_count;
  1960. } __attribute__((packed));
  1961. struct mwl8k_rate_table {
  1962. /* 1 to allow specified rate and below */
  1963. __le32 allow_rate_drop;
  1964. __le32 num_rates;
  1965. struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
  1966. } __attribute__((packed));
  1967. struct mwl8k_cmd_use_fixed_rate {
  1968. struct mwl8k_cmd_pkt header;
  1969. __le32 action;
  1970. struct mwl8k_rate_table rate_table;
  1971. /* Unicast, Broadcast or Multicast */
  1972. __le32 rate_type;
  1973. __le32 reserved1;
  1974. __le32 reserved2;
  1975. } __attribute__((packed));
  1976. static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
  1977. u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
  1978. {
  1979. struct mwl8k_cmd_use_fixed_rate *cmd;
  1980. int count;
  1981. int rc;
  1982. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1983. if (cmd == NULL)
  1984. return -ENOMEM;
  1985. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  1986. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1987. cmd->action = cpu_to_le32(action);
  1988. cmd->rate_type = cpu_to_le32(rate_type);
  1989. if (rate_table != NULL) {
  1990. /* Copy over each field manually so
  1991. * that bitflipping can be done
  1992. */
  1993. cmd->rate_table.allow_rate_drop =
  1994. cpu_to_le32(rate_table->allow_rate_drop);
  1995. cmd->rate_table.num_rates =
  1996. cpu_to_le32(rate_table->num_rates);
  1997. for (count = 0; count < rate_table->num_rates; count++) {
  1998. struct mwl8k_rate_entry *dst =
  1999. &cmd->rate_table.rate_entry[count];
  2000. struct mwl8k_rate_entry *src =
  2001. &rate_table->rate_entry[count];
  2002. dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
  2003. dst->enable_retry = cpu_to_le32(src->enable_retry);
  2004. dst->rate = cpu_to_le32(src->rate);
  2005. dst->retry_count = cpu_to_le32(src->retry_count);
  2006. }
  2007. }
  2008. rc = mwl8k_post_cmd(hw, &cmd->header);
  2009. kfree(cmd);
  2010. return rc;
  2011. }
  2012. /*
  2013. * Interrupt handling.
  2014. */
  2015. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2016. {
  2017. struct ieee80211_hw *hw = dev_id;
  2018. struct mwl8k_priv *priv = hw->priv;
  2019. u32 status;
  2020. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2021. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2022. if (!status)
  2023. return IRQ_NONE;
  2024. if (status & MWL8K_A2H_INT_TX_DONE)
  2025. tasklet_schedule(&priv->tx_reclaim_task);
  2026. if (status & MWL8K_A2H_INT_RX_READY) {
  2027. while (rxq_process(hw, 0, 1))
  2028. rxq_refill(hw, 0, 1);
  2029. }
  2030. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2031. if (priv->hostcmd_wait != NULL) {
  2032. complete(priv->hostcmd_wait);
  2033. priv->hostcmd_wait = NULL;
  2034. }
  2035. }
  2036. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2037. if (!priv->inconfig &&
  2038. priv->radio_state &&
  2039. mwl8k_txq_busy(priv))
  2040. mwl8k_tx_start(priv);
  2041. }
  2042. return IRQ_HANDLED;
  2043. }
  2044. /*
  2045. * Core driver operations.
  2046. */
  2047. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2048. {
  2049. struct mwl8k_priv *priv = hw->priv;
  2050. int index = skb_get_queue_mapping(skb);
  2051. int rc;
  2052. if (priv->current_channel == NULL) {
  2053. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2054. "disabled\n", priv->name);
  2055. dev_kfree_skb(skb);
  2056. return NETDEV_TX_OK;
  2057. }
  2058. rc = mwl8k_txq_xmit(hw, index, skb);
  2059. return rc;
  2060. }
  2061. struct mwl8k_work_struct {
  2062. /* Initialized by mwl8k_queue_work(). */
  2063. struct work_struct wt;
  2064. /* Required field passed in to mwl8k_queue_work(). */
  2065. struct ieee80211_hw *hw;
  2066. /* Required field passed in to mwl8k_queue_work(). */
  2067. int (*wfunc)(struct work_struct *w);
  2068. /* Initialized by mwl8k_queue_work(). */
  2069. struct completion *cmd_wait;
  2070. /* Result code. */
  2071. int rc;
  2072. /*
  2073. * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
  2074. * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
  2075. */
  2076. u32 options;
  2077. /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
  2078. unsigned long timeout_ms;
  2079. /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
  2080. u32 txwait_attempts;
  2081. /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
  2082. u32 tx_timeout_ms;
  2083. u32 step;
  2084. };
  2085. /* Flags controlling behavior of config queue requests */
  2086. /* Caller spins while waiting for completion. */
  2087. #define MWL8K_WQ_SPIN 0x00000001
  2088. /* Wait for TX queues to empty before proceeding with configuration. */
  2089. #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
  2090. /* Queue request and return immediately. */
  2091. #define MWL8K_WQ_POST_REQUEST 0x00000004
  2092. /*
  2093. * Caller sleeps and waits for task complete notification.
  2094. * Do not use in atomic context.
  2095. */
  2096. #define MWL8K_WQ_SLEEP 0x00000008
  2097. /* Free work struct when task is done. */
  2098. #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
  2099. /*
  2100. * Config request is queued and returns to caller imediately. Use
  2101. * this in atomic context. Work struct is freed by mwl8k_queue_work()
  2102. * when this flag is set.
  2103. */
  2104. #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
  2105. MWL8K_WQ_FREE_WORKSTRUCT)
  2106. /* Default work queue behavior is to sleep and wait for tx completion. */
  2107. #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
  2108. /*
  2109. * Default config request timeout. Add adjustments to make sure the
  2110. * config thread waits long enough for both tx wait and cmd wait before
  2111. * timing out.
  2112. */
  2113. /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
  2114. #define MWL8K_TXWAIT_TIMEOUT_MS 1000
  2115. /* Default number of TX wait attempts. */
  2116. #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
  2117. /* Total time to wait for TXQ to drain. */
  2118. #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
  2119. MWL8K_WQ_TXWAIT_ATTEMPTS)
  2120. /* Scheduling slop. */
  2121. #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
  2122. #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
  2123. MWL8K_TXWAIT_MS + \
  2124. MWL8K_OS_SCHEDULE_OVERHEAD_MS)
  2125. static void mwl8k_config_thread(struct work_struct *wt)
  2126. {
  2127. struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
  2128. struct ieee80211_hw *hw = worker->hw;
  2129. struct mwl8k_priv *priv = hw->priv;
  2130. int rc = 0;
  2131. spin_lock_irq(&priv->tx_lock);
  2132. priv->inconfig = true;
  2133. spin_unlock_irq(&priv->tx_lock);
  2134. ieee80211_stop_queues(hw);
  2135. /*
  2136. * Wait for host queues to drain before doing PHY
  2137. * reconfiguration. This avoids interrupting any in-flight
  2138. * DMA transfers to the hardware.
  2139. */
  2140. if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
  2141. u32 timeout;
  2142. u32 time_remaining;
  2143. u32 iter;
  2144. u32 tx_wait_attempts = worker->txwait_attempts;
  2145. time_remaining = worker->tx_timeout_ms;
  2146. if (!tx_wait_attempts)
  2147. tx_wait_attempts = 1;
  2148. timeout = worker->tx_timeout_ms/tx_wait_attempts;
  2149. if (!timeout)
  2150. timeout = 1;
  2151. iter = tx_wait_attempts;
  2152. do {
  2153. int wait_time;
  2154. if (time_remaining > timeout) {
  2155. time_remaining -= timeout;
  2156. wait_time = timeout;
  2157. } else
  2158. wait_time = time_remaining;
  2159. if (!wait_time)
  2160. wait_time = 1;
  2161. rc = mwl8k_tx_wait_empty(hw, wait_time);
  2162. if (rc)
  2163. printk(KERN_ERR "%s() txwait timeout=%ums "
  2164. "Retry:%u/%u\n", __func__, timeout,
  2165. tx_wait_attempts - iter + 1,
  2166. tx_wait_attempts);
  2167. } while (rc && --iter);
  2168. rc = iter ? 0 : -ETIMEDOUT;
  2169. }
  2170. if (!rc)
  2171. rc = worker->wfunc(wt);
  2172. spin_lock_irq(&priv->tx_lock);
  2173. priv->inconfig = false;
  2174. if (priv->pending_tx_pkts && priv->radio_state)
  2175. mwl8k_tx_start(priv);
  2176. spin_unlock_irq(&priv->tx_lock);
  2177. ieee80211_wake_queues(hw);
  2178. worker->rc = rc;
  2179. if (worker->options & MWL8K_WQ_SLEEP)
  2180. complete(worker->cmd_wait);
  2181. if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
  2182. kfree(wt);
  2183. }
  2184. static int mwl8k_queue_work(struct ieee80211_hw *hw,
  2185. struct mwl8k_work_struct *worker,
  2186. struct workqueue_struct *wqueue,
  2187. int (*wfunc)(struct work_struct *w))
  2188. {
  2189. unsigned long timeout = 0;
  2190. int rc = 0;
  2191. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  2192. if (!worker->timeout_ms)
  2193. worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
  2194. if (!worker->options)
  2195. worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
  2196. if (!worker->txwait_attempts)
  2197. worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
  2198. if (!worker->tx_timeout_ms)
  2199. worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
  2200. worker->hw = hw;
  2201. worker->cmd_wait = &cmd_wait;
  2202. worker->rc = 1;
  2203. worker->wfunc = wfunc;
  2204. INIT_WORK(&worker->wt, mwl8k_config_thread);
  2205. queue_work(wqueue, &worker->wt);
  2206. if (worker->options & MWL8K_WQ_POST_REQUEST) {
  2207. rc = 0;
  2208. } else {
  2209. if (worker->options & MWL8K_WQ_SPIN) {
  2210. timeout = worker->timeout_ms;
  2211. while (timeout && (worker->rc > 0)) {
  2212. mdelay(1);
  2213. timeout--;
  2214. }
  2215. } else if (worker->options & MWL8K_WQ_SLEEP)
  2216. timeout = wait_for_completion_timeout(&cmd_wait,
  2217. msecs_to_jiffies(worker->timeout_ms));
  2218. if (timeout)
  2219. rc = worker->rc;
  2220. else {
  2221. cancel_work_sync(&worker->wt);
  2222. rc = -ETIMEDOUT;
  2223. }
  2224. }
  2225. return rc;
  2226. }
  2227. struct mwl8k_start_worker {
  2228. struct mwl8k_work_struct header;
  2229. };
  2230. static int mwl8k_start_wt(struct work_struct *wt)
  2231. {
  2232. struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
  2233. struct ieee80211_hw *hw = worker->header.hw;
  2234. struct mwl8k_priv *priv = hw->priv;
  2235. int rc = 0;
  2236. if (priv->vif != NULL) {
  2237. rc = -EIO;
  2238. goto mwl8k_start_exit;
  2239. }
  2240. /* Turn on radio */
  2241. if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
  2242. rc = -EIO;
  2243. goto mwl8k_start_exit;
  2244. }
  2245. /* Purge TX/RX HW queues */
  2246. if (mwl8k_cmd_set_pre_scan(hw)) {
  2247. rc = -EIO;
  2248. goto mwl8k_start_exit;
  2249. }
  2250. if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
  2251. rc = -EIO;
  2252. goto mwl8k_start_exit;
  2253. }
  2254. /* Enable firmware rate adaptation */
  2255. if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
  2256. rc = -EIO;
  2257. goto mwl8k_start_exit;
  2258. }
  2259. /* Disable WMM. WMM gets enabled when stack sends WMM parms */
  2260. if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
  2261. rc = -EIO;
  2262. goto mwl8k_start_exit;
  2263. }
  2264. /* Disable sniffer mode */
  2265. if (mwl8k_enable_sniffer(hw, 0))
  2266. rc = -EIO;
  2267. mwl8k_start_exit:
  2268. return rc;
  2269. }
  2270. static int mwl8k_start(struct ieee80211_hw *hw)
  2271. {
  2272. struct mwl8k_start_worker *worker;
  2273. struct mwl8k_priv *priv = hw->priv;
  2274. int rc;
  2275. /* Enable tx reclaim tasklet */
  2276. tasklet_enable(&priv->tx_reclaim_task);
  2277. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2278. IRQF_SHARED, MWL8K_NAME, hw);
  2279. if (rc) {
  2280. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2281. priv->name);
  2282. rc = -EIO;
  2283. goto mwl8k_start_disable_tasklet;
  2284. }
  2285. /* Enable interrupts */
  2286. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2287. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2288. if (worker == NULL) {
  2289. rc = -ENOMEM;
  2290. goto mwl8k_start_disable_irq;
  2291. }
  2292. rc = mwl8k_queue_work(hw, &worker->header,
  2293. priv->config_wq, mwl8k_start_wt);
  2294. kfree(worker);
  2295. if (!rc)
  2296. return rc;
  2297. if (rc == -ETIMEDOUT)
  2298. printk(KERN_ERR "%s() timed out\n", __func__);
  2299. rc = -EIO;
  2300. mwl8k_start_disable_irq:
  2301. spin_lock_irq(&priv->tx_lock);
  2302. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2303. spin_unlock_irq(&priv->tx_lock);
  2304. free_irq(priv->pdev->irq, hw);
  2305. mwl8k_start_disable_tasklet:
  2306. tasklet_disable(&priv->tx_reclaim_task);
  2307. return rc;
  2308. }
  2309. struct mwl8k_stop_worker {
  2310. struct mwl8k_work_struct header;
  2311. };
  2312. static int mwl8k_stop_wt(struct work_struct *wt)
  2313. {
  2314. struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
  2315. struct ieee80211_hw *hw = worker->header.hw;
  2316. int rc;
  2317. rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
  2318. return rc;
  2319. }
  2320. static void mwl8k_stop(struct ieee80211_hw *hw)
  2321. {
  2322. int rc;
  2323. struct mwl8k_stop_worker *worker;
  2324. struct mwl8k_priv *priv = hw->priv;
  2325. int i;
  2326. if (priv->vif != NULL)
  2327. return;
  2328. ieee80211_stop_queues(hw);
  2329. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2330. if (worker == NULL)
  2331. return;
  2332. rc = mwl8k_queue_work(hw, &worker->header,
  2333. priv->config_wq, mwl8k_stop_wt);
  2334. kfree(worker);
  2335. if (rc == -ETIMEDOUT)
  2336. printk(KERN_ERR "%s() timed out\n", __func__);
  2337. /* Disable interrupts */
  2338. spin_lock_irq(&priv->tx_lock);
  2339. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2340. spin_unlock_irq(&priv->tx_lock);
  2341. free_irq(priv->pdev->irq, hw);
  2342. /* Stop finalize join worker */
  2343. cancel_work_sync(&priv->finalize_join_worker);
  2344. if (priv->beacon_skb != NULL)
  2345. dev_kfree_skb(priv->beacon_skb);
  2346. /* Stop tx reclaim tasklet */
  2347. tasklet_disable(&priv->tx_reclaim_task);
  2348. /* Stop config thread */
  2349. flush_workqueue(priv->config_wq);
  2350. /* Return all skbs to mac80211 */
  2351. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2352. mwl8k_txq_reclaim(hw, i, 1);
  2353. }
  2354. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2355. struct ieee80211_if_init_conf *conf)
  2356. {
  2357. struct mwl8k_priv *priv = hw->priv;
  2358. struct mwl8k_vif *mwl8k_vif;
  2359. /*
  2360. * We only support one active interface at a time.
  2361. */
  2362. if (priv->vif != NULL)
  2363. return -EBUSY;
  2364. /*
  2365. * We only support managed interfaces for now.
  2366. */
  2367. if (conf->type != NL80211_IFTYPE_STATION &&
  2368. conf->type != NL80211_IFTYPE_MONITOR)
  2369. return -EINVAL;
  2370. /* Clean out driver private area */
  2371. mwl8k_vif = MWL8K_VIF(conf->vif);
  2372. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2373. /* Save the mac address */
  2374. memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
  2375. /* Back pointer to parent config block */
  2376. mwl8k_vif->priv = priv;
  2377. /* Setup initial PHY parameters */
  2378. memcpy(mwl8k_vif->legacy_rates ,
  2379. priv->rates, sizeof(mwl8k_vif->legacy_rates));
  2380. mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
  2381. /* Set Initial sequence number to zero */
  2382. mwl8k_vif->seqno = 0;
  2383. priv->vif = conf->vif;
  2384. priv->current_channel = NULL;
  2385. return 0;
  2386. }
  2387. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2388. struct ieee80211_if_init_conf *conf)
  2389. {
  2390. struct mwl8k_priv *priv = hw->priv;
  2391. if (priv->vif == NULL)
  2392. return;
  2393. priv->vif = NULL;
  2394. }
  2395. struct mwl8k_config_worker {
  2396. struct mwl8k_work_struct header;
  2397. u32 changed;
  2398. };
  2399. static int mwl8k_config_wt(struct work_struct *wt)
  2400. {
  2401. struct mwl8k_config_worker *worker =
  2402. (struct mwl8k_config_worker *)wt;
  2403. struct ieee80211_hw *hw = worker->header.hw;
  2404. struct ieee80211_conf *conf = &hw->conf;
  2405. struct mwl8k_priv *priv = hw->priv;
  2406. int rc = 0;
  2407. if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
  2408. rc = -EINVAL;
  2409. goto mwl8k_config_exit;
  2410. }
  2411. priv->current_channel = conf->channel;
  2412. if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
  2413. rc = -EINVAL;
  2414. goto mwl8k_config_exit;
  2415. }
  2416. if (conf->power_level > 18)
  2417. conf->power_level = 18;
  2418. if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
  2419. rc = -EINVAL;
  2420. goto mwl8k_config_exit;
  2421. }
  2422. if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
  2423. rc = -EINVAL;
  2424. mwl8k_config_exit:
  2425. return rc;
  2426. }
  2427. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2428. {
  2429. int rc = 0;
  2430. struct mwl8k_config_worker *worker;
  2431. struct mwl8k_priv *priv = hw->priv;
  2432. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2433. if (worker == NULL)
  2434. return -ENOMEM;
  2435. worker->changed = changed;
  2436. rc = mwl8k_queue_work(hw, &worker->header,
  2437. priv->config_wq, mwl8k_config_wt);
  2438. if (rc == -ETIMEDOUT) {
  2439. printk(KERN_ERR "%s() timed out.\n", __func__);
  2440. rc = -EINVAL;
  2441. }
  2442. kfree(worker);
  2443. /*
  2444. * mac80211 will crash on anything other than -EINVAL on
  2445. * error. Looks like wireless extensions which calls mac80211
  2446. * may be the actual culprit...
  2447. */
  2448. return rc ? -EINVAL : 0;
  2449. }
  2450. struct mwl8k_bss_info_changed_worker {
  2451. struct mwl8k_work_struct header;
  2452. struct ieee80211_vif *vif;
  2453. struct ieee80211_bss_conf *info;
  2454. u32 changed;
  2455. };
  2456. static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
  2457. {
  2458. struct mwl8k_bss_info_changed_worker *worker =
  2459. (struct mwl8k_bss_info_changed_worker *)wt;
  2460. struct ieee80211_hw *hw = worker->header.hw;
  2461. struct ieee80211_vif *vif = worker->vif;
  2462. struct ieee80211_bss_conf *info = worker->info;
  2463. u32 changed;
  2464. int rc;
  2465. struct mwl8k_priv *priv = hw->priv;
  2466. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2467. changed = worker->changed;
  2468. priv->capture_beacon = false;
  2469. if (info->assoc) {
  2470. memcpy(&mwl8k_vif->bss_info, info,
  2471. sizeof(struct ieee80211_bss_conf));
  2472. /* Install rates */
  2473. if (mwl8k_update_rateset(hw, vif))
  2474. goto mwl8k_bss_info_changed_exit;
  2475. /* Turn on rate adaptation */
  2476. if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
  2477. MWL8K_UCAST_RATE, NULL))
  2478. goto mwl8k_bss_info_changed_exit;
  2479. /* Set radio preamble */
  2480. if (mwl8k_set_radio_preamble(hw,
  2481. info->use_short_preamble))
  2482. goto mwl8k_bss_info_changed_exit;
  2483. /* Set slot time */
  2484. if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
  2485. MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
  2486. goto mwl8k_bss_info_changed_exit;
  2487. /* Update peer rate info */
  2488. if (mwl8k_cmd_update_sta_db(hw, vif,
  2489. MWL8K_STA_DB_MODIFY_ENTRY))
  2490. goto mwl8k_bss_info_changed_exit;
  2491. /* Set AID */
  2492. if (mwl8k_cmd_set_aid(hw, vif))
  2493. goto mwl8k_bss_info_changed_exit;
  2494. /*
  2495. * Finalize the join. Tell rx handler to process
  2496. * next beacon from our BSSID.
  2497. */
  2498. memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
  2499. priv->capture_beacon = true;
  2500. } else {
  2501. mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
  2502. memset(&mwl8k_vif->bss_info, 0,
  2503. sizeof(struct ieee80211_bss_conf));
  2504. memset(mwl8k_vif->bssid, 0, ETH_ALEN);
  2505. }
  2506. mwl8k_bss_info_changed_exit:
  2507. rc = 0;
  2508. return rc;
  2509. }
  2510. static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
  2511. struct ieee80211_vif *vif,
  2512. struct ieee80211_bss_conf *info,
  2513. u32 changed)
  2514. {
  2515. struct mwl8k_bss_info_changed_worker *worker;
  2516. struct mwl8k_priv *priv = hw->priv;
  2517. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  2518. int rc;
  2519. if (changed & BSS_CHANGED_BSSID)
  2520. memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
  2521. if ((changed & BSS_CHANGED_ASSOC) == 0)
  2522. return;
  2523. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2524. if (worker == NULL)
  2525. return;
  2526. worker->vif = vif;
  2527. worker->info = info;
  2528. worker->changed = changed;
  2529. rc = mwl8k_queue_work(hw, &worker->header,
  2530. priv->config_wq,
  2531. mwl8k_bss_info_changed_wt);
  2532. kfree(worker);
  2533. if (rc == -ETIMEDOUT)
  2534. printk(KERN_ERR "%s() timed out\n", __func__);
  2535. }
  2536. struct mwl8k_configure_filter_worker {
  2537. struct mwl8k_work_struct header;
  2538. unsigned int changed_flags;
  2539. unsigned int *total_flags;
  2540. int mc_count;
  2541. struct dev_addr_list *mclist;
  2542. };
  2543. #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
  2544. static int mwl8k_configure_filter_wt(struct work_struct *wt)
  2545. {
  2546. struct mwl8k_configure_filter_worker *worker =
  2547. (struct mwl8k_configure_filter_worker *)wt;
  2548. struct ieee80211_hw *hw = worker->header.hw;
  2549. unsigned int changed_flags = worker->changed_flags;
  2550. unsigned int *total_flags = worker->total_flags;
  2551. int mc_count = worker->mc_count;
  2552. struct dev_addr_list *mclist = worker->mclist;
  2553. struct mwl8k_priv *priv = hw->priv;
  2554. int rc = 0;
  2555. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2556. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  2557. rc = mwl8k_cmd_set_pre_scan(hw);
  2558. else {
  2559. u8 *bssid;
  2560. bssid = "\x00\x00\x00\x00\x00\x00";
  2561. if (priv->vif != NULL)
  2562. bssid = MWL8K_VIF(priv->vif)->bssid;
  2563. rc = mwl8k_cmd_set_post_scan(hw, bssid);
  2564. }
  2565. }
  2566. if (rc)
  2567. goto mwl8k_configure_filter_exit;
  2568. if (mc_count) {
  2569. mc_count = mc_count < priv->num_mcaddrs ?
  2570. mc_count : priv->num_mcaddrs;
  2571. rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
  2572. if (rc)
  2573. printk(KERN_ERR
  2574. "%s()Error setting multicast addresses\n",
  2575. __func__);
  2576. }
  2577. mwl8k_configure_filter_exit:
  2578. return rc;
  2579. }
  2580. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2581. int mc_count, struct dev_addr_list *mclist)
  2582. {
  2583. struct mwl8k_configure_filter_worker *worker;
  2584. worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
  2585. if (!worker)
  2586. return 0;
  2587. /*
  2588. * XXX: This is _HORRIBLY_ broken!!
  2589. *
  2590. * No locking, the mclist pointer might be invalid as soon as this
  2591. * function returns, something in the list might be invalidated
  2592. * once we get to the worker, etc...
  2593. */
  2594. worker->mc_count = mc_count;
  2595. worker->mclist = mclist;
  2596. return (u64)worker;
  2597. }
  2598. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2599. unsigned int changed_flags,
  2600. unsigned int *total_flags,
  2601. u64 multicast)
  2602. {
  2603. struct mwl8k_configure_filter_worker *worker = (void *)multicast;
  2604. struct mwl8k_priv *priv = hw->priv;
  2605. /* Clear unsupported feature flags */
  2606. *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
  2607. if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
  2608. return;
  2609. if (worker == NULL)
  2610. return;
  2611. worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
  2612. worker->changed_flags = changed_flags;
  2613. worker->total_flags = total_flags;
  2614. mwl8k_queue_work(hw, &worker->header, priv->config_wq,
  2615. mwl8k_configure_filter_wt);
  2616. }
  2617. struct mwl8k_set_rts_threshold_worker {
  2618. struct mwl8k_work_struct header;
  2619. u32 value;
  2620. };
  2621. static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
  2622. {
  2623. struct mwl8k_set_rts_threshold_worker *worker =
  2624. (struct mwl8k_set_rts_threshold_worker *)wt;
  2625. struct ieee80211_hw *hw = worker->header.hw;
  2626. u16 threshold = (u16)(worker->value);
  2627. int rc;
  2628. rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
  2629. return rc;
  2630. }
  2631. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2632. {
  2633. int rc;
  2634. struct mwl8k_set_rts_threshold_worker *worker;
  2635. struct mwl8k_priv *priv = hw->priv;
  2636. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2637. if (worker == NULL)
  2638. return -ENOMEM;
  2639. worker->value = value;
  2640. rc = mwl8k_queue_work(hw, &worker->header,
  2641. priv->config_wq,
  2642. mwl8k_set_rts_threshold_wt);
  2643. kfree(worker);
  2644. if (rc == -ETIMEDOUT) {
  2645. printk(KERN_ERR "%s() timed out\n", __func__);
  2646. rc = -EINVAL;
  2647. }
  2648. return rc;
  2649. }
  2650. struct mwl8k_conf_tx_worker {
  2651. struct mwl8k_work_struct header;
  2652. u16 queue;
  2653. const struct ieee80211_tx_queue_params *params;
  2654. };
  2655. static int mwl8k_conf_tx_wt(struct work_struct *wt)
  2656. {
  2657. struct mwl8k_conf_tx_worker *worker =
  2658. (struct mwl8k_conf_tx_worker *)wt;
  2659. struct ieee80211_hw *hw = worker->header.hw;
  2660. u16 queue = worker->queue;
  2661. const struct ieee80211_tx_queue_params *params = worker->params;
  2662. struct mwl8k_priv *priv = hw->priv;
  2663. int rc = 0;
  2664. if (priv->wmm_mode == MWL8K_WMM_DISABLE)
  2665. if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
  2666. rc = -EINVAL;
  2667. goto mwl8k_conf_tx_exit;
  2668. }
  2669. if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
  2670. params->cw_max, params->aifs, params->txop))
  2671. rc = -EINVAL;
  2672. mwl8k_conf_tx_exit:
  2673. return rc;
  2674. }
  2675. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  2676. const struct ieee80211_tx_queue_params *params)
  2677. {
  2678. int rc;
  2679. struct mwl8k_conf_tx_worker *worker;
  2680. struct mwl8k_priv *priv = hw->priv;
  2681. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2682. if (worker == NULL)
  2683. return -ENOMEM;
  2684. worker->queue = queue;
  2685. worker->params = params;
  2686. rc = mwl8k_queue_work(hw, &worker->header,
  2687. priv->config_wq, mwl8k_conf_tx_wt);
  2688. kfree(worker);
  2689. if (rc == -ETIMEDOUT) {
  2690. printk(KERN_ERR "%s() timed out\n", __func__);
  2691. rc = -EINVAL;
  2692. }
  2693. return rc;
  2694. }
  2695. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  2696. struct ieee80211_tx_queue_stats *stats)
  2697. {
  2698. struct mwl8k_priv *priv = hw->priv;
  2699. struct mwl8k_tx_queue *txq;
  2700. int index;
  2701. spin_lock_bh(&priv->tx_lock);
  2702. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  2703. txq = priv->txq + index;
  2704. memcpy(&stats[index], &txq->tx_stats,
  2705. sizeof(struct ieee80211_tx_queue_stats));
  2706. }
  2707. spin_unlock_bh(&priv->tx_lock);
  2708. return 0;
  2709. }
  2710. struct mwl8k_get_stats_worker {
  2711. struct mwl8k_work_struct header;
  2712. struct ieee80211_low_level_stats *stats;
  2713. };
  2714. static int mwl8k_get_stats_wt(struct work_struct *wt)
  2715. {
  2716. struct mwl8k_get_stats_worker *worker =
  2717. (struct mwl8k_get_stats_worker *)wt;
  2718. return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
  2719. }
  2720. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  2721. struct ieee80211_low_level_stats *stats)
  2722. {
  2723. int rc;
  2724. struct mwl8k_get_stats_worker *worker;
  2725. struct mwl8k_priv *priv = hw->priv;
  2726. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2727. if (worker == NULL)
  2728. return -ENOMEM;
  2729. worker->stats = stats;
  2730. rc = mwl8k_queue_work(hw, &worker->header,
  2731. priv->config_wq, mwl8k_get_stats_wt);
  2732. kfree(worker);
  2733. if (rc == -ETIMEDOUT) {
  2734. printk(KERN_ERR "%s() timed out\n", __func__);
  2735. rc = -EINVAL;
  2736. }
  2737. return rc;
  2738. }
  2739. static const struct ieee80211_ops mwl8k_ops = {
  2740. .tx = mwl8k_tx,
  2741. .start = mwl8k_start,
  2742. .stop = mwl8k_stop,
  2743. .add_interface = mwl8k_add_interface,
  2744. .remove_interface = mwl8k_remove_interface,
  2745. .config = mwl8k_config,
  2746. .bss_info_changed = mwl8k_bss_info_changed,
  2747. .prepare_multicast = mwl8k_prepare_multicast,
  2748. .configure_filter = mwl8k_configure_filter,
  2749. .set_rts_threshold = mwl8k_set_rts_threshold,
  2750. .conf_tx = mwl8k_conf_tx,
  2751. .get_tx_stats = mwl8k_get_tx_stats,
  2752. .get_stats = mwl8k_get_stats,
  2753. };
  2754. static void mwl8k_tx_reclaim_handler(unsigned long data)
  2755. {
  2756. int i;
  2757. struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
  2758. struct mwl8k_priv *priv = hw->priv;
  2759. spin_lock_bh(&priv->tx_lock);
  2760. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2761. mwl8k_txq_reclaim(hw, i, 0);
  2762. if (priv->tx_wait != NULL) {
  2763. int count = mwl8k_txq_busy(priv);
  2764. if (count == 0) {
  2765. complete(priv->tx_wait);
  2766. priv->tx_wait = NULL;
  2767. }
  2768. }
  2769. spin_unlock_bh(&priv->tx_lock);
  2770. }
  2771. static void mwl8k_finalize_join_worker(struct work_struct *work)
  2772. {
  2773. struct mwl8k_priv *priv =
  2774. container_of(work, struct mwl8k_priv, finalize_join_worker);
  2775. struct sk_buff *skb = priv->beacon_skb;
  2776. u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
  2777. mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
  2778. dev_kfree_skb(skb);
  2779. priv->beacon_skb = NULL;
  2780. }
  2781. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  2782. const struct pci_device_id *id)
  2783. {
  2784. struct ieee80211_hw *hw;
  2785. struct mwl8k_priv *priv;
  2786. int rc;
  2787. int i;
  2788. u8 *fw;
  2789. rc = pci_enable_device(pdev);
  2790. if (rc) {
  2791. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  2792. MWL8K_NAME);
  2793. return rc;
  2794. }
  2795. rc = pci_request_regions(pdev, MWL8K_NAME);
  2796. if (rc) {
  2797. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  2798. MWL8K_NAME);
  2799. return rc;
  2800. }
  2801. pci_set_master(pdev);
  2802. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  2803. if (hw == NULL) {
  2804. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  2805. rc = -ENOMEM;
  2806. goto err_free_reg;
  2807. }
  2808. priv = hw->priv;
  2809. priv->hw = hw;
  2810. priv->pdev = pdev;
  2811. priv->hostcmd_wait = NULL;
  2812. priv->tx_wait = NULL;
  2813. priv->inconfig = false;
  2814. priv->wmm_mode = false;
  2815. priv->pending_tx_pkts = 0;
  2816. strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
  2817. spin_lock_init(&priv->fw_lock);
  2818. SET_IEEE80211_DEV(hw, &pdev->dev);
  2819. pci_set_drvdata(pdev, hw);
  2820. priv->regs = pci_iomap(pdev, 1, 0x10000);
  2821. if (priv->regs == NULL) {
  2822. printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
  2823. goto err_iounmap;
  2824. }
  2825. memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
  2826. priv->band.band = IEEE80211_BAND_2GHZ;
  2827. priv->band.channels = priv->channels;
  2828. priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
  2829. priv->band.bitrates = priv->rates;
  2830. priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
  2831. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  2832. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
  2833. memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
  2834. /*
  2835. * Extra headroom is the size of the required DMA header
  2836. * minus the size of the smallest 802.11 frame (CTS frame).
  2837. */
  2838. hw->extra_tx_headroom =
  2839. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  2840. hw->channel_change_time = 10;
  2841. hw->queues = MWL8K_TX_QUEUES;
  2842. hw->wiphy->interface_modes =
  2843. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
  2844. /* Set rssi and noise values to dBm */
  2845. hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
  2846. hw->vif_data_size = sizeof(struct mwl8k_vif);
  2847. priv->vif = NULL;
  2848. /* Set default radio state and preamble */
  2849. priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
  2850. priv->radio_state = MWL8K_RADIO_DISABLE;
  2851. /* Finalize join worker */
  2852. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  2853. /* TX reclaim tasklet */
  2854. tasklet_init(&priv->tx_reclaim_task,
  2855. mwl8k_tx_reclaim_handler, (unsigned long)hw);
  2856. tasklet_disable(&priv->tx_reclaim_task);
  2857. /* Config workthread */
  2858. priv->config_wq = create_singlethread_workqueue("mwl8k_config");
  2859. if (priv->config_wq == NULL)
  2860. goto err_iounmap;
  2861. /* Power management cookie */
  2862. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  2863. if (priv->cookie == NULL)
  2864. goto err_iounmap;
  2865. rc = mwl8k_rxq_init(hw, 0);
  2866. if (rc)
  2867. goto err_iounmap;
  2868. rxq_refill(hw, 0, INT_MAX);
  2869. spin_lock_init(&priv->tx_lock);
  2870. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  2871. rc = mwl8k_txq_init(hw, i);
  2872. if (rc)
  2873. goto err_free_queues;
  2874. }
  2875. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2876. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2877. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  2878. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  2879. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2880. IRQF_SHARED, MWL8K_NAME, hw);
  2881. if (rc) {
  2882. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2883. priv->name);
  2884. goto err_free_queues;
  2885. }
  2886. /* Reset firmware and hardware */
  2887. mwl8k_hw_reset(priv);
  2888. /* Ask userland hotplug daemon for the device firmware */
  2889. rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
  2890. if (rc) {
  2891. printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
  2892. goto err_free_irq;
  2893. }
  2894. /* Load firmware into hardware */
  2895. rc = mwl8k_load_firmware(priv);
  2896. if (rc) {
  2897. printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
  2898. goto err_stop_firmware;
  2899. }
  2900. /* Reclaim memory once firmware is successfully loaded */
  2901. mwl8k_release_firmware(priv);
  2902. /*
  2903. * Temporarily enable interrupts. Initial firmware host
  2904. * commands use interrupts and avoids polling. Disable
  2905. * interrupts when done.
  2906. */
  2907. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2908. /* Get config data, mac addrs etc */
  2909. rc = mwl8k_cmd_get_hw_spec(hw);
  2910. if (rc) {
  2911. printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
  2912. goto err_stop_firmware;
  2913. }
  2914. /* Turn radio off */
  2915. rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
  2916. if (rc) {
  2917. printk(KERN_ERR "%s: Cannot disable\n", priv->name);
  2918. goto err_stop_firmware;
  2919. }
  2920. /* Disable interrupts */
  2921. spin_lock_irq(&priv->tx_lock);
  2922. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2923. spin_unlock_irq(&priv->tx_lock);
  2924. free_irq(priv->pdev->irq, hw);
  2925. rc = ieee80211_register_hw(hw);
  2926. if (rc) {
  2927. printk(KERN_ERR "%s: Cannot register device\n", priv->name);
  2928. goto err_stop_firmware;
  2929. }
  2930. fw = (u8 *)&priv->fw_rev;
  2931. printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
  2932. MWL8K_DESC);
  2933. printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
  2934. priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
  2935. printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
  2936. hw->wiphy->perm_addr);
  2937. return 0;
  2938. err_stop_firmware:
  2939. mwl8k_hw_reset(priv);
  2940. mwl8k_release_firmware(priv);
  2941. err_free_irq:
  2942. spin_lock_irq(&priv->tx_lock);
  2943. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2944. spin_unlock_irq(&priv->tx_lock);
  2945. free_irq(priv->pdev->irq, hw);
  2946. err_free_queues:
  2947. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2948. mwl8k_txq_deinit(hw, i);
  2949. mwl8k_rxq_deinit(hw, 0);
  2950. err_iounmap:
  2951. if (priv->cookie != NULL)
  2952. pci_free_consistent(priv->pdev, 4,
  2953. priv->cookie, priv->cookie_dma);
  2954. if (priv->regs != NULL)
  2955. pci_iounmap(pdev, priv->regs);
  2956. if (priv->config_wq != NULL)
  2957. destroy_workqueue(priv->config_wq);
  2958. pci_set_drvdata(pdev, NULL);
  2959. ieee80211_free_hw(hw);
  2960. err_free_reg:
  2961. pci_release_regions(pdev);
  2962. pci_disable_device(pdev);
  2963. return rc;
  2964. }
  2965. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  2966. {
  2967. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  2968. }
  2969. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  2970. {
  2971. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  2972. struct mwl8k_priv *priv;
  2973. int i;
  2974. if (hw == NULL)
  2975. return;
  2976. priv = hw->priv;
  2977. ieee80211_stop_queues(hw);
  2978. ieee80211_unregister_hw(hw);
  2979. /* Remove tx reclaim tasklet */
  2980. tasklet_kill(&priv->tx_reclaim_task);
  2981. /* Stop config thread */
  2982. destroy_workqueue(priv->config_wq);
  2983. /* Stop hardware */
  2984. mwl8k_hw_reset(priv);
  2985. /* Return all skbs to mac80211 */
  2986. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2987. mwl8k_txq_reclaim(hw, i, 1);
  2988. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2989. mwl8k_txq_deinit(hw, i);
  2990. mwl8k_rxq_deinit(hw, 0);
  2991. pci_free_consistent(priv->pdev, 4,
  2992. priv->cookie, priv->cookie_dma);
  2993. pci_iounmap(pdev, priv->regs);
  2994. pci_set_drvdata(pdev, NULL);
  2995. ieee80211_free_hw(hw);
  2996. pci_release_regions(pdev);
  2997. pci_disable_device(pdev);
  2998. }
  2999. static struct pci_driver mwl8k_driver = {
  3000. .name = MWL8K_NAME,
  3001. .id_table = mwl8k_table,
  3002. .probe = mwl8k_probe,
  3003. .remove = __devexit_p(mwl8k_remove),
  3004. .shutdown = __devexit_p(mwl8k_shutdown),
  3005. };
  3006. static int __init mwl8k_init(void)
  3007. {
  3008. return pci_register_driver(&mwl8k_driver);
  3009. }
  3010. static void __exit mwl8k_exit(void)
  3011. {
  3012. pci_unregister_driver(&mwl8k_driver);
  3013. }
  3014. module_init(mwl8k_init);
  3015. module_exit(mwl8k_exit);