enic_main.c 52 KB

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  1. /*
  2. * Copyright 2008 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/workqueue.h>
  26. #include <linux/pci.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/if_ether.h>
  30. #include <linux/if_vlan.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/in.h>
  33. #include <linux/ip.h>
  34. #include <linux/ipv6.h>
  35. #include <linux/tcp.h>
  36. #include <net/ip6_checksum.h>
  37. #include "cq_enet_desc.h"
  38. #include "vnic_dev.h"
  39. #include "vnic_intr.h"
  40. #include "vnic_stats.h"
  41. #include "enic_res.h"
  42. #include "enic.h"
  43. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  44. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  45. #define MAX_TSO (1 << 16)
  46. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  47. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  48. /* Supported devices */
  49. static struct pci_device_id enic_id_table[] = {
  50. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  51. { 0, } /* end of table */
  52. };
  53. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  54. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  55. MODULE_LICENSE("GPL");
  56. MODULE_VERSION(DRV_VERSION);
  57. MODULE_DEVICE_TABLE(pci, enic_id_table);
  58. struct enic_stat {
  59. char name[ETH_GSTRING_LEN];
  60. unsigned int offset;
  61. };
  62. #define ENIC_TX_STAT(stat) \
  63. { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
  64. #define ENIC_RX_STAT(stat) \
  65. { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
  66. static const struct enic_stat enic_tx_stats[] = {
  67. ENIC_TX_STAT(tx_frames_ok),
  68. ENIC_TX_STAT(tx_unicast_frames_ok),
  69. ENIC_TX_STAT(tx_multicast_frames_ok),
  70. ENIC_TX_STAT(tx_broadcast_frames_ok),
  71. ENIC_TX_STAT(tx_bytes_ok),
  72. ENIC_TX_STAT(tx_unicast_bytes_ok),
  73. ENIC_TX_STAT(tx_multicast_bytes_ok),
  74. ENIC_TX_STAT(tx_broadcast_bytes_ok),
  75. ENIC_TX_STAT(tx_drops),
  76. ENIC_TX_STAT(tx_errors),
  77. ENIC_TX_STAT(tx_tso),
  78. };
  79. static const struct enic_stat enic_rx_stats[] = {
  80. ENIC_RX_STAT(rx_frames_ok),
  81. ENIC_RX_STAT(rx_frames_total),
  82. ENIC_RX_STAT(rx_unicast_frames_ok),
  83. ENIC_RX_STAT(rx_multicast_frames_ok),
  84. ENIC_RX_STAT(rx_broadcast_frames_ok),
  85. ENIC_RX_STAT(rx_bytes_ok),
  86. ENIC_RX_STAT(rx_unicast_bytes_ok),
  87. ENIC_RX_STAT(rx_multicast_bytes_ok),
  88. ENIC_RX_STAT(rx_broadcast_bytes_ok),
  89. ENIC_RX_STAT(rx_drop),
  90. ENIC_RX_STAT(rx_no_bufs),
  91. ENIC_RX_STAT(rx_errors),
  92. ENIC_RX_STAT(rx_rss),
  93. ENIC_RX_STAT(rx_crc_errors),
  94. ENIC_RX_STAT(rx_frames_64),
  95. ENIC_RX_STAT(rx_frames_127),
  96. ENIC_RX_STAT(rx_frames_255),
  97. ENIC_RX_STAT(rx_frames_511),
  98. ENIC_RX_STAT(rx_frames_1023),
  99. ENIC_RX_STAT(rx_frames_1518),
  100. ENIC_RX_STAT(rx_frames_to_max),
  101. };
  102. static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
  103. static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
  104. static int enic_get_settings(struct net_device *netdev,
  105. struct ethtool_cmd *ecmd)
  106. {
  107. struct enic *enic = netdev_priv(netdev);
  108. ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
  109. ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
  110. ecmd->port = PORT_FIBRE;
  111. ecmd->transceiver = XCVR_EXTERNAL;
  112. if (netif_carrier_ok(netdev)) {
  113. ecmd->speed = vnic_dev_port_speed(enic->vdev);
  114. ecmd->duplex = DUPLEX_FULL;
  115. } else {
  116. ecmd->speed = -1;
  117. ecmd->duplex = -1;
  118. }
  119. ecmd->autoneg = AUTONEG_DISABLE;
  120. return 0;
  121. }
  122. static void enic_get_drvinfo(struct net_device *netdev,
  123. struct ethtool_drvinfo *drvinfo)
  124. {
  125. struct enic *enic = netdev_priv(netdev);
  126. struct vnic_devcmd_fw_info *fw_info;
  127. spin_lock(&enic->devcmd_lock);
  128. vnic_dev_fw_info(enic->vdev, &fw_info);
  129. spin_unlock(&enic->devcmd_lock);
  130. strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
  131. strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
  132. strncpy(drvinfo->fw_version, fw_info->fw_version,
  133. sizeof(drvinfo->fw_version));
  134. strncpy(drvinfo->bus_info, pci_name(enic->pdev),
  135. sizeof(drvinfo->bus_info));
  136. }
  137. static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
  138. {
  139. unsigned int i;
  140. switch (stringset) {
  141. case ETH_SS_STATS:
  142. for (i = 0; i < enic_n_tx_stats; i++) {
  143. memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
  144. data += ETH_GSTRING_LEN;
  145. }
  146. for (i = 0; i < enic_n_rx_stats; i++) {
  147. memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
  148. data += ETH_GSTRING_LEN;
  149. }
  150. break;
  151. }
  152. }
  153. static int enic_get_sset_count(struct net_device *netdev, int sset)
  154. {
  155. switch (sset) {
  156. case ETH_SS_STATS:
  157. return enic_n_tx_stats + enic_n_rx_stats;
  158. default:
  159. return -EOPNOTSUPP;
  160. }
  161. }
  162. static void enic_get_ethtool_stats(struct net_device *netdev,
  163. struct ethtool_stats *stats, u64 *data)
  164. {
  165. struct enic *enic = netdev_priv(netdev);
  166. struct vnic_stats *vstats;
  167. unsigned int i;
  168. spin_lock(&enic->devcmd_lock);
  169. vnic_dev_stats_dump(enic->vdev, &vstats);
  170. spin_unlock(&enic->devcmd_lock);
  171. for (i = 0; i < enic_n_tx_stats; i++)
  172. *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
  173. for (i = 0; i < enic_n_rx_stats; i++)
  174. *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
  175. }
  176. static u32 enic_get_rx_csum(struct net_device *netdev)
  177. {
  178. struct enic *enic = netdev_priv(netdev);
  179. return enic->csum_rx_enabled;
  180. }
  181. static int enic_set_rx_csum(struct net_device *netdev, u32 data)
  182. {
  183. struct enic *enic = netdev_priv(netdev);
  184. if (data && !ENIC_SETTING(enic, RXCSUM))
  185. return -EINVAL;
  186. enic->csum_rx_enabled = !!data;
  187. return 0;
  188. }
  189. static int enic_set_tx_csum(struct net_device *netdev, u32 data)
  190. {
  191. struct enic *enic = netdev_priv(netdev);
  192. if (data && !ENIC_SETTING(enic, TXCSUM))
  193. return -EINVAL;
  194. if (data)
  195. netdev->features |= NETIF_F_HW_CSUM;
  196. else
  197. netdev->features &= ~NETIF_F_HW_CSUM;
  198. return 0;
  199. }
  200. static int enic_set_tso(struct net_device *netdev, u32 data)
  201. {
  202. struct enic *enic = netdev_priv(netdev);
  203. if (data && !ENIC_SETTING(enic, TSO))
  204. return -EINVAL;
  205. if (data)
  206. netdev->features |=
  207. NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  208. else
  209. netdev->features &=
  210. ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
  211. return 0;
  212. }
  213. static u32 enic_get_msglevel(struct net_device *netdev)
  214. {
  215. struct enic *enic = netdev_priv(netdev);
  216. return enic->msg_enable;
  217. }
  218. static void enic_set_msglevel(struct net_device *netdev, u32 value)
  219. {
  220. struct enic *enic = netdev_priv(netdev);
  221. enic->msg_enable = value;
  222. }
  223. static int enic_get_coalesce(struct net_device *netdev,
  224. struct ethtool_coalesce *ecmd)
  225. {
  226. struct enic *enic = netdev_priv(netdev);
  227. ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
  228. ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
  229. return 0;
  230. }
  231. static int enic_set_coalesce(struct net_device *netdev,
  232. struct ethtool_coalesce *ecmd)
  233. {
  234. struct enic *enic = netdev_priv(netdev);
  235. u32 tx_coalesce_usecs;
  236. u32 rx_coalesce_usecs;
  237. tx_coalesce_usecs = min_t(u32,
  238. INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
  239. ecmd->tx_coalesce_usecs);
  240. rx_coalesce_usecs = min_t(u32,
  241. INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
  242. ecmd->rx_coalesce_usecs);
  243. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  244. case VNIC_DEV_INTR_MODE_INTX:
  245. if (tx_coalesce_usecs != rx_coalesce_usecs)
  246. return -EINVAL;
  247. vnic_intr_coalescing_timer_set(&enic->intr[ENIC_INTX_WQ_RQ],
  248. INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
  249. break;
  250. case VNIC_DEV_INTR_MODE_MSI:
  251. if (tx_coalesce_usecs != rx_coalesce_usecs)
  252. return -EINVAL;
  253. vnic_intr_coalescing_timer_set(&enic->intr[0],
  254. INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
  255. break;
  256. case VNIC_DEV_INTR_MODE_MSIX:
  257. vnic_intr_coalescing_timer_set(&enic->intr[ENIC_MSIX_WQ],
  258. INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
  259. vnic_intr_coalescing_timer_set(&enic->intr[ENIC_MSIX_RQ],
  260. INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
  261. break;
  262. default:
  263. break;
  264. }
  265. enic->tx_coalesce_usecs = tx_coalesce_usecs;
  266. enic->rx_coalesce_usecs = rx_coalesce_usecs;
  267. return 0;
  268. }
  269. static const struct ethtool_ops enic_ethtool_ops = {
  270. .get_settings = enic_get_settings,
  271. .get_drvinfo = enic_get_drvinfo,
  272. .get_msglevel = enic_get_msglevel,
  273. .set_msglevel = enic_set_msglevel,
  274. .get_link = ethtool_op_get_link,
  275. .get_strings = enic_get_strings,
  276. .get_sset_count = enic_get_sset_count,
  277. .get_ethtool_stats = enic_get_ethtool_stats,
  278. .get_rx_csum = enic_get_rx_csum,
  279. .set_rx_csum = enic_set_rx_csum,
  280. .get_tx_csum = ethtool_op_get_tx_csum,
  281. .set_tx_csum = enic_set_tx_csum,
  282. .get_sg = ethtool_op_get_sg,
  283. .set_sg = ethtool_op_set_sg,
  284. .get_tso = ethtool_op_get_tso,
  285. .set_tso = enic_set_tso,
  286. .get_coalesce = enic_get_coalesce,
  287. .set_coalesce = enic_set_coalesce,
  288. .get_flags = ethtool_op_get_flags,
  289. .set_flags = ethtool_op_set_flags,
  290. };
  291. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  292. {
  293. struct enic *enic = vnic_dev_priv(wq->vdev);
  294. if (buf->sop)
  295. pci_unmap_single(enic->pdev, buf->dma_addr,
  296. buf->len, PCI_DMA_TODEVICE);
  297. else
  298. pci_unmap_page(enic->pdev, buf->dma_addr,
  299. buf->len, PCI_DMA_TODEVICE);
  300. if (buf->os_buf)
  301. dev_kfree_skb_any(buf->os_buf);
  302. }
  303. static void enic_wq_free_buf(struct vnic_wq *wq,
  304. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  305. {
  306. enic_free_wq_buf(wq, buf);
  307. }
  308. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  309. u8 type, u16 q_number, u16 completed_index, void *opaque)
  310. {
  311. struct enic *enic = vnic_dev_priv(vdev);
  312. spin_lock(&enic->wq_lock[q_number]);
  313. vnic_wq_service(&enic->wq[q_number], cq_desc,
  314. completed_index, enic_wq_free_buf,
  315. opaque);
  316. if (netif_queue_stopped(enic->netdev) &&
  317. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  318. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  319. netif_wake_queue(enic->netdev);
  320. spin_unlock(&enic->wq_lock[q_number]);
  321. return 0;
  322. }
  323. static void enic_log_q_error(struct enic *enic)
  324. {
  325. unsigned int i;
  326. u32 error_status;
  327. for (i = 0; i < enic->wq_count; i++) {
  328. error_status = vnic_wq_error_status(&enic->wq[i]);
  329. if (error_status)
  330. printk(KERN_ERR PFX "%s: WQ[%d] error_status %d\n",
  331. enic->netdev->name, i, error_status);
  332. }
  333. for (i = 0; i < enic->rq_count; i++) {
  334. error_status = vnic_rq_error_status(&enic->rq[i]);
  335. if (error_status)
  336. printk(KERN_ERR PFX "%s: RQ[%d] error_status %d\n",
  337. enic->netdev->name, i, error_status);
  338. }
  339. }
  340. static void enic_link_check(struct enic *enic)
  341. {
  342. int link_status = vnic_dev_link_status(enic->vdev);
  343. int carrier_ok = netif_carrier_ok(enic->netdev);
  344. if (link_status && !carrier_ok) {
  345. printk(KERN_INFO PFX "%s: Link UP\n", enic->netdev->name);
  346. netif_carrier_on(enic->netdev);
  347. } else if (!link_status && carrier_ok) {
  348. printk(KERN_INFO PFX "%s: Link DOWN\n", enic->netdev->name);
  349. netif_carrier_off(enic->netdev);
  350. }
  351. }
  352. static void enic_mtu_check(struct enic *enic)
  353. {
  354. u32 mtu = vnic_dev_mtu(enic->vdev);
  355. if (mtu && mtu != enic->port_mtu) {
  356. enic->port_mtu = mtu;
  357. if (mtu < enic->netdev->mtu)
  358. printk(KERN_WARNING PFX
  359. "%s: interface MTU (%d) set higher "
  360. "than switch port MTU (%d)\n",
  361. enic->netdev->name, enic->netdev->mtu, mtu);
  362. }
  363. }
  364. static void enic_msglvl_check(struct enic *enic)
  365. {
  366. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  367. if (msg_enable != enic->msg_enable) {
  368. printk(KERN_INFO PFX "%s: msg lvl changed from 0x%x to 0x%x\n",
  369. enic->netdev->name, enic->msg_enable, msg_enable);
  370. enic->msg_enable = msg_enable;
  371. }
  372. }
  373. static void enic_notify_check(struct enic *enic)
  374. {
  375. enic_msglvl_check(enic);
  376. enic_mtu_check(enic);
  377. enic_link_check(enic);
  378. }
  379. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  380. static irqreturn_t enic_isr_legacy(int irq, void *data)
  381. {
  382. struct net_device *netdev = data;
  383. struct enic *enic = netdev_priv(netdev);
  384. u32 pba;
  385. vnic_intr_mask(&enic->intr[ENIC_INTX_WQ_RQ]);
  386. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  387. if (!pba) {
  388. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  389. return IRQ_NONE; /* not our interrupt */
  390. }
  391. if (ENIC_TEST_INTR(pba, ENIC_INTX_NOTIFY)) {
  392. vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_NOTIFY]);
  393. enic_notify_check(enic);
  394. }
  395. if (ENIC_TEST_INTR(pba, ENIC_INTX_ERR)) {
  396. vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_ERR]);
  397. enic_log_q_error(enic);
  398. /* schedule recovery from WQ/RQ error */
  399. schedule_work(&enic->reset);
  400. return IRQ_HANDLED;
  401. }
  402. if (ENIC_TEST_INTR(pba, ENIC_INTX_WQ_RQ)) {
  403. if (napi_schedule_prep(&enic->napi))
  404. __napi_schedule(&enic->napi);
  405. } else {
  406. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  407. }
  408. return IRQ_HANDLED;
  409. }
  410. static irqreturn_t enic_isr_msi(int irq, void *data)
  411. {
  412. struct enic *enic = data;
  413. /* With MSI, there is no sharing of interrupts, so this is
  414. * our interrupt and there is no need to ack it. The device
  415. * is not providing per-vector masking, so the OS will not
  416. * write to PCI config space to mask/unmask the interrupt.
  417. * We're using mask_on_assertion for MSI, so the device
  418. * automatically masks the interrupt when the interrupt is
  419. * generated. Later, when exiting polling, the interrupt
  420. * will be unmasked (see enic_poll).
  421. *
  422. * Also, the device uses the same PCIe Traffic Class (TC)
  423. * for Memory Write data and MSI, so there are no ordering
  424. * issues; the MSI will always arrive at the Root Complex
  425. * _after_ corresponding Memory Writes (i.e. descriptor
  426. * writes).
  427. */
  428. napi_schedule(&enic->napi);
  429. return IRQ_HANDLED;
  430. }
  431. static irqreturn_t enic_isr_msix_rq(int irq, void *data)
  432. {
  433. struct enic *enic = data;
  434. /* schedule NAPI polling for RQ cleanup */
  435. napi_schedule(&enic->napi);
  436. return IRQ_HANDLED;
  437. }
  438. static irqreturn_t enic_isr_msix_wq(int irq, void *data)
  439. {
  440. struct enic *enic = data;
  441. unsigned int wq_work_to_do = -1; /* no limit */
  442. unsigned int wq_work_done;
  443. wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
  444. wq_work_to_do, enic_wq_service, NULL);
  445. vnic_intr_return_credits(&enic->intr[ENIC_MSIX_WQ],
  446. wq_work_done,
  447. 1 /* unmask intr */,
  448. 1 /* reset intr timer */);
  449. return IRQ_HANDLED;
  450. }
  451. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  452. {
  453. struct enic *enic = data;
  454. vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_ERR]);
  455. enic_log_q_error(enic);
  456. /* schedule recovery from WQ/RQ error */
  457. schedule_work(&enic->reset);
  458. return IRQ_HANDLED;
  459. }
  460. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  461. {
  462. struct enic *enic = data;
  463. vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_NOTIFY]);
  464. enic_notify_check(enic);
  465. return IRQ_HANDLED;
  466. }
  467. static inline void enic_queue_wq_skb_cont(struct enic *enic,
  468. struct vnic_wq *wq, struct sk_buff *skb,
  469. unsigned int len_left)
  470. {
  471. skb_frag_t *frag;
  472. /* Queue additional data fragments */
  473. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  474. len_left -= frag->size;
  475. enic_queue_wq_desc_cont(wq, skb,
  476. pci_map_page(enic->pdev, frag->page,
  477. frag->page_offset, frag->size,
  478. PCI_DMA_TODEVICE),
  479. frag->size,
  480. (len_left == 0)); /* EOP? */
  481. }
  482. }
  483. static inline void enic_queue_wq_skb_vlan(struct enic *enic,
  484. struct vnic_wq *wq, struct sk_buff *skb,
  485. int vlan_tag_insert, unsigned int vlan_tag)
  486. {
  487. unsigned int head_len = skb_headlen(skb);
  488. unsigned int len_left = skb->len - head_len;
  489. int eop = (len_left == 0);
  490. /* Queue the main skb fragment. The fragments are no larger
  491. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  492. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  493. * per fragment is queued.
  494. */
  495. enic_queue_wq_desc(wq, skb,
  496. pci_map_single(enic->pdev, skb->data,
  497. head_len, PCI_DMA_TODEVICE),
  498. head_len,
  499. vlan_tag_insert, vlan_tag,
  500. eop);
  501. if (!eop)
  502. enic_queue_wq_skb_cont(enic, wq, skb, len_left);
  503. }
  504. static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
  505. struct vnic_wq *wq, struct sk_buff *skb,
  506. int vlan_tag_insert, unsigned int vlan_tag)
  507. {
  508. unsigned int head_len = skb_headlen(skb);
  509. unsigned int len_left = skb->len - head_len;
  510. unsigned int hdr_len = skb_transport_offset(skb);
  511. unsigned int csum_offset = hdr_len + skb->csum_offset;
  512. int eop = (len_left == 0);
  513. /* Queue the main skb fragment. The fragments are no larger
  514. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  515. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  516. * per fragment is queued.
  517. */
  518. enic_queue_wq_desc_csum_l4(wq, skb,
  519. pci_map_single(enic->pdev, skb->data,
  520. head_len, PCI_DMA_TODEVICE),
  521. head_len,
  522. csum_offset,
  523. hdr_len,
  524. vlan_tag_insert, vlan_tag,
  525. eop);
  526. if (!eop)
  527. enic_queue_wq_skb_cont(enic, wq, skb, len_left);
  528. }
  529. static inline void enic_queue_wq_skb_tso(struct enic *enic,
  530. struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
  531. int vlan_tag_insert, unsigned int vlan_tag)
  532. {
  533. unsigned int frag_len_left = skb_headlen(skb);
  534. unsigned int len_left = skb->len - frag_len_left;
  535. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  536. int eop = (len_left == 0);
  537. unsigned int len;
  538. dma_addr_t dma_addr;
  539. unsigned int offset = 0;
  540. skb_frag_t *frag;
  541. /* Preload TCP csum field with IP pseudo hdr calculated
  542. * with IP length set to zero. HW will later add in length
  543. * to each TCP segment resulting from the TSO.
  544. */
  545. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  546. ip_hdr(skb)->check = 0;
  547. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  548. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  549. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  550. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  551. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  552. }
  553. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  554. * for the main skb fragment
  555. */
  556. while (frag_len_left) {
  557. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  558. dma_addr = pci_map_single(enic->pdev, skb->data + offset,
  559. len, PCI_DMA_TODEVICE);
  560. enic_queue_wq_desc_tso(wq, skb,
  561. dma_addr,
  562. len,
  563. mss, hdr_len,
  564. vlan_tag_insert, vlan_tag,
  565. eop && (len == frag_len_left));
  566. frag_len_left -= len;
  567. offset += len;
  568. }
  569. if (eop)
  570. return;
  571. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  572. * for additional data fragments
  573. */
  574. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  575. len_left -= frag->size;
  576. frag_len_left = frag->size;
  577. offset = frag->page_offset;
  578. while (frag_len_left) {
  579. len = min(frag_len_left,
  580. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  581. dma_addr = pci_map_page(enic->pdev, frag->page,
  582. offset, len,
  583. PCI_DMA_TODEVICE);
  584. enic_queue_wq_desc_cont(wq, skb,
  585. dma_addr,
  586. len,
  587. (len_left == 0) &&
  588. (len == frag_len_left)); /* EOP? */
  589. frag_len_left -= len;
  590. offset += len;
  591. }
  592. }
  593. }
  594. static inline void enic_queue_wq_skb(struct enic *enic,
  595. struct vnic_wq *wq, struct sk_buff *skb)
  596. {
  597. unsigned int mss = skb_shinfo(skb)->gso_size;
  598. unsigned int vlan_tag = 0;
  599. int vlan_tag_insert = 0;
  600. if (enic->vlan_group && vlan_tx_tag_present(skb)) {
  601. /* VLAN tag from trunking driver */
  602. vlan_tag_insert = 1;
  603. vlan_tag = vlan_tx_tag_get(skb);
  604. }
  605. if (mss)
  606. enic_queue_wq_skb_tso(enic, wq, skb, mss,
  607. vlan_tag_insert, vlan_tag);
  608. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  609. enic_queue_wq_skb_csum_l4(enic, wq, skb,
  610. vlan_tag_insert, vlan_tag);
  611. else
  612. enic_queue_wq_skb_vlan(enic, wq, skb,
  613. vlan_tag_insert, vlan_tag);
  614. }
  615. /* netif_tx_lock held, process context with BHs disabled, or BH */
  616. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  617. struct net_device *netdev)
  618. {
  619. struct enic *enic = netdev_priv(netdev);
  620. struct vnic_wq *wq = &enic->wq[0];
  621. unsigned long flags;
  622. if (skb->len <= 0) {
  623. dev_kfree_skb(skb);
  624. return NETDEV_TX_OK;
  625. }
  626. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  627. * which is very likely. In the off chance it's going to take
  628. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  629. */
  630. if (skb_shinfo(skb)->gso_size == 0 &&
  631. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  632. skb_linearize(skb)) {
  633. dev_kfree_skb(skb);
  634. return NETDEV_TX_OK;
  635. }
  636. spin_lock_irqsave(&enic->wq_lock[0], flags);
  637. if (vnic_wq_desc_avail(wq) <
  638. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  639. netif_stop_queue(netdev);
  640. /* This is a hard error, log it */
  641. printk(KERN_ERR PFX "%s: BUG! Tx ring full when "
  642. "queue awake!\n", netdev->name);
  643. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  644. return NETDEV_TX_BUSY;
  645. }
  646. enic_queue_wq_skb(enic, wq, skb);
  647. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  648. netif_stop_queue(netdev);
  649. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  650. return NETDEV_TX_OK;
  651. }
  652. /* dev_base_lock rwlock held, nominally process context */
  653. static struct net_device_stats *enic_get_stats(struct net_device *netdev)
  654. {
  655. struct enic *enic = netdev_priv(netdev);
  656. struct net_device_stats *net_stats = &netdev->stats;
  657. struct vnic_stats *stats;
  658. spin_lock(&enic->devcmd_lock);
  659. vnic_dev_stats_dump(enic->vdev, &stats);
  660. spin_unlock(&enic->devcmd_lock);
  661. net_stats->tx_packets = stats->tx.tx_frames_ok;
  662. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  663. net_stats->tx_errors = stats->tx.tx_errors;
  664. net_stats->tx_dropped = stats->tx.tx_drops;
  665. net_stats->rx_packets = stats->rx.rx_frames_ok;
  666. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  667. net_stats->rx_errors = stats->rx.rx_errors;
  668. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  669. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  670. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  671. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  672. return net_stats;
  673. }
  674. static void enic_reset_mcaddrs(struct enic *enic)
  675. {
  676. enic->mc_count = 0;
  677. }
  678. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  679. {
  680. if (!is_valid_ether_addr(addr))
  681. return -EADDRNOTAVAIL;
  682. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  683. return 0;
  684. }
  685. /* netif_tx_lock held, BHs disabled */
  686. static void enic_set_multicast_list(struct net_device *netdev)
  687. {
  688. struct enic *enic = netdev_priv(netdev);
  689. struct dev_mc_list *list = netdev->mc_list;
  690. int directed = 1;
  691. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  692. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  693. int promisc = (netdev->flags & IFF_PROMISC) ? 1 : 0;
  694. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  695. (netdev->mc_count > ENIC_MULTICAST_PERFECT_FILTERS);
  696. unsigned int flags = netdev->flags | (allmulti ? IFF_ALLMULTI : 0);
  697. u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  698. unsigned int mc_count = netdev->mc_count;
  699. unsigned int i, j;
  700. if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS)
  701. mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
  702. spin_lock(&enic->devcmd_lock);
  703. if (enic->flags != flags) {
  704. enic->flags = flags;
  705. vnic_dev_packet_filter(enic->vdev, directed,
  706. multicast, broadcast, promisc, allmulti);
  707. }
  708. /* Is there an easier way? Trying to minimize to
  709. * calls to add/del multicast addrs. We keep the
  710. * addrs from the last call in enic->mc_addr and
  711. * look for changes to add/del.
  712. */
  713. for (i = 0; list && i < mc_count; i++) {
  714. memcpy(mc_addr[i], list->dmi_addr, ETH_ALEN);
  715. list = list->next;
  716. }
  717. for (i = 0; i < enic->mc_count; i++) {
  718. for (j = 0; j < mc_count; j++)
  719. if (compare_ether_addr(enic->mc_addr[i],
  720. mc_addr[j]) == 0)
  721. break;
  722. if (j == mc_count)
  723. enic_del_multicast_addr(enic, enic->mc_addr[i]);
  724. }
  725. for (i = 0; i < mc_count; i++) {
  726. for (j = 0; j < enic->mc_count; j++)
  727. if (compare_ether_addr(mc_addr[i],
  728. enic->mc_addr[j]) == 0)
  729. break;
  730. if (j == enic->mc_count)
  731. enic_add_multicast_addr(enic, mc_addr[i]);
  732. }
  733. /* Save the list to compare against next time
  734. */
  735. for (i = 0; i < mc_count; i++)
  736. memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
  737. enic->mc_count = mc_count;
  738. spin_unlock(&enic->devcmd_lock);
  739. }
  740. /* rtnl lock is held */
  741. static void enic_vlan_rx_register(struct net_device *netdev,
  742. struct vlan_group *vlan_group)
  743. {
  744. struct enic *enic = netdev_priv(netdev);
  745. enic->vlan_group = vlan_group;
  746. }
  747. /* rtnl lock is held */
  748. static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
  749. {
  750. struct enic *enic = netdev_priv(netdev);
  751. spin_lock(&enic->devcmd_lock);
  752. enic_add_vlan(enic, vid);
  753. spin_unlock(&enic->devcmd_lock);
  754. }
  755. /* rtnl lock is held */
  756. static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
  757. {
  758. struct enic *enic = netdev_priv(netdev);
  759. spin_lock(&enic->devcmd_lock);
  760. enic_del_vlan(enic, vid);
  761. spin_unlock(&enic->devcmd_lock);
  762. }
  763. /* netif_tx_lock held, BHs disabled */
  764. static void enic_tx_timeout(struct net_device *netdev)
  765. {
  766. struct enic *enic = netdev_priv(netdev);
  767. schedule_work(&enic->reset);
  768. }
  769. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  770. {
  771. struct enic *enic = vnic_dev_priv(rq->vdev);
  772. if (!buf->os_buf)
  773. return;
  774. pci_unmap_single(enic->pdev, buf->dma_addr,
  775. buf->len, PCI_DMA_FROMDEVICE);
  776. dev_kfree_skb_any(buf->os_buf);
  777. }
  778. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  779. {
  780. struct enic *enic = vnic_dev_priv(rq->vdev);
  781. struct net_device *netdev = enic->netdev;
  782. struct sk_buff *skb;
  783. unsigned int len = netdev->mtu + ETH_HLEN;
  784. unsigned int os_buf_index = 0;
  785. dma_addr_t dma_addr;
  786. skb = netdev_alloc_skb_ip_align(netdev, len);
  787. if (!skb)
  788. return -ENOMEM;
  789. dma_addr = pci_map_single(enic->pdev, skb->data,
  790. len, PCI_DMA_FROMDEVICE);
  791. enic_queue_rq_desc(rq, skb, os_buf_index,
  792. dma_addr, len);
  793. return 0;
  794. }
  795. static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
  796. {
  797. struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
  798. if (vnic_rq_posting_soon(rq)) {
  799. /* SW workaround for A0 HW erratum: if we're just about
  800. * to write posted_index, insert a dummy desc
  801. * of type resvd
  802. */
  803. rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
  804. vnic_rq_post(rq, 0, 0, 0, 0);
  805. } else {
  806. return enic_rq_alloc_buf(rq);
  807. }
  808. return 0;
  809. }
  810. static int enic_set_rq_alloc_buf(struct enic *enic)
  811. {
  812. enum vnic_dev_hw_version hw_ver;
  813. int err;
  814. err = vnic_dev_hw_version(enic->vdev, &hw_ver);
  815. if (err)
  816. return err;
  817. switch (hw_ver) {
  818. case VNIC_DEV_HW_VER_A1:
  819. enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
  820. break;
  821. case VNIC_DEV_HW_VER_A2:
  822. case VNIC_DEV_HW_VER_UNKNOWN:
  823. enic->rq_alloc_buf = enic_rq_alloc_buf;
  824. break;
  825. default:
  826. return -ENODEV;
  827. }
  828. return 0;
  829. }
  830. static int enic_get_skb_header(struct sk_buff *skb, void **iphdr,
  831. void **tcph, u64 *hdr_flags, void *priv)
  832. {
  833. struct cq_enet_rq_desc *cq_desc = priv;
  834. unsigned int ip_len;
  835. struct iphdr *iph;
  836. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  837. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  838. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  839. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  840. u8 packet_error;
  841. u16 q_number, completed_index, bytes_written, vlan, checksum;
  842. u32 rss_hash;
  843. cq_enet_rq_desc_dec(cq_desc,
  844. &type, &color, &q_number, &completed_index,
  845. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  846. &csum_not_calc, &rss_hash, &bytes_written,
  847. &packet_error, &vlan_stripped, &vlan, &checksum,
  848. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  849. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  850. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  851. &fcs_ok);
  852. if (!(ipv4 && tcp && !ipv4_fragment))
  853. return -1;
  854. skb_reset_network_header(skb);
  855. iph = ip_hdr(skb);
  856. ip_len = ip_hdrlen(skb);
  857. skb_set_transport_header(skb, ip_len);
  858. /* check if ip header and tcp header are complete */
  859. if (ntohs(iph->tot_len) < ip_len + tcp_hdrlen(skb))
  860. return -1;
  861. *hdr_flags = LRO_IPV4 | LRO_TCP;
  862. *tcph = tcp_hdr(skb);
  863. *iphdr = iph;
  864. return 0;
  865. }
  866. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  867. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  868. int skipped, void *opaque)
  869. {
  870. struct enic *enic = vnic_dev_priv(rq->vdev);
  871. struct net_device *netdev = enic->netdev;
  872. struct sk_buff *skb;
  873. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  874. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  875. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  876. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  877. u8 packet_error;
  878. u16 q_number, completed_index, bytes_written, vlan, checksum;
  879. u32 rss_hash;
  880. if (skipped)
  881. return;
  882. skb = buf->os_buf;
  883. prefetch(skb->data - NET_IP_ALIGN);
  884. pci_unmap_single(enic->pdev, buf->dma_addr,
  885. buf->len, PCI_DMA_FROMDEVICE);
  886. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  887. &type, &color, &q_number, &completed_index,
  888. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  889. &csum_not_calc, &rss_hash, &bytes_written,
  890. &packet_error, &vlan_stripped, &vlan, &checksum,
  891. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  892. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  893. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  894. &fcs_ok);
  895. if (packet_error) {
  896. if (!fcs_ok) {
  897. if (bytes_written > 0)
  898. enic->rq_bad_fcs++;
  899. else if (bytes_written == 0)
  900. enic->rq_truncated_pkts++;
  901. }
  902. dev_kfree_skb_any(skb);
  903. return;
  904. }
  905. if (eop && bytes_written > 0) {
  906. /* Good receive
  907. */
  908. skb_put(skb, bytes_written);
  909. skb->protocol = eth_type_trans(skb, netdev);
  910. if (enic->csum_rx_enabled && !csum_not_calc) {
  911. skb->csum = htons(checksum);
  912. skb->ip_summed = CHECKSUM_COMPLETE;
  913. }
  914. skb->dev = netdev;
  915. if (enic->vlan_group && vlan_stripped) {
  916. if ((netdev->features & NETIF_F_LRO) && ipv4)
  917. lro_vlan_hwaccel_receive_skb(&enic->lro_mgr,
  918. skb, enic->vlan_group,
  919. vlan, cq_desc);
  920. else
  921. vlan_hwaccel_receive_skb(skb,
  922. enic->vlan_group, vlan);
  923. } else {
  924. if ((netdev->features & NETIF_F_LRO) && ipv4)
  925. lro_receive_skb(&enic->lro_mgr, skb, cq_desc);
  926. else
  927. netif_receive_skb(skb);
  928. }
  929. } else {
  930. /* Buffer overflow
  931. */
  932. dev_kfree_skb_any(skb);
  933. }
  934. }
  935. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  936. u8 type, u16 q_number, u16 completed_index, void *opaque)
  937. {
  938. struct enic *enic = vnic_dev_priv(vdev);
  939. vnic_rq_service(&enic->rq[q_number], cq_desc,
  940. completed_index, VNIC_RQ_RETURN_DESC,
  941. enic_rq_indicate_buf, opaque);
  942. return 0;
  943. }
  944. static int enic_poll(struct napi_struct *napi, int budget)
  945. {
  946. struct enic *enic = container_of(napi, struct enic, napi);
  947. struct net_device *netdev = enic->netdev;
  948. unsigned int rq_work_to_do = budget;
  949. unsigned int wq_work_to_do = -1; /* no limit */
  950. unsigned int work_done, rq_work_done, wq_work_done;
  951. int err;
  952. /* Service RQ (first) and WQ
  953. */
  954. rq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
  955. rq_work_to_do, enic_rq_service, NULL);
  956. wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
  957. wq_work_to_do, enic_wq_service, NULL);
  958. /* Accumulate intr event credits for this polling
  959. * cycle. An intr event is the completion of a
  960. * a WQ or RQ packet.
  961. */
  962. work_done = rq_work_done + wq_work_done;
  963. if (work_done > 0)
  964. vnic_intr_return_credits(&enic->intr[ENIC_INTX_WQ_RQ],
  965. work_done,
  966. 0 /* don't unmask intr */,
  967. 0 /* don't reset intr timer */);
  968. err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
  969. /* Buffer allocation failed. Stay in polling
  970. * mode so we can try to fill the ring again.
  971. */
  972. if (err)
  973. rq_work_done = rq_work_to_do;
  974. if (rq_work_done < rq_work_to_do) {
  975. /* Some work done, but not enough to stay in polling,
  976. * flush all LROs and exit polling
  977. */
  978. if (netdev->features & NETIF_F_LRO)
  979. lro_flush_all(&enic->lro_mgr);
  980. napi_complete(napi);
  981. vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
  982. }
  983. return rq_work_done;
  984. }
  985. static int enic_poll_msix(struct napi_struct *napi, int budget)
  986. {
  987. struct enic *enic = container_of(napi, struct enic, napi);
  988. struct net_device *netdev = enic->netdev;
  989. unsigned int work_to_do = budget;
  990. unsigned int work_done;
  991. int err;
  992. /* Service RQ
  993. */
  994. work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
  995. work_to_do, enic_rq_service, NULL);
  996. /* Return intr event credits for this polling
  997. * cycle. An intr event is the completion of a
  998. * RQ packet.
  999. */
  1000. if (work_done > 0)
  1001. vnic_intr_return_credits(&enic->intr[ENIC_MSIX_RQ],
  1002. work_done,
  1003. 0 /* don't unmask intr */,
  1004. 0 /* don't reset intr timer */);
  1005. err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
  1006. /* Buffer allocation failed. Stay in polling mode
  1007. * so we can try to fill the ring again.
  1008. */
  1009. if (err)
  1010. work_done = work_to_do;
  1011. if (work_done < work_to_do) {
  1012. /* Some work done, but not enough to stay in polling,
  1013. * flush all LROs and exit polling
  1014. */
  1015. if (netdev->features & NETIF_F_LRO)
  1016. lro_flush_all(&enic->lro_mgr);
  1017. napi_complete(napi);
  1018. vnic_intr_unmask(&enic->intr[ENIC_MSIX_RQ]);
  1019. }
  1020. return work_done;
  1021. }
  1022. static void enic_notify_timer(unsigned long data)
  1023. {
  1024. struct enic *enic = (struct enic *)data;
  1025. enic_notify_check(enic);
  1026. mod_timer(&enic->notify_timer,
  1027. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  1028. }
  1029. static void enic_free_intr(struct enic *enic)
  1030. {
  1031. struct net_device *netdev = enic->netdev;
  1032. unsigned int i;
  1033. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1034. case VNIC_DEV_INTR_MODE_INTX:
  1035. free_irq(enic->pdev->irq, netdev);
  1036. break;
  1037. case VNIC_DEV_INTR_MODE_MSI:
  1038. free_irq(enic->pdev->irq, enic);
  1039. break;
  1040. case VNIC_DEV_INTR_MODE_MSIX:
  1041. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1042. if (enic->msix[i].requested)
  1043. free_irq(enic->msix_entry[i].vector,
  1044. enic->msix[i].devid);
  1045. break;
  1046. default:
  1047. break;
  1048. }
  1049. }
  1050. static int enic_request_intr(struct enic *enic)
  1051. {
  1052. struct net_device *netdev = enic->netdev;
  1053. unsigned int i;
  1054. int err = 0;
  1055. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1056. case VNIC_DEV_INTR_MODE_INTX:
  1057. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1058. IRQF_SHARED, netdev->name, netdev);
  1059. break;
  1060. case VNIC_DEV_INTR_MODE_MSI:
  1061. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1062. 0, netdev->name, enic);
  1063. break;
  1064. case VNIC_DEV_INTR_MODE_MSIX:
  1065. sprintf(enic->msix[ENIC_MSIX_RQ].devname,
  1066. "%.11s-rx-0", netdev->name);
  1067. enic->msix[ENIC_MSIX_RQ].isr = enic_isr_msix_rq;
  1068. enic->msix[ENIC_MSIX_RQ].devid = enic;
  1069. sprintf(enic->msix[ENIC_MSIX_WQ].devname,
  1070. "%.11s-tx-0", netdev->name);
  1071. enic->msix[ENIC_MSIX_WQ].isr = enic_isr_msix_wq;
  1072. enic->msix[ENIC_MSIX_WQ].devid = enic;
  1073. sprintf(enic->msix[ENIC_MSIX_ERR].devname,
  1074. "%.11s-err", netdev->name);
  1075. enic->msix[ENIC_MSIX_ERR].isr = enic_isr_msix_err;
  1076. enic->msix[ENIC_MSIX_ERR].devid = enic;
  1077. sprintf(enic->msix[ENIC_MSIX_NOTIFY].devname,
  1078. "%.11s-notify", netdev->name);
  1079. enic->msix[ENIC_MSIX_NOTIFY].isr = enic_isr_msix_notify;
  1080. enic->msix[ENIC_MSIX_NOTIFY].devid = enic;
  1081. for (i = 0; i < ARRAY_SIZE(enic->msix); i++) {
  1082. err = request_irq(enic->msix_entry[i].vector,
  1083. enic->msix[i].isr, 0,
  1084. enic->msix[i].devname,
  1085. enic->msix[i].devid);
  1086. if (err) {
  1087. enic_free_intr(enic);
  1088. break;
  1089. }
  1090. enic->msix[i].requested = 1;
  1091. }
  1092. break;
  1093. default:
  1094. break;
  1095. }
  1096. return err;
  1097. }
  1098. static void enic_synchronize_irqs(struct enic *enic)
  1099. {
  1100. unsigned int i;
  1101. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1102. case VNIC_DEV_INTR_MODE_INTX:
  1103. case VNIC_DEV_INTR_MODE_MSI:
  1104. synchronize_irq(enic->pdev->irq);
  1105. break;
  1106. case VNIC_DEV_INTR_MODE_MSIX:
  1107. for (i = 0; i < enic->intr_count; i++)
  1108. synchronize_irq(enic->msix_entry[i].vector);
  1109. break;
  1110. default:
  1111. break;
  1112. }
  1113. }
  1114. static int enic_notify_set(struct enic *enic)
  1115. {
  1116. int err;
  1117. spin_lock(&enic->devcmd_lock);
  1118. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1119. case VNIC_DEV_INTR_MODE_INTX:
  1120. err = vnic_dev_notify_set(enic->vdev, ENIC_INTX_NOTIFY);
  1121. break;
  1122. case VNIC_DEV_INTR_MODE_MSIX:
  1123. err = vnic_dev_notify_set(enic->vdev, ENIC_MSIX_NOTIFY);
  1124. break;
  1125. default:
  1126. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1127. break;
  1128. }
  1129. spin_unlock(&enic->devcmd_lock);
  1130. return err;
  1131. }
  1132. static void enic_notify_timer_start(struct enic *enic)
  1133. {
  1134. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1135. case VNIC_DEV_INTR_MODE_MSI:
  1136. mod_timer(&enic->notify_timer, jiffies);
  1137. break;
  1138. default:
  1139. /* Using intr for notification for INTx/MSI-X */
  1140. break;
  1141. };
  1142. }
  1143. /* rtnl lock is held, process context */
  1144. static int enic_open(struct net_device *netdev)
  1145. {
  1146. struct enic *enic = netdev_priv(netdev);
  1147. unsigned int i;
  1148. int err;
  1149. err = enic_request_intr(enic);
  1150. if (err) {
  1151. printk(KERN_ERR PFX "%s: Unable to request irq.\n",
  1152. netdev->name);
  1153. return err;
  1154. }
  1155. err = enic_notify_set(enic);
  1156. if (err) {
  1157. printk(KERN_ERR PFX
  1158. "%s: Failed to alloc notify buffer, aborting.\n",
  1159. netdev->name);
  1160. goto err_out_free_intr;
  1161. }
  1162. for (i = 0; i < enic->rq_count; i++) {
  1163. vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
  1164. /* Need at least one buffer on ring to get going */
  1165. if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
  1166. printk(KERN_ERR PFX
  1167. "%s: Unable to alloc receive buffers.\n",
  1168. netdev->name);
  1169. err = -ENOMEM;
  1170. goto err_out_notify_unset;
  1171. }
  1172. }
  1173. for (i = 0; i < enic->wq_count; i++)
  1174. vnic_wq_enable(&enic->wq[i]);
  1175. for (i = 0; i < enic->rq_count; i++)
  1176. vnic_rq_enable(&enic->rq[i]);
  1177. spin_lock(&enic->devcmd_lock);
  1178. enic_add_station_addr(enic);
  1179. spin_unlock(&enic->devcmd_lock);
  1180. enic_set_multicast_list(netdev);
  1181. netif_wake_queue(netdev);
  1182. napi_enable(&enic->napi);
  1183. spin_lock(&enic->devcmd_lock);
  1184. vnic_dev_enable(enic->vdev);
  1185. spin_unlock(&enic->devcmd_lock);
  1186. for (i = 0; i < enic->intr_count; i++)
  1187. vnic_intr_unmask(&enic->intr[i]);
  1188. enic_notify_timer_start(enic);
  1189. return 0;
  1190. err_out_notify_unset:
  1191. spin_lock(&enic->devcmd_lock);
  1192. vnic_dev_notify_unset(enic->vdev);
  1193. spin_unlock(&enic->devcmd_lock);
  1194. err_out_free_intr:
  1195. enic_free_intr(enic);
  1196. return err;
  1197. }
  1198. /* rtnl lock is held, process context */
  1199. static int enic_stop(struct net_device *netdev)
  1200. {
  1201. struct enic *enic = netdev_priv(netdev);
  1202. unsigned int i;
  1203. int err;
  1204. for (i = 0; i < enic->intr_count; i++)
  1205. vnic_intr_mask(&enic->intr[i]);
  1206. enic_synchronize_irqs(enic);
  1207. del_timer_sync(&enic->notify_timer);
  1208. spin_lock(&enic->devcmd_lock);
  1209. vnic_dev_disable(enic->vdev);
  1210. spin_unlock(&enic->devcmd_lock);
  1211. napi_disable(&enic->napi);
  1212. netif_carrier_off(netdev);
  1213. netif_tx_disable(netdev);
  1214. for (i = 0; i < enic->wq_count; i++) {
  1215. err = vnic_wq_disable(&enic->wq[i]);
  1216. if (err)
  1217. return err;
  1218. }
  1219. for (i = 0; i < enic->rq_count; i++) {
  1220. err = vnic_rq_disable(&enic->rq[i]);
  1221. if (err)
  1222. return err;
  1223. }
  1224. spin_lock(&enic->devcmd_lock);
  1225. vnic_dev_notify_unset(enic->vdev);
  1226. spin_unlock(&enic->devcmd_lock);
  1227. enic_free_intr(enic);
  1228. for (i = 0; i < enic->wq_count; i++)
  1229. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1230. for (i = 0; i < enic->rq_count; i++)
  1231. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1232. for (i = 0; i < enic->cq_count; i++)
  1233. vnic_cq_clean(&enic->cq[i]);
  1234. for (i = 0; i < enic->intr_count; i++)
  1235. vnic_intr_clean(&enic->intr[i]);
  1236. return 0;
  1237. }
  1238. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1239. {
  1240. struct enic *enic = netdev_priv(netdev);
  1241. int running = netif_running(netdev);
  1242. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1243. return -EINVAL;
  1244. if (running)
  1245. enic_stop(netdev);
  1246. netdev->mtu = new_mtu;
  1247. if (netdev->mtu > enic->port_mtu)
  1248. printk(KERN_WARNING PFX
  1249. "%s: interface MTU (%d) set higher "
  1250. "than port MTU (%d)\n",
  1251. netdev->name, netdev->mtu, enic->port_mtu);
  1252. if (running)
  1253. enic_open(netdev);
  1254. return 0;
  1255. }
  1256. #ifdef CONFIG_NET_POLL_CONTROLLER
  1257. static void enic_poll_controller(struct net_device *netdev)
  1258. {
  1259. struct enic *enic = netdev_priv(netdev);
  1260. struct vnic_dev *vdev = enic->vdev;
  1261. switch (vnic_dev_get_intr_mode(vdev)) {
  1262. case VNIC_DEV_INTR_MODE_MSIX:
  1263. enic_isr_msix_rq(enic->pdev->irq, enic);
  1264. enic_isr_msix_wq(enic->pdev->irq, enic);
  1265. break;
  1266. case VNIC_DEV_INTR_MODE_MSI:
  1267. enic_isr_msi(enic->pdev->irq, enic);
  1268. break;
  1269. case VNIC_DEV_INTR_MODE_INTX:
  1270. enic_isr_legacy(enic->pdev->irq, netdev);
  1271. break;
  1272. default:
  1273. break;
  1274. }
  1275. }
  1276. #endif
  1277. static int enic_dev_wait(struct vnic_dev *vdev,
  1278. int (*start)(struct vnic_dev *, int),
  1279. int (*finished)(struct vnic_dev *, int *),
  1280. int arg)
  1281. {
  1282. unsigned long time;
  1283. int done;
  1284. int err;
  1285. BUG_ON(in_interrupt());
  1286. err = start(vdev, arg);
  1287. if (err)
  1288. return err;
  1289. /* Wait for func to complete...2 seconds max
  1290. */
  1291. time = jiffies + (HZ * 2);
  1292. do {
  1293. err = finished(vdev, &done);
  1294. if (err)
  1295. return err;
  1296. if (done)
  1297. return 0;
  1298. schedule_timeout_uninterruptible(HZ / 10);
  1299. } while (time_after(time, jiffies));
  1300. return -ETIMEDOUT;
  1301. }
  1302. static int enic_dev_open(struct enic *enic)
  1303. {
  1304. int err;
  1305. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1306. vnic_dev_open_done, 0);
  1307. if (err)
  1308. printk(KERN_ERR PFX
  1309. "vNIC device open failed, err %d.\n", err);
  1310. return err;
  1311. }
  1312. static int enic_dev_soft_reset(struct enic *enic)
  1313. {
  1314. int err;
  1315. err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset,
  1316. vnic_dev_soft_reset_done, 0);
  1317. if (err)
  1318. printk(KERN_ERR PFX
  1319. "vNIC soft reset failed, err %d.\n", err);
  1320. return err;
  1321. }
  1322. static int enic_set_niccfg(struct enic *enic)
  1323. {
  1324. const u8 rss_default_cpu = 0;
  1325. const u8 rss_hash_type = 0;
  1326. const u8 rss_hash_bits = 0;
  1327. const u8 rss_base_cpu = 0;
  1328. const u8 rss_enable = 0;
  1329. const u8 tso_ipid_split_en = 0;
  1330. const u8 ig_vlan_strip_en = 1;
  1331. /* Enable VLAN tag stripping. RSS not enabled (yet).
  1332. */
  1333. return enic_set_nic_cfg(enic,
  1334. rss_default_cpu, rss_hash_type,
  1335. rss_hash_bits, rss_base_cpu,
  1336. rss_enable, tso_ipid_split_en,
  1337. ig_vlan_strip_en);
  1338. }
  1339. static void enic_reset(struct work_struct *work)
  1340. {
  1341. struct enic *enic = container_of(work, struct enic, reset);
  1342. if (!netif_running(enic->netdev))
  1343. return;
  1344. rtnl_lock();
  1345. spin_lock(&enic->devcmd_lock);
  1346. vnic_dev_hang_notify(enic->vdev);
  1347. spin_unlock(&enic->devcmd_lock);
  1348. enic_stop(enic->netdev);
  1349. enic_dev_soft_reset(enic);
  1350. vnic_dev_init(enic->vdev, 0);
  1351. enic_reset_mcaddrs(enic);
  1352. enic_init_vnic_resources(enic);
  1353. enic_set_niccfg(enic);
  1354. enic_open(enic->netdev);
  1355. rtnl_unlock();
  1356. }
  1357. static int enic_set_intr_mode(struct enic *enic)
  1358. {
  1359. unsigned int n = 1;
  1360. unsigned int m = 1;
  1361. unsigned int i;
  1362. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1363. * system capabilities.
  1364. *
  1365. * Try MSI-X first
  1366. *
  1367. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1368. * (the second to last INTR is used for WQ/RQ errors)
  1369. * (the last INTR is used for notifications)
  1370. */
  1371. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1372. for (i = 0; i < n + m + 2; i++)
  1373. enic->msix_entry[i].entry = i;
  1374. if (enic->config.intr_mode < 1 &&
  1375. enic->rq_count >= n &&
  1376. enic->wq_count >= m &&
  1377. enic->cq_count >= n + m &&
  1378. enic->intr_count >= n + m + 2 &&
  1379. !pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
  1380. enic->rq_count = n;
  1381. enic->wq_count = m;
  1382. enic->cq_count = n + m;
  1383. enic->intr_count = n + m + 2;
  1384. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSIX);
  1385. return 0;
  1386. }
  1387. /* Next try MSI
  1388. *
  1389. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1390. */
  1391. if (enic->config.intr_mode < 2 &&
  1392. enic->rq_count >= 1 &&
  1393. enic->wq_count >= 1 &&
  1394. enic->cq_count >= 2 &&
  1395. enic->intr_count >= 1 &&
  1396. !pci_enable_msi(enic->pdev)) {
  1397. enic->rq_count = 1;
  1398. enic->wq_count = 1;
  1399. enic->cq_count = 2;
  1400. enic->intr_count = 1;
  1401. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1402. return 0;
  1403. }
  1404. /* Next try INTx
  1405. *
  1406. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1407. * (the first INTR is used for WQ/RQ)
  1408. * (the second INTR is used for WQ/RQ errors)
  1409. * (the last INTR is used for notifications)
  1410. */
  1411. if (enic->config.intr_mode < 3 &&
  1412. enic->rq_count >= 1 &&
  1413. enic->wq_count >= 1 &&
  1414. enic->cq_count >= 2 &&
  1415. enic->intr_count >= 3) {
  1416. enic->rq_count = 1;
  1417. enic->wq_count = 1;
  1418. enic->cq_count = 2;
  1419. enic->intr_count = 3;
  1420. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1421. return 0;
  1422. }
  1423. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1424. return -EINVAL;
  1425. }
  1426. static void enic_clear_intr_mode(struct enic *enic)
  1427. {
  1428. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1429. case VNIC_DEV_INTR_MODE_MSIX:
  1430. pci_disable_msix(enic->pdev);
  1431. break;
  1432. case VNIC_DEV_INTR_MODE_MSI:
  1433. pci_disable_msi(enic->pdev);
  1434. break;
  1435. default:
  1436. break;
  1437. }
  1438. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1439. }
  1440. static const struct net_device_ops enic_netdev_ops = {
  1441. .ndo_open = enic_open,
  1442. .ndo_stop = enic_stop,
  1443. .ndo_start_xmit = enic_hard_start_xmit,
  1444. .ndo_get_stats = enic_get_stats,
  1445. .ndo_validate_addr = eth_validate_addr,
  1446. .ndo_set_mac_address = eth_mac_addr,
  1447. .ndo_set_multicast_list = enic_set_multicast_list,
  1448. .ndo_change_mtu = enic_change_mtu,
  1449. .ndo_vlan_rx_register = enic_vlan_rx_register,
  1450. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1451. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1452. .ndo_tx_timeout = enic_tx_timeout,
  1453. #ifdef CONFIG_NET_POLL_CONTROLLER
  1454. .ndo_poll_controller = enic_poll_controller,
  1455. #endif
  1456. };
  1457. void enic_dev_deinit(struct enic *enic)
  1458. {
  1459. netif_napi_del(&enic->napi);
  1460. enic_free_vnic_resources(enic);
  1461. enic_clear_intr_mode(enic);
  1462. }
  1463. int enic_dev_init(struct enic *enic)
  1464. {
  1465. struct net_device *netdev = enic->netdev;
  1466. int err;
  1467. /* Get vNIC configuration
  1468. */
  1469. err = enic_get_vnic_config(enic);
  1470. if (err) {
  1471. printk(KERN_ERR PFX
  1472. "Get vNIC configuration failed, aborting.\n");
  1473. return err;
  1474. }
  1475. /* Get available resource counts
  1476. */
  1477. enic_get_res_counts(enic);
  1478. /* Set interrupt mode based on resource counts and system
  1479. * capabilities
  1480. */
  1481. err = enic_set_intr_mode(enic);
  1482. if (err) {
  1483. printk(KERN_ERR PFX
  1484. "Failed to set intr mode based on resource "
  1485. "counts and system capabilities, aborting.\n");
  1486. return err;
  1487. }
  1488. /* Allocate and configure vNIC resources
  1489. */
  1490. err = enic_alloc_vnic_resources(enic);
  1491. if (err) {
  1492. printk(KERN_ERR PFX
  1493. "Failed to alloc vNIC resources, aborting.\n");
  1494. goto err_out_free_vnic_resources;
  1495. }
  1496. enic_init_vnic_resources(enic);
  1497. err = enic_set_rq_alloc_buf(enic);
  1498. if (err) {
  1499. printk(KERN_ERR PFX
  1500. "Failed to set RQ buffer allocator, aborting.\n");
  1501. goto err_out_free_vnic_resources;
  1502. }
  1503. err = enic_set_niccfg(enic);
  1504. if (err) {
  1505. printk(KERN_ERR PFX
  1506. "Failed to config nic, aborting.\n");
  1507. goto err_out_free_vnic_resources;
  1508. }
  1509. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1510. default:
  1511. netif_napi_add(netdev, &enic->napi, enic_poll, 64);
  1512. break;
  1513. case VNIC_DEV_INTR_MODE_MSIX:
  1514. netif_napi_add(netdev, &enic->napi, enic_poll_msix, 64);
  1515. break;
  1516. }
  1517. return 0;
  1518. err_out_free_vnic_resources:
  1519. enic_clear_intr_mode(enic);
  1520. enic_free_vnic_resources(enic);
  1521. return err;
  1522. }
  1523. static void enic_iounmap(struct enic *enic)
  1524. {
  1525. unsigned int i;
  1526. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1527. if (enic->bar[i].vaddr)
  1528. iounmap(enic->bar[i].vaddr);
  1529. }
  1530. static int __devinit enic_probe(struct pci_dev *pdev,
  1531. const struct pci_device_id *ent)
  1532. {
  1533. struct net_device *netdev;
  1534. struct enic *enic;
  1535. int using_dac = 0;
  1536. unsigned int i;
  1537. int err;
  1538. /* Allocate net device structure and initialize. Private
  1539. * instance data is initialized to zero.
  1540. */
  1541. netdev = alloc_etherdev(sizeof(struct enic));
  1542. if (!netdev) {
  1543. printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n");
  1544. return -ENOMEM;
  1545. }
  1546. pci_set_drvdata(pdev, netdev);
  1547. SET_NETDEV_DEV(netdev, &pdev->dev);
  1548. enic = netdev_priv(netdev);
  1549. enic->netdev = netdev;
  1550. enic->pdev = pdev;
  1551. /* Setup PCI resources
  1552. */
  1553. err = pci_enable_device(pdev);
  1554. if (err) {
  1555. printk(KERN_ERR PFX
  1556. "Cannot enable PCI device, aborting.\n");
  1557. goto err_out_free_netdev;
  1558. }
  1559. err = pci_request_regions(pdev, DRV_NAME);
  1560. if (err) {
  1561. printk(KERN_ERR PFX
  1562. "Cannot request PCI regions, aborting.\n");
  1563. goto err_out_disable_device;
  1564. }
  1565. pci_set_master(pdev);
  1566. /* Query PCI controller on system for DMA addressing
  1567. * limitation for the device. Try 40-bit first, and
  1568. * fail to 32-bit.
  1569. */
  1570. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
  1571. if (err) {
  1572. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1573. if (err) {
  1574. printk(KERN_ERR PFX
  1575. "No usable DMA configuration, aborting.\n");
  1576. goto err_out_release_regions;
  1577. }
  1578. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1579. if (err) {
  1580. printk(KERN_ERR PFX
  1581. "Unable to obtain 32-bit DMA "
  1582. "for consistent allocations, aborting.\n");
  1583. goto err_out_release_regions;
  1584. }
  1585. } else {
  1586. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
  1587. if (err) {
  1588. printk(KERN_ERR PFX
  1589. "Unable to obtain 40-bit DMA "
  1590. "for consistent allocations, aborting.\n");
  1591. goto err_out_release_regions;
  1592. }
  1593. using_dac = 1;
  1594. }
  1595. /* Map vNIC resources from BAR0-5
  1596. */
  1597. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  1598. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  1599. continue;
  1600. enic->bar[i].len = pci_resource_len(pdev, i);
  1601. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  1602. if (!enic->bar[i].vaddr) {
  1603. printk(KERN_ERR PFX
  1604. "Cannot memory-map BAR %d, aborting.\n", i);
  1605. err = -ENODEV;
  1606. goto err_out_iounmap;
  1607. }
  1608. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  1609. }
  1610. /* Register vNIC device
  1611. */
  1612. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  1613. ARRAY_SIZE(enic->bar));
  1614. if (!enic->vdev) {
  1615. printk(KERN_ERR PFX
  1616. "vNIC registration failed, aborting.\n");
  1617. err = -ENODEV;
  1618. goto err_out_iounmap;
  1619. }
  1620. /* Issue device open to get device in known state
  1621. */
  1622. err = enic_dev_open(enic);
  1623. if (err) {
  1624. printk(KERN_ERR PFX
  1625. "vNIC dev open failed, aborting.\n");
  1626. goto err_out_vnic_unregister;
  1627. }
  1628. /* Issue device init to initialize the vnic-to-switch link.
  1629. * We'll start with carrier off and wait for link UP
  1630. * notification later to turn on carrier. We don't need
  1631. * to wait here for the vnic-to-switch link initialization
  1632. * to complete; link UP notification is the indication that
  1633. * the process is complete.
  1634. */
  1635. netif_carrier_off(netdev);
  1636. err = vnic_dev_init(enic->vdev, 0);
  1637. if (err) {
  1638. printk(KERN_ERR PFX
  1639. "vNIC dev init failed, aborting.\n");
  1640. goto err_out_dev_close;
  1641. }
  1642. err = enic_dev_init(enic);
  1643. if (err) {
  1644. printk(KERN_ERR PFX
  1645. "Device initialization failed, aborting.\n");
  1646. goto err_out_dev_close;
  1647. }
  1648. /* Setup notification timer, HW reset task, and locks
  1649. */
  1650. init_timer(&enic->notify_timer);
  1651. enic->notify_timer.function = enic_notify_timer;
  1652. enic->notify_timer.data = (unsigned long)enic;
  1653. INIT_WORK(&enic->reset, enic_reset);
  1654. for (i = 0; i < enic->wq_count; i++)
  1655. spin_lock_init(&enic->wq_lock[i]);
  1656. spin_lock_init(&enic->devcmd_lock);
  1657. /* Register net device
  1658. */
  1659. enic->port_mtu = enic->config.mtu;
  1660. (void)enic_change_mtu(netdev, enic->port_mtu);
  1661. err = enic_set_mac_addr(netdev, enic->mac_addr);
  1662. if (err) {
  1663. printk(KERN_ERR PFX
  1664. "Invalid MAC address, aborting.\n");
  1665. goto err_out_dev_deinit;
  1666. }
  1667. enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
  1668. enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
  1669. netdev->netdev_ops = &enic_netdev_ops;
  1670. netdev->watchdog_timeo = 2 * HZ;
  1671. netdev->ethtool_ops = &enic_ethtool_ops;
  1672. netdev->features |= NETIF_F_HW_VLAN_TX |
  1673. NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
  1674. if (ENIC_SETTING(enic, TXCSUM))
  1675. netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  1676. if (ENIC_SETTING(enic, TSO))
  1677. netdev->features |= NETIF_F_TSO |
  1678. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  1679. if (ENIC_SETTING(enic, LRO))
  1680. netdev->features |= NETIF_F_LRO;
  1681. if (using_dac)
  1682. netdev->features |= NETIF_F_HIGHDMA;
  1683. enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
  1684. enic->lro_mgr.max_aggr = ENIC_LRO_MAX_AGGR;
  1685. enic->lro_mgr.max_desc = ENIC_LRO_MAX_DESC;
  1686. enic->lro_mgr.lro_arr = enic->lro_desc;
  1687. enic->lro_mgr.get_skb_header = enic_get_skb_header;
  1688. enic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
  1689. enic->lro_mgr.dev = netdev;
  1690. enic->lro_mgr.ip_summed = CHECKSUM_COMPLETE;
  1691. enic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
  1692. err = register_netdev(netdev);
  1693. if (err) {
  1694. printk(KERN_ERR PFX
  1695. "Cannot register net device, aborting.\n");
  1696. goto err_out_dev_deinit;
  1697. }
  1698. return 0;
  1699. err_out_dev_deinit:
  1700. enic_dev_deinit(enic);
  1701. err_out_dev_close:
  1702. vnic_dev_close(enic->vdev);
  1703. err_out_vnic_unregister:
  1704. vnic_dev_unregister(enic->vdev);
  1705. err_out_iounmap:
  1706. enic_iounmap(enic);
  1707. err_out_release_regions:
  1708. pci_release_regions(pdev);
  1709. err_out_disable_device:
  1710. pci_disable_device(pdev);
  1711. err_out_free_netdev:
  1712. pci_set_drvdata(pdev, NULL);
  1713. free_netdev(netdev);
  1714. return err;
  1715. }
  1716. static void __devexit enic_remove(struct pci_dev *pdev)
  1717. {
  1718. struct net_device *netdev = pci_get_drvdata(pdev);
  1719. if (netdev) {
  1720. struct enic *enic = netdev_priv(netdev);
  1721. flush_scheduled_work();
  1722. unregister_netdev(netdev);
  1723. enic_dev_deinit(enic);
  1724. vnic_dev_close(enic->vdev);
  1725. vnic_dev_unregister(enic->vdev);
  1726. enic_iounmap(enic);
  1727. pci_release_regions(pdev);
  1728. pci_disable_device(pdev);
  1729. pci_set_drvdata(pdev, NULL);
  1730. free_netdev(netdev);
  1731. }
  1732. }
  1733. static struct pci_driver enic_driver = {
  1734. .name = DRV_NAME,
  1735. .id_table = enic_id_table,
  1736. .probe = enic_probe,
  1737. .remove = __devexit_p(enic_remove),
  1738. };
  1739. static int __init enic_init_module(void)
  1740. {
  1741. printk(KERN_INFO PFX "%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  1742. return pci_register_driver(&enic_driver);
  1743. }
  1744. static void __exit enic_cleanup_module(void)
  1745. {
  1746. pci_unregister_driver(&enic_driver);
  1747. }
  1748. module_init(enic_init_module);
  1749. module_exit(enic_cleanup_module);