libata-core.c 141 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. */
  34. #include <linux/config.h>
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/pci.h>
  38. #include <linux/init.h>
  39. #include <linux/list.h>
  40. #include <linux/mm.h>
  41. #include <linux/highmem.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/delay.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/completion.h>
  48. #include <linux/suspend.h>
  49. #include <linux/workqueue.h>
  50. #include <linux/jiffies.h>
  51. #include <linux/scatterlist.h>
  52. #include <scsi/scsi.h>
  53. #include "scsi_priv.h"
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsi_host.h>
  56. #include <linux/libata.h>
  57. #include <asm/io.h>
  58. #include <asm/semaphore.h>
  59. #include <asm/byteorder.h>
  60. #include "libata.h"
  61. /* debounce timing parameters in msecs { interval, duration, timeout } */
  62. const unsigned long sata_deb_timing_boot[] = { 5, 100, 2000 };
  63. const unsigned long sata_deb_timing_eh[] = { 25, 500, 2000 };
  64. const unsigned long sata_deb_timing_before_fsrst[] = { 100, 2000, 5000 };
  65. static unsigned int ata_dev_init_params(struct ata_device *dev,
  66. u16 heads, u16 sectors);
  67. static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
  68. static void ata_dev_xfermask(struct ata_device *dev);
  69. static unsigned int ata_unique_id = 1;
  70. static struct workqueue_struct *ata_wq;
  71. struct workqueue_struct *ata_aux_wq;
  72. int atapi_enabled = 1;
  73. module_param(atapi_enabled, int, 0444);
  74. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  75. int atapi_dmadir = 0;
  76. module_param(atapi_dmadir, int, 0444);
  77. MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
  78. int libata_fua = 0;
  79. module_param_named(fua, libata_fua, int, 0444);
  80. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  81. MODULE_AUTHOR("Jeff Garzik");
  82. MODULE_DESCRIPTION("Library module for ATA devices");
  83. MODULE_LICENSE("GPL");
  84. MODULE_VERSION(DRV_VERSION);
  85. /**
  86. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  87. * @tf: Taskfile to convert
  88. * @fis: Buffer into which data will output
  89. * @pmp: Port multiplier port
  90. *
  91. * Converts a standard ATA taskfile to a Serial ATA
  92. * FIS structure (Register - Host to Device).
  93. *
  94. * LOCKING:
  95. * Inherited from caller.
  96. */
  97. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
  98. {
  99. fis[0] = 0x27; /* Register - Host to Device FIS */
  100. fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
  101. bit 7 indicates Command FIS */
  102. fis[2] = tf->command;
  103. fis[3] = tf->feature;
  104. fis[4] = tf->lbal;
  105. fis[5] = tf->lbam;
  106. fis[6] = tf->lbah;
  107. fis[7] = tf->device;
  108. fis[8] = tf->hob_lbal;
  109. fis[9] = tf->hob_lbam;
  110. fis[10] = tf->hob_lbah;
  111. fis[11] = tf->hob_feature;
  112. fis[12] = tf->nsect;
  113. fis[13] = tf->hob_nsect;
  114. fis[14] = 0;
  115. fis[15] = tf->ctl;
  116. fis[16] = 0;
  117. fis[17] = 0;
  118. fis[18] = 0;
  119. fis[19] = 0;
  120. }
  121. /**
  122. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  123. * @fis: Buffer from which data will be input
  124. * @tf: Taskfile to output
  125. *
  126. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  127. *
  128. * LOCKING:
  129. * Inherited from caller.
  130. */
  131. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  132. {
  133. tf->command = fis[2]; /* status */
  134. tf->feature = fis[3]; /* error */
  135. tf->lbal = fis[4];
  136. tf->lbam = fis[5];
  137. tf->lbah = fis[6];
  138. tf->device = fis[7];
  139. tf->hob_lbal = fis[8];
  140. tf->hob_lbam = fis[9];
  141. tf->hob_lbah = fis[10];
  142. tf->nsect = fis[12];
  143. tf->hob_nsect = fis[13];
  144. }
  145. static const u8 ata_rw_cmds[] = {
  146. /* pio multi */
  147. ATA_CMD_READ_MULTI,
  148. ATA_CMD_WRITE_MULTI,
  149. ATA_CMD_READ_MULTI_EXT,
  150. ATA_CMD_WRITE_MULTI_EXT,
  151. 0,
  152. 0,
  153. 0,
  154. ATA_CMD_WRITE_MULTI_FUA_EXT,
  155. /* pio */
  156. ATA_CMD_PIO_READ,
  157. ATA_CMD_PIO_WRITE,
  158. ATA_CMD_PIO_READ_EXT,
  159. ATA_CMD_PIO_WRITE_EXT,
  160. 0,
  161. 0,
  162. 0,
  163. 0,
  164. /* dma */
  165. ATA_CMD_READ,
  166. ATA_CMD_WRITE,
  167. ATA_CMD_READ_EXT,
  168. ATA_CMD_WRITE_EXT,
  169. 0,
  170. 0,
  171. 0,
  172. ATA_CMD_WRITE_FUA_EXT
  173. };
  174. /**
  175. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  176. * @qc: command to examine and configure
  177. *
  178. * Examine the device configuration and tf->flags to calculate
  179. * the proper read/write commands and protocol to use.
  180. *
  181. * LOCKING:
  182. * caller.
  183. */
  184. int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
  185. {
  186. struct ata_taskfile *tf = &qc->tf;
  187. struct ata_device *dev = qc->dev;
  188. u8 cmd;
  189. int index, fua, lba48, write;
  190. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  191. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  192. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  193. if (dev->flags & ATA_DFLAG_PIO) {
  194. tf->protocol = ATA_PROT_PIO;
  195. index = dev->multi_count ? 0 : 8;
  196. } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
  197. /* Unable to use DMA due to host limitation */
  198. tf->protocol = ATA_PROT_PIO;
  199. index = dev->multi_count ? 0 : 8;
  200. } else {
  201. tf->protocol = ATA_PROT_DMA;
  202. index = 16;
  203. }
  204. cmd = ata_rw_cmds[index + fua + lba48 + write];
  205. if (cmd) {
  206. tf->command = cmd;
  207. return 0;
  208. }
  209. return -1;
  210. }
  211. /**
  212. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  213. * @pio_mask: pio_mask
  214. * @mwdma_mask: mwdma_mask
  215. * @udma_mask: udma_mask
  216. *
  217. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  218. * unsigned int xfer_mask.
  219. *
  220. * LOCKING:
  221. * None.
  222. *
  223. * RETURNS:
  224. * Packed xfer_mask.
  225. */
  226. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  227. unsigned int mwdma_mask,
  228. unsigned int udma_mask)
  229. {
  230. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  231. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  232. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  233. }
  234. /**
  235. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  236. * @xfer_mask: xfer_mask to unpack
  237. * @pio_mask: resulting pio_mask
  238. * @mwdma_mask: resulting mwdma_mask
  239. * @udma_mask: resulting udma_mask
  240. *
  241. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  242. * Any NULL distination masks will be ignored.
  243. */
  244. static void ata_unpack_xfermask(unsigned int xfer_mask,
  245. unsigned int *pio_mask,
  246. unsigned int *mwdma_mask,
  247. unsigned int *udma_mask)
  248. {
  249. if (pio_mask)
  250. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  251. if (mwdma_mask)
  252. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  253. if (udma_mask)
  254. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  255. }
  256. static const struct ata_xfer_ent {
  257. int shift, bits;
  258. u8 base;
  259. } ata_xfer_tbl[] = {
  260. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  261. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  262. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  263. { -1, },
  264. };
  265. /**
  266. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  267. * @xfer_mask: xfer_mask of interest
  268. *
  269. * Return matching XFER_* value for @xfer_mask. Only the highest
  270. * bit of @xfer_mask is considered.
  271. *
  272. * LOCKING:
  273. * None.
  274. *
  275. * RETURNS:
  276. * Matching XFER_* value, 0 if no match found.
  277. */
  278. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  279. {
  280. int highbit = fls(xfer_mask) - 1;
  281. const struct ata_xfer_ent *ent;
  282. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  283. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  284. return ent->base + highbit - ent->shift;
  285. return 0;
  286. }
  287. /**
  288. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  289. * @xfer_mode: XFER_* of interest
  290. *
  291. * Return matching xfer_mask for @xfer_mode.
  292. *
  293. * LOCKING:
  294. * None.
  295. *
  296. * RETURNS:
  297. * Matching xfer_mask, 0 if no match found.
  298. */
  299. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  300. {
  301. const struct ata_xfer_ent *ent;
  302. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  303. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  304. return 1 << (ent->shift + xfer_mode - ent->base);
  305. return 0;
  306. }
  307. /**
  308. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  309. * @xfer_mode: XFER_* of interest
  310. *
  311. * Return matching xfer_shift for @xfer_mode.
  312. *
  313. * LOCKING:
  314. * None.
  315. *
  316. * RETURNS:
  317. * Matching xfer_shift, -1 if no match found.
  318. */
  319. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  320. {
  321. const struct ata_xfer_ent *ent;
  322. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  323. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  324. return ent->shift;
  325. return -1;
  326. }
  327. /**
  328. * ata_mode_string - convert xfer_mask to string
  329. * @xfer_mask: mask of bits supported; only highest bit counts.
  330. *
  331. * Determine string which represents the highest speed
  332. * (highest bit in @modemask).
  333. *
  334. * LOCKING:
  335. * None.
  336. *
  337. * RETURNS:
  338. * Constant C string representing highest speed listed in
  339. * @mode_mask, or the constant C string "<n/a>".
  340. */
  341. static const char *ata_mode_string(unsigned int xfer_mask)
  342. {
  343. static const char * const xfer_mode_str[] = {
  344. "PIO0",
  345. "PIO1",
  346. "PIO2",
  347. "PIO3",
  348. "PIO4",
  349. "MWDMA0",
  350. "MWDMA1",
  351. "MWDMA2",
  352. "UDMA/16",
  353. "UDMA/25",
  354. "UDMA/33",
  355. "UDMA/44",
  356. "UDMA/66",
  357. "UDMA/100",
  358. "UDMA/133",
  359. "UDMA7",
  360. };
  361. int highbit;
  362. highbit = fls(xfer_mask) - 1;
  363. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  364. return xfer_mode_str[highbit];
  365. return "<n/a>";
  366. }
  367. static const char *sata_spd_string(unsigned int spd)
  368. {
  369. static const char * const spd_str[] = {
  370. "1.5 Gbps",
  371. "3.0 Gbps",
  372. };
  373. if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
  374. return "<unknown>";
  375. return spd_str[spd - 1];
  376. }
  377. void ata_dev_disable(struct ata_device *dev)
  378. {
  379. if (ata_dev_enabled(dev)) {
  380. ata_dev_printk(dev, KERN_WARNING, "disabled\n");
  381. dev->class++;
  382. }
  383. }
  384. /**
  385. * ata_pio_devchk - PATA device presence detection
  386. * @ap: ATA channel to examine
  387. * @device: Device to examine (starting at zero)
  388. *
  389. * This technique was originally described in
  390. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  391. * later found its way into the ATA/ATAPI spec.
  392. *
  393. * Write a pattern to the ATA shadow registers,
  394. * and if a device is present, it will respond by
  395. * correctly storing and echoing back the
  396. * ATA shadow register contents.
  397. *
  398. * LOCKING:
  399. * caller.
  400. */
  401. static unsigned int ata_pio_devchk(struct ata_port *ap,
  402. unsigned int device)
  403. {
  404. struct ata_ioports *ioaddr = &ap->ioaddr;
  405. u8 nsect, lbal;
  406. ap->ops->dev_select(ap, device);
  407. outb(0x55, ioaddr->nsect_addr);
  408. outb(0xaa, ioaddr->lbal_addr);
  409. outb(0xaa, ioaddr->nsect_addr);
  410. outb(0x55, ioaddr->lbal_addr);
  411. outb(0x55, ioaddr->nsect_addr);
  412. outb(0xaa, ioaddr->lbal_addr);
  413. nsect = inb(ioaddr->nsect_addr);
  414. lbal = inb(ioaddr->lbal_addr);
  415. if ((nsect == 0x55) && (lbal == 0xaa))
  416. return 1; /* we found a device */
  417. return 0; /* nothing found */
  418. }
  419. /**
  420. * ata_mmio_devchk - PATA device presence detection
  421. * @ap: ATA channel to examine
  422. * @device: Device to examine (starting at zero)
  423. *
  424. * This technique was originally described in
  425. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  426. * later found its way into the ATA/ATAPI spec.
  427. *
  428. * Write a pattern to the ATA shadow registers,
  429. * and if a device is present, it will respond by
  430. * correctly storing and echoing back the
  431. * ATA shadow register contents.
  432. *
  433. * LOCKING:
  434. * caller.
  435. */
  436. static unsigned int ata_mmio_devchk(struct ata_port *ap,
  437. unsigned int device)
  438. {
  439. struct ata_ioports *ioaddr = &ap->ioaddr;
  440. u8 nsect, lbal;
  441. ap->ops->dev_select(ap, device);
  442. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  443. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  444. writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
  445. writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
  446. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  447. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  448. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  449. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  450. if ((nsect == 0x55) && (lbal == 0xaa))
  451. return 1; /* we found a device */
  452. return 0; /* nothing found */
  453. }
  454. /**
  455. * ata_devchk - PATA device presence detection
  456. * @ap: ATA channel to examine
  457. * @device: Device to examine (starting at zero)
  458. *
  459. * Dispatch ATA device presence detection, depending
  460. * on whether we are using PIO or MMIO to talk to the
  461. * ATA shadow registers.
  462. *
  463. * LOCKING:
  464. * caller.
  465. */
  466. static unsigned int ata_devchk(struct ata_port *ap,
  467. unsigned int device)
  468. {
  469. if (ap->flags & ATA_FLAG_MMIO)
  470. return ata_mmio_devchk(ap, device);
  471. return ata_pio_devchk(ap, device);
  472. }
  473. /**
  474. * ata_dev_classify - determine device type based on ATA-spec signature
  475. * @tf: ATA taskfile register set for device to be identified
  476. *
  477. * Determine from taskfile register contents whether a device is
  478. * ATA or ATAPI, as per "Signature and persistence" section
  479. * of ATA/PI spec (volume 1, sect 5.14).
  480. *
  481. * LOCKING:
  482. * None.
  483. *
  484. * RETURNS:
  485. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
  486. * the event of failure.
  487. */
  488. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  489. {
  490. /* Apple's open source Darwin code hints that some devices only
  491. * put a proper signature into the LBA mid/high registers,
  492. * So, we only check those. It's sufficient for uniqueness.
  493. */
  494. if (((tf->lbam == 0) && (tf->lbah == 0)) ||
  495. ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
  496. DPRINTK("found ATA device by sig\n");
  497. return ATA_DEV_ATA;
  498. }
  499. if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
  500. ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
  501. DPRINTK("found ATAPI device by sig\n");
  502. return ATA_DEV_ATAPI;
  503. }
  504. DPRINTK("unknown device\n");
  505. return ATA_DEV_UNKNOWN;
  506. }
  507. /**
  508. * ata_dev_try_classify - Parse returned ATA device signature
  509. * @ap: ATA channel to examine
  510. * @device: Device to examine (starting at zero)
  511. * @r_err: Value of error register on completion
  512. *
  513. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  514. * an ATA/ATAPI-defined set of values is placed in the ATA
  515. * shadow registers, indicating the results of device detection
  516. * and diagnostics.
  517. *
  518. * Select the ATA device, and read the values from the ATA shadow
  519. * registers. Then parse according to the Error register value,
  520. * and the spec-defined values examined by ata_dev_classify().
  521. *
  522. * LOCKING:
  523. * caller.
  524. *
  525. * RETURNS:
  526. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  527. */
  528. static unsigned int
  529. ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
  530. {
  531. struct ata_taskfile tf;
  532. unsigned int class;
  533. u8 err;
  534. ap->ops->dev_select(ap, device);
  535. memset(&tf, 0, sizeof(tf));
  536. ap->ops->tf_read(ap, &tf);
  537. err = tf.feature;
  538. if (r_err)
  539. *r_err = err;
  540. /* see if device passed diags */
  541. if (err == 1)
  542. /* do nothing */ ;
  543. else if ((device == 0) && (err == 0x81))
  544. /* do nothing */ ;
  545. else
  546. return ATA_DEV_NONE;
  547. /* determine if device is ATA or ATAPI */
  548. class = ata_dev_classify(&tf);
  549. if (class == ATA_DEV_UNKNOWN)
  550. return ATA_DEV_NONE;
  551. if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  552. return ATA_DEV_NONE;
  553. return class;
  554. }
  555. /**
  556. * ata_id_string - Convert IDENTIFY DEVICE page into string
  557. * @id: IDENTIFY DEVICE results we will examine
  558. * @s: string into which data is output
  559. * @ofs: offset into identify device page
  560. * @len: length of string to return. must be an even number.
  561. *
  562. * The strings in the IDENTIFY DEVICE page are broken up into
  563. * 16-bit chunks. Run through the string, and output each
  564. * 8-bit chunk linearly, regardless of platform.
  565. *
  566. * LOCKING:
  567. * caller.
  568. */
  569. void ata_id_string(const u16 *id, unsigned char *s,
  570. unsigned int ofs, unsigned int len)
  571. {
  572. unsigned int c;
  573. while (len > 0) {
  574. c = id[ofs] >> 8;
  575. *s = c;
  576. s++;
  577. c = id[ofs] & 0xff;
  578. *s = c;
  579. s++;
  580. ofs++;
  581. len -= 2;
  582. }
  583. }
  584. /**
  585. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  586. * @id: IDENTIFY DEVICE results we will examine
  587. * @s: string into which data is output
  588. * @ofs: offset into identify device page
  589. * @len: length of string to return. must be an odd number.
  590. *
  591. * This function is identical to ata_id_string except that it
  592. * trims trailing spaces and terminates the resulting string with
  593. * null. @len must be actual maximum length (even number) + 1.
  594. *
  595. * LOCKING:
  596. * caller.
  597. */
  598. void ata_id_c_string(const u16 *id, unsigned char *s,
  599. unsigned int ofs, unsigned int len)
  600. {
  601. unsigned char *p;
  602. WARN_ON(!(len & 1));
  603. ata_id_string(id, s, ofs, len - 1);
  604. p = s + strnlen(s, len - 1);
  605. while (p > s && p[-1] == ' ')
  606. p--;
  607. *p = '\0';
  608. }
  609. static u64 ata_id_n_sectors(const u16 *id)
  610. {
  611. if (ata_id_has_lba(id)) {
  612. if (ata_id_has_lba48(id))
  613. return ata_id_u64(id, 100);
  614. else
  615. return ata_id_u32(id, 60);
  616. } else {
  617. if (ata_id_current_chs_valid(id))
  618. return ata_id_u32(id, 57);
  619. else
  620. return id[1] * id[3] * id[6];
  621. }
  622. }
  623. /**
  624. * ata_noop_dev_select - Select device 0/1 on ATA bus
  625. * @ap: ATA channel to manipulate
  626. * @device: ATA device (numbered from zero) to select
  627. *
  628. * This function performs no actual function.
  629. *
  630. * May be used as the dev_select() entry in ata_port_operations.
  631. *
  632. * LOCKING:
  633. * caller.
  634. */
  635. void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
  636. {
  637. }
  638. /**
  639. * ata_std_dev_select - Select device 0/1 on ATA bus
  640. * @ap: ATA channel to manipulate
  641. * @device: ATA device (numbered from zero) to select
  642. *
  643. * Use the method defined in the ATA specification to
  644. * make either device 0, or device 1, active on the
  645. * ATA channel. Works with both PIO and MMIO.
  646. *
  647. * May be used as the dev_select() entry in ata_port_operations.
  648. *
  649. * LOCKING:
  650. * caller.
  651. */
  652. void ata_std_dev_select (struct ata_port *ap, unsigned int device)
  653. {
  654. u8 tmp;
  655. if (device == 0)
  656. tmp = ATA_DEVICE_OBS;
  657. else
  658. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  659. if (ap->flags & ATA_FLAG_MMIO) {
  660. writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
  661. } else {
  662. outb(tmp, ap->ioaddr.device_addr);
  663. }
  664. ata_pause(ap); /* needed; also flushes, for mmio */
  665. }
  666. /**
  667. * ata_dev_select - Select device 0/1 on ATA bus
  668. * @ap: ATA channel to manipulate
  669. * @device: ATA device (numbered from zero) to select
  670. * @wait: non-zero to wait for Status register BSY bit to clear
  671. * @can_sleep: non-zero if context allows sleeping
  672. *
  673. * Use the method defined in the ATA specification to
  674. * make either device 0, or device 1, active on the
  675. * ATA channel.
  676. *
  677. * This is a high-level version of ata_std_dev_select(),
  678. * which additionally provides the services of inserting
  679. * the proper pauses and status polling, where needed.
  680. *
  681. * LOCKING:
  682. * caller.
  683. */
  684. void ata_dev_select(struct ata_port *ap, unsigned int device,
  685. unsigned int wait, unsigned int can_sleep)
  686. {
  687. VPRINTK("ENTER, ata%u: device %u, wait %u\n",
  688. ap->id, device, wait);
  689. if (wait)
  690. ata_wait_idle(ap);
  691. ap->ops->dev_select(ap, device);
  692. if (wait) {
  693. if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
  694. msleep(150);
  695. ata_wait_idle(ap);
  696. }
  697. }
  698. /**
  699. * ata_dump_id - IDENTIFY DEVICE info debugging output
  700. * @id: IDENTIFY DEVICE page to dump
  701. *
  702. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  703. * page.
  704. *
  705. * LOCKING:
  706. * caller.
  707. */
  708. static inline void ata_dump_id(const u16 *id)
  709. {
  710. DPRINTK("49==0x%04x "
  711. "53==0x%04x "
  712. "63==0x%04x "
  713. "64==0x%04x "
  714. "75==0x%04x \n",
  715. id[49],
  716. id[53],
  717. id[63],
  718. id[64],
  719. id[75]);
  720. DPRINTK("80==0x%04x "
  721. "81==0x%04x "
  722. "82==0x%04x "
  723. "83==0x%04x "
  724. "84==0x%04x \n",
  725. id[80],
  726. id[81],
  727. id[82],
  728. id[83],
  729. id[84]);
  730. DPRINTK("88==0x%04x "
  731. "93==0x%04x\n",
  732. id[88],
  733. id[93]);
  734. }
  735. /**
  736. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  737. * @id: IDENTIFY data to compute xfer mask from
  738. *
  739. * Compute the xfermask for this device. This is not as trivial
  740. * as it seems if we must consider early devices correctly.
  741. *
  742. * FIXME: pre IDE drive timing (do we care ?).
  743. *
  744. * LOCKING:
  745. * None.
  746. *
  747. * RETURNS:
  748. * Computed xfermask
  749. */
  750. static unsigned int ata_id_xfermask(const u16 *id)
  751. {
  752. unsigned int pio_mask, mwdma_mask, udma_mask;
  753. /* Usual case. Word 53 indicates word 64 is valid */
  754. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  755. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  756. pio_mask <<= 3;
  757. pio_mask |= 0x7;
  758. } else {
  759. /* If word 64 isn't valid then Word 51 high byte holds
  760. * the PIO timing number for the maximum. Turn it into
  761. * a mask.
  762. */
  763. pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
  764. /* But wait.. there's more. Design your standards by
  765. * committee and you too can get a free iordy field to
  766. * process. However its the speeds not the modes that
  767. * are supported... Note drivers using the timing API
  768. * will get this right anyway
  769. */
  770. }
  771. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  772. udma_mask = 0;
  773. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  774. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  775. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  776. }
  777. /**
  778. * ata_port_queue_task - Queue port_task
  779. * @ap: The ata_port to queue port_task for
  780. * @fn: workqueue function to be scheduled
  781. * @data: data value to pass to workqueue function
  782. * @delay: delay time for workqueue function
  783. *
  784. * Schedule @fn(@data) for execution after @delay jiffies using
  785. * port_task. There is one port_task per port and it's the
  786. * user(low level driver)'s responsibility to make sure that only
  787. * one task is active at any given time.
  788. *
  789. * libata core layer takes care of synchronization between
  790. * port_task and EH. ata_port_queue_task() may be ignored for EH
  791. * synchronization.
  792. *
  793. * LOCKING:
  794. * Inherited from caller.
  795. */
  796. void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
  797. unsigned long delay)
  798. {
  799. int rc;
  800. if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
  801. return;
  802. PREPARE_WORK(&ap->port_task, fn, data);
  803. if (!delay)
  804. rc = queue_work(ata_wq, &ap->port_task);
  805. else
  806. rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
  807. /* rc == 0 means that another user is using port task */
  808. WARN_ON(rc == 0);
  809. }
  810. /**
  811. * ata_port_flush_task - Flush port_task
  812. * @ap: The ata_port to flush port_task for
  813. *
  814. * After this function completes, port_task is guranteed not to
  815. * be running or scheduled.
  816. *
  817. * LOCKING:
  818. * Kernel thread context (may sleep)
  819. */
  820. void ata_port_flush_task(struct ata_port *ap)
  821. {
  822. unsigned long flags;
  823. DPRINTK("ENTER\n");
  824. spin_lock_irqsave(&ap->host_set->lock, flags);
  825. ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
  826. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  827. DPRINTK("flush #1\n");
  828. flush_workqueue(ata_wq);
  829. /*
  830. * At this point, if a task is running, it's guaranteed to see
  831. * the FLUSH flag; thus, it will never queue pio tasks again.
  832. * Cancel and flush.
  833. */
  834. if (!cancel_delayed_work(&ap->port_task)) {
  835. DPRINTK("flush #2\n");
  836. flush_workqueue(ata_wq);
  837. }
  838. spin_lock_irqsave(&ap->host_set->lock, flags);
  839. ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
  840. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  841. DPRINTK("EXIT\n");
  842. }
  843. void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  844. {
  845. struct completion *waiting = qc->private_data;
  846. complete(waiting);
  847. }
  848. /**
  849. * ata_exec_internal - execute libata internal command
  850. * @dev: Device to which the command is sent
  851. * @tf: Taskfile registers for the command and the result
  852. * @cdb: CDB for packet command
  853. * @dma_dir: Data tranfer direction of the command
  854. * @buf: Data buffer of the command
  855. * @buflen: Length of data buffer
  856. *
  857. * Executes libata internal command with timeout. @tf contains
  858. * command on entry and result on return. Timeout and error
  859. * conditions are reported via return value. No recovery action
  860. * is taken after a command times out. It's caller's duty to
  861. * clean up after timeout.
  862. *
  863. * LOCKING:
  864. * None. Should be called with kernel context, might sleep.
  865. */
  866. unsigned ata_exec_internal(struct ata_device *dev,
  867. struct ata_taskfile *tf, const u8 *cdb,
  868. int dma_dir, void *buf, unsigned int buflen)
  869. {
  870. struct ata_port *ap = dev->ap;
  871. u8 command = tf->command;
  872. struct ata_queued_cmd *qc;
  873. unsigned int tag, preempted_tag;
  874. u32 preempted_sactive, preempted_qc_active;
  875. DECLARE_COMPLETION(wait);
  876. unsigned long flags;
  877. unsigned int err_mask;
  878. int rc;
  879. spin_lock_irqsave(&ap->host_set->lock, flags);
  880. /* no internal command while frozen */
  881. if (ap->flags & ATA_FLAG_FROZEN) {
  882. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  883. return AC_ERR_SYSTEM;
  884. }
  885. /* initialize internal qc */
  886. /* XXX: Tag 0 is used for drivers with legacy EH as some
  887. * drivers choke if any other tag is given. This breaks
  888. * ata_tag_internal() test for those drivers. Don't use new
  889. * EH stuff without converting to it.
  890. */
  891. if (ap->ops->error_handler)
  892. tag = ATA_TAG_INTERNAL;
  893. else
  894. tag = 0;
  895. if (test_and_set_bit(tag, &ap->qc_allocated))
  896. BUG();
  897. qc = __ata_qc_from_tag(ap, tag);
  898. qc->tag = tag;
  899. qc->scsicmd = NULL;
  900. qc->ap = ap;
  901. qc->dev = dev;
  902. ata_qc_reinit(qc);
  903. preempted_tag = ap->active_tag;
  904. preempted_sactive = ap->sactive;
  905. preempted_qc_active = ap->qc_active;
  906. ap->active_tag = ATA_TAG_POISON;
  907. ap->sactive = 0;
  908. ap->qc_active = 0;
  909. /* prepare & issue qc */
  910. qc->tf = *tf;
  911. if (cdb)
  912. memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
  913. qc->flags |= ATA_QCFLAG_RESULT_TF;
  914. qc->dma_dir = dma_dir;
  915. if (dma_dir != DMA_NONE) {
  916. ata_sg_init_one(qc, buf, buflen);
  917. qc->nsect = buflen / ATA_SECT_SIZE;
  918. }
  919. qc->private_data = &wait;
  920. qc->complete_fn = ata_qc_complete_internal;
  921. ata_qc_issue(qc);
  922. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  923. rc = wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL);
  924. ata_port_flush_task(ap);
  925. if (!rc) {
  926. spin_lock_irqsave(&ap->host_set->lock, flags);
  927. /* We're racing with irq here. If we lose, the
  928. * following test prevents us from completing the qc
  929. * twice. If we win, the port is frozen and will be
  930. * cleaned up by ->post_internal_cmd().
  931. */
  932. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  933. qc->err_mask |= AC_ERR_TIMEOUT;
  934. if (ap->ops->error_handler)
  935. ata_port_freeze(ap);
  936. else
  937. ata_qc_complete(qc);
  938. ata_dev_printk(dev, KERN_WARNING,
  939. "qc timeout (cmd 0x%x)\n", command);
  940. }
  941. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  942. }
  943. /* do post_internal_cmd */
  944. if (ap->ops->post_internal_cmd)
  945. ap->ops->post_internal_cmd(qc);
  946. if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
  947. ata_dev_printk(dev, KERN_WARNING, "zero err_mask for failed "
  948. "internal command, assuming AC_ERR_OTHER\n");
  949. qc->err_mask |= AC_ERR_OTHER;
  950. }
  951. /* finish up */
  952. spin_lock_irqsave(&ap->host_set->lock, flags);
  953. *tf = qc->result_tf;
  954. err_mask = qc->err_mask;
  955. ata_qc_free(qc);
  956. ap->active_tag = preempted_tag;
  957. ap->sactive = preempted_sactive;
  958. ap->qc_active = preempted_qc_active;
  959. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  960. * Until those drivers are fixed, we detect the condition
  961. * here, fail the command with AC_ERR_SYSTEM and reenable the
  962. * port.
  963. *
  964. * Note that this doesn't change any behavior as internal
  965. * command failure results in disabling the device in the
  966. * higher layer for LLDDs without new reset/EH callbacks.
  967. *
  968. * Kill the following code as soon as those drivers are fixed.
  969. */
  970. if (ap->flags & ATA_FLAG_DISABLED) {
  971. err_mask |= AC_ERR_SYSTEM;
  972. ata_port_probe(ap);
  973. }
  974. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  975. return err_mask;
  976. }
  977. /**
  978. * ata_pio_need_iordy - check if iordy needed
  979. * @adev: ATA device
  980. *
  981. * Check if the current speed of the device requires IORDY. Used
  982. * by various controllers for chip configuration.
  983. */
  984. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  985. {
  986. int pio;
  987. int speed = adev->pio_mode - XFER_PIO_0;
  988. if (speed < 2)
  989. return 0;
  990. if (speed > 2)
  991. return 1;
  992. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  993. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  994. pio = adev->id[ATA_ID_EIDE_PIO];
  995. /* Is the speed faster than the drive allows non IORDY ? */
  996. if (pio) {
  997. /* This is cycle times not frequency - watch the logic! */
  998. if (pio > 240) /* PIO2 is 240nS per cycle */
  999. return 1;
  1000. return 0;
  1001. }
  1002. }
  1003. return 0;
  1004. }
  1005. /**
  1006. * ata_dev_read_id - Read ID data from the specified device
  1007. * @dev: target device
  1008. * @p_class: pointer to class of the target device (may be changed)
  1009. * @post_reset: is this read ID post-reset?
  1010. * @id: buffer to read IDENTIFY data into
  1011. *
  1012. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  1013. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  1014. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  1015. * for pre-ATA4 drives.
  1016. *
  1017. * LOCKING:
  1018. * Kernel thread context (may sleep)
  1019. *
  1020. * RETURNS:
  1021. * 0 on success, -errno otherwise.
  1022. */
  1023. int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
  1024. int post_reset, u16 *id)
  1025. {
  1026. struct ata_port *ap = dev->ap;
  1027. unsigned int class = *p_class;
  1028. struct ata_taskfile tf;
  1029. unsigned int err_mask = 0;
  1030. const char *reason;
  1031. int rc;
  1032. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1033. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  1034. retry:
  1035. ata_tf_init(dev, &tf);
  1036. switch (class) {
  1037. case ATA_DEV_ATA:
  1038. tf.command = ATA_CMD_ID_ATA;
  1039. break;
  1040. case ATA_DEV_ATAPI:
  1041. tf.command = ATA_CMD_ID_ATAPI;
  1042. break;
  1043. default:
  1044. rc = -ENODEV;
  1045. reason = "unsupported class";
  1046. goto err_out;
  1047. }
  1048. tf.protocol = ATA_PROT_PIO;
  1049. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
  1050. id, sizeof(id[0]) * ATA_ID_WORDS);
  1051. if (err_mask) {
  1052. rc = -EIO;
  1053. reason = "I/O error";
  1054. goto err_out;
  1055. }
  1056. swap_buf_le16(id, ATA_ID_WORDS);
  1057. /* sanity check */
  1058. if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
  1059. rc = -EINVAL;
  1060. reason = "device reports illegal type";
  1061. goto err_out;
  1062. }
  1063. if (post_reset && class == ATA_DEV_ATA) {
  1064. /*
  1065. * The exact sequence expected by certain pre-ATA4 drives is:
  1066. * SRST RESET
  1067. * IDENTIFY
  1068. * INITIALIZE DEVICE PARAMETERS
  1069. * anything else..
  1070. * Some drives were very specific about that exact sequence.
  1071. */
  1072. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1073. err_mask = ata_dev_init_params(dev, id[3], id[6]);
  1074. if (err_mask) {
  1075. rc = -EIO;
  1076. reason = "INIT_DEV_PARAMS failed";
  1077. goto err_out;
  1078. }
  1079. /* current CHS translation info (id[53-58]) might be
  1080. * changed. reread the identify device info.
  1081. */
  1082. post_reset = 0;
  1083. goto retry;
  1084. }
  1085. }
  1086. *p_class = class;
  1087. return 0;
  1088. err_out:
  1089. ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
  1090. "(%s, err_mask=0x%x)\n", reason, err_mask);
  1091. return rc;
  1092. }
  1093. static inline u8 ata_dev_knobble(struct ata_device *dev)
  1094. {
  1095. return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1096. }
  1097. static void ata_dev_config_ncq(struct ata_device *dev,
  1098. char *desc, size_t desc_sz)
  1099. {
  1100. struct ata_port *ap = dev->ap;
  1101. int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
  1102. if (!ata_id_has_ncq(dev->id)) {
  1103. desc[0] = '\0';
  1104. return;
  1105. }
  1106. if (ap->flags & ATA_FLAG_NCQ) {
  1107. hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1);
  1108. dev->flags |= ATA_DFLAG_NCQ;
  1109. }
  1110. if (hdepth >= ddepth)
  1111. snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
  1112. else
  1113. snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
  1114. }
  1115. /**
  1116. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1117. * @dev: Target device to configure
  1118. * @print_info: Enable device info printout
  1119. *
  1120. * Configure @dev according to @dev->id. Generic and low-level
  1121. * driver specific fixups are also applied.
  1122. *
  1123. * LOCKING:
  1124. * Kernel thread context (may sleep)
  1125. *
  1126. * RETURNS:
  1127. * 0 on success, -errno otherwise
  1128. */
  1129. int ata_dev_configure(struct ata_device *dev, int print_info)
  1130. {
  1131. struct ata_port *ap = dev->ap;
  1132. const u16 *id = dev->id;
  1133. unsigned int xfer_mask;
  1134. int i, rc;
  1135. if (!ata_dev_enabled(dev)) {
  1136. DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
  1137. ap->id, dev->devno);
  1138. return 0;
  1139. }
  1140. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1141. /* print device capabilities */
  1142. if (print_info)
  1143. ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x "
  1144. "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
  1145. id[49], id[82], id[83], id[84],
  1146. id[85], id[86], id[87], id[88]);
  1147. /* initialize to-be-configured parameters */
  1148. dev->flags &= ~ATA_DFLAG_CFG_MASK;
  1149. dev->max_sectors = 0;
  1150. dev->cdb_len = 0;
  1151. dev->n_sectors = 0;
  1152. dev->cylinders = 0;
  1153. dev->heads = 0;
  1154. dev->sectors = 0;
  1155. /*
  1156. * common ATA, ATAPI feature tests
  1157. */
  1158. /* find max transfer mode; for printk only */
  1159. xfer_mask = ata_id_xfermask(id);
  1160. ata_dump_id(id);
  1161. /* ATA-specific feature tests */
  1162. if (dev->class == ATA_DEV_ATA) {
  1163. dev->n_sectors = ata_id_n_sectors(id);
  1164. if (ata_id_has_lba(id)) {
  1165. const char *lba_desc;
  1166. char ncq_desc[20];
  1167. lba_desc = "LBA";
  1168. dev->flags |= ATA_DFLAG_LBA;
  1169. if (ata_id_has_lba48(id)) {
  1170. dev->flags |= ATA_DFLAG_LBA48;
  1171. lba_desc = "LBA48";
  1172. }
  1173. /* config NCQ */
  1174. ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
  1175. /* print device info to dmesg */
  1176. if (print_info)
  1177. ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
  1178. "max %s, %Lu sectors: %s %s\n",
  1179. ata_id_major_version(id),
  1180. ata_mode_string(xfer_mask),
  1181. (unsigned long long)dev->n_sectors,
  1182. lba_desc, ncq_desc);
  1183. } else {
  1184. /* CHS */
  1185. /* Default translation */
  1186. dev->cylinders = id[1];
  1187. dev->heads = id[3];
  1188. dev->sectors = id[6];
  1189. if (ata_id_current_chs_valid(id)) {
  1190. /* Current CHS translation is valid. */
  1191. dev->cylinders = id[54];
  1192. dev->heads = id[55];
  1193. dev->sectors = id[56];
  1194. }
  1195. /* print device info to dmesg */
  1196. if (print_info)
  1197. ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
  1198. "max %s, %Lu sectors: CHS %u/%u/%u\n",
  1199. ata_id_major_version(id),
  1200. ata_mode_string(xfer_mask),
  1201. (unsigned long long)dev->n_sectors,
  1202. dev->cylinders, dev->heads, dev->sectors);
  1203. }
  1204. if (dev->id[59] & 0x100) {
  1205. dev->multi_count = dev->id[59] & 0xff;
  1206. DPRINTK("ata%u: dev %u multi count %u\n",
  1207. ap->id, dev->devno, dev->multi_count);
  1208. }
  1209. dev->cdb_len = 16;
  1210. }
  1211. /* ATAPI-specific feature tests */
  1212. else if (dev->class == ATA_DEV_ATAPI) {
  1213. char *cdb_intr_string = "";
  1214. rc = atapi_cdb_len(id);
  1215. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1216. ata_dev_printk(dev, KERN_WARNING,
  1217. "unsupported CDB len\n");
  1218. rc = -EINVAL;
  1219. goto err_out_nosup;
  1220. }
  1221. dev->cdb_len = (unsigned int) rc;
  1222. if (ata_id_cdb_intr(dev->id)) {
  1223. dev->flags |= ATA_DFLAG_CDB_INTR;
  1224. cdb_intr_string = ", CDB intr";
  1225. }
  1226. /* print device info to dmesg */
  1227. if (print_info)
  1228. ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
  1229. ata_mode_string(xfer_mask),
  1230. cdb_intr_string);
  1231. }
  1232. ap->host->max_cmd_len = 0;
  1233. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1234. ap->host->max_cmd_len = max_t(unsigned int,
  1235. ap->host->max_cmd_len,
  1236. ap->device[i].cdb_len);
  1237. /* limit bridge transfers to udma5, 200 sectors */
  1238. if (ata_dev_knobble(dev)) {
  1239. if (print_info)
  1240. ata_dev_printk(dev, KERN_INFO,
  1241. "applying bridge limits\n");
  1242. dev->udma_mask &= ATA_UDMA5;
  1243. dev->max_sectors = ATA_MAX_SECTORS;
  1244. }
  1245. if (ap->ops->dev_config)
  1246. ap->ops->dev_config(ap, dev);
  1247. DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
  1248. return 0;
  1249. err_out_nosup:
  1250. DPRINTK("EXIT, err\n");
  1251. return rc;
  1252. }
  1253. /**
  1254. * ata_bus_probe - Reset and probe ATA bus
  1255. * @ap: Bus to probe
  1256. *
  1257. * Master ATA bus probing function. Initiates a hardware-dependent
  1258. * bus reset, then attempts to identify any devices found on
  1259. * the bus.
  1260. *
  1261. * LOCKING:
  1262. * PCI/etc. bus probe sem.
  1263. *
  1264. * RETURNS:
  1265. * Zero on success, negative errno otherwise.
  1266. */
  1267. static int ata_bus_probe(struct ata_port *ap)
  1268. {
  1269. unsigned int classes[ATA_MAX_DEVICES];
  1270. int tries[ATA_MAX_DEVICES];
  1271. int i, rc, down_xfermask;
  1272. struct ata_device *dev;
  1273. ata_port_probe(ap);
  1274. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1275. tries[i] = ATA_PROBE_MAX_TRIES;
  1276. retry:
  1277. down_xfermask = 0;
  1278. /* reset and determine device classes */
  1279. ap->ops->phy_reset(ap);
  1280. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1281. dev = &ap->device[i];
  1282. if (!(ap->flags & ATA_FLAG_DISABLED) &&
  1283. dev->class != ATA_DEV_UNKNOWN)
  1284. classes[dev->devno] = dev->class;
  1285. else
  1286. classes[dev->devno] = ATA_DEV_NONE;
  1287. dev->class = ATA_DEV_UNKNOWN;
  1288. }
  1289. ata_port_probe(ap);
  1290. /* after the reset the device state is PIO 0 and the controller
  1291. state is undefined. Record the mode */
  1292. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1293. ap->device[i].pio_mode = XFER_PIO_0;
  1294. /* read IDENTIFY page and configure devices */
  1295. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1296. dev = &ap->device[i];
  1297. if (tries[i])
  1298. dev->class = classes[i];
  1299. if (!ata_dev_enabled(dev))
  1300. continue;
  1301. rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
  1302. if (rc)
  1303. goto fail;
  1304. rc = ata_dev_configure(dev, 1);
  1305. if (rc)
  1306. goto fail;
  1307. }
  1308. /* configure transfer mode */
  1309. rc = ata_set_mode(ap, &dev);
  1310. if (rc) {
  1311. down_xfermask = 1;
  1312. goto fail;
  1313. }
  1314. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1315. if (ata_dev_enabled(&ap->device[i]))
  1316. return 0;
  1317. /* no device present, disable port */
  1318. ata_port_disable(ap);
  1319. ap->ops->port_disable(ap);
  1320. return -ENODEV;
  1321. fail:
  1322. switch (rc) {
  1323. case -EINVAL:
  1324. case -ENODEV:
  1325. tries[dev->devno] = 0;
  1326. break;
  1327. case -EIO:
  1328. sata_down_spd_limit(ap);
  1329. /* fall through */
  1330. default:
  1331. tries[dev->devno]--;
  1332. if (down_xfermask &&
  1333. ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
  1334. tries[dev->devno] = 0;
  1335. }
  1336. if (!tries[dev->devno]) {
  1337. ata_down_xfermask_limit(dev, 1);
  1338. ata_dev_disable(dev);
  1339. }
  1340. goto retry;
  1341. }
  1342. /**
  1343. * ata_port_probe - Mark port as enabled
  1344. * @ap: Port for which we indicate enablement
  1345. *
  1346. * Modify @ap data structure such that the system
  1347. * thinks that the entire port is enabled.
  1348. *
  1349. * LOCKING: host_set lock, or some other form of
  1350. * serialization.
  1351. */
  1352. void ata_port_probe(struct ata_port *ap)
  1353. {
  1354. ap->flags &= ~ATA_FLAG_DISABLED;
  1355. }
  1356. /**
  1357. * sata_print_link_status - Print SATA link status
  1358. * @ap: SATA port to printk link status about
  1359. *
  1360. * This function prints link speed and status of a SATA link.
  1361. *
  1362. * LOCKING:
  1363. * None.
  1364. */
  1365. static void sata_print_link_status(struct ata_port *ap)
  1366. {
  1367. u32 sstatus, scontrol, tmp;
  1368. if (sata_scr_read(ap, SCR_STATUS, &sstatus))
  1369. return;
  1370. sata_scr_read(ap, SCR_CONTROL, &scontrol);
  1371. if (ata_port_online(ap)) {
  1372. tmp = (sstatus >> 4) & 0xf;
  1373. ata_port_printk(ap, KERN_INFO,
  1374. "SATA link up %s (SStatus %X SControl %X)\n",
  1375. sata_spd_string(tmp), sstatus, scontrol);
  1376. } else {
  1377. ata_port_printk(ap, KERN_INFO,
  1378. "SATA link down (SStatus %X SControl %X)\n",
  1379. sstatus, scontrol);
  1380. }
  1381. }
  1382. /**
  1383. * __sata_phy_reset - Wake/reset a low-level SATA PHY
  1384. * @ap: SATA port associated with target SATA PHY.
  1385. *
  1386. * This function issues commands to standard SATA Sxxx
  1387. * PHY registers, to wake up the phy (and device), and
  1388. * clear any reset condition.
  1389. *
  1390. * LOCKING:
  1391. * PCI/etc. bus probe sem.
  1392. *
  1393. */
  1394. void __sata_phy_reset(struct ata_port *ap)
  1395. {
  1396. u32 sstatus;
  1397. unsigned long timeout = jiffies + (HZ * 5);
  1398. if (ap->flags & ATA_FLAG_SATA_RESET) {
  1399. /* issue phy wake/reset */
  1400. sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
  1401. /* Couldn't find anything in SATA I/II specs, but
  1402. * AHCI-1.1 10.4.2 says at least 1 ms. */
  1403. mdelay(1);
  1404. }
  1405. /* phy wake/clear reset */
  1406. sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
  1407. /* wait for phy to become ready, if necessary */
  1408. do {
  1409. msleep(200);
  1410. sata_scr_read(ap, SCR_STATUS, &sstatus);
  1411. if ((sstatus & 0xf) != 1)
  1412. break;
  1413. } while (time_before(jiffies, timeout));
  1414. /* print link status */
  1415. sata_print_link_status(ap);
  1416. /* TODO: phy layer with polling, timeouts, etc. */
  1417. if (!ata_port_offline(ap))
  1418. ata_port_probe(ap);
  1419. else
  1420. ata_port_disable(ap);
  1421. if (ap->flags & ATA_FLAG_DISABLED)
  1422. return;
  1423. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1424. ata_port_disable(ap);
  1425. return;
  1426. }
  1427. ap->cbl = ATA_CBL_SATA;
  1428. }
  1429. /**
  1430. * sata_phy_reset - Reset SATA bus.
  1431. * @ap: SATA port associated with target SATA PHY.
  1432. *
  1433. * This function resets the SATA bus, and then probes
  1434. * the bus for devices.
  1435. *
  1436. * LOCKING:
  1437. * PCI/etc. bus probe sem.
  1438. *
  1439. */
  1440. void sata_phy_reset(struct ata_port *ap)
  1441. {
  1442. __sata_phy_reset(ap);
  1443. if (ap->flags & ATA_FLAG_DISABLED)
  1444. return;
  1445. ata_bus_reset(ap);
  1446. }
  1447. /**
  1448. * ata_dev_pair - return other device on cable
  1449. * @adev: device
  1450. *
  1451. * Obtain the other device on the same cable, or if none is
  1452. * present NULL is returned
  1453. */
  1454. struct ata_device *ata_dev_pair(struct ata_device *adev)
  1455. {
  1456. struct ata_port *ap = adev->ap;
  1457. struct ata_device *pair = &ap->device[1 - adev->devno];
  1458. if (!ata_dev_enabled(pair))
  1459. return NULL;
  1460. return pair;
  1461. }
  1462. /**
  1463. * ata_port_disable - Disable port.
  1464. * @ap: Port to be disabled.
  1465. *
  1466. * Modify @ap data structure such that the system
  1467. * thinks that the entire port is disabled, and should
  1468. * never attempt to probe or communicate with devices
  1469. * on this port.
  1470. *
  1471. * LOCKING: host_set lock, or some other form of
  1472. * serialization.
  1473. */
  1474. void ata_port_disable(struct ata_port *ap)
  1475. {
  1476. ap->device[0].class = ATA_DEV_NONE;
  1477. ap->device[1].class = ATA_DEV_NONE;
  1478. ap->flags |= ATA_FLAG_DISABLED;
  1479. }
  1480. /**
  1481. * sata_down_spd_limit - adjust SATA spd limit downward
  1482. * @ap: Port to adjust SATA spd limit for
  1483. *
  1484. * Adjust SATA spd limit of @ap downward. Note that this
  1485. * function only adjusts the limit. The change must be applied
  1486. * using sata_set_spd().
  1487. *
  1488. * LOCKING:
  1489. * Inherited from caller.
  1490. *
  1491. * RETURNS:
  1492. * 0 on success, negative errno on failure
  1493. */
  1494. int sata_down_spd_limit(struct ata_port *ap)
  1495. {
  1496. u32 sstatus, spd, mask;
  1497. int rc, highbit;
  1498. rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
  1499. if (rc)
  1500. return rc;
  1501. mask = ap->sata_spd_limit;
  1502. if (mask <= 1)
  1503. return -EINVAL;
  1504. highbit = fls(mask) - 1;
  1505. mask &= ~(1 << highbit);
  1506. spd = (sstatus >> 4) & 0xf;
  1507. if (spd <= 1)
  1508. return -EINVAL;
  1509. spd--;
  1510. mask &= (1 << spd) - 1;
  1511. if (!mask)
  1512. return -EINVAL;
  1513. ap->sata_spd_limit = mask;
  1514. ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
  1515. sata_spd_string(fls(mask)));
  1516. return 0;
  1517. }
  1518. static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
  1519. {
  1520. u32 spd, limit;
  1521. if (ap->sata_spd_limit == UINT_MAX)
  1522. limit = 0;
  1523. else
  1524. limit = fls(ap->sata_spd_limit);
  1525. spd = (*scontrol >> 4) & 0xf;
  1526. *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
  1527. return spd != limit;
  1528. }
  1529. /**
  1530. * sata_set_spd_needed - is SATA spd configuration needed
  1531. * @ap: Port in question
  1532. *
  1533. * Test whether the spd limit in SControl matches
  1534. * @ap->sata_spd_limit. This function is used to determine
  1535. * whether hardreset is necessary to apply SATA spd
  1536. * configuration.
  1537. *
  1538. * LOCKING:
  1539. * Inherited from caller.
  1540. *
  1541. * RETURNS:
  1542. * 1 if SATA spd configuration is needed, 0 otherwise.
  1543. */
  1544. int sata_set_spd_needed(struct ata_port *ap)
  1545. {
  1546. u32 scontrol;
  1547. if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
  1548. return 0;
  1549. return __sata_set_spd_needed(ap, &scontrol);
  1550. }
  1551. /**
  1552. * sata_set_spd - set SATA spd according to spd limit
  1553. * @ap: Port to set SATA spd for
  1554. *
  1555. * Set SATA spd of @ap according to sata_spd_limit.
  1556. *
  1557. * LOCKING:
  1558. * Inherited from caller.
  1559. *
  1560. * RETURNS:
  1561. * 0 if spd doesn't need to be changed, 1 if spd has been
  1562. * changed. Negative errno if SCR registers are inaccessible.
  1563. */
  1564. int sata_set_spd(struct ata_port *ap)
  1565. {
  1566. u32 scontrol;
  1567. int rc;
  1568. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  1569. return rc;
  1570. if (!__sata_set_spd_needed(ap, &scontrol))
  1571. return 0;
  1572. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  1573. return rc;
  1574. return 1;
  1575. }
  1576. /*
  1577. * This mode timing computation functionality is ported over from
  1578. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  1579. */
  1580. /*
  1581. * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  1582. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  1583. * for PIO 5, which is a nonstandard extension and UDMA6, which
  1584. * is currently supported only by Maxtor drives.
  1585. */
  1586. static const struct ata_timing ata_timing[] = {
  1587. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  1588. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  1589. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  1590. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  1591. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  1592. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  1593. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  1594. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  1595. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  1596. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  1597. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  1598. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  1599. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  1600. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  1601. /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
  1602. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  1603. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  1604. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  1605. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  1606. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  1607. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  1608. { 0xFF }
  1609. };
  1610. #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
  1611. #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
  1612. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  1613. {
  1614. q->setup = EZ(t->setup * 1000, T);
  1615. q->act8b = EZ(t->act8b * 1000, T);
  1616. q->rec8b = EZ(t->rec8b * 1000, T);
  1617. q->cyc8b = EZ(t->cyc8b * 1000, T);
  1618. q->active = EZ(t->active * 1000, T);
  1619. q->recover = EZ(t->recover * 1000, T);
  1620. q->cycle = EZ(t->cycle * 1000, T);
  1621. q->udma = EZ(t->udma * 1000, UT);
  1622. }
  1623. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  1624. struct ata_timing *m, unsigned int what)
  1625. {
  1626. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  1627. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  1628. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  1629. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  1630. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  1631. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  1632. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  1633. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  1634. }
  1635. static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
  1636. {
  1637. const struct ata_timing *t;
  1638. for (t = ata_timing; t->mode != speed; t++)
  1639. if (t->mode == 0xFF)
  1640. return NULL;
  1641. return t;
  1642. }
  1643. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  1644. struct ata_timing *t, int T, int UT)
  1645. {
  1646. const struct ata_timing *s;
  1647. struct ata_timing p;
  1648. /*
  1649. * Find the mode.
  1650. */
  1651. if (!(s = ata_timing_find_mode(speed)))
  1652. return -EINVAL;
  1653. memcpy(t, s, sizeof(*s));
  1654. /*
  1655. * If the drive is an EIDE drive, it can tell us it needs extended
  1656. * PIO/MW_DMA cycle timing.
  1657. */
  1658. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  1659. memset(&p, 0, sizeof(p));
  1660. if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  1661. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  1662. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  1663. } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  1664. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  1665. }
  1666. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  1667. }
  1668. /*
  1669. * Convert the timing to bus clock counts.
  1670. */
  1671. ata_timing_quantize(t, t, T, UT);
  1672. /*
  1673. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  1674. * S.M.A.R.T * and some other commands. We have to ensure that the
  1675. * DMA cycle timing is slower/equal than the fastest PIO timing.
  1676. */
  1677. if (speed > XFER_PIO_4) {
  1678. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  1679. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  1680. }
  1681. /*
  1682. * Lengthen active & recovery time so that cycle time is correct.
  1683. */
  1684. if (t->act8b + t->rec8b < t->cyc8b) {
  1685. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  1686. t->rec8b = t->cyc8b - t->act8b;
  1687. }
  1688. if (t->active + t->recover < t->cycle) {
  1689. t->active += (t->cycle - (t->active + t->recover)) / 2;
  1690. t->recover = t->cycle - t->active;
  1691. }
  1692. return 0;
  1693. }
  1694. /**
  1695. * ata_down_xfermask_limit - adjust dev xfer masks downward
  1696. * @dev: Device to adjust xfer masks
  1697. * @force_pio0: Force PIO0
  1698. *
  1699. * Adjust xfer masks of @dev downward. Note that this function
  1700. * does not apply the change. Invoking ata_set_mode() afterwards
  1701. * will apply the limit.
  1702. *
  1703. * LOCKING:
  1704. * Inherited from caller.
  1705. *
  1706. * RETURNS:
  1707. * 0 on success, negative errno on failure
  1708. */
  1709. int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
  1710. {
  1711. unsigned long xfer_mask;
  1712. int highbit;
  1713. xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
  1714. dev->udma_mask);
  1715. if (!xfer_mask)
  1716. goto fail;
  1717. /* don't gear down to MWDMA from UDMA, go directly to PIO */
  1718. if (xfer_mask & ATA_MASK_UDMA)
  1719. xfer_mask &= ~ATA_MASK_MWDMA;
  1720. highbit = fls(xfer_mask) - 1;
  1721. xfer_mask &= ~(1 << highbit);
  1722. if (force_pio0)
  1723. xfer_mask &= 1 << ATA_SHIFT_PIO;
  1724. if (!xfer_mask)
  1725. goto fail;
  1726. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  1727. &dev->udma_mask);
  1728. ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
  1729. ata_mode_string(xfer_mask));
  1730. return 0;
  1731. fail:
  1732. return -EINVAL;
  1733. }
  1734. static int ata_dev_set_mode(struct ata_device *dev)
  1735. {
  1736. unsigned int err_mask;
  1737. int rc;
  1738. dev->flags &= ~ATA_DFLAG_PIO;
  1739. if (dev->xfer_shift == ATA_SHIFT_PIO)
  1740. dev->flags |= ATA_DFLAG_PIO;
  1741. err_mask = ata_dev_set_xfermode(dev);
  1742. if (err_mask) {
  1743. ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
  1744. "(err_mask=0x%x)\n", err_mask);
  1745. return -EIO;
  1746. }
  1747. rc = ata_dev_revalidate(dev, 0);
  1748. if (rc)
  1749. return rc;
  1750. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  1751. dev->xfer_shift, (int)dev->xfer_mode);
  1752. ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
  1753. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  1754. return 0;
  1755. }
  1756. /**
  1757. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  1758. * @ap: port on which timings will be programmed
  1759. * @r_failed_dev: out paramter for failed device
  1760. *
  1761. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  1762. * ata_set_mode() fails, pointer to the failing device is
  1763. * returned in @r_failed_dev.
  1764. *
  1765. * LOCKING:
  1766. * PCI/etc. bus probe sem.
  1767. *
  1768. * RETURNS:
  1769. * 0 on success, negative errno otherwise
  1770. */
  1771. int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
  1772. {
  1773. struct ata_device *dev;
  1774. int i, rc = 0, used_dma = 0, found = 0;
  1775. /* has private set_mode? */
  1776. if (ap->ops->set_mode) {
  1777. /* FIXME: make ->set_mode handle no device case and
  1778. * return error code and failing device on failure.
  1779. */
  1780. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1781. if (ata_dev_enabled(&ap->device[i])) {
  1782. ap->ops->set_mode(ap);
  1783. break;
  1784. }
  1785. }
  1786. return 0;
  1787. }
  1788. /* step 1: calculate xfer_mask */
  1789. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1790. unsigned int pio_mask, dma_mask;
  1791. dev = &ap->device[i];
  1792. if (!ata_dev_enabled(dev))
  1793. continue;
  1794. ata_dev_xfermask(dev);
  1795. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  1796. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  1797. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  1798. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  1799. found = 1;
  1800. if (dev->dma_mode)
  1801. used_dma = 1;
  1802. }
  1803. if (!found)
  1804. goto out;
  1805. /* step 2: always set host PIO timings */
  1806. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1807. dev = &ap->device[i];
  1808. if (!ata_dev_enabled(dev))
  1809. continue;
  1810. if (!dev->pio_mode) {
  1811. ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
  1812. rc = -EINVAL;
  1813. goto out;
  1814. }
  1815. dev->xfer_mode = dev->pio_mode;
  1816. dev->xfer_shift = ATA_SHIFT_PIO;
  1817. if (ap->ops->set_piomode)
  1818. ap->ops->set_piomode(ap, dev);
  1819. }
  1820. /* step 3: set host DMA timings */
  1821. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1822. dev = &ap->device[i];
  1823. if (!ata_dev_enabled(dev) || !dev->dma_mode)
  1824. continue;
  1825. dev->xfer_mode = dev->dma_mode;
  1826. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  1827. if (ap->ops->set_dmamode)
  1828. ap->ops->set_dmamode(ap, dev);
  1829. }
  1830. /* step 4: update devices' xfer mode */
  1831. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1832. dev = &ap->device[i];
  1833. if (!ata_dev_enabled(dev))
  1834. continue;
  1835. rc = ata_dev_set_mode(dev);
  1836. if (rc)
  1837. goto out;
  1838. }
  1839. /* Record simplex status. If we selected DMA then the other
  1840. * host channels are not permitted to do so.
  1841. */
  1842. if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
  1843. ap->host_set->simplex_claimed = 1;
  1844. /* step5: chip specific finalisation */
  1845. if (ap->ops->post_set_mode)
  1846. ap->ops->post_set_mode(ap);
  1847. out:
  1848. if (rc)
  1849. *r_failed_dev = dev;
  1850. return rc;
  1851. }
  1852. /**
  1853. * ata_tf_to_host - issue ATA taskfile to host controller
  1854. * @ap: port to which command is being issued
  1855. * @tf: ATA taskfile register set
  1856. *
  1857. * Issues ATA taskfile register set to ATA host controller,
  1858. * with proper synchronization with interrupt handler and
  1859. * other threads.
  1860. *
  1861. * LOCKING:
  1862. * spin_lock_irqsave(host_set lock)
  1863. */
  1864. static inline void ata_tf_to_host(struct ata_port *ap,
  1865. const struct ata_taskfile *tf)
  1866. {
  1867. ap->ops->tf_load(ap, tf);
  1868. ap->ops->exec_command(ap, tf);
  1869. }
  1870. /**
  1871. * ata_busy_sleep - sleep until BSY clears, or timeout
  1872. * @ap: port containing status register to be polled
  1873. * @tmout_pat: impatience timeout
  1874. * @tmout: overall timeout
  1875. *
  1876. * Sleep until ATA Status register bit BSY clears,
  1877. * or a timeout occurs.
  1878. *
  1879. * LOCKING: None.
  1880. */
  1881. unsigned int ata_busy_sleep (struct ata_port *ap,
  1882. unsigned long tmout_pat, unsigned long tmout)
  1883. {
  1884. unsigned long timer_start, timeout;
  1885. u8 status;
  1886. status = ata_busy_wait(ap, ATA_BUSY, 300);
  1887. timer_start = jiffies;
  1888. timeout = timer_start + tmout_pat;
  1889. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1890. msleep(50);
  1891. status = ata_busy_wait(ap, ATA_BUSY, 3);
  1892. }
  1893. if (status & ATA_BUSY)
  1894. ata_port_printk(ap, KERN_WARNING,
  1895. "port is slow to respond, please be patient\n");
  1896. timeout = timer_start + tmout;
  1897. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1898. msleep(50);
  1899. status = ata_chk_status(ap);
  1900. }
  1901. if (status & ATA_BUSY) {
  1902. ata_port_printk(ap, KERN_ERR, "port failed to respond "
  1903. "(%lu secs)\n", tmout / HZ);
  1904. return 1;
  1905. }
  1906. return 0;
  1907. }
  1908. static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
  1909. {
  1910. struct ata_ioports *ioaddr = &ap->ioaddr;
  1911. unsigned int dev0 = devmask & (1 << 0);
  1912. unsigned int dev1 = devmask & (1 << 1);
  1913. unsigned long timeout;
  1914. /* if device 0 was found in ata_devchk, wait for its
  1915. * BSY bit to clear
  1916. */
  1917. if (dev0)
  1918. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1919. /* if device 1 was found in ata_devchk, wait for
  1920. * register access, then wait for BSY to clear
  1921. */
  1922. timeout = jiffies + ATA_TMOUT_BOOT;
  1923. while (dev1) {
  1924. u8 nsect, lbal;
  1925. ap->ops->dev_select(ap, 1);
  1926. if (ap->flags & ATA_FLAG_MMIO) {
  1927. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  1928. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  1929. } else {
  1930. nsect = inb(ioaddr->nsect_addr);
  1931. lbal = inb(ioaddr->lbal_addr);
  1932. }
  1933. if ((nsect == 1) && (lbal == 1))
  1934. break;
  1935. if (time_after(jiffies, timeout)) {
  1936. dev1 = 0;
  1937. break;
  1938. }
  1939. msleep(50); /* give drive a breather */
  1940. }
  1941. if (dev1)
  1942. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1943. /* is all this really necessary? */
  1944. ap->ops->dev_select(ap, 0);
  1945. if (dev1)
  1946. ap->ops->dev_select(ap, 1);
  1947. if (dev0)
  1948. ap->ops->dev_select(ap, 0);
  1949. }
  1950. static unsigned int ata_bus_softreset(struct ata_port *ap,
  1951. unsigned int devmask)
  1952. {
  1953. struct ata_ioports *ioaddr = &ap->ioaddr;
  1954. DPRINTK("ata%u: bus reset via SRST\n", ap->id);
  1955. /* software reset. causes dev0 to be selected */
  1956. if (ap->flags & ATA_FLAG_MMIO) {
  1957. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1958. udelay(20); /* FIXME: flush */
  1959. writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
  1960. udelay(20); /* FIXME: flush */
  1961. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1962. } else {
  1963. outb(ap->ctl, ioaddr->ctl_addr);
  1964. udelay(10);
  1965. outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  1966. udelay(10);
  1967. outb(ap->ctl, ioaddr->ctl_addr);
  1968. }
  1969. /* spec mandates ">= 2ms" before checking status.
  1970. * We wait 150ms, because that was the magic delay used for
  1971. * ATAPI devices in Hale Landis's ATADRVR, for the period of time
  1972. * between when the ATA command register is written, and then
  1973. * status is checked. Because waiting for "a while" before
  1974. * checking status is fine, post SRST, we perform this magic
  1975. * delay here as well.
  1976. *
  1977. * Old drivers/ide uses the 2mS rule and then waits for ready
  1978. */
  1979. msleep(150);
  1980. /* Before we perform post reset processing we want to see if
  1981. * the bus shows 0xFF because the odd clown forgets the D7
  1982. * pulldown resistor.
  1983. */
  1984. if (ata_check_status(ap) == 0xFF) {
  1985. ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
  1986. return AC_ERR_OTHER;
  1987. }
  1988. ata_bus_post_reset(ap, devmask);
  1989. return 0;
  1990. }
  1991. /**
  1992. * ata_bus_reset - reset host port and associated ATA channel
  1993. * @ap: port to reset
  1994. *
  1995. * This is typically the first time we actually start issuing
  1996. * commands to the ATA channel. We wait for BSY to clear, then
  1997. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  1998. * result. Determine what devices, if any, are on the channel
  1999. * by looking at the device 0/1 error register. Look at the signature
  2000. * stored in each device's taskfile registers, to determine if
  2001. * the device is ATA or ATAPI.
  2002. *
  2003. * LOCKING:
  2004. * PCI/etc. bus probe sem.
  2005. * Obtains host_set lock.
  2006. *
  2007. * SIDE EFFECTS:
  2008. * Sets ATA_FLAG_DISABLED if bus reset fails.
  2009. */
  2010. void ata_bus_reset(struct ata_port *ap)
  2011. {
  2012. struct ata_ioports *ioaddr = &ap->ioaddr;
  2013. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2014. u8 err;
  2015. unsigned int dev0, dev1 = 0, devmask = 0;
  2016. DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
  2017. /* determine if device 0/1 are present */
  2018. if (ap->flags & ATA_FLAG_SATA_RESET)
  2019. dev0 = 1;
  2020. else {
  2021. dev0 = ata_devchk(ap, 0);
  2022. if (slave_possible)
  2023. dev1 = ata_devchk(ap, 1);
  2024. }
  2025. if (dev0)
  2026. devmask |= (1 << 0);
  2027. if (dev1)
  2028. devmask |= (1 << 1);
  2029. /* select device 0 again */
  2030. ap->ops->dev_select(ap, 0);
  2031. /* issue bus reset */
  2032. if (ap->flags & ATA_FLAG_SRST)
  2033. if (ata_bus_softreset(ap, devmask))
  2034. goto err_out;
  2035. /*
  2036. * determine by signature whether we have ATA or ATAPI devices
  2037. */
  2038. ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
  2039. if ((slave_possible) && (err != 0x81))
  2040. ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
  2041. /* re-enable interrupts */
  2042. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  2043. ata_irq_on(ap);
  2044. /* is double-select really necessary? */
  2045. if (ap->device[1].class != ATA_DEV_NONE)
  2046. ap->ops->dev_select(ap, 1);
  2047. if (ap->device[0].class != ATA_DEV_NONE)
  2048. ap->ops->dev_select(ap, 0);
  2049. /* if no devices were detected, disable this port */
  2050. if ((ap->device[0].class == ATA_DEV_NONE) &&
  2051. (ap->device[1].class == ATA_DEV_NONE))
  2052. goto err_out;
  2053. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  2054. /* set up device control for ATA_FLAG_SATA_RESET */
  2055. if (ap->flags & ATA_FLAG_MMIO)
  2056. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  2057. else
  2058. outb(ap->ctl, ioaddr->ctl_addr);
  2059. }
  2060. DPRINTK("EXIT\n");
  2061. return;
  2062. err_out:
  2063. ata_port_printk(ap, KERN_ERR, "disabling port\n");
  2064. ap->ops->port_disable(ap);
  2065. DPRINTK("EXIT\n");
  2066. }
  2067. /**
  2068. * sata_phy_debounce - debounce SATA phy status
  2069. * @ap: ATA port to debounce SATA phy status for
  2070. * @params: timing parameters { interval, duratinon, timeout } in msec
  2071. *
  2072. * Make sure SStatus of @ap reaches stable state, determined by
  2073. * holding the same value where DET is not 1 for @duration polled
  2074. * every @interval, before @timeout. Timeout constraints the
  2075. * beginning of the stable state. Because, after hot unplugging,
  2076. * DET gets stuck at 1 on some controllers, this functions waits
  2077. * until timeout then returns 0 if DET is stable at 1.
  2078. *
  2079. * LOCKING:
  2080. * Kernel thread context (may sleep)
  2081. *
  2082. * RETURNS:
  2083. * 0 on success, -errno on failure.
  2084. */
  2085. int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
  2086. {
  2087. unsigned long interval_msec = params[0];
  2088. unsigned long duration = params[1] * HZ / 1000;
  2089. unsigned long timeout = jiffies + params[2] * HZ / 1000;
  2090. unsigned long last_jiffies;
  2091. u32 last, cur;
  2092. int rc;
  2093. if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
  2094. return rc;
  2095. cur &= 0xf;
  2096. last = cur;
  2097. last_jiffies = jiffies;
  2098. while (1) {
  2099. msleep(interval_msec);
  2100. if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
  2101. return rc;
  2102. cur &= 0xf;
  2103. /* DET stable? */
  2104. if (cur == last) {
  2105. if (cur == 1 && time_before(jiffies, timeout))
  2106. continue;
  2107. if (time_after(jiffies, last_jiffies + duration))
  2108. return 0;
  2109. continue;
  2110. }
  2111. /* unstable, start over */
  2112. last = cur;
  2113. last_jiffies = jiffies;
  2114. /* check timeout */
  2115. if (time_after(jiffies, timeout))
  2116. return -EBUSY;
  2117. }
  2118. }
  2119. /**
  2120. * sata_phy_resume - resume SATA phy
  2121. * @ap: ATA port to resume SATA phy for
  2122. * @params: timing parameters { interval, duratinon, timeout } in msec
  2123. *
  2124. * Resume SATA phy of @ap and debounce it.
  2125. *
  2126. * LOCKING:
  2127. * Kernel thread context (may sleep)
  2128. *
  2129. * RETURNS:
  2130. * 0 on success, -errno on failure.
  2131. */
  2132. int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
  2133. {
  2134. u32 scontrol;
  2135. int rc;
  2136. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2137. return rc;
  2138. scontrol = (scontrol & 0x0f0) | 0x300;
  2139. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  2140. return rc;
  2141. /* Some PHYs react badly if SStatus is pounded immediately
  2142. * after resuming. Delay 200ms before debouncing.
  2143. */
  2144. msleep(200);
  2145. return sata_phy_debounce(ap, params);
  2146. }
  2147. static void ata_wait_spinup(struct ata_port *ap)
  2148. {
  2149. struct ata_eh_context *ehc = &ap->eh_context;
  2150. unsigned long end, secs;
  2151. int rc;
  2152. /* first, debounce phy if SATA */
  2153. if (ap->cbl == ATA_CBL_SATA) {
  2154. rc = sata_phy_debounce(ap, sata_deb_timing_eh);
  2155. /* if debounced successfully and offline, no need to wait */
  2156. if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
  2157. return;
  2158. }
  2159. /* okay, let's give the drive time to spin up */
  2160. end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
  2161. secs = ((end - jiffies) + HZ - 1) / HZ;
  2162. if (time_after(jiffies, end))
  2163. return;
  2164. if (secs > 5)
  2165. ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
  2166. "(%lu secs)\n", secs);
  2167. schedule_timeout_uninterruptible(end - jiffies);
  2168. }
  2169. /**
  2170. * ata_std_prereset - prepare for reset
  2171. * @ap: ATA port to be reset
  2172. *
  2173. * @ap is about to be reset. Initialize it.
  2174. *
  2175. * LOCKING:
  2176. * Kernel thread context (may sleep)
  2177. *
  2178. * RETURNS:
  2179. * 0 on success, -errno otherwise.
  2180. */
  2181. int ata_std_prereset(struct ata_port *ap)
  2182. {
  2183. struct ata_eh_context *ehc = &ap->eh_context;
  2184. const unsigned long *timing;
  2185. int rc;
  2186. /* hotplug? */
  2187. if (ehc->i.flags & ATA_EHI_HOTPLUGGED) {
  2188. if (ap->flags & ATA_FLAG_HRST_TO_RESUME)
  2189. ehc->i.action |= ATA_EH_HARDRESET;
  2190. if (ap->flags & ATA_FLAG_SKIP_D2H_BSY)
  2191. ata_wait_spinup(ap);
  2192. }
  2193. /* if we're about to do hardreset, nothing more to do */
  2194. if (ehc->i.action & ATA_EH_HARDRESET)
  2195. return 0;
  2196. /* if SATA, resume phy */
  2197. if (ap->cbl == ATA_CBL_SATA) {
  2198. if (ap->flags & ATA_FLAG_LOADING)
  2199. timing = sata_deb_timing_boot;
  2200. else
  2201. timing = sata_deb_timing_eh;
  2202. rc = sata_phy_resume(ap, timing);
  2203. if (rc && rc != -EOPNOTSUPP) {
  2204. /* phy resume failed */
  2205. ata_port_printk(ap, KERN_WARNING, "failed to resume "
  2206. "link for reset (errno=%d)\n", rc);
  2207. return rc;
  2208. }
  2209. }
  2210. /* Wait for !BSY if the controller can wait for the first D2H
  2211. * Reg FIS and we don't know that no device is attached.
  2212. */
  2213. if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
  2214. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2215. return 0;
  2216. }
  2217. /**
  2218. * ata_std_softreset - reset host port via ATA SRST
  2219. * @ap: port to reset
  2220. * @classes: resulting classes of attached devices
  2221. *
  2222. * Reset host port using ATA SRST.
  2223. *
  2224. * LOCKING:
  2225. * Kernel thread context (may sleep)
  2226. *
  2227. * RETURNS:
  2228. * 0 on success, -errno otherwise.
  2229. */
  2230. int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
  2231. {
  2232. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2233. unsigned int devmask = 0, err_mask;
  2234. u8 err;
  2235. DPRINTK("ENTER\n");
  2236. if (ata_port_offline(ap)) {
  2237. classes[0] = ATA_DEV_NONE;
  2238. goto out;
  2239. }
  2240. /* determine if device 0/1 are present */
  2241. if (ata_devchk(ap, 0))
  2242. devmask |= (1 << 0);
  2243. if (slave_possible && ata_devchk(ap, 1))
  2244. devmask |= (1 << 1);
  2245. /* select device 0 again */
  2246. ap->ops->dev_select(ap, 0);
  2247. /* issue bus reset */
  2248. DPRINTK("about to softreset, devmask=%x\n", devmask);
  2249. err_mask = ata_bus_softreset(ap, devmask);
  2250. if (err_mask) {
  2251. ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
  2252. err_mask);
  2253. return -EIO;
  2254. }
  2255. /* determine by signature whether we have ATA or ATAPI devices */
  2256. classes[0] = ata_dev_try_classify(ap, 0, &err);
  2257. if (slave_possible && err != 0x81)
  2258. classes[1] = ata_dev_try_classify(ap, 1, &err);
  2259. out:
  2260. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  2261. return 0;
  2262. }
  2263. /**
  2264. * sata_std_hardreset - reset host port via SATA phy reset
  2265. * @ap: port to reset
  2266. * @class: resulting class of attached device
  2267. *
  2268. * SATA phy-reset host port using DET bits of SControl register.
  2269. *
  2270. * LOCKING:
  2271. * Kernel thread context (may sleep)
  2272. *
  2273. * RETURNS:
  2274. * 0 on success, -errno otherwise.
  2275. */
  2276. int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
  2277. {
  2278. u32 scontrol;
  2279. int rc;
  2280. DPRINTK("ENTER\n");
  2281. if (sata_set_spd_needed(ap)) {
  2282. /* SATA spec says nothing about how to reconfigure
  2283. * spd. To be on the safe side, turn off phy during
  2284. * reconfiguration. This works for at least ICH7 AHCI
  2285. * and Sil3124.
  2286. */
  2287. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2288. return rc;
  2289. scontrol = (scontrol & 0x0f0) | 0x302;
  2290. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  2291. return rc;
  2292. sata_set_spd(ap);
  2293. }
  2294. /* issue phy wake/reset */
  2295. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2296. return rc;
  2297. scontrol = (scontrol & 0x0f0) | 0x301;
  2298. if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
  2299. return rc;
  2300. /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
  2301. * 10.4.2 says at least 1 ms.
  2302. */
  2303. msleep(1);
  2304. /* bring phy back */
  2305. sata_phy_resume(ap, sata_deb_timing_eh);
  2306. /* TODO: phy layer with polling, timeouts, etc. */
  2307. if (ata_port_offline(ap)) {
  2308. *class = ATA_DEV_NONE;
  2309. DPRINTK("EXIT, link offline\n");
  2310. return 0;
  2311. }
  2312. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  2313. ata_port_printk(ap, KERN_ERR,
  2314. "COMRESET failed (device not ready)\n");
  2315. return -EIO;
  2316. }
  2317. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  2318. *class = ata_dev_try_classify(ap, 0, NULL);
  2319. DPRINTK("EXIT, class=%u\n", *class);
  2320. return 0;
  2321. }
  2322. /**
  2323. * ata_std_postreset - standard postreset callback
  2324. * @ap: the target ata_port
  2325. * @classes: classes of attached devices
  2326. *
  2327. * This function is invoked after a successful reset. Note that
  2328. * the device might have been reset more than once using
  2329. * different reset methods before postreset is invoked.
  2330. *
  2331. * LOCKING:
  2332. * Kernel thread context (may sleep)
  2333. */
  2334. void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
  2335. {
  2336. u32 serror;
  2337. DPRINTK("ENTER\n");
  2338. /* print link status */
  2339. sata_print_link_status(ap);
  2340. /* clear SError */
  2341. if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
  2342. sata_scr_write(ap, SCR_ERROR, serror);
  2343. /* re-enable interrupts */
  2344. if (!ap->ops->error_handler) {
  2345. /* FIXME: hack. create a hook instead */
  2346. if (ap->ioaddr.ctl_addr)
  2347. ata_irq_on(ap);
  2348. }
  2349. /* is double-select really necessary? */
  2350. if (classes[0] != ATA_DEV_NONE)
  2351. ap->ops->dev_select(ap, 1);
  2352. if (classes[1] != ATA_DEV_NONE)
  2353. ap->ops->dev_select(ap, 0);
  2354. /* bail out if no device is present */
  2355. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  2356. DPRINTK("EXIT, no device\n");
  2357. return;
  2358. }
  2359. /* set up device control */
  2360. if (ap->ioaddr.ctl_addr) {
  2361. if (ap->flags & ATA_FLAG_MMIO)
  2362. writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
  2363. else
  2364. outb(ap->ctl, ap->ioaddr.ctl_addr);
  2365. }
  2366. DPRINTK("EXIT\n");
  2367. }
  2368. /**
  2369. * ata_dev_same_device - Determine whether new ID matches configured device
  2370. * @dev: device to compare against
  2371. * @new_class: class of the new device
  2372. * @new_id: IDENTIFY page of the new device
  2373. *
  2374. * Compare @new_class and @new_id against @dev and determine
  2375. * whether @dev is the device indicated by @new_class and
  2376. * @new_id.
  2377. *
  2378. * LOCKING:
  2379. * None.
  2380. *
  2381. * RETURNS:
  2382. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  2383. */
  2384. static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
  2385. const u16 *new_id)
  2386. {
  2387. const u16 *old_id = dev->id;
  2388. unsigned char model[2][41], serial[2][21];
  2389. u64 new_n_sectors;
  2390. if (dev->class != new_class) {
  2391. ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
  2392. dev->class, new_class);
  2393. return 0;
  2394. }
  2395. ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
  2396. ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
  2397. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
  2398. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
  2399. new_n_sectors = ata_id_n_sectors(new_id);
  2400. if (strcmp(model[0], model[1])) {
  2401. ata_dev_printk(dev, KERN_INFO, "model number mismatch "
  2402. "'%s' != '%s'\n", model[0], model[1]);
  2403. return 0;
  2404. }
  2405. if (strcmp(serial[0], serial[1])) {
  2406. ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
  2407. "'%s' != '%s'\n", serial[0], serial[1]);
  2408. return 0;
  2409. }
  2410. if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
  2411. ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
  2412. "%llu != %llu\n",
  2413. (unsigned long long)dev->n_sectors,
  2414. (unsigned long long)new_n_sectors);
  2415. return 0;
  2416. }
  2417. return 1;
  2418. }
  2419. /**
  2420. * ata_dev_revalidate - Revalidate ATA device
  2421. * @dev: device to revalidate
  2422. * @post_reset: is this revalidation after reset?
  2423. *
  2424. * Re-read IDENTIFY page and make sure @dev is still attached to
  2425. * the port.
  2426. *
  2427. * LOCKING:
  2428. * Kernel thread context (may sleep)
  2429. *
  2430. * RETURNS:
  2431. * 0 on success, negative errno otherwise
  2432. */
  2433. int ata_dev_revalidate(struct ata_device *dev, int post_reset)
  2434. {
  2435. unsigned int class = dev->class;
  2436. u16 *id = (void *)dev->ap->sector_buf;
  2437. int rc;
  2438. if (!ata_dev_enabled(dev)) {
  2439. rc = -ENODEV;
  2440. goto fail;
  2441. }
  2442. /* read ID data */
  2443. rc = ata_dev_read_id(dev, &class, post_reset, id);
  2444. if (rc)
  2445. goto fail;
  2446. /* is the device still there? */
  2447. if (!ata_dev_same_device(dev, class, id)) {
  2448. rc = -ENODEV;
  2449. goto fail;
  2450. }
  2451. memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
  2452. /* configure device according to the new ID */
  2453. rc = ata_dev_configure(dev, 0);
  2454. if (rc == 0)
  2455. return 0;
  2456. fail:
  2457. ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
  2458. return rc;
  2459. }
  2460. static const char * const ata_dma_blacklist [] = {
  2461. "WDC AC11000H", NULL,
  2462. "WDC AC22100H", NULL,
  2463. "WDC AC32500H", NULL,
  2464. "WDC AC33100H", NULL,
  2465. "WDC AC31600H", NULL,
  2466. "WDC AC32100H", "24.09P07",
  2467. "WDC AC23200L", "21.10N21",
  2468. "Compaq CRD-8241B", NULL,
  2469. "CRD-8400B", NULL,
  2470. "CRD-8480B", NULL,
  2471. "CRD-8482B", NULL,
  2472. "CRD-84", NULL,
  2473. "SanDisk SDP3B", NULL,
  2474. "SanDisk SDP3B-64", NULL,
  2475. "SANYO CD-ROM CRD", NULL,
  2476. "HITACHI CDR-8", NULL,
  2477. "HITACHI CDR-8335", NULL,
  2478. "HITACHI CDR-8435", NULL,
  2479. "Toshiba CD-ROM XM-6202B", NULL,
  2480. "TOSHIBA CD-ROM XM-1702BC", NULL,
  2481. "CD-532E-A", NULL,
  2482. "E-IDE CD-ROM CR-840", NULL,
  2483. "CD-ROM Drive/F5A", NULL,
  2484. "WPI CDD-820", NULL,
  2485. "SAMSUNG CD-ROM SC-148C", NULL,
  2486. "SAMSUNG CD-ROM SC", NULL,
  2487. "SanDisk SDP3B-64", NULL,
  2488. "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
  2489. "_NEC DV5800A", NULL,
  2490. "SAMSUNG CD-ROM SN-124", "N001"
  2491. };
  2492. static int ata_strim(char *s, size_t len)
  2493. {
  2494. len = strnlen(s, len);
  2495. /* ATAPI specifies that empty space is blank-filled; remove blanks */
  2496. while ((len > 0) && (s[len - 1] == ' ')) {
  2497. len--;
  2498. s[len] = 0;
  2499. }
  2500. return len;
  2501. }
  2502. static int ata_dma_blacklisted(const struct ata_device *dev)
  2503. {
  2504. unsigned char model_num[40];
  2505. unsigned char model_rev[16];
  2506. unsigned int nlen, rlen;
  2507. int i;
  2508. ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
  2509. sizeof(model_num));
  2510. ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
  2511. sizeof(model_rev));
  2512. nlen = ata_strim(model_num, sizeof(model_num));
  2513. rlen = ata_strim(model_rev, sizeof(model_rev));
  2514. for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
  2515. if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
  2516. if (ata_dma_blacklist[i+1] == NULL)
  2517. return 1;
  2518. if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
  2519. return 1;
  2520. }
  2521. }
  2522. return 0;
  2523. }
  2524. /**
  2525. * ata_dev_xfermask - Compute supported xfermask of the given device
  2526. * @dev: Device to compute xfermask for
  2527. *
  2528. * Compute supported xfermask of @dev and store it in
  2529. * dev->*_mask. This function is responsible for applying all
  2530. * known limits including host controller limits, device
  2531. * blacklist, etc...
  2532. *
  2533. * FIXME: The current implementation limits all transfer modes to
  2534. * the fastest of the lowested device on the port. This is not
  2535. * required on most controllers.
  2536. *
  2537. * LOCKING:
  2538. * None.
  2539. */
  2540. static void ata_dev_xfermask(struct ata_device *dev)
  2541. {
  2542. struct ata_port *ap = dev->ap;
  2543. struct ata_host_set *hs = ap->host_set;
  2544. unsigned long xfer_mask;
  2545. int i;
  2546. xfer_mask = ata_pack_xfermask(ap->pio_mask,
  2547. ap->mwdma_mask, ap->udma_mask);
  2548. /* Apply cable rule here. Don't apply it early because when
  2549. * we handle hot plug the cable type can itself change.
  2550. */
  2551. if (ap->cbl == ATA_CBL_PATA40)
  2552. xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
  2553. /* FIXME: Use port-wide xfermask for now */
  2554. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  2555. struct ata_device *d = &ap->device[i];
  2556. if (ata_dev_absent(d))
  2557. continue;
  2558. if (ata_dev_disabled(d)) {
  2559. /* to avoid violating device selection timing */
  2560. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2561. UINT_MAX, UINT_MAX);
  2562. continue;
  2563. }
  2564. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2565. d->mwdma_mask, d->udma_mask);
  2566. xfer_mask &= ata_id_xfermask(d->id);
  2567. if (ata_dma_blacklisted(d))
  2568. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2569. }
  2570. if (ata_dma_blacklisted(dev))
  2571. ata_dev_printk(dev, KERN_WARNING,
  2572. "device is on DMA blacklist, disabling DMA\n");
  2573. if (hs->flags & ATA_HOST_SIMPLEX) {
  2574. if (hs->simplex_claimed)
  2575. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2576. }
  2577. if (ap->ops->mode_filter)
  2578. xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
  2579. ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
  2580. &dev->mwdma_mask, &dev->udma_mask);
  2581. }
  2582. /**
  2583. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  2584. * @dev: Device to which command will be sent
  2585. *
  2586. * Issue SET FEATURES - XFER MODE command to device @dev
  2587. * on port @ap.
  2588. *
  2589. * LOCKING:
  2590. * PCI/etc. bus probe sem.
  2591. *
  2592. * RETURNS:
  2593. * 0 on success, AC_ERR_* mask otherwise.
  2594. */
  2595. static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
  2596. {
  2597. struct ata_taskfile tf;
  2598. unsigned int err_mask;
  2599. /* set up set-features taskfile */
  2600. DPRINTK("set features - xfer mode\n");
  2601. ata_tf_init(dev, &tf);
  2602. tf.command = ATA_CMD_SET_FEATURES;
  2603. tf.feature = SETFEATURES_XFER;
  2604. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2605. tf.protocol = ATA_PROT_NODATA;
  2606. tf.nsect = dev->xfer_mode;
  2607. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  2608. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2609. return err_mask;
  2610. }
  2611. /**
  2612. * ata_dev_init_params - Issue INIT DEV PARAMS command
  2613. * @dev: Device to which command will be sent
  2614. * @heads: Number of heads (taskfile parameter)
  2615. * @sectors: Number of sectors (taskfile parameter)
  2616. *
  2617. * LOCKING:
  2618. * Kernel thread context (may sleep)
  2619. *
  2620. * RETURNS:
  2621. * 0 on success, AC_ERR_* mask otherwise.
  2622. */
  2623. static unsigned int ata_dev_init_params(struct ata_device *dev,
  2624. u16 heads, u16 sectors)
  2625. {
  2626. struct ata_taskfile tf;
  2627. unsigned int err_mask;
  2628. /* Number of sectors per track 1-255. Number of heads 1-16 */
  2629. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  2630. return AC_ERR_INVALID;
  2631. /* set up init dev params taskfile */
  2632. DPRINTK("init dev params \n");
  2633. ata_tf_init(dev, &tf);
  2634. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  2635. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2636. tf.protocol = ATA_PROT_NODATA;
  2637. tf.nsect = sectors;
  2638. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  2639. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  2640. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2641. return err_mask;
  2642. }
  2643. /**
  2644. * ata_sg_clean - Unmap DMA memory associated with command
  2645. * @qc: Command containing DMA memory to be released
  2646. *
  2647. * Unmap all mapped DMA memory associated with this command.
  2648. *
  2649. * LOCKING:
  2650. * spin_lock_irqsave(host_set lock)
  2651. */
  2652. static void ata_sg_clean(struct ata_queued_cmd *qc)
  2653. {
  2654. struct ata_port *ap = qc->ap;
  2655. struct scatterlist *sg = qc->__sg;
  2656. int dir = qc->dma_dir;
  2657. void *pad_buf = NULL;
  2658. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  2659. WARN_ON(sg == NULL);
  2660. if (qc->flags & ATA_QCFLAG_SINGLE)
  2661. WARN_ON(qc->n_elem > 1);
  2662. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  2663. /* if we padded the buffer out to 32-bit bound, and data
  2664. * xfer direction is from-device, we must copy from the
  2665. * pad buffer back into the supplied buffer
  2666. */
  2667. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  2668. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2669. if (qc->flags & ATA_QCFLAG_SG) {
  2670. if (qc->n_elem)
  2671. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  2672. /* restore last sg */
  2673. sg[qc->orig_n_elem - 1].length += qc->pad_len;
  2674. if (pad_buf) {
  2675. struct scatterlist *psg = &qc->pad_sgent;
  2676. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2677. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  2678. kunmap_atomic(addr, KM_IRQ0);
  2679. }
  2680. } else {
  2681. if (qc->n_elem)
  2682. dma_unmap_single(ap->dev,
  2683. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  2684. dir);
  2685. /* restore sg */
  2686. sg->length += qc->pad_len;
  2687. if (pad_buf)
  2688. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  2689. pad_buf, qc->pad_len);
  2690. }
  2691. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  2692. qc->__sg = NULL;
  2693. }
  2694. /**
  2695. * ata_fill_sg - Fill PCI IDE PRD table
  2696. * @qc: Metadata associated with taskfile to be transferred
  2697. *
  2698. * Fill PCI IDE PRD (scatter-gather) table with segments
  2699. * associated with the current disk command.
  2700. *
  2701. * LOCKING:
  2702. * spin_lock_irqsave(host_set lock)
  2703. *
  2704. */
  2705. static void ata_fill_sg(struct ata_queued_cmd *qc)
  2706. {
  2707. struct ata_port *ap = qc->ap;
  2708. struct scatterlist *sg;
  2709. unsigned int idx;
  2710. WARN_ON(qc->__sg == NULL);
  2711. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  2712. idx = 0;
  2713. ata_for_each_sg(sg, qc) {
  2714. u32 addr, offset;
  2715. u32 sg_len, len;
  2716. /* determine if physical DMA addr spans 64K boundary.
  2717. * Note h/w doesn't support 64-bit, so we unconditionally
  2718. * truncate dma_addr_t to u32.
  2719. */
  2720. addr = (u32) sg_dma_address(sg);
  2721. sg_len = sg_dma_len(sg);
  2722. while (sg_len) {
  2723. offset = addr & 0xffff;
  2724. len = sg_len;
  2725. if ((offset + sg_len) > 0x10000)
  2726. len = 0x10000 - offset;
  2727. ap->prd[idx].addr = cpu_to_le32(addr);
  2728. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  2729. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  2730. idx++;
  2731. sg_len -= len;
  2732. addr += len;
  2733. }
  2734. }
  2735. if (idx)
  2736. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  2737. }
  2738. /**
  2739. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  2740. * @qc: Metadata associated with taskfile to check
  2741. *
  2742. * Allow low-level driver to filter ATA PACKET commands, returning
  2743. * a status indicating whether or not it is OK to use DMA for the
  2744. * supplied PACKET command.
  2745. *
  2746. * LOCKING:
  2747. * spin_lock_irqsave(host_set lock)
  2748. *
  2749. * RETURNS: 0 when ATAPI DMA can be used
  2750. * nonzero otherwise
  2751. */
  2752. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  2753. {
  2754. struct ata_port *ap = qc->ap;
  2755. int rc = 0; /* Assume ATAPI DMA is OK by default */
  2756. if (ap->ops->check_atapi_dma)
  2757. rc = ap->ops->check_atapi_dma(qc);
  2758. /* We don't support polling DMA.
  2759. * Use PIO if the LLDD handles only interrupts in
  2760. * the HSM_ST_LAST state and the ATAPI device
  2761. * generates CDB interrupts.
  2762. */
  2763. if ((ap->flags & ATA_FLAG_PIO_POLLING) &&
  2764. (qc->dev->flags & ATA_DFLAG_CDB_INTR))
  2765. rc = 1;
  2766. return rc;
  2767. }
  2768. /**
  2769. * ata_qc_prep - Prepare taskfile for submission
  2770. * @qc: Metadata associated with taskfile to be prepared
  2771. *
  2772. * Prepare ATA taskfile for submission.
  2773. *
  2774. * LOCKING:
  2775. * spin_lock_irqsave(host_set lock)
  2776. */
  2777. void ata_qc_prep(struct ata_queued_cmd *qc)
  2778. {
  2779. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  2780. return;
  2781. ata_fill_sg(qc);
  2782. }
  2783. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  2784. /**
  2785. * ata_sg_init_one - Associate command with memory buffer
  2786. * @qc: Command to be associated
  2787. * @buf: Memory buffer
  2788. * @buflen: Length of memory buffer, in bytes.
  2789. *
  2790. * Initialize the data-related elements of queued_cmd @qc
  2791. * to point to a single memory buffer, @buf of byte length @buflen.
  2792. *
  2793. * LOCKING:
  2794. * spin_lock_irqsave(host_set lock)
  2795. */
  2796. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  2797. {
  2798. struct scatterlist *sg;
  2799. qc->flags |= ATA_QCFLAG_SINGLE;
  2800. memset(&qc->sgent, 0, sizeof(qc->sgent));
  2801. qc->__sg = &qc->sgent;
  2802. qc->n_elem = 1;
  2803. qc->orig_n_elem = 1;
  2804. qc->buf_virt = buf;
  2805. sg = qc->__sg;
  2806. sg_init_one(sg, buf, buflen);
  2807. }
  2808. /**
  2809. * ata_sg_init - Associate command with scatter-gather table.
  2810. * @qc: Command to be associated
  2811. * @sg: Scatter-gather table.
  2812. * @n_elem: Number of elements in s/g table.
  2813. *
  2814. * Initialize the data-related elements of queued_cmd @qc
  2815. * to point to a scatter-gather table @sg, containing @n_elem
  2816. * elements.
  2817. *
  2818. * LOCKING:
  2819. * spin_lock_irqsave(host_set lock)
  2820. */
  2821. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  2822. unsigned int n_elem)
  2823. {
  2824. qc->flags |= ATA_QCFLAG_SG;
  2825. qc->__sg = sg;
  2826. qc->n_elem = n_elem;
  2827. qc->orig_n_elem = n_elem;
  2828. }
  2829. /**
  2830. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  2831. * @qc: Command with memory buffer to be mapped.
  2832. *
  2833. * DMA-map the memory buffer associated with queued_cmd @qc.
  2834. *
  2835. * LOCKING:
  2836. * spin_lock_irqsave(host_set lock)
  2837. *
  2838. * RETURNS:
  2839. * Zero on success, negative on error.
  2840. */
  2841. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  2842. {
  2843. struct ata_port *ap = qc->ap;
  2844. int dir = qc->dma_dir;
  2845. struct scatterlist *sg = qc->__sg;
  2846. dma_addr_t dma_address;
  2847. int trim_sg = 0;
  2848. /* we must lengthen transfers to end on a 32-bit boundary */
  2849. qc->pad_len = sg->length & 3;
  2850. if (qc->pad_len) {
  2851. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2852. struct scatterlist *psg = &qc->pad_sgent;
  2853. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2854. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2855. if (qc->tf.flags & ATA_TFLAG_WRITE)
  2856. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  2857. qc->pad_len);
  2858. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2859. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2860. /* trim sg */
  2861. sg->length -= qc->pad_len;
  2862. if (sg->length == 0)
  2863. trim_sg = 1;
  2864. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  2865. sg->length, qc->pad_len);
  2866. }
  2867. if (trim_sg) {
  2868. qc->n_elem--;
  2869. goto skip_map;
  2870. }
  2871. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  2872. sg->length, dir);
  2873. if (dma_mapping_error(dma_address)) {
  2874. /* restore sg */
  2875. sg->length += qc->pad_len;
  2876. return -1;
  2877. }
  2878. sg_dma_address(sg) = dma_address;
  2879. sg_dma_len(sg) = sg->length;
  2880. skip_map:
  2881. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  2882. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2883. return 0;
  2884. }
  2885. /**
  2886. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  2887. * @qc: Command with scatter-gather table to be mapped.
  2888. *
  2889. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  2890. *
  2891. * LOCKING:
  2892. * spin_lock_irqsave(host_set lock)
  2893. *
  2894. * RETURNS:
  2895. * Zero on success, negative on error.
  2896. *
  2897. */
  2898. static int ata_sg_setup(struct ata_queued_cmd *qc)
  2899. {
  2900. struct ata_port *ap = qc->ap;
  2901. struct scatterlist *sg = qc->__sg;
  2902. struct scatterlist *lsg = &sg[qc->n_elem - 1];
  2903. int n_elem, pre_n_elem, dir, trim_sg = 0;
  2904. VPRINTK("ENTER, ata%u\n", ap->id);
  2905. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  2906. /* we must lengthen transfers to end on a 32-bit boundary */
  2907. qc->pad_len = lsg->length & 3;
  2908. if (qc->pad_len) {
  2909. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2910. struct scatterlist *psg = &qc->pad_sgent;
  2911. unsigned int offset;
  2912. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2913. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2914. /*
  2915. * psg->page/offset are used to copy to-be-written
  2916. * data in this function or read data in ata_sg_clean.
  2917. */
  2918. offset = lsg->offset + lsg->length - qc->pad_len;
  2919. psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
  2920. psg->offset = offset_in_page(offset);
  2921. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  2922. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2923. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  2924. kunmap_atomic(addr, KM_IRQ0);
  2925. }
  2926. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2927. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2928. /* trim last sg */
  2929. lsg->length -= qc->pad_len;
  2930. if (lsg->length == 0)
  2931. trim_sg = 1;
  2932. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  2933. qc->n_elem - 1, lsg->length, qc->pad_len);
  2934. }
  2935. pre_n_elem = qc->n_elem;
  2936. if (trim_sg && pre_n_elem)
  2937. pre_n_elem--;
  2938. if (!pre_n_elem) {
  2939. n_elem = 0;
  2940. goto skip_map;
  2941. }
  2942. dir = qc->dma_dir;
  2943. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  2944. if (n_elem < 1) {
  2945. /* restore last sg */
  2946. lsg->length += qc->pad_len;
  2947. return -1;
  2948. }
  2949. DPRINTK("%d sg elements mapped\n", n_elem);
  2950. skip_map:
  2951. qc->n_elem = n_elem;
  2952. return 0;
  2953. }
  2954. /**
  2955. * swap_buf_le16 - swap halves of 16-bit words in place
  2956. * @buf: Buffer to swap
  2957. * @buf_words: Number of 16-bit words in buffer.
  2958. *
  2959. * Swap halves of 16-bit words if needed to convert from
  2960. * little-endian byte order to native cpu byte order, or
  2961. * vice-versa.
  2962. *
  2963. * LOCKING:
  2964. * Inherited from caller.
  2965. */
  2966. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  2967. {
  2968. #ifdef __BIG_ENDIAN
  2969. unsigned int i;
  2970. for (i = 0; i < buf_words; i++)
  2971. buf[i] = le16_to_cpu(buf[i]);
  2972. #endif /* __BIG_ENDIAN */
  2973. }
  2974. /**
  2975. * ata_mmio_data_xfer - Transfer data by MMIO
  2976. * @dev: device for this I/O
  2977. * @buf: data buffer
  2978. * @buflen: buffer length
  2979. * @write_data: read/write
  2980. *
  2981. * Transfer data from/to the device data register by MMIO.
  2982. *
  2983. * LOCKING:
  2984. * Inherited from caller.
  2985. */
  2986. void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
  2987. unsigned int buflen, int write_data)
  2988. {
  2989. struct ata_port *ap = adev->ap;
  2990. unsigned int i;
  2991. unsigned int words = buflen >> 1;
  2992. u16 *buf16 = (u16 *) buf;
  2993. void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
  2994. /* Transfer multiple of 2 bytes */
  2995. if (write_data) {
  2996. for (i = 0; i < words; i++)
  2997. writew(le16_to_cpu(buf16[i]), mmio);
  2998. } else {
  2999. for (i = 0; i < words; i++)
  3000. buf16[i] = cpu_to_le16(readw(mmio));
  3001. }
  3002. /* Transfer trailing 1 byte, if any. */
  3003. if (unlikely(buflen & 0x01)) {
  3004. u16 align_buf[1] = { 0 };
  3005. unsigned char *trailing_buf = buf + buflen - 1;
  3006. if (write_data) {
  3007. memcpy(align_buf, trailing_buf, 1);
  3008. writew(le16_to_cpu(align_buf[0]), mmio);
  3009. } else {
  3010. align_buf[0] = cpu_to_le16(readw(mmio));
  3011. memcpy(trailing_buf, align_buf, 1);
  3012. }
  3013. }
  3014. }
  3015. /**
  3016. * ata_pio_data_xfer - Transfer data by PIO
  3017. * @adev: device to target
  3018. * @buf: data buffer
  3019. * @buflen: buffer length
  3020. * @write_data: read/write
  3021. *
  3022. * Transfer data from/to the device data register by PIO.
  3023. *
  3024. * LOCKING:
  3025. * Inherited from caller.
  3026. */
  3027. void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
  3028. unsigned int buflen, int write_data)
  3029. {
  3030. struct ata_port *ap = adev->ap;
  3031. unsigned int words = buflen >> 1;
  3032. /* Transfer multiple of 2 bytes */
  3033. if (write_data)
  3034. outsw(ap->ioaddr.data_addr, buf, words);
  3035. else
  3036. insw(ap->ioaddr.data_addr, buf, words);
  3037. /* Transfer trailing 1 byte, if any. */
  3038. if (unlikely(buflen & 0x01)) {
  3039. u16 align_buf[1] = { 0 };
  3040. unsigned char *trailing_buf = buf + buflen - 1;
  3041. if (write_data) {
  3042. memcpy(align_buf, trailing_buf, 1);
  3043. outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  3044. } else {
  3045. align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
  3046. memcpy(trailing_buf, align_buf, 1);
  3047. }
  3048. }
  3049. }
  3050. /**
  3051. * ata_pio_data_xfer_noirq - Transfer data by PIO
  3052. * @adev: device to target
  3053. * @buf: data buffer
  3054. * @buflen: buffer length
  3055. * @write_data: read/write
  3056. *
  3057. * Transfer data from/to the device data register by PIO. Do the
  3058. * transfer with interrupts disabled.
  3059. *
  3060. * LOCKING:
  3061. * Inherited from caller.
  3062. */
  3063. void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
  3064. unsigned int buflen, int write_data)
  3065. {
  3066. unsigned long flags;
  3067. local_irq_save(flags);
  3068. ata_pio_data_xfer(adev, buf, buflen, write_data);
  3069. local_irq_restore(flags);
  3070. }
  3071. /**
  3072. * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
  3073. * @qc: Command on going
  3074. *
  3075. * Transfer ATA_SECT_SIZE of data from/to the ATA device.
  3076. *
  3077. * LOCKING:
  3078. * Inherited from caller.
  3079. */
  3080. static void ata_pio_sector(struct ata_queued_cmd *qc)
  3081. {
  3082. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3083. struct scatterlist *sg = qc->__sg;
  3084. struct ata_port *ap = qc->ap;
  3085. struct page *page;
  3086. unsigned int offset;
  3087. unsigned char *buf;
  3088. if (qc->cursect == (qc->nsect - 1))
  3089. ap->hsm_task_state = HSM_ST_LAST;
  3090. page = sg[qc->cursg].page;
  3091. offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
  3092. /* get the current page and offset */
  3093. page = nth_page(page, (offset >> PAGE_SHIFT));
  3094. offset %= PAGE_SIZE;
  3095. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3096. if (PageHighMem(page)) {
  3097. unsigned long flags;
  3098. /* FIXME: use a bounce buffer */
  3099. local_irq_save(flags);
  3100. buf = kmap_atomic(page, KM_IRQ0);
  3101. /* do the actual data transfer */
  3102. ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
  3103. kunmap_atomic(buf, KM_IRQ0);
  3104. local_irq_restore(flags);
  3105. } else {
  3106. buf = page_address(page);
  3107. ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
  3108. }
  3109. qc->cursect++;
  3110. qc->cursg_ofs++;
  3111. if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
  3112. qc->cursg++;
  3113. qc->cursg_ofs = 0;
  3114. }
  3115. }
  3116. /**
  3117. * ata_pio_sectors - Transfer one or many 512-byte sectors.
  3118. * @qc: Command on going
  3119. *
  3120. * Transfer one or many ATA_SECT_SIZE of data from/to the
  3121. * ATA device for the DRQ request.
  3122. *
  3123. * LOCKING:
  3124. * Inherited from caller.
  3125. */
  3126. static void ata_pio_sectors(struct ata_queued_cmd *qc)
  3127. {
  3128. if (is_multi_taskfile(&qc->tf)) {
  3129. /* READ/WRITE MULTIPLE */
  3130. unsigned int nsect;
  3131. WARN_ON(qc->dev->multi_count == 0);
  3132. nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
  3133. while (nsect--)
  3134. ata_pio_sector(qc);
  3135. } else
  3136. ata_pio_sector(qc);
  3137. }
  3138. /**
  3139. * atapi_send_cdb - Write CDB bytes to hardware
  3140. * @ap: Port to which ATAPI device is attached.
  3141. * @qc: Taskfile currently active
  3142. *
  3143. * When device has indicated its readiness to accept
  3144. * a CDB, this function is called. Send the CDB.
  3145. *
  3146. * LOCKING:
  3147. * caller.
  3148. */
  3149. static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
  3150. {
  3151. /* send SCSI cdb */
  3152. DPRINTK("send cdb\n");
  3153. WARN_ON(qc->dev->cdb_len < 12);
  3154. ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
  3155. ata_altstatus(ap); /* flush */
  3156. switch (qc->tf.protocol) {
  3157. case ATA_PROT_ATAPI:
  3158. ap->hsm_task_state = HSM_ST;
  3159. break;
  3160. case ATA_PROT_ATAPI_NODATA:
  3161. ap->hsm_task_state = HSM_ST_LAST;
  3162. break;
  3163. case ATA_PROT_ATAPI_DMA:
  3164. ap->hsm_task_state = HSM_ST_LAST;
  3165. /* initiate bmdma */
  3166. ap->ops->bmdma_start(qc);
  3167. break;
  3168. }
  3169. }
  3170. /**
  3171. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3172. * @qc: Command on going
  3173. * @bytes: number of bytes
  3174. *
  3175. * Transfer Transfer data from/to the ATAPI device.
  3176. *
  3177. * LOCKING:
  3178. * Inherited from caller.
  3179. *
  3180. */
  3181. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  3182. {
  3183. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3184. struct scatterlist *sg = qc->__sg;
  3185. struct ata_port *ap = qc->ap;
  3186. struct page *page;
  3187. unsigned char *buf;
  3188. unsigned int offset, count;
  3189. if (qc->curbytes + bytes >= qc->nbytes)
  3190. ap->hsm_task_state = HSM_ST_LAST;
  3191. next_sg:
  3192. if (unlikely(qc->cursg >= qc->n_elem)) {
  3193. /*
  3194. * The end of qc->sg is reached and the device expects
  3195. * more data to transfer. In order not to overrun qc->sg
  3196. * and fulfill length specified in the byte count register,
  3197. * - for read case, discard trailing data from the device
  3198. * - for write case, padding zero data to the device
  3199. */
  3200. u16 pad_buf[1] = { 0 };
  3201. unsigned int words = bytes >> 1;
  3202. unsigned int i;
  3203. if (words) /* warning if bytes > 1 */
  3204. ata_dev_printk(qc->dev, KERN_WARNING,
  3205. "%u bytes trailing data\n", bytes);
  3206. for (i = 0; i < words; i++)
  3207. ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
  3208. ap->hsm_task_state = HSM_ST_LAST;
  3209. return;
  3210. }
  3211. sg = &qc->__sg[qc->cursg];
  3212. page = sg->page;
  3213. offset = sg->offset + qc->cursg_ofs;
  3214. /* get the current page and offset */
  3215. page = nth_page(page, (offset >> PAGE_SHIFT));
  3216. offset %= PAGE_SIZE;
  3217. /* don't overrun current sg */
  3218. count = min(sg->length - qc->cursg_ofs, bytes);
  3219. /* don't cross page boundaries */
  3220. count = min(count, (unsigned int)PAGE_SIZE - offset);
  3221. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3222. if (PageHighMem(page)) {
  3223. unsigned long flags;
  3224. /* FIXME: use bounce buffer */
  3225. local_irq_save(flags);
  3226. buf = kmap_atomic(page, KM_IRQ0);
  3227. /* do the actual data transfer */
  3228. ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
  3229. kunmap_atomic(buf, KM_IRQ0);
  3230. local_irq_restore(flags);
  3231. } else {
  3232. buf = page_address(page);
  3233. ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
  3234. }
  3235. bytes -= count;
  3236. qc->curbytes += count;
  3237. qc->cursg_ofs += count;
  3238. if (qc->cursg_ofs == sg->length) {
  3239. qc->cursg++;
  3240. qc->cursg_ofs = 0;
  3241. }
  3242. if (bytes)
  3243. goto next_sg;
  3244. }
  3245. /**
  3246. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3247. * @qc: Command on going
  3248. *
  3249. * Transfer Transfer data from/to the ATAPI device.
  3250. *
  3251. * LOCKING:
  3252. * Inherited from caller.
  3253. */
  3254. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  3255. {
  3256. struct ata_port *ap = qc->ap;
  3257. struct ata_device *dev = qc->dev;
  3258. unsigned int ireason, bc_lo, bc_hi, bytes;
  3259. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  3260. /* Abuse qc->result_tf for temp storage of intermediate TF
  3261. * here to save some kernel stack usage.
  3262. * For normal completion, qc->result_tf is not relevant. For
  3263. * error, qc->result_tf is later overwritten by ata_qc_complete().
  3264. * So, the correctness of qc->result_tf is not affected.
  3265. */
  3266. ap->ops->tf_read(ap, &qc->result_tf);
  3267. ireason = qc->result_tf.nsect;
  3268. bc_lo = qc->result_tf.lbam;
  3269. bc_hi = qc->result_tf.lbah;
  3270. bytes = (bc_hi << 8) | bc_lo;
  3271. /* shall be cleared to zero, indicating xfer of data */
  3272. if (ireason & (1 << 0))
  3273. goto err_out;
  3274. /* make sure transfer direction matches expected */
  3275. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  3276. if (do_write != i_write)
  3277. goto err_out;
  3278. VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
  3279. __atapi_pio_bytes(qc, bytes);
  3280. return;
  3281. err_out:
  3282. ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
  3283. qc->err_mask |= AC_ERR_HSM;
  3284. ap->hsm_task_state = HSM_ST_ERR;
  3285. }
  3286. /**
  3287. * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
  3288. * @ap: the target ata_port
  3289. * @qc: qc on going
  3290. *
  3291. * RETURNS:
  3292. * 1 if ok in workqueue, 0 otherwise.
  3293. */
  3294. static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
  3295. {
  3296. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3297. return 1;
  3298. if (ap->hsm_task_state == HSM_ST_FIRST) {
  3299. if (qc->tf.protocol == ATA_PROT_PIO &&
  3300. (qc->tf.flags & ATA_TFLAG_WRITE))
  3301. return 1;
  3302. if (is_atapi_taskfile(&qc->tf) &&
  3303. !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3304. return 1;
  3305. }
  3306. return 0;
  3307. }
  3308. /**
  3309. * ata_hsm_qc_complete - finish a qc running on standard HSM
  3310. * @qc: Command to complete
  3311. * @in_wq: 1 if called from workqueue, 0 otherwise
  3312. *
  3313. * Finish @qc which is running on standard HSM.
  3314. *
  3315. * LOCKING:
  3316. * If @in_wq is zero, spin_lock_irqsave(host_set lock).
  3317. * Otherwise, none on entry and grabs host lock.
  3318. */
  3319. static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
  3320. {
  3321. struct ata_port *ap = qc->ap;
  3322. unsigned long flags;
  3323. if (ap->ops->error_handler) {
  3324. if (in_wq) {
  3325. spin_lock_irqsave(&ap->host_set->lock, flags);
  3326. /* EH might have kicked in while host_set lock
  3327. * is released.
  3328. */
  3329. qc = ata_qc_from_tag(ap, qc->tag);
  3330. if (qc) {
  3331. if (likely(!(qc->err_mask & AC_ERR_HSM))) {
  3332. ata_irq_on(ap);
  3333. ata_qc_complete(qc);
  3334. } else
  3335. ata_port_freeze(ap);
  3336. }
  3337. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3338. } else {
  3339. if (likely(!(qc->err_mask & AC_ERR_HSM)))
  3340. ata_qc_complete(qc);
  3341. else
  3342. ata_port_freeze(ap);
  3343. }
  3344. } else {
  3345. if (in_wq) {
  3346. spin_lock_irqsave(&ap->host_set->lock, flags);
  3347. ata_irq_on(ap);
  3348. ata_qc_complete(qc);
  3349. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3350. } else
  3351. ata_qc_complete(qc);
  3352. }
  3353. ata_altstatus(ap); /* flush */
  3354. }
  3355. /**
  3356. * ata_hsm_move - move the HSM to the next state.
  3357. * @ap: the target ata_port
  3358. * @qc: qc on going
  3359. * @status: current device status
  3360. * @in_wq: 1 if called from workqueue, 0 otherwise
  3361. *
  3362. * RETURNS:
  3363. * 1 when poll next status needed, 0 otherwise.
  3364. */
  3365. int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
  3366. u8 status, int in_wq)
  3367. {
  3368. unsigned long flags = 0;
  3369. int poll_next;
  3370. WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
  3371. /* Make sure ata_qc_issue_prot() does not throw things
  3372. * like DMA polling into the workqueue. Notice that
  3373. * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
  3374. */
  3375. WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
  3376. fsm_start:
  3377. DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
  3378. ap->id, qc->tf.protocol, ap->hsm_task_state, status);
  3379. switch (ap->hsm_task_state) {
  3380. case HSM_ST_FIRST:
  3381. /* Send first data block or PACKET CDB */
  3382. /* If polling, we will stay in the work queue after
  3383. * sending the data. Otherwise, interrupt handler
  3384. * takes over after sending the data.
  3385. */
  3386. poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
  3387. /* check device status */
  3388. if (unlikely((status & ATA_DRQ) == 0)) {
  3389. /* handle BSY=0, DRQ=0 as error */
  3390. if (likely(status & (ATA_ERR | ATA_DF)))
  3391. /* device stops HSM for abort/error */
  3392. qc->err_mask |= AC_ERR_DEV;
  3393. else
  3394. /* HSM violation. Let EH handle this */
  3395. qc->err_mask |= AC_ERR_HSM;
  3396. ap->hsm_task_state = HSM_ST_ERR;
  3397. goto fsm_start;
  3398. }
  3399. /* Device should not ask for data transfer (DRQ=1)
  3400. * when it finds something wrong.
  3401. * We ignore DRQ here and stop the HSM by
  3402. * changing hsm_task_state to HSM_ST_ERR and
  3403. * let the EH abort the command or reset the device.
  3404. */
  3405. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3406. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3407. ap->id, status);
  3408. qc->err_mask |= AC_ERR_HSM;
  3409. ap->hsm_task_state = HSM_ST_ERR;
  3410. goto fsm_start;
  3411. }
  3412. /* Send the CDB (atapi) or the first data block (ata pio out).
  3413. * During the state transition, interrupt handler shouldn't
  3414. * be invoked before the data transfer is complete and
  3415. * hsm_task_state is changed. Hence, the following locking.
  3416. */
  3417. if (in_wq)
  3418. spin_lock_irqsave(&ap->host_set->lock, flags);
  3419. if (qc->tf.protocol == ATA_PROT_PIO) {
  3420. /* PIO data out protocol.
  3421. * send first data block.
  3422. */
  3423. /* ata_pio_sectors() might change the state
  3424. * to HSM_ST_LAST. so, the state is changed here
  3425. * before ata_pio_sectors().
  3426. */
  3427. ap->hsm_task_state = HSM_ST;
  3428. ata_pio_sectors(qc);
  3429. ata_altstatus(ap); /* flush */
  3430. } else
  3431. /* send CDB */
  3432. atapi_send_cdb(ap, qc);
  3433. if (in_wq)
  3434. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3435. /* if polling, ata_pio_task() handles the rest.
  3436. * otherwise, interrupt handler takes over from here.
  3437. */
  3438. break;
  3439. case HSM_ST:
  3440. /* complete command or read/write the data register */
  3441. if (qc->tf.protocol == ATA_PROT_ATAPI) {
  3442. /* ATAPI PIO protocol */
  3443. if ((status & ATA_DRQ) == 0) {
  3444. /* No more data to transfer or device error.
  3445. * Device error will be tagged in HSM_ST_LAST.
  3446. */
  3447. ap->hsm_task_state = HSM_ST_LAST;
  3448. goto fsm_start;
  3449. }
  3450. /* Device should not ask for data transfer (DRQ=1)
  3451. * when it finds something wrong.
  3452. * We ignore DRQ here and stop the HSM by
  3453. * changing hsm_task_state to HSM_ST_ERR and
  3454. * let the EH abort the command or reset the device.
  3455. */
  3456. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3457. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3458. ap->id, status);
  3459. qc->err_mask |= AC_ERR_HSM;
  3460. ap->hsm_task_state = HSM_ST_ERR;
  3461. goto fsm_start;
  3462. }
  3463. atapi_pio_bytes(qc);
  3464. if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
  3465. /* bad ireason reported by device */
  3466. goto fsm_start;
  3467. } else {
  3468. /* ATA PIO protocol */
  3469. if (unlikely((status & ATA_DRQ) == 0)) {
  3470. /* handle BSY=0, DRQ=0 as error */
  3471. if (likely(status & (ATA_ERR | ATA_DF)))
  3472. /* device stops HSM for abort/error */
  3473. qc->err_mask |= AC_ERR_DEV;
  3474. else
  3475. /* HSM violation. Let EH handle this */
  3476. qc->err_mask |= AC_ERR_HSM;
  3477. ap->hsm_task_state = HSM_ST_ERR;
  3478. goto fsm_start;
  3479. }
  3480. /* For PIO reads, some devices may ask for
  3481. * data transfer (DRQ=1) alone with ERR=1.
  3482. * We respect DRQ here and transfer one
  3483. * block of junk data before changing the
  3484. * hsm_task_state to HSM_ST_ERR.
  3485. *
  3486. * For PIO writes, ERR=1 DRQ=1 doesn't make
  3487. * sense since the data block has been
  3488. * transferred to the device.
  3489. */
  3490. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3491. /* data might be corrputed */
  3492. qc->err_mask |= AC_ERR_DEV;
  3493. if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
  3494. ata_pio_sectors(qc);
  3495. ata_altstatus(ap);
  3496. status = ata_wait_idle(ap);
  3497. }
  3498. if (status & (ATA_BUSY | ATA_DRQ))
  3499. qc->err_mask |= AC_ERR_HSM;
  3500. /* ata_pio_sectors() might change the
  3501. * state to HSM_ST_LAST. so, the state
  3502. * is changed after ata_pio_sectors().
  3503. */
  3504. ap->hsm_task_state = HSM_ST_ERR;
  3505. goto fsm_start;
  3506. }
  3507. ata_pio_sectors(qc);
  3508. if (ap->hsm_task_state == HSM_ST_LAST &&
  3509. (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
  3510. /* all data read */
  3511. ata_altstatus(ap);
  3512. status = ata_wait_idle(ap);
  3513. goto fsm_start;
  3514. }
  3515. }
  3516. ata_altstatus(ap); /* flush */
  3517. poll_next = 1;
  3518. break;
  3519. case HSM_ST_LAST:
  3520. if (unlikely(!ata_ok(status))) {
  3521. qc->err_mask |= __ac_err_mask(status);
  3522. ap->hsm_task_state = HSM_ST_ERR;
  3523. goto fsm_start;
  3524. }
  3525. /* no more data to transfer */
  3526. DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
  3527. ap->id, qc->dev->devno, status);
  3528. WARN_ON(qc->err_mask);
  3529. ap->hsm_task_state = HSM_ST_IDLE;
  3530. /* complete taskfile transaction */
  3531. ata_hsm_qc_complete(qc, in_wq);
  3532. poll_next = 0;
  3533. break;
  3534. case HSM_ST_ERR:
  3535. /* make sure qc->err_mask is available to
  3536. * know what's wrong and recover
  3537. */
  3538. WARN_ON(qc->err_mask == 0);
  3539. ap->hsm_task_state = HSM_ST_IDLE;
  3540. /* complete taskfile transaction */
  3541. ata_hsm_qc_complete(qc, in_wq);
  3542. poll_next = 0;
  3543. break;
  3544. default:
  3545. poll_next = 0;
  3546. BUG();
  3547. }
  3548. return poll_next;
  3549. }
  3550. static void ata_pio_task(void *_data)
  3551. {
  3552. struct ata_queued_cmd *qc = _data;
  3553. struct ata_port *ap = qc->ap;
  3554. u8 status;
  3555. int poll_next;
  3556. fsm_start:
  3557. WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
  3558. /*
  3559. * This is purely heuristic. This is a fast path.
  3560. * Sometimes when we enter, BSY will be cleared in
  3561. * a chk-status or two. If not, the drive is probably seeking
  3562. * or something. Snooze for a couple msecs, then
  3563. * chk-status again. If still busy, queue delayed work.
  3564. */
  3565. status = ata_busy_wait(ap, ATA_BUSY, 5);
  3566. if (status & ATA_BUSY) {
  3567. msleep(2);
  3568. status = ata_busy_wait(ap, ATA_BUSY, 10);
  3569. if (status & ATA_BUSY) {
  3570. ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
  3571. return;
  3572. }
  3573. }
  3574. /* move the HSM */
  3575. poll_next = ata_hsm_move(ap, qc, status, 1);
  3576. /* another command or interrupt handler
  3577. * may be running at this point.
  3578. */
  3579. if (poll_next)
  3580. goto fsm_start;
  3581. }
  3582. /**
  3583. * ata_qc_new - Request an available ATA command, for queueing
  3584. * @ap: Port associated with device @dev
  3585. * @dev: Device from whom we request an available command structure
  3586. *
  3587. * LOCKING:
  3588. * None.
  3589. */
  3590. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  3591. {
  3592. struct ata_queued_cmd *qc = NULL;
  3593. unsigned int i;
  3594. /* no command while frozen */
  3595. if (unlikely(ap->flags & ATA_FLAG_FROZEN))
  3596. return NULL;
  3597. /* the last tag is reserved for internal command. */
  3598. for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
  3599. if (!test_and_set_bit(i, &ap->qc_allocated)) {
  3600. qc = __ata_qc_from_tag(ap, i);
  3601. break;
  3602. }
  3603. if (qc)
  3604. qc->tag = i;
  3605. return qc;
  3606. }
  3607. /**
  3608. * ata_qc_new_init - Request an available ATA command, and initialize it
  3609. * @dev: Device from whom we request an available command structure
  3610. *
  3611. * LOCKING:
  3612. * None.
  3613. */
  3614. struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
  3615. {
  3616. struct ata_port *ap = dev->ap;
  3617. struct ata_queued_cmd *qc;
  3618. qc = ata_qc_new(ap);
  3619. if (qc) {
  3620. qc->scsicmd = NULL;
  3621. qc->ap = ap;
  3622. qc->dev = dev;
  3623. ata_qc_reinit(qc);
  3624. }
  3625. return qc;
  3626. }
  3627. /**
  3628. * ata_qc_free - free unused ata_queued_cmd
  3629. * @qc: Command to complete
  3630. *
  3631. * Designed to free unused ata_queued_cmd object
  3632. * in case something prevents using it.
  3633. *
  3634. * LOCKING:
  3635. * spin_lock_irqsave(host_set lock)
  3636. */
  3637. void ata_qc_free(struct ata_queued_cmd *qc)
  3638. {
  3639. struct ata_port *ap = qc->ap;
  3640. unsigned int tag;
  3641. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3642. qc->flags = 0;
  3643. tag = qc->tag;
  3644. if (likely(ata_tag_valid(tag))) {
  3645. qc->tag = ATA_TAG_POISON;
  3646. clear_bit(tag, &ap->qc_allocated);
  3647. }
  3648. }
  3649. void __ata_qc_complete(struct ata_queued_cmd *qc)
  3650. {
  3651. struct ata_port *ap = qc->ap;
  3652. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3653. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  3654. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  3655. ata_sg_clean(qc);
  3656. /* command should be marked inactive atomically with qc completion */
  3657. if (qc->tf.protocol == ATA_PROT_NCQ)
  3658. ap->sactive &= ~(1 << qc->tag);
  3659. else
  3660. ap->active_tag = ATA_TAG_POISON;
  3661. /* atapi: mark qc as inactive to prevent the interrupt handler
  3662. * from completing the command twice later, before the error handler
  3663. * is called. (when rc != 0 and atapi request sense is needed)
  3664. */
  3665. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  3666. ap->qc_active &= ~(1 << qc->tag);
  3667. /* call completion callback */
  3668. qc->complete_fn(qc);
  3669. }
  3670. /**
  3671. * ata_qc_complete - Complete an active ATA command
  3672. * @qc: Command to complete
  3673. * @err_mask: ATA Status register contents
  3674. *
  3675. * Indicate to the mid and upper layers that an ATA
  3676. * command has completed, with either an ok or not-ok status.
  3677. *
  3678. * LOCKING:
  3679. * spin_lock_irqsave(host_set lock)
  3680. */
  3681. void ata_qc_complete(struct ata_queued_cmd *qc)
  3682. {
  3683. struct ata_port *ap = qc->ap;
  3684. /* XXX: New EH and old EH use different mechanisms to
  3685. * synchronize EH with regular execution path.
  3686. *
  3687. * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
  3688. * Normal execution path is responsible for not accessing a
  3689. * failed qc. libata core enforces the rule by returning NULL
  3690. * from ata_qc_from_tag() for failed qcs.
  3691. *
  3692. * Old EH depends on ata_qc_complete() nullifying completion
  3693. * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
  3694. * not synchronize with interrupt handler. Only PIO task is
  3695. * taken care of.
  3696. */
  3697. if (ap->ops->error_handler) {
  3698. WARN_ON(ap->flags & ATA_FLAG_FROZEN);
  3699. if (unlikely(qc->err_mask))
  3700. qc->flags |= ATA_QCFLAG_FAILED;
  3701. if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
  3702. if (!ata_tag_internal(qc->tag)) {
  3703. /* always fill result TF for failed qc */
  3704. ap->ops->tf_read(ap, &qc->result_tf);
  3705. ata_qc_schedule_eh(qc);
  3706. return;
  3707. }
  3708. }
  3709. /* read result TF if requested */
  3710. if (qc->flags & ATA_QCFLAG_RESULT_TF)
  3711. ap->ops->tf_read(ap, &qc->result_tf);
  3712. __ata_qc_complete(qc);
  3713. } else {
  3714. if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
  3715. return;
  3716. /* read result TF if failed or requested */
  3717. if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
  3718. ap->ops->tf_read(ap, &qc->result_tf);
  3719. __ata_qc_complete(qc);
  3720. }
  3721. }
  3722. /**
  3723. * ata_qc_complete_multiple - Complete multiple qcs successfully
  3724. * @ap: port in question
  3725. * @qc_active: new qc_active mask
  3726. * @finish_qc: LLDD callback invoked before completing a qc
  3727. *
  3728. * Complete in-flight commands. This functions is meant to be
  3729. * called from low-level driver's interrupt routine to complete
  3730. * requests normally. ap->qc_active and @qc_active is compared
  3731. * and commands are completed accordingly.
  3732. *
  3733. * LOCKING:
  3734. * spin_lock_irqsave(host_set lock)
  3735. *
  3736. * RETURNS:
  3737. * Number of completed commands on success, -errno otherwise.
  3738. */
  3739. int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
  3740. void (*finish_qc)(struct ata_queued_cmd *))
  3741. {
  3742. int nr_done = 0;
  3743. u32 done_mask;
  3744. int i;
  3745. done_mask = ap->qc_active ^ qc_active;
  3746. if (unlikely(done_mask & qc_active)) {
  3747. ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
  3748. "(%08x->%08x)\n", ap->qc_active, qc_active);
  3749. return -EINVAL;
  3750. }
  3751. for (i = 0; i < ATA_MAX_QUEUE; i++) {
  3752. struct ata_queued_cmd *qc;
  3753. if (!(done_mask & (1 << i)))
  3754. continue;
  3755. if ((qc = ata_qc_from_tag(ap, i))) {
  3756. if (finish_qc)
  3757. finish_qc(qc);
  3758. ata_qc_complete(qc);
  3759. nr_done++;
  3760. }
  3761. }
  3762. return nr_done;
  3763. }
  3764. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  3765. {
  3766. struct ata_port *ap = qc->ap;
  3767. switch (qc->tf.protocol) {
  3768. case ATA_PROT_NCQ:
  3769. case ATA_PROT_DMA:
  3770. case ATA_PROT_ATAPI_DMA:
  3771. return 1;
  3772. case ATA_PROT_ATAPI:
  3773. case ATA_PROT_PIO:
  3774. if (ap->flags & ATA_FLAG_PIO_DMA)
  3775. return 1;
  3776. /* fall through */
  3777. default:
  3778. return 0;
  3779. }
  3780. /* never reached */
  3781. }
  3782. /**
  3783. * ata_qc_issue - issue taskfile to device
  3784. * @qc: command to issue to device
  3785. *
  3786. * Prepare an ATA command to submission to device.
  3787. * This includes mapping the data into a DMA-able
  3788. * area, filling in the S/G table, and finally
  3789. * writing the taskfile to hardware, starting the command.
  3790. *
  3791. * LOCKING:
  3792. * spin_lock_irqsave(host_set lock)
  3793. */
  3794. void ata_qc_issue(struct ata_queued_cmd *qc)
  3795. {
  3796. struct ata_port *ap = qc->ap;
  3797. /* Make sure only one non-NCQ command is outstanding. The
  3798. * check is skipped for old EH because it reuses active qc to
  3799. * request ATAPI sense.
  3800. */
  3801. WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
  3802. if (qc->tf.protocol == ATA_PROT_NCQ) {
  3803. WARN_ON(ap->sactive & (1 << qc->tag));
  3804. ap->sactive |= 1 << qc->tag;
  3805. } else {
  3806. WARN_ON(ap->sactive);
  3807. ap->active_tag = qc->tag;
  3808. }
  3809. qc->flags |= ATA_QCFLAG_ACTIVE;
  3810. ap->qc_active |= 1 << qc->tag;
  3811. if (ata_should_dma_map(qc)) {
  3812. if (qc->flags & ATA_QCFLAG_SG) {
  3813. if (ata_sg_setup(qc))
  3814. goto sg_err;
  3815. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  3816. if (ata_sg_setup_one(qc))
  3817. goto sg_err;
  3818. }
  3819. } else {
  3820. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3821. }
  3822. ap->ops->qc_prep(qc);
  3823. qc->err_mask |= ap->ops->qc_issue(qc);
  3824. if (unlikely(qc->err_mask))
  3825. goto err;
  3826. return;
  3827. sg_err:
  3828. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3829. qc->err_mask |= AC_ERR_SYSTEM;
  3830. err:
  3831. ata_qc_complete(qc);
  3832. }
  3833. /**
  3834. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  3835. * @qc: command to issue to device
  3836. *
  3837. * Using various libata functions and hooks, this function
  3838. * starts an ATA command. ATA commands are grouped into
  3839. * classes called "protocols", and issuing each type of protocol
  3840. * is slightly different.
  3841. *
  3842. * May be used as the qc_issue() entry in ata_port_operations.
  3843. *
  3844. * LOCKING:
  3845. * spin_lock_irqsave(host_set lock)
  3846. *
  3847. * RETURNS:
  3848. * Zero on success, AC_ERR_* mask on failure
  3849. */
  3850. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  3851. {
  3852. struct ata_port *ap = qc->ap;
  3853. /* Use polling pio if the LLD doesn't handle
  3854. * interrupt driven pio and atapi CDB interrupt.
  3855. */
  3856. if (ap->flags & ATA_FLAG_PIO_POLLING) {
  3857. switch (qc->tf.protocol) {
  3858. case ATA_PROT_PIO:
  3859. case ATA_PROT_ATAPI:
  3860. case ATA_PROT_ATAPI_NODATA:
  3861. qc->tf.flags |= ATA_TFLAG_POLLING;
  3862. break;
  3863. case ATA_PROT_ATAPI_DMA:
  3864. if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
  3865. /* see ata_check_atapi_dma() */
  3866. BUG();
  3867. break;
  3868. default:
  3869. break;
  3870. }
  3871. }
  3872. /* select the device */
  3873. ata_dev_select(ap, qc->dev->devno, 1, 0);
  3874. /* start the command */
  3875. switch (qc->tf.protocol) {
  3876. case ATA_PROT_NODATA:
  3877. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3878. ata_qc_set_polling(qc);
  3879. ata_tf_to_host(ap, &qc->tf);
  3880. ap->hsm_task_state = HSM_ST_LAST;
  3881. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3882. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3883. break;
  3884. case ATA_PROT_DMA:
  3885. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3886. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3887. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3888. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3889. ap->hsm_task_state = HSM_ST_LAST;
  3890. break;
  3891. case ATA_PROT_PIO:
  3892. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3893. ata_qc_set_polling(qc);
  3894. ata_tf_to_host(ap, &qc->tf);
  3895. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  3896. /* PIO data out protocol */
  3897. ap->hsm_task_state = HSM_ST_FIRST;
  3898. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3899. /* always send first data block using
  3900. * the ata_pio_task() codepath.
  3901. */
  3902. } else {
  3903. /* PIO data in protocol */
  3904. ap->hsm_task_state = HSM_ST;
  3905. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3906. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3907. /* if polling, ata_pio_task() handles the rest.
  3908. * otherwise, interrupt handler takes over from here.
  3909. */
  3910. }
  3911. break;
  3912. case ATA_PROT_ATAPI:
  3913. case ATA_PROT_ATAPI_NODATA:
  3914. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3915. ata_qc_set_polling(qc);
  3916. ata_tf_to_host(ap, &qc->tf);
  3917. ap->hsm_task_state = HSM_ST_FIRST;
  3918. /* send cdb by polling if no cdb interrupt */
  3919. if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
  3920. (qc->tf.flags & ATA_TFLAG_POLLING))
  3921. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3922. break;
  3923. case ATA_PROT_ATAPI_DMA:
  3924. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3925. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3926. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3927. ap->hsm_task_state = HSM_ST_FIRST;
  3928. /* send cdb by polling if no cdb interrupt */
  3929. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3930. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3931. break;
  3932. default:
  3933. WARN_ON(1);
  3934. return AC_ERR_SYSTEM;
  3935. }
  3936. return 0;
  3937. }
  3938. /**
  3939. * ata_host_intr - Handle host interrupt for given (port, task)
  3940. * @ap: Port on which interrupt arrived (possibly...)
  3941. * @qc: Taskfile currently active in engine
  3942. *
  3943. * Handle host interrupt for given queued command. Currently,
  3944. * only DMA interrupts are handled. All other commands are
  3945. * handled via polling with interrupts disabled (nIEN bit).
  3946. *
  3947. * LOCKING:
  3948. * spin_lock_irqsave(host_set lock)
  3949. *
  3950. * RETURNS:
  3951. * One if interrupt was handled, zero if not (shared irq).
  3952. */
  3953. inline unsigned int ata_host_intr (struct ata_port *ap,
  3954. struct ata_queued_cmd *qc)
  3955. {
  3956. u8 status, host_stat = 0;
  3957. VPRINTK("ata%u: protocol %d task_state %d\n",
  3958. ap->id, qc->tf.protocol, ap->hsm_task_state);
  3959. /* Check whether we are expecting interrupt in this state */
  3960. switch (ap->hsm_task_state) {
  3961. case HSM_ST_FIRST:
  3962. /* Some pre-ATAPI-4 devices assert INTRQ
  3963. * at this state when ready to receive CDB.
  3964. */
  3965. /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
  3966. * The flag was turned on only for atapi devices.
  3967. * No need to check is_atapi_taskfile(&qc->tf) again.
  3968. */
  3969. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3970. goto idle_irq;
  3971. break;
  3972. case HSM_ST_LAST:
  3973. if (qc->tf.protocol == ATA_PROT_DMA ||
  3974. qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
  3975. /* check status of DMA engine */
  3976. host_stat = ap->ops->bmdma_status(ap);
  3977. VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
  3978. /* if it's not our irq... */
  3979. if (!(host_stat & ATA_DMA_INTR))
  3980. goto idle_irq;
  3981. /* before we do anything else, clear DMA-Start bit */
  3982. ap->ops->bmdma_stop(qc);
  3983. if (unlikely(host_stat & ATA_DMA_ERR)) {
  3984. /* error when transfering data to/from memory */
  3985. qc->err_mask |= AC_ERR_HOST_BUS;
  3986. ap->hsm_task_state = HSM_ST_ERR;
  3987. }
  3988. }
  3989. break;
  3990. case HSM_ST:
  3991. break;
  3992. default:
  3993. goto idle_irq;
  3994. }
  3995. /* check altstatus */
  3996. status = ata_altstatus(ap);
  3997. if (status & ATA_BUSY)
  3998. goto idle_irq;
  3999. /* check main status, clearing INTRQ */
  4000. status = ata_chk_status(ap);
  4001. if (unlikely(status & ATA_BUSY))
  4002. goto idle_irq;
  4003. /* ack bmdma irq events */
  4004. ap->ops->irq_clear(ap);
  4005. ata_hsm_move(ap, qc, status, 0);
  4006. return 1; /* irq handled */
  4007. idle_irq:
  4008. ap->stats.idle_irq++;
  4009. #ifdef ATA_IRQ_TRAP
  4010. if ((ap->stats.idle_irq % 1000) == 0) {
  4011. ata_irq_ack(ap, 0); /* debug trap */
  4012. ata_port_printk(ap, KERN_WARNING, "irq trap\n");
  4013. return 1;
  4014. }
  4015. #endif
  4016. return 0; /* irq not handled */
  4017. }
  4018. /**
  4019. * ata_interrupt - Default ATA host interrupt handler
  4020. * @irq: irq line (unused)
  4021. * @dev_instance: pointer to our ata_host_set information structure
  4022. * @regs: unused
  4023. *
  4024. * Default interrupt handler for PCI IDE devices. Calls
  4025. * ata_host_intr() for each port that is not disabled.
  4026. *
  4027. * LOCKING:
  4028. * Obtains host_set lock during operation.
  4029. *
  4030. * RETURNS:
  4031. * IRQ_NONE or IRQ_HANDLED.
  4032. */
  4033. irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
  4034. {
  4035. struct ata_host_set *host_set = dev_instance;
  4036. unsigned int i;
  4037. unsigned int handled = 0;
  4038. unsigned long flags;
  4039. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  4040. spin_lock_irqsave(&host_set->lock, flags);
  4041. for (i = 0; i < host_set->n_ports; i++) {
  4042. struct ata_port *ap;
  4043. ap = host_set->ports[i];
  4044. if (ap &&
  4045. !(ap->flags & ATA_FLAG_DISABLED)) {
  4046. struct ata_queued_cmd *qc;
  4047. qc = ata_qc_from_tag(ap, ap->active_tag);
  4048. if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
  4049. (qc->flags & ATA_QCFLAG_ACTIVE))
  4050. handled |= ata_host_intr(ap, qc);
  4051. }
  4052. }
  4053. spin_unlock_irqrestore(&host_set->lock, flags);
  4054. return IRQ_RETVAL(handled);
  4055. }
  4056. /**
  4057. * sata_scr_valid - test whether SCRs are accessible
  4058. * @ap: ATA port to test SCR accessibility for
  4059. *
  4060. * Test whether SCRs are accessible for @ap.
  4061. *
  4062. * LOCKING:
  4063. * None.
  4064. *
  4065. * RETURNS:
  4066. * 1 if SCRs are accessible, 0 otherwise.
  4067. */
  4068. int sata_scr_valid(struct ata_port *ap)
  4069. {
  4070. return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
  4071. }
  4072. /**
  4073. * sata_scr_read - read SCR register of the specified port
  4074. * @ap: ATA port to read SCR for
  4075. * @reg: SCR to read
  4076. * @val: Place to store read value
  4077. *
  4078. * Read SCR register @reg of @ap into *@val. This function is
  4079. * guaranteed to succeed if the cable type of the port is SATA
  4080. * and the port implements ->scr_read.
  4081. *
  4082. * LOCKING:
  4083. * None.
  4084. *
  4085. * RETURNS:
  4086. * 0 on success, negative errno on failure.
  4087. */
  4088. int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
  4089. {
  4090. if (sata_scr_valid(ap)) {
  4091. *val = ap->ops->scr_read(ap, reg);
  4092. return 0;
  4093. }
  4094. return -EOPNOTSUPP;
  4095. }
  4096. /**
  4097. * sata_scr_write - write SCR register of the specified port
  4098. * @ap: ATA port to write SCR for
  4099. * @reg: SCR to write
  4100. * @val: value to write
  4101. *
  4102. * Write @val to SCR register @reg of @ap. This function is
  4103. * guaranteed to succeed if the cable type of the port is SATA
  4104. * and the port implements ->scr_read.
  4105. *
  4106. * LOCKING:
  4107. * None.
  4108. *
  4109. * RETURNS:
  4110. * 0 on success, negative errno on failure.
  4111. */
  4112. int sata_scr_write(struct ata_port *ap, int reg, u32 val)
  4113. {
  4114. if (sata_scr_valid(ap)) {
  4115. ap->ops->scr_write(ap, reg, val);
  4116. return 0;
  4117. }
  4118. return -EOPNOTSUPP;
  4119. }
  4120. /**
  4121. * sata_scr_write_flush - write SCR register of the specified port and flush
  4122. * @ap: ATA port to write SCR for
  4123. * @reg: SCR to write
  4124. * @val: value to write
  4125. *
  4126. * This function is identical to sata_scr_write() except that this
  4127. * function performs flush after writing to the register.
  4128. *
  4129. * LOCKING:
  4130. * None.
  4131. *
  4132. * RETURNS:
  4133. * 0 on success, negative errno on failure.
  4134. */
  4135. int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
  4136. {
  4137. if (sata_scr_valid(ap)) {
  4138. ap->ops->scr_write(ap, reg, val);
  4139. ap->ops->scr_read(ap, reg);
  4140. return 0;
  4141. }
  4142. return -EOPNOTSUPP;
  4143. }
  4144. /**
  4145. * ata_port_online - test whether the given port is online
  4146. * @ap: ATA port to test
  4147. *
  4148. * Test whether @ap is online. Note that this function returns 0
  4149. * if online status of @ap cannot be obtained, so
  4150. * ata_port_online(ap) != !ata_port_offline(ap).
  4151. *
  4152. * LOCKING:
  4153. * None.
  4154. *
  4155. * RETURNS:
  4156. * 1 if the port online status is available and online.
  4157. */
  4158. int ata_port_online(struct ata_port *ap)
  4159. {
  4160. u32 sstatus;
  4161. if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
  4162. return 1;
  4163. return 0;
  4164. }
  4165. /**
  4166. * ata_port_offline - test whether the given port is offline
  4167. * @ap: ATA port to test
  4168. *
  4169. * Test whether @ap is offline. Note that this function returns
  4170. * 0 if offline status of @ap cannot be obtained, so
  4171. * ata_port_online(ap) != !ata_port_offline(ap).
  4172. *
  4173. * LOCKING:
  4174. * None.
  4175. *
  4176. * RETURNS:
  4177. * 1 if the port offline status is available and offline.
  4178. */
  4179. int ata_port_offline(struct ata_port *ap)
  4180. {
  4181. u32 sstatus;
  4182. if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
  4183. return 1;
  4184. return 0;
  4185. }
  4186. /*
  4187. * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
  4188. * without filling any other registers
  4189. */
  4190. static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
  4191. {
  4192. struct ata_taskfile tf;
  4193. int err;
  4194. ata_tf_init(dev, &tf);
  4195. tf.command = cmd;
  4196. tf.flags |= ATA_TFLAG_DEVICE;
  4197. tf.protocol = ATA_PROT_NODATA;
  4198. err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  4199. if (err)
  4200. ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n",
  4201. __FUNCTION__, err);
  4202. return err;
  4203. }
  4204. static int ata_flush_cache(struct ata_device *dev)
  4205. {
  4206. u8 cmd;
  4207. if (!ata_try_flush_cache(dev))
  4208. return 0;
  4209. if (ata_id_has_flush_ext(dev->id))
  4210. cmd = ATA_CMD_FLUSH_EXT;
  4211. else
  4212. cmd = ATA_CMD_FLUSH;
  4213. return ata_do_simple_cmd(dev, cmd);
  4214. }
  4215. static int ata_standby_drive(struct ata_device *dev)
  4216. {
  4217. return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1);
  4218. }
  4219. static int ata_start_drive(struct ata_device *dev)
  4220. {
  4221. return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE);
  4222. }
  4223. /**
  4224. * ata_device_resume - wakeup a previously suspended devices
  4225. * @dev: the device to resume
  4226. *
  4227. * Kick the drive back into action, by sending it an idle immediate
  4228. * command and making sure its transfer mode matches between drive
  4229. * and host.
  4230. *
  4231. */
  4232. int ata_device_resume(struct ata_device *dev)
  4233. {
  4234. struct ata_port *ap = dev->ap;
  4235. if (ap->flags & ATA_FLAG_SUSPENDED) {
  4236. struct ata_device *failed_dev;
  4237. ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 200000);
  4238. ap->flags &= ~ATA_FLAG_SUSPENDED;
  4239. while (ata_set_mode(ap, &failed_dev))
  4240. ata_dev_disable(failed_dev);
  4241. }
  4242. if (!ata_dev_enabled(dev))
  4243. return 0;
  4244. if (dev->class == ATA_DEV_ATA)
  4245. ata_start_drive(dev);
  4246. return 0;
  4247. }
  4248. /**
  4249. * ata_device_suspend - prepare a device for suspend
  4250. * @dev: the device to suspend
  4251. * @state: target power management state
  4252. *
  4253. * Flush the cache on the drive, if appropriate, then issue a
  4254. * standbynow command.
  4255. */
  4256. int ata_device_suspend(struct ata_device *dev, pm_message_t state)
  4257. {
  4258. struct ata_port *ap = dev->ap;
  4259. if (!ata_dev_enabled(dev))
  4260. return 0;
  4261. if (dev->class == ATA_DEV_ATA)
  4262. ata_flush_cache(dev);
  4263. if (state.event != PM_EVENT_FREEZE)
  4264. ata_standby_drive(dev);
  4265. ap->flags |= ATA_FLAG_SUSPENDED;
  4266. return 0;
  4267. }
  4268. /**
  4269. * ata_port_start - Set port up for dma.
  4270. * @ap: Port to initialize
  4271. *
  4272. * Called just after data structures for each port are
  4273. * initialized. Allocates space for PRD table.
  4274. *
  4275. * May be used as the port_start() entry in ata_port_operations.
  4276. *
  4277. * LOCKING:
  4278. * Inherited from caller.
  4279. */
  4280. int ata_port_start (struct ata_port *ap)
  4281. {
  4282. struct device *dev = ap->dev;
  4283. int rc;
  4284. ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
  4285. if (!ap->prd)
  4286. return -ENOMEM;
  4287. rc = ata_pad_alloc(ap, dev);
  4288. if (rc) {
  4289. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4290. return rc;
  4291. }
  4292. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
  4293. return 0;
  4294. }
  4295. /**
  4296. * ata_port_stop - Undo ata_port_start()
  4297. * @ap: Port to shut down
  4298. *
  4299. * Frees the PRD table.
  4300. *
  4301. * May be used as the port_stop() entry in ata_port_operations.
  4302. *
  4303. * LOCKING:
  4304. * Inherited from caller.
  4305. */
  4306. void ata_port_stop (struct ata_port *ap)
  4307. {
  4308. struct device *dev = ap->dev;
  4309. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4310. ata_pad_free(ap, dev);
  4311. }
  4312. void ata_host_stop (struct ata_host_set *host_set)
  4313. {
  4314. if (host_set->mmio_base)
  4315. iounmap(host_set->mmio_base);
  4316. }
  4317. /**
  4318. * ata_host_remove - Unregister SCSI host structure with upper layers
  4319. * @ap: Port to unregister
  4320. * @do_unregister: 1 if we fully unregister, 0 to just stop the port
  4321. *
  4322. * LOCKING:
  4323. * Inherited from caller.
  4324. */
  4325. static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
  4326. {
  4327. struct Scsi_Host *sh = ap->host;
  4328. DPRINTK("ENTER\n");
  4329. if (do_unregister)
  4330. scsi_remove_host(sh);
  4331. ap->ops->port_stop(ap);
  4332. }
  4333. /**
  4334. * ata_dev_init - Initialize an ata_device structure
  4335. * @dev: Device structure to initialize
  4336. *
  4337. * Initialize @dev in preparation for probing.
  4338. *
  4339. * LOCKING:
  4340. * Inherited from caller.
  4341. */
  4342. void ata_dev_init(struct ata_device *dev)
  4343. {
  4344. struct ata_port *ap = dev->ap;
  4345. unsigned long flags;
  4346. /* SATA spd limit is bound to the first device */
  4347. ap->sata_spd_limit = ap->hw_sata_spd_limit;
  4348. /* High bits of dev->flags are used to record warm plug
  4349. * requests which occur asynchronously. Synchronize using
  4350. * host_set lock.
  4351. */
  4352. spin_lock_irqsave(&ap->host_set->lock, flags);
  4353. dev->flags &= ~ATA_DFLAG_INIT_MASK;
  4354. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4355. memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
  4356. sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
  4357. dev->pio_mask = UINT_MAX;
  4358. dev->mwdma_mask = UINT_MAX;
  4359. dev->udma_mask = UINT_MAX;
  4360. }
  4361. /**
  4362. * ata_host_init - Initialize an ata_port structure
  4363. * @ap: Structure to initialize
  4364. * @host: associated SCSI mid-layer structure
  4365. * @host_set: Collection of hosts to which @ap belongs
  4366. * @ent: Probe information provided by low-level driver
  4367. * @port_no: Port number associated with this ata_port
  4368. *
  4369. * Initialize a new ata_port structure, and its associated
  4370. * scsi_host.
  4371. *
  4372. * LOCKING:
  4373. * Inherited from caller.
  4374. */
  4375. static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
  4376. struct ata_host_set *host_set,
  4377. const struct ata_probe_ent *ent, unsigned int port_no)
  4378. {
  4379. unsigned int i;
  4380. host->max_id = 16;
  4381. host->max_lun = 1;
  4382. host->max_channel = 1;
  4383. host->unique_id = ata_unique_id++;
  4384. host->max_cmd_len = 12;
  4385. ap->flags = ATA_FLAG_DISABLED;
  4386. ap->id = host->unique_id;
  4387. ap->host = host;
  4388. ap->ctl = ATA_DEVCTL_OBS;
  4389. ap->host_set = host_set;
  4390. ap->dev = ent->dev;
  4391. ap->port_no = port_no;
  4392. ap->hard_port_no =
  4393. ent->legacy_mode ? ent->hard_port_no : port_no;
  4394. ap->pio_mask = ent->pio_mask;
  4395. ap->mwdma_mask = ent->mwdma_mask;
  4396. ap->udma_mask = ent->udma_mask;
  4397. ap->flags |= ent->host_flags;
  4398. ap->ops = ent->port_ops;
  4399. ap->hw_sata_spd_limit = UINT_MAX;
  4400. ap->active_tag = ATA_TAG_POISON;
  4401. ap->last_ctl = 0xFF;
  4402. ap->msg_enable = ATA_MSG_DRV;
  4403. INIT_WORK(&ap->port_task, NULL, NULL);
  4404. INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
  4405. INIT_LIST_HEAD(&ap->eh_done_q);
  4406. init_waitqueue_head(&ap->eh_wait_q);
  4407. /* set cable type */
  4408. ap->cbl = ATA_CBL_NONE;
  4409. if (ap->flags & ATA_FLAG_SATA)
  4410. ap->cbl = ATA_CBL_SATA;
  4411. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  4412. struct ata_device *dev = &ap->device[i];
  4413. dev->ap = ap;
  4414. dev->devno = i;
  4415. ata_dev_init(dev);
  4416. }
  4417. #ifdef ATA_IRQ_TRAP
  4418. ap->stats.unhandled_irq = 1;
  4419. ap->stats.idle_irq = 1;
  4420. #endif
  4421. memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
  4422. }
  4423. /**
  4424. * ata_host_add - Attach low-level ATA driver to system
  4425. * @ent: Information provided by low-level driver
  4426. * @host_set: Collections of ports to which we add
  4427. * @port_no: Port number associated with this host
  4428. *
  4429. * Attach low-level ATA driver to system.
  4430. *
  4431. * LOCKING:
  4432. * PCI/etc. bus probe sem.
  4433. *
  4434. * RETURNS:
  4435. * New ata_port on success, for NULL on error.
  4436. */
  4437. static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
  4438. struct ata_host_set *host_set,
  4439. unsigned int port_no)
  4440. {
  4441. struct Scsi_Host *host;
  4442. struct ata_port *ap;
  4443. int rc;
  4444. DPRINTK("ENTER\n");
  4445. if (!ent->port_ops->error_handler &&
  4446. !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
  4447. printk(KERN_ERR "ata%u: no reset mechanism available\n",
  4448. port_no);
  4449. return NULL;
  4450. }
  4451. host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
  4452. if (!host)
  4453. return NULL;
  4454. host->transportt = &ata_scsi_transport_template;
  4455. ap = ata_shost_to_port(host);
  4456. ata_host_init(ap, host, host_set, ent, port_no);
  4457. rc = ap->ops->port_start(ap);
  4458. if (rc)
  4459. goto err_out;
  4460. return ap;
  4461. err_out:
  4462. scsi_host_put(host);
  4463. return NULL;
  4464. }
  4465. /**
  4466. * ata_device_add - Register hardware device with ATA and SCSI layers
  4467. * @ent: Probe information describing hardware device to be registered
  4468. *
  4469. * This function processes the information provided in the probe
  4470. * information struct @ent, allocates the necessary ATA and SCSI
  4471. * host information structures, initializes them, and registers
  4472. * everything with requisite kernel subsystems.
  4473. *
  4474. * This function requests irqs, probes the ATA bus, and probes
  4475. * the SCSI bus.
  4476. *
  4477. * LOCKING:
  4478. * PCI/etc. bus probe sem.
  4479. *
  4480. * RETURNS:
  4481. * Number of ports registered. Zero on error (no ports registered).
  4482. */
  4483. int ata_device_add(const struct ata_probe_ent *ent)
  4484. {
  4485. unsigned int count = 0, i;
  4486. struct device *dev = ent->dev;
  4487. struct ata_host_set *host_set;
  4488. DPRINTK("ENTER\n");
  4489. /* alloc a container for our list of ATA ports (buses) */
  4490. host_set = kzalloc(sizeof(struct ata_host_set) +
  4491. (ent->n_ports * sizeof(void *)), GFP_KERNEL);
  4492. if (!host_set)
  4493. return 0;
  4494. spin_lock_init(&host_set->lock);
  4495. host_set->dev = dev;
  4496. host_set->n_ports = ent->n_ports;
  4497. host_set->irq = ent->irq;
  4498. host_set->mmio_base = ent->mmio_base;
  4499. host_set->private_data = ent->private_data;
  4500. host_set->ops = ent->port_ops;
  4501. host_set->flags = ent->host_set_flags;
  4502. /* register each port bound to this device */
  4503. for (i = 0; i < ent->n_ports; i++) {
  4504. struct ata_port *ap;
  4505. unsigned long xfer_mode_mask;
  4506. ap = ata_host_add(ent, host_set, i);
  4507. if (!ap)
  4508. goto err_out;
  4509. host_set->ports[i] = ap;
  4510. xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
  4511. (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
  4512. (ap->pio_mask << ATA_SHIFT_PIO);
  4513. /* print per-port info to dmesg */
  4514. ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
  4515. "ctl 0x%lX bmdma 0x%lX irq %lu\n",
  4516. ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
  4517. ata_mode_string(xfer_mode_mask),
  4518. ap->ioaddr.cmd_addr,
  4519. ap->ioaddr.ctl_addr,
  4520. ap->ioaddr.bmdma_addr,
  4521. ent->irq);
  4522. ata_chk_status(ap);
  4523. host_set->ops->irq_clear(ap);
  4524. ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
  4525. count++;
  4526. }
  4527. if (!count)
  4528. goto err_free_ret;
  4529. /* obtain irq, that is shared between channels */
  4530. if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
  4531. DRV_NAME, host_set))
  4532. goto err_out;
  4533. /* perform each probe synchronously */
  4534. DPRINTK("probe begin\n");
  4535. for (i = 0; i < count; i++) {
  4536. struct ata_port *ap;
  4537. u32 scontrol;
  4538. int rc;
  4539. ap = host_set->ports[i];
  4540. /* init sata_spd_limit to the current value */
  4541. if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
  4542. int spd = (scontrol >> 4) & 0xf;
  4543. ap->hw_sata_spd_limit &= (1 << spd) - 1;
  4544. }
  4545. ap->sata_spd_limit = ap->hw_sata_spd_limit;
  4546. rc = scsi_add_host(ap->host, dev);
  4547. if (rc) {
  4548. ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
  4549. /* FIXME: do something useful here */
  4550. /* FIXME: handle unconditional calls to
  4551. * scsi_scan_host and ata_host_remove, below,
  4552. * at the very least
  4553. */
  4554. }
  4555. if (ap->ops->error_handler) {
  4556. unsigned long flags;
  4557. ata_port_probe(ap);
  4558. /* kick EH for boot probing */
  4559. spin_lock_irqsave(&ap->host_set->lock, flags);
  4560. ap->eh_info.probe_mask = (1 << ATA_MAX_DEVICES) - 1;
  4561. ap->eh_info.action |= ATA_EH_SOFTRESET;
  4562. ap->flags |= ATA_FLAG_LOADING;
  4563. ata_port_schedule_eh(ap);
  4564. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4565. /* wait for EH to finish */
  4566. ata_port_wait_eh(ap);
  4567. } else {
  4568. DPRINTK("ata%u: bus probe begin\n", ap->id);
  4569. rc = ata_bus_probe(ap);
  4570. DPRINTK("ata%u: bus probe end\n", ap->id);
  4571. if (rc) {
  4572. /* FIXME: do something useful here?
  4573. * Current libata behavior will
  4574. * tear down everything when
  4575. * the module is removed
  4576. * or the h/w is unplugged.
  4577. */
  4578. }
  4579. }
  4580. }
  4581. /* probes are done, now scan each port's disk(s) */
  4582. DPRINTK("host probe begin\n");
  4583. for (i = 0; i < count; i++) {
  4584. struct ata_port *ap = host_set->ports[i];
  4585. ata_scsi_scan_host(ap);
  4586. }
  4587. dev_set_drvdata(dev, host_set);
  4588. VPRINTK("EXIT, returning %u\n", ent->n_ports);
  4589. return ent->n_ports; /* success */
  4590. err_out:
  4591. for (i = 0; i < count; i++) {
  4592. ata_host_remove(host_set->ports[i], 1);
  4593. scsi_host_put(host_set->ports[i]->host);
  4594. }
  4595. err_free_ret:
  4596. kfree(host_set);
  4597. VPRINTK("EXIT, returning 0\n");
  4598. return 0;
  4599. }
  4600. /**
  4601. * ata_port_detach - Detach ATA port in prepration of device removal
  4602. * @ap: ATA port to be detached
  4603. *
  4604. * Detach all ATA devices and the associated SCSI devices of @ap;
  4605. * then, remove the associated SCSI host. @ap is guaranteed to
  4606. * be quiescent on return from this function.
  4607. *
  4608. * LOCKING:
  4609. * Kernel thread context (may sleep).
  4610. */
  4611. void ata_port_detach(struct ata_port *ap)
  4612. {
  4613. unsigned long flags;
  4614. int i;
  4615. if (!ap->ops->error_handler)
  4616. return;
  4617. /* tell EH we're leaving & flush EH */
  4618. spin_lock_irqsave(&ap->host_set->lock, flags);
  4619. ap->flags |= ATA_FLAG_UNLOADING;
  4620. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4621. ata_port_wait_eh(ap);
  4622. /* EH is now guaranteed to see UNLOADING, so no new device
  4623. * will be attached. Disable all existing devices.
  4624. */
  4625. spin_lock_irqsave(&ap->host_set->lock, flags);
  4626. for (i = 0; i < ATA_MAX_DEVICES; i++)
  4627. ata_dev_disable(&ap->device[i]);
  4628. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4629. /* Final freeze & EH. All in-flight commands are aborted. EH
  4630. * will be skipped and retrials will be terminated with bad
  4631. * target.
  4632. */
  4633. spin_lock_irqsave(&ap->host_set->lock, flags);
  4634. ata_port_freeze(ap); /* won't be thawed */
  4635. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4636. ata_port_wait_eh(ap);
  4637. /* Flush hotplug task. The sequence is similar to
  4638. * ata_port_flush_task().
  4639. */
  4640. flush_workqueue(ata_aux_wq);
  4641. cancel_delayed_work(&ap->hotplug_task);
  4642. flush_workqueue(ata_aux_wq);
  4643. /* remove the associated SCSI host */
  4644. scsi_remove_host(ap->host);
  4645. }
  4646. /**
  4647. * ata_host_set_remove - PCI layer callback for device removal
  4648. * @host_set: ATA host set that was removed
  4649. *
  4650. * Unregister all objects associated with this host set. Free those
  4651. * objects.
  4652. *
  4653. * LOCKING:
  4654. * Inherited from calling layer (may sleep).
  4655. */
  4656. void ata_host_set_remove(struct ata_host_set *host_set)
  4657. {
  4658. unsigned int i;
  4659. for (i = 0; i < host_set->n_ports; i++)
  4660. ata_port_detach(host_set->ports[i]);
  4661. free_irq(host_set->irq, host_set);
  4662. for (i = 0; i < host_set->n_ports; i++) {
  4663. struct ata_port *ap = host_set->ports[i];
  4664. ata_scsi_release(ap->host);
  4665. if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
  4666. struct ata_ioports *ioaddr = &ap->ioaddr;
  4667. if (ioaddr->cmd_addr == 0x1f0)
  4668. release_region(0x1f0, 8);
  4669. else if (ioaddr->cmd_addr == 0x170)
  4670. release_region(0x170, 8);
  4671. }
  4672. scsi_host_put(ap->host);
  4673. }
  4674. if (host_set->ops->host_stop)
  4675. host_set->ops->host_stop(host_set);
  4676. kfree(host_set);
  4677. }
  4678. /**
  4679. * ata_scsi_release - SCSI layer callback hook for host unload
  4680. * @host: libata host to be unloaded
  4681. *
  4682. * Performs all duties necessary to shut down a libata port...
  4683. * Kill port kthread, disable port, and release resources.
  4684. *
  4685. * LOCKING:
  4686. * Inherited from SCSI layer.
  4687. *
  4688. * RETURNS:
  4689. * One.
  4690. */
  4691. int ata_scsi_release(struct Scsi_Host *host)
  4692. {
  4693. struct ata_port *ap = ata_shost_to_port(host);
  4694. DPRINTK("ENTER\n");
  4695. ap->ops->port_disable(ap);
  4696. ata_host_remove(ap, 0);
  4697. DPRINTK("EXIT\n");
  4698. return 1;
  4699. }
  4700. /**
  4701. * ata_std_ports - initialize ioaddr with standard port offsets.
  4702. * @ioaddr: IO address structure to be initialized
  4703. *
  4704. * Utility function which initializes data_addr, error_addr,
  4705. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  4706. * device_addr, status_addr, and command_addr to standard offsets
  4707. * relative to cmd_addr.
  4708. *
  4709. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  4710. */
  4711. void ata_std_ports(struct ata_ioports *ioaddr)
  4712. {
  4713. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  4714. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  4715. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  4716. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  4717. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  4718. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  4719. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  4720. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  4721. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  4722. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  4723. }
  4724. #ifdef CONFIG_PCI
  4725. void ata_pci_host_stop (struct ata_host_set *host_set)
  4726. {
  4727. struct pci_dev *pdev = to_pci_dev(host_set->dev);
  4728. pci_iounmap(pdev, host_set->mmio_base);
  4729. }
  4730. /**
  4731. * ata_pci_remove_one - PCI layer callback for device removal
  4732. * @pdev: PCI device that was removed
  4733. *
  4734. * PCI layer indicates to libata via this hook that
  4735. * hot-unplug or module unload event has occurred.
  4736. * Handle this by unregistering all objects associated
  4737. * with this PCI device. Free those objects. Then finally
  4738. * release PCI resources and disable device.
  4739. *
  4740. * LOCKING:
  4741. * Inherited from PCI layer (may sleep).
  4742. */
  4743. void ata_pci_remove_one (struct pci_dev *pdev)
  4744. {
  4745. struct device *dev = pci_dev_to_dev(pdev);
  4746. struct ata_host_set *host_set = dev_get_drvdata(dev);
  4747. ata_host_set_remove(host_set);
  4748. pci_release_regions(pdev);
  4749. pci_disable_device(pdev);
  4750. dev_set_drvdata(dev, NULL);
  4751. }
  4752. /* move to PCI subsystem */
  4753. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  4754. {
  4755. unsigned long tmp = 0;
  4756. switch (bits->width) {
  4757. case 1: {
  4758. u8 tmp8 = 0;
  4759. pci_read_config_byte(pdev, bits->reg, &tmp8);
  4760. tmp = tmp8;
  4761. break;
  4762. }
  4763. case 2: {
  4764. u16 tmp16 = 0;
  4765. pci_read_config_word(pdev, bits->reg, &tmp16);
  4766. tmp = tmp16;
  4767. break;
  4768. }
  4769. case 4: {
  4770. u32 tmp32 = 0;
  4771. pci_read_config_dword(pdev, bits->reg, &tmp32);
  4772. tmp = tmp32;
  4773. break;
  4774. }
  4775. default:
  4776. return -EINVAL;
  4777. }
  4778. tmp &= bits->mask;
  4779. return (tmp == bits->val) ? 1 : 0;
  4780. }
  4781. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
  4782. {
  4783. pci_save_state(pdev);
  4784. pci_disable_device(pdev);
  4785. pci_set_power_state(pdev, PCI_D3hot);
  4786. return 0;
  4787. }
  4788. int ata_pci_device_resume(struct pci_dev *pdev)
  4789. {
  4790. pci_set_power_state(pdev, PCI_D0);
  4791. pci_restore_state(pdev);
  4792. pci_enable_device(pdev);
  4793. pci_set_master(pdev);
  4794. return 0;
  4795. }
  4796. #endif /* CONFIG_PCI */
  4797. static int __init ata_init(void)
  4798. {
  4799. ata_wq = create_workqueue("ata");
  4800. if (!ata_wq)
  4801. return -ENOMEM;
  4802. ata_aux_wq = create_singlethread_workqueue("ata_aux");
  4803. if (!ata_aux_wq) {
  4804. destroy_workqueue(ata_wq);
  4805. return -ENOMEM;
  4806. }
  4807. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  4808. return 0;
  4809. }
  4810. static void __exit ata_exit(void)
  4811. {
  4812. destroy_workqueue(ata_wq);
  4813. destroy_workqueue(ata_aux_wq);
  4814. }
  4815. module_init(ata_init);
  4816. module_exit(ata_exit);
  4817. static unsigned long ratelimit_time;
  4818. static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
  4819. int ata_ratelimit(void)
  4820. {
  4821. int rc;
  4822. unsigned long flags;
  4823. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  4824. if (time_after(jiffies, ratelimit_time)) {
  4825. rc = 1;
  4826. ratelimit_time = jiffies + (HZ/5);
  4827. } else
  4828. rc = 0;
  4829. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  4830. return rc;
  4831. }
  4832. /**
  4833. * ata_wait_register - wait until register value changes
  4834. * @reg: IO-mapped register
  4835. * @mask: Mask to apply to read register value
  4836. * @val: Wait condition
  4837. * @interval_msec: polling interval in milliseconds
  4838. * @timeout_msec: timeout in milliseconds
  4839. *
  4840. * Waiting for some bits of register to change is a common
  4841. * operation for ATA controllers. This function reads 32bit LE
  4842. * IO-mapped register @reg and tests for the following condition.
  4843. *
  4844. * (*@reg & mask) != val
  4845. *
  4846. * If the condition is met, it returns; otherwise, the process is
  4847. * repeated after @interval_msec until timeout.
  4848. *
  4849. * LOCKING:
  4850. * Kernel thread context (may sleep)
  4851. *
  4852. * RETURNS:
  4853. * The final register value.
  4854. */
  4855. u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
  4856. unsigned long interval_msec,
  4857. unsigned long timeout_msec)
  4858. {
  4859. unsigned long timeout;
  4860. u32 tmp;
  4861. tmp = ioread32(reg);
  4862. /* Calculate timeout _after_ the first read to make sure
  4863. * preceding writes reach the controller before starting to
  4864. * eat away the timeout.
  4865. */
  4866. timeout = jiffies + (timeout_msec * HZ) / 1000;
  4867. while ((tmp & mask) == val && time_before(jiffies, timeout)) {
  4868. msleep(interval_msec);
  4869. tmp = ioread32(reg);
  4870. }
  4871. return tmp;
  4872. }
  4873. /*
  4874. * libata is essentially a library of internal helper functions for
  4875. * low-level ATA host controller drivers. As such, the API/ABI is
  4876. * likely to change as new drivers are added and updated.
  4877. * Do not depend on ABI/API stability.
  4878. */
  4879. EXPORT_SYMBOL_GPL(sata_deb_timing_boot);
  4880. EXPORT_SYMBOL_GPL(sata_deb_timing_eh);
  4881. EXPORT_SYMBOL_GPL(sata_deb_timing_before_fsrst);
  4882. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  4883. EXPORT_SYMBOL_GPL(ata_std_ports);
  4884. EXPORT_SYMBOL_GPL(ata_device_add);
  4885. EXPORT_SYMBOL_GPL(ata_port_detach);
  4886. EXPORT_SYMBOL_GPL(ata_host_set_remove);
  4887. EXPORT_SYMBOL_GPL(ata_sg_init);
  4888. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  4889. EXPORT_SYMBOL_GPL(ata_hsm_move);
  4890. EXPORT_SYMBOL_GPL(ata_qc_complete);
  4891. EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
  4892. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  4893. EXPORT_SYMBOL_GPL(ata_tf_load);
  4894. EXPORT_SYMBOL_GPL(ata_tf_read);
  4895. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  4896. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  4897. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  4898. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  4899. EXPORT_SYMBOL_GPL(ata_check_status);
  4900. EXPORT_SYMBOL_GPL(ata_altstatus);
  4901. EXPORT_SYMBOL_GPL(ata_exec_command);
  4902. EXPORT_SYMBOL_GPL(ata_port_start);
  4903. EXPORT_SYMBOL_GPL(ata_port_stop);
  4904. EXPORT_SYMBOL_GPL(ata_host_stop);
  4905. EXPORT_SYMBOL_GPL(ata_interrupt);
  4906. EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
  4907. EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
  4908. EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
  4909. EXPORT_SYMBOL_GPL(ata_qc_prep);
  4910. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  4911. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  4912. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  4913. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  4914. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  4915. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  4916. EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
  4917. EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
  4918. EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
  4919. EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
  4920. EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
  4921. EXPORT_SYMBOL_GPL(ata_port_probe);
  4922. EXPORT_SYMBOL_GPL(sata_set_spd);
  4923. EXPORT_SYMBOL_GPL(sata_phy_debounce);
  4924. EXPORT_SYMBOL_GPL(sata_phy_resume);
  4925. EXPORT_SYMBOL_GPL(sata_phy_reset);
  4926. EXPORT_SYMBOL_GPL(__sata_phy_reset);
  4927. EXPORT_SYMBOL_GPL(ata_bus_reset);
  4928. EXPORT_SYMBOL_GPL(ata_std_prereset);
  4929. EXPORT_SYMBOL_GPL(ata_std_softreset);
  4930. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  4931. EXPORT_SYMBOL_GPL(ata_std_postreset);
  4932. EXPORT_SYMBOL_GPL(ata_dev_revalidate);
  4933. EXPORT_SYMBOL_GPL(ata_dev_classify);
  4934. EXPORT_SYMBOL_GPL(ata_dev_pair);
  4935. EXPORT_SYMBOL_GPL(ata_port_disable);
  4936. EXPORT_SYMBOL_GPL(ata_ratelimit);
  4937. EXPORT_SYMBOL_GPL(ata_wait_register);
  4938. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  4939. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  4940. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  4941. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  4942. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  4943. EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
  4944. EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
  4945. EXPORT_SYMBOL_GPL(ata_scsi_release);
  4946. EXPORT_SYMBOL_GPL(ata_host_intr);
  4947. EXPORT_SYMBOL_GPL(sata_scr_valid);
  4948. EXPORT_SYMBOL_GPL(sata_scr_read);
  4949. EXPORT_SYMBOL_GPL(sata_scr_write);
  4950. EXPORT_SYMBOL_GPL(sata_scr_write_flush);
  4951. EXPORT_SYMBOL_GPL(ata_port_online);
  4952. EXPORT_SYMBOL_GPL(ata_port_offline);
  4953. EXPORT_SYMBOL_GPL(ata_id_string);
  4954. EXPORT_SYMBOL_GPL(ata_id_c_string);
  4955. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  4956. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  4957. EXPORT_SYMBOL_GPL(ata_timing_compute);
  4958. EXPORT_SYMBOL_GPL(ata_timing_merge);
  4959. #ifdef CONFIG_PCI
  4960. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  4961. EXPORT_SYMBOL_GPL(ata_pci_host_stop);
  4962. EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
  4963. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  4964. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  4965. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  4966. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  4967. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  4968. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  4969. #endif /* CONFIG_PCI */
  4970. EXPORT_SYMBOL_GPL(ata_device_suspend);
  4971. EXPORT_SYMBOL_GPL(ata_device_resume);
  4972. EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
  4973. EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
  4974. EXPORT_SYMBOL_GPL(ata_eng_timeout);
  4975. EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
  4976. EXPORT_SYMBOL_GPL(ata_port_abort);
  4977. EXPORT_SYMBOL_GPL(ata_port_freeze);
  4978. EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
  4979. EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
  4980. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  4981. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
  4982. EXPORT_SYMBOL_GPL(ata_do_eh);