sh_mobile_meram.c 18 KB

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  1. /*
  2. * SuperH Mobile MERAM Driver for SuperH Mobile LCDC Driver
  3. *
  4. * Copyright (c) 2011 Damian Hobson-Garcia <dhobsong@igel.co.jp>
  5. * Takanari Hayama <taki@igel.co.jp>
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/device.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/io.h>
  16. #include <linux/slab.h>
  17. #include <linux/platform_device.h>
  18. #include "sh_mobile_meram.h"
  19. /* meram registers */
  20. #define MEVCR1 0x4
  21. #define MEVCR1_RST (1 << 31)
  22. #define MEVCR1_WD (1 << 30)
  23. #define MEVCR1_AMD1 (1 << 29)
  24. #define MEVCR1_AMD0 (1 << 28)
  25. #define MEQSEL1 0x40
  26. #define MEQSEL2 0x44
  27. #define MExxCTL 0x400
  28. #define MExxCTL_BV (1 << 31)
  29. #define MExxCTL_BSZ_SHIFT 28
  30. #define MExxCTL_MSAR_MASK (0x7ff << MExxCTL_MSAR_SHIFT)
  31. #define MExxCTL_MSAR_SHIFT 16
  32. #define MExxCTL_NXT_MASK (0x1f << MExxCTL_NXT_SHIFT)
  33. #define MExxCTL_NXT_SHIFT 11
  34. #define MExxCTL_WD1 (1 << 10)
  35. #define MExxCTL_WD0 (1 << 9)
  36. #define MExxCTL_WS (1 << 8)
  37. #define MExxCTL_CB (1 << 7)
  38. #define MExxCTL_WBF (1 << 6)
  39. #define MExxCTL_WF (1 << 5)
  40. #define MExxCTL_RF (1 << 4)
  41. #define MExxCTL_CM (1 << 3)
  42. #define MExxCTL_MD_READ (1 << 0)
  43. #define MExxCTL_MD_WRITE (2 << 0)
  44. #define MExxCTL_MD_ICB_WB (3 << 0)
  45. #define MExxCTL_MD_ICB (4 << 0)
  46. #define MExxCTL_MD_FB (7 << 0)
  47. #define MExxCTL_MD_MASK (7 << 0)
  48. #define MExxBSIZE 0x404
  49. #define MExxBSIZE_RCNT_SHIFT 28
  50. #define MExxBSIZE_YSZM1_SHIFT 16
  51. #define MExxBSIZE_XSZM1_SHIFT 0
  52. #define MExxMNCF 0x408
  53. #define MExxMNCF_KWBNM_SHIFT 28
  54. #define MExxMNCF_KRBNM_SHIFT 24
  55. #define MExxMNCF_BNM_SHIFT 16
  56. #define MExxMNCF_XBV (1 << 15)
  57. #define MExxMNCF_CPL_YCBCR444 (1 << 12)
  58. #define MExxMNCF_CPL_YCBCR420 (2 << 12)
  59. #define MExxMNCF_CPL_YCBCR422 (3 << 12)
  60. #define MExxMNCF_CPL_MSK (3 << 12)
  61. #define MExxMNCF_BL (1 << 2)
  62. #define MExxMNCF_LNM_SHIFT 0
  63. #define MExxSARA 0x410
  64. #define MExxSARB 0x414
  65. #define MExxSBSIZE 0x418
  66. #define MExxSBSIZE_HDV (1 << 31)
  67. #define MExxSBSIZE_HSZ16 (0 << 28)
  68. #define MExxSBSIZE_HSZ32 (1 << 28)
  69. #define MExxSBSIZE_HSZ64 (2 << 28)
  70. #define MExxSBSIZE_HSZ128 (3 << 28)
  71. #define MExxSBSIZE_SBSIZZ_SHIFT 0
  72. #define MERAM_MExxCTL_VAL(next, addr) \
  73. ((((next) << MExxCTL_NXT_SHIFT) & MExxCTL_NXT_MASK) | \
  74. (((addr) << MExxCTL_MSAR_SHIFT) & MExxCTL_MSAR_MASK))
  75. #define MERAM_MExxBSIZE_VAL(rcnt, yszm1, xszm1) \
  76. (((rcnt) << MExxBSIZE_RCNT_SHIFT) | \
  77. ((yszm1) << MExxBSIZE_YSZM1_SHIFT) | \
  78. ((xszm1) << MExxBSIZE_XSZM1_SHIFT))
  79. static unsigned long common_regs[] = {
  80. MEVCR1,
  81. MEQSEL1,
  82. MEQSEL2,
  83. };
  84. #define CMN_REGS_SIZE ARRAY_SIZE(common_regs)
  85. static unsigned long icb_regs[] = {
  86. MExxCTL,
  87. MExxBSIZE,
  88. MExxMNCF,
  89. MExxSARA,
  90. MExxSARB,
  91. MExxSBSIZE,
  92. };
  93. #define ICB_REGS_SIZE ARRAY_SIZE(icb_regs)
  94. struct sh_mobile_meram_priv {
  95. void __iomem *base;
  96. struct mutex lock;
  97. unsigned long used_icb;
  98. int used_meram_cache_regions;
  99. unsigned long used_meram_cache[SH_MOBILE_MERAM_ICB_NUM];
  100. unsigned long cmn_saved_regs[CMN_REGS_SIZE];
  101. unsigned long icb_saved_regs[ICB_REGS_SIZE * SH_MOBILE_MERAM_ICB_NUM];
  102. };
  103. /* settings */
  104. #define MERAM_SEC_LINE 15
  105. #define MERAM_LINE_WIDTH 2048
  106. /*
  107. * MERAM/ICB access functions
  108. */
  109. #define MERAM_ICB_OFFSET(base, idx, off) ((base) + (off) + (idx) * 0x20)
  110. static inline void meram_write_icb(void __iomem *base, int idx, int off,
  111. unsigned long val)
  112. {
  113. iowrite32(val, MERAM_ICB_OFFSET(base, idx, off));
  114. }
  115. static inline unsigned long meram_read_icb(void __iomem *base, int idx, int off)
  116. {
  117. return ioread32(MERAM_ICB_OFFSET(base, idx, off));
  118. }
  119. static inline void meram_write_reg(void __iomem *base, int off,
  120. unsigned long val)
  121. {
  122. iowrite32(val, base + off);
  123. }
  124. static inline unsigned long meram_read_reg(void __iomem *base, int off)
  125. {
  126. return ioread32(base + off);
  127. }
  128. /*
  129. * register ICB
  130. */
  131. #define MERAM_CACHE_START(p) ((p) >> 16)
  132. #define MERAM_CACHE_END(p) ((p) & 0xffff)
  133. #define MERAM_CACHE_SET(o, s) ((((o) & 0xffff) << 16) | \
  134. (((o) + (s) - 1) & 0xffff))
  135. /*
  136. * check if there's no overlaps in MERAM allocation.
  137. */
  138. static inline int meram_check_overlap(struct sh_mobile_meram_priv *priv,
  139. struct sh_mobile_meram_icb *new)
  140. {
  141. int i;
  142. int used_start, used_end, meram_start, meram_end;
  143. /* valid ICB? */
  144. if (new->marker_icb & ~0x1f || new->cache_icb & ~0x1f)
  145. return 1;
  146. if (test_bit(new->marker_icb, &priv->used_icb) ||
  147. test_bit(new->cache_icb, &priv->used_icb))
  148. return 1;
  149. for (i = 0; i < priv->used_meram_cache_regions; i++) {
  150. used_start = MERAM_CACHE_START(priv->used_meram_cache[i]);
  151. used_end = MERAM_CACHE_END(priv->used_meram_cache[i]);
  152. meram_start = new->meram_offset;
  153. meram_end = new->meram_offset + new->meram_size;
  154. if ((meram_start >= used_start && meram_start < used_end) ||
  155. (meram_end > used_start && meram_end < used_end))
  156. return 1;
  157. }
  158. return 0;
  159. }
  160. /*
  161. * mark the specified ICB as used
  162. */
  163. static inline void meram_mark(struct sh_mobile_meram_priv *priv,
  164. struct sh_mobile_meram_icb *new)
  165. {
  166. int n;
  167. if (new->marker_icb < 0 || new->cache_icb < 0)
  168. return;
  169. __set_bit(new->marker_icb, &priv->used_icb);
  170. __set_bit(new->cache_icb, &priv->used_icb);
  171. n = priv->used_meram_cache_regions;
  172. priv->used_meram_cache[n] = MERAM_CACHE_SET(new->meram_offset,
  173. new->meram_size);
  174. priv->used_meram_cache_regions++;
  175. }
  176. /*
  177. * unmark the specified ICB as used
  178. */
  179. static inline void meram_unmark(struct sh_mobile_meram_priv *priv,
  180. struct sh_mobile_meram_icb *icb)
  181. {
  182. int i;
  183. unsigned long pattern;
  184. if (icb->marker_icb < 0 || icb->cache_icb < 0)
  185. return;
  186. __clear_bit(icb->marker_icb, &priv->used_icb);
  187. __clear_bit(icb->cache_icb, &priv->used_icb);
  188. pattern = MERAM_CACHE_SET(icb->meram_offset, icb->meram_size);
  189. for (i = 0; i < priv->used_meram_cache_regions; i++) {
  190. if (priv->used_meram_cache[i] == pattern) {
  191. while (i < priv->used_meram_cache_regions - 1) {
  192. priv->used_meram_cache[i] =
  193. priv->used_meram_cache[i + 1] ;
  194. i++;
  195. }
  196. priv->used_meram_cache[i] = 0;
  197. priv->used_meram_cache_regions--;
  198. break;
  199. }
  200. }
  201. }
  202. /*
  203. * is this a YCbCr(NV12, NV16 or NV24) colorspace
  204. */
  205. static inline int is_nvcolor(int cspace)
  206. {
  207. if (cspace == SH_MOBILE_MERAM_PF_NV ||
  208. cspace == SH_MOBILE_MERAM_PF_NV24)
  209. return 1;
  210. return 0;
  211. }
  212. /*
  213. * set the next address to fetch
  214. */
  215. static inline void meram_set_next_addr(struct sh_mobile_meram_priv *priv,
  216. struct sh_mobile_meram_cfg *cfg,
  217. unsigned long base_addr_y,
  218. unsigned long base_addr_c)
  219. {
  220. unsigned long target;
  221. target = (cfg->current_reg) ? MExxSARA : MExxSARB;
  222. cfg->current_reg ^= 1;
  223. /* set the next address to fetch */
  224. meram_write_icb(priv->base, cfg->icb[0].cache_icb, target,
  225. base_addr_y);
  226. meram_write_icb(priv->base, cfg->icb[0].marker_icb, target,
  227. base_addr_y + cfg->icb[0].cache_unit);
  228. if (is_nvcolor(cfg->pixelformat)) {
  229. meram_write_icb(priv->base, cfg->icb[1].cache_icb, target,
  230. base_addr_c);
  231. meram_write_icb(priv->base, cfg->icb[1].marker_icb, target,
  232. base_addr_c + cfg->icb[1].cache_unit);
  233. }
  234. }
  235. /*
  236. * get the next ICB address
  237. */
  238. static inline void meram_get_next_icb_addr(struct sh_mobile_meram_info *pdata,
  239. struct sh_mobile_meram_cfg *cfg,
  240. unsigned long *icb_addr_y,
  241. unsigned long *icb_addr_c)
  242. {
  243. unsigned long icb_offset;
  244. if (pdata->addr_mode == SH_MOBILE_MERAM_MODE0)
  245. icb_offset = 0x80000000 | (cfg->current_reg << 29);
  246. else
  247. icb_offset = 0xc0000000 | (cfg->current_reg << 23);
  248. *icb_addr_y = icb_offset | (cfg->icb[0].marker_icb << 24);
  249. if (is_nvcolor(cfg->pixelformat))
  250. *icb_addr_c = icb_offset | (cfg->icb[1].marker_icb << 24);
  251. }
  252. #define MERAM_CALC_BYTECOUNT(x, y) \
  253. (((x) * (y) + (MERAM_LINE_WIDTH - 1)) & ~(MERAM_LINE_WIDTH - 1))
  254. /*
  255. * initialize MERAM
  256. */
  257. static int meram_init(struct sh_mobile_meram_priv *priv,
  258. struct sh_mobile_meram_icb *icb,
  259. int xres, int yres, int *out_pitch)
  260. {
  261. unsigned long total_byte_count = MERAM_CALC_BYTECOUNT(xres, yres);
  262. unsigned long bnm;
  263. int lcdc_pitch, xpitch, line_cnt;
  264. int save_lines;
  265. /* adjust pitch to 1024, 2048, 4096 or 8192 */
  266. lcdc_pitch = (xres - 1) | 1023;
  267. lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 1);
  268. lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 2);
  269. lcdc_pitch += 1;
  270. /* derive settings */
  271. if (lcdc_pitch == 8192 && yres >= 1024) {
  272. lcdc_pitch = xpitch = MERAM_LINE_WIDTH;
  273. line_cnt = total_byte_count >> 11;
  274. *out_pitch = xres;
  275. save_lines = (icb->meram_size / 16 / MERAM_SEC_LINE);
  276. save_lines *= MERAM_SEC_LINE;
  277. } else {
  278. xpitch = xres;
  279. line_cnt = yres;
  280. *out_pitch = lcdc_pitch;
  281. save_lines = icb->meram_size / (lcdc_pitch >> 10) / 2;
  282. save_lines &= 0xff;
  283. }
  284. bnm = (save_lines - 1) << 16;
  285. /* TODO: we better to check if we have enough MERAM buffer size */
  286. /* set up ICB */
  287. meram_write_icb(priv->base, icb->cache_icb, MExxBSIZE,
  288. MERAM_MExxBSIZE_VAL(0x0, line_cnt - 1, xpitch - 1));
  289. meram_write_icb(priv->base, icb->marker_icb, MExxBSIZE,
  290. MERAM_MExxBSIZE_VAL(0xf, line_cnt - 1, xpitch - 1));
  291. meram_write_icb(priv->base, icb->cache_icb, MExxMNCF, bnm);
  292. meram_write_icb(priv->base, icb->marker_icb, MExxMNCF, bnm);
  293. meram_write_icb(priv->base, icb->cache_icb, MExxSBSIZE, xpitch);
  294. meram_write_icb(priv->base, icb->marker_icb, MExxSBSIZE, xpitch);
  295. /* save a cache unit size */
  296. icb->cache_unit = xres * save_lines;
  297. /*
  298. * Set MERAM for framebuffer
  299. *
  300. * we also chain the cache_icb and the marker_icb.
  301. * we also split the allocated MERAM buffer between two ICBs.
  302. */
  303. meram_write_icb(priv->base, icb->cache_icb, MExxCTL,
  304. MERAM_MExxCTL_VAL(icb->marker_icb, icb->meram_offset) |
  305. MExxCTL_WD1 | MExxCTL_WD0 | MExxCTL_WS | MExxCTL_CM |
  306. MExxCTL_MD_FB);
  307. meram_write_icb(priv->base, icb->marker_icb, MExxCTL,
  308. MERAM_MExxCTL_VAL(icb->cache_icb, icb->meram_offset +
  309. icb->meram_size / 2) |
  310. MExxCTL_WD1 | MExxCTL_WD0 | MExxCTL_WS | MExxCTL_CM |
  311. MExxCTL_MD_FB);
  312. return 0;
  313. }
  314. static void meram_deinit(struct sh_mobile_meram_priv *priv,
  315. struct sh_mobile_meram_icb *icb)
  316. {
  317. /* disable ICB */
  318. meram_write_icb(priv->base, icb->cache_icb, MExxCTL, 0);
  319. meram_write_icb(priv->base, icb->marker_icb, MExxCTL, 0);
  320. icb->cache_unit = 0;
  321. }
  322. /*
  323. * register the ICB
  324. */
  325. static int sh_mobile_meram_register(struct sh_mobile_meram_info *pdata,
  326. struct sh_mobile_meram_cfg *cfg,
  327. int xres, int yres, int pixelformat,
  328. unsigned long base_addr_y,
  329. unsigned long base_addr_c,
  330. unsigned long *icb_addr_y,
  331. unsigned long *icb_addr_c,
  332. int *pitch)
  333. {
  334. struct platform_device *pdev;
  335. struct sh_mobile_meram_priv *priv;
  336. int n, out_pitch;
  337. int error = 0;
  338. if (!pdata || !pdata->priv || !pdata->pdev || !cfg)
  339. return -EINVAL;
  340. if (pixelformat != SH_MOBILE_MERAM_PF_NV &&
  341. pixelformat != SH_MOBILE_MERAM_PF_NV24 &&
  342. pixelformat != SH_MOBILE_MERAM_PF_RGB)
  343. return -EINVAL;
  344. priv = pdata->priv;
  345. pdev = pdata->pdev;
  346. dev_dbg(&pdev->dev, "registering %dx%d (%s) (y=%08lx, c=%08lx)",
  347. xres, yres, (!pixelformat) ? "yuv" : "rgb",
  348. base_addr_y, base_addr_c);
  349. /* we can't handle wider than 8192px */
  350. if (xres > 8192) {
  351. dev_err(&pdev->dev, "width exceeding the limit (> 8192).");
  352. return -EINVAL;
  353. }
  354. /* do we have at least one ICB config? */
  355. if (cfg->icb[0].marker_icb < 0 || cfg->icb[0].cache_icb < 0) {
  356. dev_err(&pdev->dev, "at least one ICB is required.");
  357. return -EINVAL;
  358. }
  359. mutex_lock(&priv->lock);
  360. if (priv->used_meram_cache_regions + 2 > SH_MOBILE_MERAM_ICB_NUM) {
  361. dev_err(&pdev->dev, "no more ICB available.");
  362. error = -EINVAL;
  363. goto err;
  364. }
  365. /* make sure that there's no overlaps */
  366. if (meram_check_overlap(priv, &cfg->icb[0])) {
  367. dev_err(&pdev->dev, "conflicting config detected.");
  368. error = -EINVAL;
  369. goto err;
  370. }
  371. n = 1;
  372. /* do the same if we have the second ICB set */
  373. if (cfg->icb[1].marker_icb >= 0 && cfg->icb[1].cache_icb >= 0) {
  374. if (meram_check_overlap(priv, &cfg->icb[1])) {
  375. dev_err(&pdev->dev, "conflicting config detected.");
  376. error = -EINVAL;
  377. goto err;
  378. }
  379. n = 2;
  380. }
  381. if (is_nvcolor(pixelformat) && n != 2) {
  382. dev_err(&pdev->dev, "requires two ICB sets for planar Y/C.");
  383. error = -EINVAL;
  384. goto err;
  385. }
  386. /* we now register the ICB */
  387. cfg->pixelformat = pixelformat;
  388. meram_mark(priv, &cfg->icb[0]);
  389. if (is_nvcolor(pixelformat))
  390. meram_mark(priv, &cfg->icb[1]);
  391. /* initialize MERAM */
  392. meram_init(priv, &cfg->icb[0], xres, yres, &out_pitch);
  393. *pitch = out_pitch;
  394. if (pixelformat == SH_MOBILE_MERAM_PF_NV)
  395. meram_init(priv, &cfg->icb[1], xres, (yres + 1) / 2,
  396. &out_pitch);
  397. else if (pixelformat == SH_MOBILE_MERAM_PF_NV24)
  398. meram_init(priv, &cfg->icb[1], 2 * xres, (yres + 1) / 2,
  399. &out_pitch);
  400. cfg->current_reg = 1;
  401. meram_set_next_addr(priv, cfg, base_addr_y, base_addr_c);
  402. meram_get_next_icb_addr(pdata, cfg, icb_addr_y, icb_addr_c);
  403. dev_dbg(&pdev->dev, "registered - can access via y=%08lx, c=%08lx",
  404. *icb_addr_y, *icb_addr_c);
  405. err:
  406. mutex_unlock(&priv->lock);
  407. return error;
  408. }
  409. static int sh_mobile_meram_unregister(struct sh_mobile_meram_info *pdata,
  410. struct sh_mobile_meram_cfg *cfg)
  411. {
  412. struct sh_mobile_meram_priv *priv;
  413. if (!pdata || !pdata->priv || !cfg)
  414. return -EINVAL;
  415. priv = pdata->priv;
  416. mutex_lock(&priv->lock);
  417. /* deinit & unmark */
  418. if (is_nvcolor(cfg->pixelformat)) {
  419. meram_deinit(priv, &cfg->icb[1]);
  420. meram_unmark(priv, &cfg->icb[1]);
  421. }
  422. meram_deinit(priv, &cfg->icb[0]);
  423. meram_unmark(priv, &cfg->icb[0]);
  424. mutex_unlock(&priv->lock);
  425. return 0;
  426. }
  427. static int sh_mobile_meram_update(struct sh_mobile_meram_info *pdata,
  428. struct sh_mobile_meram_cfg *cfg,
  429. unsigned long base_addr_y,
  430. unsigned long base_addr_c,
  431. unsigned long *icb_addr_y,
  432. unsigned long *icb_addr_c)
  433. {
  434. struct sh_mobile_meram_priv *priv;
  435. if (!pdata || !pdata->priv || !cfg)
  436. return -EINVAL;
  437. priv = pdata->priv;
  438. mutex_lock(&priv->lock);
  439. meram_set_next_addr(priv, cfg, base_addr_y, base_addr_c);
  440. meram_get_next_icb_addr(pdata, cfg, icb_addr_y, icb_addr_c);
  441. mutex_unlock(&priv->lock);
  442. return 0;
  443. }
  444. static int sh_mobile_meram_runtime_suspend(struct device *dev)
  445. {
  446. struct platform_device *pdev = to_platform_device(dev);
  447. struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
  448. int k, j;
  449. for (k = 0; k < CMN_REGS_SIZE; k++)
  450. priv->cmn_saved_regs[k] = meram_read_reg(priv->base,
  451. common_regs[k]);
  452. for (j = 0; j < 32; j++) {
  453. if (!test_bit(j, &priv->used_icb))
  454. continue;
  455. for (k = 0; k < ICB_REGS_SIZE; k++) {
  456. priv->icb_saved_regs[j * ICB_REGS_SIZE + k] =
  457. meram_read_icb(priv->base, j, icb_regs[k]);
  458. /* Reset ICB on resume */
  459. if (icb_regs[k] == MExxCTL)
  460. priv->icb_saved_regs[j * ICB_REGS_SIZE + k] |=
  461. MExxCTL_WBF | MExxCTL_WF | MExxCTL_RF;
  462. }
  463. }
  464. return 0;
  465. }
  466. static int sh_mobile_meram_runtime_resume(struct device *dev)
  467. {
  468. struct platform_device *pdev = to_platform_device(dev);
  469. struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
  470. int k, j;
  471. for (j = 0; j < 32; j++) {
  472. if (!test_bit(j, &priv->used_icb))
  473. continue;
  474. for (k = 0; k < ICB_REGS_SIZE; k++) {
  475. meram_write_icb(priv->base, j, icb_regs[k],
  476. priv->icb_saved_regs[j * ICB_REGS_SIZE + k]);
  477. }
  478. }
  479. for (k = 0; k < CMN_REGS_SIZE; k++)
  480. meram_write_reg(priv->base, common_regs[k],
  481. priv->cmn_saved_regs[k]);
  482. return 0;
  483. }
  484. static const struct dev_pm_ops sh_mobile_meram_dev_pm_ops = {
  485. .runtime_suspend = sh_mobile_meram_runtime_suspend,
  486. .runtime_resume = sh_mobile_meram_runtime_resume,
  487. };
  488. static struct sh_mobile_meram_ops sh_mobile_meram_ops = {
  489. .module = THIS_MODULE,
  490. .meram_register = sh_mobile_meram_register,
  491. .meram_unregister = sh_mobile_meram_unregister,
  492. .meram_update = sh_mobile_meram_update,
  493. };
  494. /*
  495. * initialize MERAM
  496. */
  497. static int sh_mobile_meram_remove(struct platform_device *pdev);
  498. static int __devinit sh_mobile_meram_probe(struct platform_device *pdev)
  499. {
  500. struct sh_mobile_meram_priv *priv;
  501. struct sh_mobile_meram_info *pdata = pdev->dev.platform_data;
  502. struct resource *res;
  503. int error;
  504. if (!pdata) {
  505. dev_err(&pdev->dev, "no platform data defined\n");
  506. return -EINVAL;
  507. }
  508. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  509. if (!res) {
  510. dev_err(&pdev->dev, "cannot get platform resources\n");
  511. return -ENOENT;
  512. }
  513. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  514. if (!priv) {
  515. dev_err(&pdev->dev, "cannot allocate device data\n");
  516. return -ENOMEM;
  517. }
  518. platform_set_drvdata(pdev, priv);
  519. /* initialize private data */
  520. mutex_init(&priv->lock);
  521. priv->base = ioremap_nocache(res->start, resource_size(res));
  522. if (!priv->base) {
  523. dev_err(&pdev->dev, "ioremap failed\n");
  524. error = -EFAULT;
  525. goto err;
  526. }
  527. pdata->ops = &sh_mobile_meram_ops;
  528. pdata->priv = priv;
  529. pdata->pdev = pdev;
  530. /* initialize ICB addressing mode */
  531. if (pdata->addr_mode == SH_MOBILE_MERAM_MODE1)
  532. meram_write_reg(priv->base, MEVCR1, MEVCR1_AMD1);
  533. pm_runtime_enable(&pdev->dev);
  534. dev_info(&pdev->dev, "sh_mobile_meram initialized.");
  535. return 0;
  536. err:
  537. sh_mobile_meram_remove(pdev);
  538. return error;
  539. }
  540. static int sh_mobile_meram_remove(struct platform_device *pdev)
  541. {
  542. struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
  543. pm_runtime_disable(&pdev->dev);
  544. if (priv->base)
  545. iounmap(priv->base);
  546. mutex_destroy(&priv->lock);
  547. kfree(priv);
  548. return 0;
  549. }
  550. static struct platform_driver sh_mobile_meram_driver = {
  551. .driver = {
  552. .name = "sh_mobile_meram",
  553. .owner = THIS_MODULE,
  554. .pm = &sh_mobile_meram_dev_pm_ops,
  555. },
  556. .probe = sh_mobile_meram_probe,
  557. .remove = sh_mobile_meram_remove,
  558. };
  559. static int __init sh_mobile_meram_init(void)
  560. {
  561. return platform_driver_register(&sh_mobile_meram_driver);
  562. }
  563. static void __exit sh_mobile_meram_exit(void)
  564. {
  565. platform_driver_unregister(&sh_mobile_meram_driver);
  566. }
  567. module_init(sh_mobile_meram_init);
  568. module_exit(sh_mobile_meram_exit);
  569. MODULE_DESCRIPTION("SuperH Mobile MERAM driver");
  570. MODULE_AUTHOR("Damian Hobson-Garcia / Takanari Hayama");
  571. MODULE_LICENSE("GPL v2");