irq.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401
  1. /*
  2. * This module supports the iSeries PCI bus interrupt handling
  3. * Copyright (C) 20yy <Robert L Holtorf> <IBM Corp>
  4. * Copyright (C) 2004-2005 IBM Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the:
  18. * Free Software Foundation, Inc.,
  19. * 59 Temple Place, Suite 330,
  20. * Boston, MA 02111-1307 USA
  21. *
  22. * Change Activity:
  23. * Created, December 13, 2000 by Wayne Holm
  24. * End Change Activity
  25. */
  26. #include <linux/pci.h>
  27. #include <linux/init.h>
  28. #include <linux/threads.h>
  29. #include <linux/smp.h>
  30. #include <linux/param.h>
  31. #include <linux/string.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/irq.h>
  34. #include <linux/spinlock.h>
  35. #include <asm/paca.h>
  36. #include <asm/iseries/hv_types.h>
  37. #include <asm/iseries/hv_lp_event.h>
  38. #include <asm/iseries/hv_call_xm.h>
  39. #include <asm/iseries/it_lp_queue.h>
  40. #include "irq.h"
  41. #include "pci.h"
  42. #include "call_pci.h"
  43. #include "smp.h"
  44. #ifdef CONFIG_PCI
  45. enum pci_event_type {
  46. pe_bus_created = 0, /* PHB has been created */
  47. pe_bus_error = 1, /* PHB has failed */
  48. pe_bus_failed = 2, /* Msg to Secondary, Primary failed bus */
  49. pe_node_failed = 4, /* Multi-adapter bridge has failed */
  50. pe_node_recovered = 5, /* Multi-adapter bridge has recovered */
  51. pe_bus_recovered = 12, /* PHB has been recovered */
  52. pe_unquiese_bus = 18, /* Secondary bus unqiescing */
  53. pe_bridge_error = 21, /* Bridge Error */
  54. pe_slot_interrupt = 22 /* Slot interrupt */
  55. };
  56. struct pci_event {
  57. struct HvLpEvent event;
  58. union {
  59. u64 __align; /* Align on an 8-byte boundary */
  60. struct {
  61. u32 fisr;
  62. HvBusNumber bus_number;
  63. HvSubBusNumber sub_bus_number;
  64. HvAgentId dev_id;
  65. } slot;
  66. struct {
  67. HvBusNumber bus_number;
  68. HvSubBusNumber sub_bus_number;
  69. } bus;
  70. struct {
  71. HvBusNumber bus_number;
  72. HvSubBusNumber sub_bus_number;
  73. HvAgentId dev_id;
  74. } node;
  75. } data;
  76. };
  77. static DEFINE_SPINLOCK(pending_irqs_lock);
  78. static int num_pending_irqs;
  79. static int pending_irqs[NR_IRQS];
  80. static void int_received(struct pci_event *event)
  81. {
  82. int irq;
  83. switch (event->event.xSubtype) {
  84. case pe_slot_interrupt:
  85. irq = event->event.xCorrelationToken;
  86. if (irq < NR_IRQS) {
  87. spin_lock(&pending_irqs_lock);
  88. pending_irqs[irq]++;
  89. num_pending_irqs++;
  90. spin_unlock(&pending_irqs_lock);
  91. } else {
  92. printk(KERN_WARNING "int_received: bad irq number %d\n",
  93. irq);
  94. HvCallPci_eoi(event->data.slot.bus_number,
  95. event->data.slot.sub_bus_number,
  96. event->data.slot.dev_id);
  97. }
  98. break;
  99. /* Ignore error recovery events for now */
  100. case pe_bus_created:
  101. printk(KERN_INFO "int_received: system bus %d created\n",
  102. event->data.bus.bus_number);
  103. break;
  104. case pe_bus_error:
  105. case pe_bus_failed:
  106. printk(KERN_INFO "int_received: system bus %d failed\n",
  107. event->data.bus.bus_number);
  108. break;
  109. case pe_bus_recovered:
  110. case pe_unquiese_bus:
  111. printk(KERN_INFO "int_received: system bus %d recovered\n",
  112. event->data.bus.bus_number);
  113. break;
  114. case pe_node_failed:
  115. case pe_bridge_error:
  116. printk(KERN_INFO
  117. "int_received: multi-adapter bridge %d/%d/%d failed\n",
  118. event->data.node.bus_number,
  119. event->data.node.sub_bus_number,
  120. event->data.node.dev_id);
  121. break;
  122. case pe_node_recovered:
  123. printk(KERN_INFO
  124. "int_received: multi-adapter bridge %d/%d/%d recovered\n",
  125. event->data.node.bus_number,
  126. event->data.node.sub_bus_number,
  127. event->data.node.dev_id);
  128. break;
  129. default:
  130. printk(KERN_ERR
  131. "int_received: unrecognized event subtype 0x%x\n",
  132. event->event.xSubtype);
  133. break;
  134. }
  135. }
  136. static void pci_event_handler(struct HvLpEvent *event)
  137. {
  138. if (event && (event->xType == HvLpEvent_Type_PciIo)) {
  139. if (hvlpevent_is_int(event))
  140. int_received((struct pci_event *)event);
  141. else
  142. printk(KERN_ERR
  143. "pci_event_handler: unexpected ack received\n");
  144. } else if (event)
  145. printk(KERN_ERR
  146. "pci_event_handler: Unrecognized PCI event type 0x%x\n",
  147. (int)event->xType);
  148. else
  149. printk(KERN_ERR "pci_event_handler: NULL event received\n");
  150. }
  151. #define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff)
  152. #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
  153. #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
  154. #define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
  155. /*
  156. * This will be called by device drivers (via enable_IRQ)
  157. * to enable INTA in the bridge interrupt status register.
  158. */
  159. static void iseries_enable_IRQ(struct irq_data *d)
  160. {
  161. u32 bus, dev_id, function, mask;
  162. const u32 sub_bus = 0;
  163. unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
  164. /* The IRQ has already been locked by the caller */
  165. bus = REAL_IRQ_TO_BUS(rirq);
  166. function = REAL_IRQ_TO_FUNC(rirq);
  167. dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  168. /* Unmask secondary INTA */
  169. mask = 0x80000000;
  170. HvCallPci_unmaskInterrupts(bus, sub_bus, dev_id, mask);
  171. }
  172. /* This is called by iseries_activate_IRQs */
  173. static unsigned int iseries_startup_IRQ(struct irq_data *d)
  174. {
  175. u32 bus, dev_id, function, mask;
  176. const u32 sub_bus = 0;
  177. unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
  178. bus = REAL_IRQ_TO_BUS(rirq);
  179. function = REAL_IRQ_TO_FUNC(rirq);
  180. dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  181. /* Link the IRQ number to the bridge */
  182. HvCallXm_connectBusUnit(bus, sub_bus, dev_id, d->irq);
  183. /* Unmask bridge interrupts in the FISR */
  184. mask = 0x01010000 << function;
  185. HvCallPci_unmaskFisr(bus, sub_bus, dev_id, mask);
  186. iseries_enable_IRQ(d);
  187. return 0;
  188. }
  189. /*
  190. * This is called out of iSeries_fixup to activate interrupt
  191. * generation for usable slots
  192. */
  193. void __init iSeries_activate_IRQs()
  194. {
  195. int irq;
  196. unsigned long flags;
  197. for_each_irq (irq) {
  198. struct irq_desc *desc = irq_to_desc(irq);
  199. struct irq_chip *chip;
  200. if (!desc)
  201. continue;
  202. chip = irq_desc_get_chip(desc);
  203. if (chip && chip->irq_startup) {
  204. raw_spin_lock_irqsave(&desc->lock, flags);
  205. chip->irq_startup(&desc->irq_data);
  206. raw_spin_unlock_irqrestore(&desc->lock, flags);
  207. }
  208. }
  209. }
  210. /* this is not called anywhere currently */
  211. static void iseries_shutdown_IRQ(struct irq_data *d)
  212. {
  213. u32 bus, dev_id, function, mask;
  214. const u32 sub_bus = 0;
  215. unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
  216. /* irq should be locked by the caller */
  217. bus = REAL_IRQ_TO_BUS(rirq);
  218. function = REAL_IRQ_TO_FUNC(rirq);
  219. dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  220. /* Invalidate the IRQ number in the bridge */
  221. HvCallXm_connectBusUnit(bus, sub_bus, dev_id, 0);
  222. /* Mask bridge interrupts in the FISR */
  223. mask = 0x01010000 << function;
  224. HvCallPci_maskFisr(bus, sub_bus, dev_id, mask);
  225. }
  226. /*
  227. * This will be called by device drivers (via disable_IRQ)
  228. * to disable INTA in the bridge interrupt status register.
  229. */
  230. static void iseries_disable_IRQ(struct irq_data *d)
  231. {
  232. u32 bus, dev_id, function, mask;
  233. const u32 sub_bus = 0;
  234. unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
  235. /* The IRQ has already been locked by the caller */
  236. bus = REAL_IRQ_TO_BUS(rirq);
  237. function = REAL_IRQ_TO_FUNC(rirq);
  238. dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  239. /* Mask secondary INTA */
  240. mask = 0x80000000;
  241. HvCallPci_maskInterrupts(bus, sub_bus, dev_id, mask);
  242. }
  243. static void iseries_end_IRQ(struct irq_data *d)
  244. {
  245. unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
  246. HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq),
  247. (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq));
  248. }
  249. static struct irq_chip iseries_pic = {
  250. .name = "iSeries",
  251. .irq_startup = iseries_startup_IRQ,
  252. .irq_shutdown = iseries_shutdown_IRQ,
  253. .irq_unmask = iseries_enable_IRQ,
  254. .irq_mask = iseries_disable_IRQ,
  255. .irq_eoi = iseries_end_IRQ
  256. };
  257. /*
  258. * This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
  259. * It calculates the irq value for the slot.
  260. * Note that sub_bus is always 0 (at the moment at least).
  261. */
  262. int __init iSeries_allocate_IRQ(HvBusNumber bus,
  263. HvSubBusNumber sub_bus, u32 bsubbus)
  264. {
  265. unsigned int realirq;
  266. u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus);
  267. u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus);
  268. realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3)
  269. + function;
  270. return irq_create_mapping(NULL, realirq);
  271. }
  272. #endif /* CONFIG_PCI */
  273. /*
  274. * Get the next pending IRQ.
  275. */
  276. unsigned int iSeries_get_irq(void)
  277. {
  278. int irq = NO_IRQ_IGNORE;
  279. #ifdef CONFIG_SMP
  280. if (get_lppaca()->int_dword.fields.ipi_cnt) {
  281. get_lppaca()->int_dword.fields.ipi_cnt = 0;
  282. iSeries_smp_message_recv();
  283. }
  284. #endif /* CONFIG_SMP */
  285. if (hvlpevent_is_pending())
  286. process_hvlpevents();
  287. #ifdef CONFIG_PCI
  288. if (num_pending_irqs) {
  289. spin_lock(&pending_irqs_lock);
  290. for (irq = 0; irq < NR_IRQS; irq++) {
  291. if (pending_irqs[irq]) {
  292. pending_irqs[irq]--;
  293. num_pending_irqs--;
  294. break;
  295. }
  296. }
  297. spin_unlock(&pending_irqs_lock);
  298. if (irq >= NR_IRQS)
  299. irq = NO_IRQ_IGNORE;
  300. }
  301. #endif
  302. return irq;
  303. }
  304. #ifdef CONFIG_PCI
  305. static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
  306. irq_hw_number_t hw)
  307. {
  308. irq_set_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
  309. return 0;
  310. }
  311. static int iseries_irq_host_match(struct irq_host *h, struct device_node *np)
  312. {
  313. /* Match all */
  314. return 1;
  315. }
  316. static struct irq_host_ops iseries_irq_host_ops = {
  317. .map = iseries_irq_host_map,
  318. .match = iseries_irq_host_match,
  319. };
  320. /*
  321. * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
  322. * It must be called before the bus walk.
  323. */
  324. void __init iSeries_init_IRQ(void)
  325. {
  326. /* Register PCI event handler and open an event path */
  327. struct irq_host *host;
  328. int ret;
  329. /*
  330. * The Hypervisor only allows us up to 256 interrupt
  331. * sources (the irq number is passed in a u8).
  332. */
  333. irq_set_virq_count(256);
  334. /* Create irq host. No need for a revmap since HV will give us
  335. * back our virtual irq number
  336. */
  337. host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
  338. &iseries_irq_host_ops, 0);
  339. BUG_ON(host == NULL);
  340. irq_set_default_host(host);
  341. ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
  342. &pci_event_handler);
  343. if (ret == 0) {
  344. ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
  345. if (ret != 0)
  346. printk(KERN_ERR "iseries_init_IRQ: open event path "
  347. "failed with rc 0x%x\n", ret);
  348. } else
  349. printk(KERN_ERR "iseries_init_IRQ: register handler "
  350. "failed with rc 0x%x\n", ret);
  351. }
  352. #endif /* CONFIG_PCI */