setup.c 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217
  1. /*
  2. * This program is free software; you can redistribute it and/or modify it
  3. * under the terms of the GNU General Public License as published by the
  4. * Free Software Foundation; either version 2 of the License, or (at your
  5. * option) any later version.
  6. *
  7. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  8. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  9. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  10. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  11. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  12. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  13. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  14. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  15. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  16. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  17. *
  18. * You should have received a copy of the GNU General Public License along
  19. * with this program; if not, write to the Free Software Foundation, Inc.,
  20. * 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. * Copyright 2001 MontaVista Software Inc.
  23. * Author: MontaVista Software, Inc.
  24. * ahennessy@mvista.com
  25. *
  26. * Copyright (C) 2000-2001 Toshiba Corporation
  27. * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
  28. */
  29. #include <linux/init.h>
  30. #include <linux/kernel.h>
  31. #include <linux/types.h>
  32. #include <linux/ioport.h>
  33. #include <linux/delay.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/gpio.h>
  36. #include <asm/reboot.h>
  37. #include <asm/txx9pio.h>
  38. #include <asm/txx9/generic.h>
  39. #include <asm/txx9/pci.h>
  40. #include <asm/txx9/jmr3927.h>
  41. #include <asm/mipsregs.h>
  42. static void jmr3927_machine_restart(char *command)
  43. {
  44. local_irq_disable();
  45. #if 1 /* Resetting PCI bus */
  46. jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
  47. jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
  48. (void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR); /* flush WB */
  49. mdelay(1);
  50. jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
  51. #endif
  52. jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
  53. /* fallback */
  54. (*_machine_halt)();
  55. }
  56. static void __init jmr3927_time_init(void)
  57. {
  58. tx3927_time_init(0, 1);
  59. }
  60. #define DO_WRITE_THROUGH
  61. static void jmr3927_board_init(void);
  62. static void __init jmr3927_mem_setup(void)
  63. {
  64. set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
  65. _machine_restart = jmr3927_machine_restart;
  66. /* cache setup */
  67. {
  68. unsigned int conf;
  69. #ifdef DO_WRITE_THROUGH
  70. int mips_config_cwfon = 0;
  71. int mips_config_wbon = 0;
  72. #else
  73. int mips_config_cwfon = 1;
  74. int mips_config_wbon = 1;
  75. #endif
  76. conf = read_c0_conf();
  77. conf &= ~(TX39_CONF_WBON | TX39_CONF_CWFON);
  78. conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
  79. conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
  80. write_c0_conf(conf);
  81. write_c0_cache(0);
  82. }
  83. /* initialize board */
  84. jmr3927_board_init();
  85. tx3927_sio_init(0, 1 << 1); /* ch1: noCTS */
  86. }
  87. static void __init jmr3927_pci_setup(void)
  88. {
  89. #ifdef CONFIG_PCI
  90. int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
  91. struct pci_controller *c;
  92. c = txx9_alloc_pci_controller(&txx9_primary_pcic,
  93. JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
  94. JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
  95. register_pci_controller(c);
  96. if (!extarb) {
  97. /* Reset PCI Bus */
  98. jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
  99. udelay(100);
  100. jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
  101. JMR3927_IOC_RESET_ADDR);
  102. udelay(100);
  103. jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
  104. }
  105. tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
  106. tx3927_setup_pcierr_irq();
  107. #endif /* CONFIG_PCI */
  108. }
  109. static void __init jmr3927_board_init(void)
  110. {
  111. txx9_cpu_clock = JMR3927_CORECLK;
  112. /* SDRAMC are configured by PROM */
  113. /* ROMC */
  114. tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
  115. tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
  116. tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
  117. tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
  118. /* Pin selection */
  119. tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
  120. tx3927_ccfgptr->pcfg |=
  121. TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
  122. (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
  123. tx3927_setup();
  124. /* PIO[15:12] connected to LEDs */
  125. __raw_writel(0x0000f000, &tx3927_pioptr->dir);
  126. gpio_request(11, "dipsw1");
  127. gpio_request(10, "dipsw2");
  128. jmr3927_pci_setup();
  129. /* SIO0 DTR on */
  130. jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
  131. jmr3927_led_set(0);
  132. printk(KERN_INFO
  133. "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
  134. jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
  135. jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
  136. jmr3927_dipsw1(), jmr3927_dipsw2(),
  137. jmr3927_dipsw3(), jmr3927_dipsw4());
  138. }
  139. /* This trick makes rtc-ds1742 driver usable as is. */
  140. static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
  141. {
  142. if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
  143. return port;
  144. port = (port & 0xffff0000) | (port & 0x7fff << 1);
  145. #ifdef __BIG_ENDIAN
  146. return port;
  147. #else
  148. return port | 1;
  149. #endif
  150. }
  151. static void __init jmr3927_rtc_init(void)
  152. {
  153. static struct resource __initdata res = {
  154. .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
  155. .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
  156. .flags = IORESOURCE_MEM,
  157. };
  158. platform_device_register_simple("rtc-ds1742", -1, &res, 1);
  159. }
  160. static void __init jmr3927_mtd_init(void)
  161. {
  162. int i;
  163. for (i = 0; i < 2; i++)
  164. tx3927_mtd_init(i);
  165. }
  166. static void __init jmr3927_device_init(void)
  167. {
  168. unsigned long iocled_base = JMR3927_IOC_LED_ADDR - IO_BASE;
  169. #ifdef __LITTLE_ENDIAN
  170. iocled_base |= 1;
  171. #endif
  172. __swizzle_addr_b = jmr3927_swizzle_addr_b;
  173. jmr3927_rtc_init();
  174. tx3927_wdt_init();
  175. jmr3927_mtd_init();
  176. txx9_iocled_init(iocled_base, -1, 8, 1, "green", NULL);
  177. }
  178. struct txx9_board_vec jmr3927_vec __initdata = {
  179. .system = "Toshiba JMR_TX3927",
  180. .prom_init = jmr3927_prom_init,
  181. .mem_setup = jmr3927_mem_setup,
  182. .irq_setup = jmr3927_irq_setup,
  183. .time_init = jmr3927_time_init,
  184. .device_init = jmr3927_device_init,
  185. #ifdef CONFIG_PCI
  186. .pci_map_irq = jmr3927_pci_map_irq,
  187. #endif
  188. };