msp_setup.c 5.6 KB

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  1. /*
  2. * The generic setup file for PMC-Sierra MSP processors
  3. *
  4. * Copyright 2005-2007 PMC-Sierra, Inc,
  5. * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <asm/bootinfo.h>
  13. #include <asm/cacheflush.h>
  14. #include <asm/r4kcache.h>
  15. #include <asm/reboot.h>
  16. #include <asm/time.h>
  17. #include <msp_prom.h>
  18. #include <msp_regs.h>
  19. #if defined(CONFIG_PMC_MSP7120_GW)
  20. #include <msp_regops.h>
  21. #define MSP_BOARD_RESET_GPIO 9
  22. #endif
  23. extern void msp_serial_setup(void);
  24. extern void pmctwiled_setup(void);
  25. #if defined(CONFIG_PMC_MSP7120_EVAL) || \
  26. defined(CONFIG_PMC_MSP7120_GW) || \
  27. defined(CONFIG_PMC_MSP7120_FPGA)
  28. /*
  29. * Performs the reset for MSP7120-based boards
  30. */
  31. void msp7120_reset(void)
  32. {
  33. void *start, *end, *iptr;
  34. register int i;
  35. /* Diasble all interrupts */
  36. local_irq_disable();
  37. #ifdef CONFIG_SYS_SUPPORTS_MULTITHREADING
  38. dvpe();
  39. #endif
  40. /* Cache the reset code of this function */
  41. __asm__ __volatile__ (
  42. " .set push \n"
  43. " .set mips3 \n"
  44. " la %0,startpoint \n"
  45. " la %1,endpoint \n"
  46. " .set pop \n"
  47. : "=r" (start), "=r" (end)
  48. :
  49. );
  50. for (iptr = (void *)((unsigned int)start & ~(L1_CACHE_BYTES - 1));
  51. iptr < end; iptr += L1_CACHE_BYTES)
  52. cache_op(Fill, iptr);
  53. __asm__ __volatile__ (
  54. "startpoint: \n"
  55. );
  56. /* Put the DDRC into self-refresh mode */
  57. DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16);
  58. /*
  59. * IMPORTANT!
  60. * DO NOT do anything from here on out that might even
  61. * think about fetching from RAM - i.e., don't call any
  62. * non-inlined functions, and be VERY sure that any inline
  63. * functions you do call do NOT access any sort of RAM
  64. * anywhere!
  65. */
  66. /* Wait a bit for the DDRC to settle */
  67. for (i = 0; i < 100000000; i++);
  68. #if defined(CONFIG_PMC_MSP7120_GW)
  69. /*
  70. * Set GPIO 9 HI, (tied to board reset logic)
  71. * GPIO 9 is the 4th GPIO of register 3
  72. *
  73. * NOTE: We cannot use the higher-level msp_gpio_mode()/out()
  74. * as GPIO char driver may not be enabled and it would look up
  75. * data inRAM!
  76. */
  77. set_value_reg32(GPIO_CFG3_REG, 0xf000, 0x8000);
  78. set_reg32(GPIO_DATA3_REG, 8);
  79. /*
  80. * In case GPIO9 doesn't reset the board (jumper configurable!)
  81. * fallback to device reset below.
  82. */
  83. #endif
  84. /* Set bit 1 of the MSP7120 reset register */
  85. *RST_SET_REG = 0x00000001;
  86. __asm__ __volatile__ (
  87. "endpoint: \n"
  88. );
  89. }
  90. #endif
  91. void msp_restart(char *command)
  92. {
  93. printk(KERN_WARNING "Now rebooting .......\n");
  94. #if defined(CONFIG_PMC_MSP7120_EVAL) || \
  95. defined(CONFIG_PMC_MSP7120_GW) || \
  96. defined(CONFIG_PMC_MSP7120_FPGA)
  97. msp7120_reset();
  98. #else
  99. /* No chip-specific reset code, just jump to the ROM reset vector */
  100. set_c0_status(ST0_BEV | ST0_ERL);
  101. change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
  102. flush_cache_all();
  103. write_c0_wired(0);
  104. __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
  105. #endif
  106. }
  107. void msp_halt(void)
  108. {
  109. printk(KERN_WARNING "\n** You can safely turn off the power\n");
  110. while (1)
  111. /* If possible call official function to get CPU WARs */
  112. if (cpu_wait)
  113. (*cpu_wait)();
  114. else
  115. __asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0");
  116. }
  117. void msp_power_off(void)
  118. {
  119. msp_halt();
  120. }
  121. void __init plat_mem_setup(void)
  122. {
  123. _machine_restart = msp_restart;
  124. _machine_halt = msp_halt;
  125. pm_power_off = msp_power_off;
  126. }
  127. extern struct plat_smp_ops msp_smtc_smp_ops;
  128. void __init prom_init(void)
  129. {
  130. unsigned long family;
  131. unsigned long revision;
  132. prom_argc = fw_arg0;
  133. prom_argv = (char **)fw_arg1;
  134. prom_envp = (char **)fw_arg2;
  135. /*
  136. * Someday we can use this with PMON2000 to get a
  137. * platform call prom routines for output etc. without
  138. * having to use grody hacks. For now it's unused.
  139. *
  140. * struct callvectors *cv = (struct callvectors *) fw_arg3;
  141. */
  142. family = identify_family();
  143. revision = identify_revision();
  144. switch (family) {
  145. case FAMILY_FPGA:
  146. if (FPGA_IS_MSP4200(revision)) {
  147. /* Old-style revision ID */
  148. mips_machtype = MACH_MSP4200_FPGA;
  149. } else {
  150. mips_machtype = MACH_MSP_OTHER;
  151. }
  152. break;
  153. case FAMILY_MSP4200:
  154. #if defined(CONFIG_PMC_MSP4200_EVAL)
  155. mips_machtype = MACH_MSP4200_EVAL;
  156. #elif defined(CONFIG_PMC_MSP4200_GW)
  157. mips_machtype = MACH_MSP4200_GW;
  158. #else
  159. mips_machtype = MACH_MSP_OTHER;
  160. #endif
  161. break;
  162. case FAMILY_MSP4200_FPGA:
  163. mips_machtype = MACH_MSP4200_FPGA;
  164. break;
  165. case FAMILY_MSP7100:
  166. #if defined(CONFIG_PMC_MSP7120_EVAL)
  167. mips_machtype = MACH_MSP7120_EVAL;
  168. #elif defined(CONFIG_PMC_MSP7120_GW)
  169. mips_machtype = MACH_MSP7120_GW;
  170. #else
  171. mips_machtype = MACH_MSP_OTHER;
  172. #endif
  173. break;
  174. case FAMILY_MSP7100_FPGA:
  175. mips_machtype = MACH_MSP7120_FPGA;
  176. break;
  177. default:
  178. /* we don't recognize the machine */
  179. mips_machtype = MACH_UNKNOWN;
  180. panic("***Bogosity factor five***, exiting\n");
  181. break;
  182. }
  183. prom_init_cmdline();
  184. prom_meminit();
  185. /*
  186. * Sub-system setup follows.
  187. * Setup functions can either be called here or using the
  188. * subsys_initcall mechanism (i.e. see msp_pci_setup). The
  189. * order in which they are called can be changed by using the
  190. * link order in arch/mips/pmc-sierra/msp71xx/Makefile.
  191. *
  192. * NOTE: Please keep sub-system specific initialization code
  193. * in separate specific files.
  194. */
  195. msp_serial_setup();
  196. #ifdef CONFIG_MIPS_MT_SMP
  197. register_smp_ops(&vsmp_smp_ops);
  198. #endif
  199. #ifdef CONFIG_MIPS_MT_SMTC
  200. register_smp_ops(&msp_smtc_smp_ops);
  201. #endif
  202. #ifdef CONFIG_PMCTWILED
  203. /*
  204. * Setup LED states before the subsys_initcall loads other
  205. * dependent drivers/modules.
  206. */
  207. pmctwiled_setup();
  208. #endif
  209. }