tcm_bf537.c 18 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/mtd/physmap.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/flash.h>
  17. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  18. #include <linux/usb/isp1362.h>
  19. #endif
  20. #include <linux/ata_platform.h>
  21. #include <linux/irq.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/portmux.h>
  25. #include <asm/dpmc.h>
  26. #include <linux/spi/mmc_spi.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "Bluetechnix TCM BF537";
  31. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  32. /* all SPI peripherals info goes here */
  33. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  34. static struct mtd_partition bfin_spi_flash_partitions[] = {
  35. {
  36. .name = "bootloader(spi)",
  37. .size = 0x00020000,
  38. .offset = 0,
  39. .mask_flags = MTD_CAP_ROM
  40. }, {
  41. .name = "linux kernel(spi)",
  42. .size = 0xe0000,
  43. .offset = 0x20000
  44. }, {
  45. .name = "file system(spi)",
  46. .size = 0x700000,
  47. .offset = 0x00100000,
  48. }
  49. };
  50. static struct flash_platform_data bfin_spi_flash_data = {
  51. .name = "m25p80",
  52. .parts = bfin_spi_flash_partitions,
  53. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  54. .type = "m25p64",
  55. };
  56. /* SPI flash chip (m25p64) */
  57. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  58. .enable_dma = 0, /* use dma transfer with this chip*/
  59. .bits_per_word = 8,
  60. };
  61. #endif
  62. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  63. /* SPI ADC chip */
  64. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  65. .enable_dma = 1, /* use dma transfer with this chip*/
  66. .bits_per_word = 16,
  67. };
  68. #endif
  69. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  70. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  71. .enable_dma = 0,
  72. .bits_per_word = 16,
  73. };
  74. #endif
  75. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  76. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  77. .enable_dma = 0,
  78. .bits_per_word = 8,
  79. };
  80. #endif
  81. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  82. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  83. {
  84. /* the modalias must be the same as spi device driver name */
  85. .modalias = "m25p80", /* Name of spi_driver for this device */
  86. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  87. .bus_num = 0, /* Framework bus number */
  88. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  89. .platform_data = &bfin_spi_flash_data,
  90. .controller_data = &spi_flash_chip_info,
  91. .mode = SPI_MODE_3,
  92. },
  93. #endif
  94. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  95. {
  96. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  97. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  98. .bus_num = 0, /* Framework bus number */
  99. .chip_select = 1, /* Framework chip select. */
  100. .platform_data = NULL, /* No spi_driver specific config */
  101. .controller_data = &spi_adc_chip_info,
  102. },
  103. #endif
  104. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  105. {
  106. .modalias = "ad183x",
  107. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  108. .bus_num = 0,
  109. .chip_select = 4,
  110. .controller_data = &ad1836_spi_chip_info,
  111. },
  112. #endif
  113. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  114. {
  115. .modalias = "mmc_spi",
  116. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  117. .bus_num = 0,
  118. .chip_select = 1,
  119. .controller_data = &mmc_spi_chip_info,
  120. .mode = SPI_MODE_3,
  121. },
  122. #endif
  123. };
  124. /* SPI (0) */
  125. static struct resource bfin_spi0_resource[] = {
  126. [0] = {
  127. .start = SPI0_REGBASE,
  128. .end = SPI0_REGBASE + 0xFF,
  129. .flags = IORESOURCE_MEM,
  130. },
  131. [1] = {
  132. .start = CH_SPI,
  133. .end = CH_SPI,
  134. .flags = IORESOURCE_DMA,
  135. },
  136. [2] = {
  137. .start = IRQ_SPI,
  138. .end = IRQ_SPI,
  139. .flags = IORESOURCE_IRQ,
  140. }
  141. };
  142. /* SPI controller data */
  143. static struct bfin5xx_spi_master bfin_spi0_info = {
  144. .num_chipselect = 8,
  145. .enable_dma = 1, /* master has the ability to do dma transfer */
  146. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  147. };
  148. static struct platform_device bfin_spi0_device = {
  149. .name = "bfin-spi",
  150. .id = 0, /* Bus number */
  151. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  152. .resource = bfin_spi0_resource,
  153. .dev = {
  154. .platform_data = &bfin_spi0_info, /* Passed to driver */
  155. },
  156. };
  157. #endif /* spi master and devices */
  158. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  159. static struct platform_device rtc_device = {
  160. .name = "rtc-bfin",
  161. .id = -1,
  162. };
  163. #endif
  164. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  165. static struct platform_device hitachi_fb_device = {
  166. .name = "hitachi-tx09",
  167. };
  168. #endif
  169. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  170. #include <linux/smc91x.h>
  171. static struct smc91x_platdata smc91x_info = {
  172. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  173. .leda = RPC_LED_100_10,
  174. .ledb = RPC_LED_TX_RX,
  175. };
  176. static struct resource smc91x_resources[] = {
  177. {
  178. .start = 0x20200300,
  179. .end = 0x20200300 + 16,
  180. .flags = IORESOURCE_MEM,
  181. }, {
  182. .start = IRQ_PF14,
  183. .end = IRQ_PF14,
  184. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  185. },
  186. };
  187. static struct platform_device smc91x_device = {
  188. .name = "smc91x",
  189. .id = 0,
  190. .num_resources = ARRAY_SIZE(smc91x_resources),
  191. .resource = smc91x_resources,
  192. .dev = {
  193. .platform_data = &smc91x_info,
  194. },
  195. };
  196. #endif
  197. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  198. static struct resource isp1362_hcd_resources[] = {
  199. {
  200. .start = 0x20308000,
  201. .end = 0x20308000,
  202. .flags = IORESOURCE_MEM,
  203. }, {
  204. .start = 0x20308004,
  205. .end = 0x20308004,
  206. .flags = IORESOURCE_MEM,
  207. }, {
  208. .start = IRQ_PG15,
  209. .end = IRQ_PG15,
  210. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  211. },
  212. };
  213. static struct isp1362_platform_data isp1362_priv = {
  214. .sel15Kres = 1,
  215. .clknotstop = 0,
  216. .oc_enable = 0,
  217. .int_act_high = 0,
  218. .int_edge_triggered = 0,
  219. .remote_wakeup_connected = 0,
  220. .no_power_switching = 1,
  221. .power_switching_mode = 0,
  222. };
  223. static struct platform_device isp1362_hcd_device = {
  224. .name = "isp1362-hcd",
  225. .id = 0,
  226. .dev = {
  227. .platform_data = &isp1362_priv,
  228. },
  229. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  230. .resource = isp1362_hcd_resources,
  231. };
  232. #endif
  233. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  234. static struct resource net2272_bfin_resources[] = {
  235. {
  236. .start = 0x20300000,
  237. .end = 0x20300000 + 0x100,
  238. .flags = IORESOURCE_MEM,
  239. }, {
  240. .start = IRQ_PG13,
  241. .end = IRQ_PG13,
  242. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  243. },
  244. };
  245. static struct platform_device net2272_bfin_device = {
  246. .name = "net2272",
  247. .id = -1,
  248. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  249. .resource = net2272_bfin_resources,
  250. };
  251. #endif
  252. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  253. static struct mtd_partition cm_partitions[] = {
  254. {
  255. .name = "bootloader(nor)",
  256. .size = 0x40000,
  257. .offset = 0,
  258. }, {
  259. .name = "linux kernel(nor)",
  260. .size = 0x100000,
  261. .offset = MTDPART_OFS_APPEND,
  262. }, {
  263. .name = "file system(nor)",
  264. .size = MTDPART_SIZ_FULL,
  265. .offset = MTDPART_OFS_APPEND,
  266. }
  267. };
  268. static struct physmap_flash_data cm_flash_data = {
  269. .width = 2,
  270. .parts = cm_partitions,
  271. .nr_parts = ARRAY_SIZE(cm_partitions),
  272. };
  273. static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
  274. static struct resource cm_flash_resource[] = {
  275. {
  276. .name = "cfi_probe",
  277. .start = 0x20000000,
  278. .end = 0x201fffff,
  279. .flags = IORESOURCE_MEM,
  280. }, {
  281. .start = (unsigned long)cm_flash_gpios,
  282. .end = ARRAY_SIZE(cm_flash_gpios),
  283. .flags = IORESOURCE_IRQ,
  284. }
  285. };
  286. static struct platform_device cm_flash_device = {
  287. .name = "gpio-addr-flash",
  288. .id = 0,
  289. .dev = {
  290. .platform_data = &cm_flash_data,
  291. },
  292. .num_resources = ARRAY_SIZE(cm_flash_resource),
  293. .resource = cm_flash_resource,
  294. };
  295. #endif
  296. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  297. #ifdef CONFIG_SERIAL_BFIN_UART0
  298. static struct resource bfin_uart0_resources[] = {
  299. {
  300. .start = UART0_THR,
  301. .end = UART0_GCTL+2,
  302. .flags = IORESOURCE_MEM,
  303. },
  304. {
  305. .start = IRQ_UART0_RX,
  306. .end = IRQ_UART0_RX+1,
  307. .flags = IORESOURCE_IRQ,
  308. },
  309. {
  310. .start = IRQ_UART0_ERROR,
  311. .end = IRQ_UART0_ERROR,
  312. .flags = IORESOURCE_IRQ,
  313. },
  314. {
  315. .start = CH_UART0_TX,
  316. .end = CH_UART0_TX,
  317. .flags = IORESOURCE_DMA,
  318. },
  319. {
  320. .start = CH_UART0_RX,
  321. .end = CH_UART0_RX,
  322. .flags = IORESOURCE_DMA,
  323. },
  324. };
  325. static unsigned short bfin_uart0_peripherals[] = {
  326. P_UART0_TX, P_UART0_RX, 0
  327. };
  328. static struct platform_device bfin_uart0_device = {
  329. .name = "bfin-uart",
  330. .id = 0,
  331. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  332. .resource = bfin_uart0_resources,
  333. .dev = {
  334. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  335. },
  336. };
  337. #endif
  338. #ifdef CONFIG_SERIAL_BFIN_UART1
  339. static struct resource bfin_uart1_resources[] = {
  340. {
  341. .start = UART1_THR,
  342. .end = UART1_GCTL+2,
  343. .flags = IORESOURCE_MEM,
  344. },
  345. {
  346. .start = IRQ_UART1_RX,
  347. .end = IRQ_UART1_RX+1,
  348. .flags = IORESOURCE_IRQ,
  349. },
  350. {
  351. .start = IRQ_UART1_ERROR,
  352. .end = IRQ_UART1_ERROR,
  353. .flags = IORESOURCE_IRQ,
  354. },
  355. {
  356. .start = CH_UART1_TX,
  357. .end = CH_UART1_TX,
  358. .flags = IORESOURCE_DMA,
  359. },
  360. {
  361. .start = CH_UART1_RX,
  362. .end = CH_UART1_RX,
  363. .flags = IORESOURCE_DMA,
  364. },
  365. };
  366. static unsigned short bfin_uart1_peripherals[] = {
  367. P_UART1_TX, P_UART1_RX, 0
  368. };
  369. static struct platform_device bfin_uart1_device = {
  370. .name = "bfin-uart",
  371. .id = 1,
  372. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  373. .resource = bfin_uart1_resources,
  374. .dev = {
  375. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  376. },
  377. };
  378. #endif
  379. #endif
  380. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  381. #ifdef CONFIG_BFIN_SIR0
  382. static struct resource bfin_sir0_resources[] = {
  383. {
  384. .start = 0xFFC00400,
  385. .end = 0xFFC004FF,
  386. .flags = IORESOURCE_MEM,
  387. },
  388. {
  389. .start = IRQ_UART0_RX,
  390. .end = IRQ_UART0_RX+1,
  391. .flags = IORESOURCE_IRQ,
  392. },
  393. {
  394. .start = CH_UART0_RX,
  395. .end = CH_UART0_RX+1,
  396. .flags = IORESOURCE_DMA,
  397. },
  398. };
  399. static struct platform_device bfin_sir0_device = {
  400. .name = "bfin_sir",
  401. .id = 0,
  402. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  403. .resource = bfin_sir0_resources,
  404. };
  405. #endif
  406. #ifdef CONFIG_BFIN_SIR1
  407. static struct resource bfin_sir1_resources[] = {
  408. {
  409. .start = 0xFFC02000,
  410. .end = 0xFFC020FF,
  411. .flags = IORESOURCE_MEM,
  412. },
  413. {
  414. .start = IRQ_UART1_RX,
  415. .end = IRQ_UART1_RX+1,
  416. .flags = IORESOURCE_IRQ,
  417. },
  418. {
  419. .start = CH_UART1_RX,
  420. .end = CH_UART1_RX+1,
  421. .flags = IORESOURCE_DMA,
  422. },
  423. };
  424. static struct platform_device bfin_sir1_device = {
  425. .name = "bfin_sir",
  426. .id = 1,
  427. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  428. .resource = bfin_sir1_resources,
  429. };
  430. #endif
  431. #endif
  432. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  433. static struct resource bfin_twi0_resource[] = {
  434. [0] = {
  435. .start = TWI0_REGBASE,
  436. .end = TWI0_REGBASE,
  437. .flags = IORESOURCE_MEM,
  438. },
  439. [1] = {
  440. .start = IRQ_TWI,
  441. .end = IRQ_TWI,
  442. .flags = IORESOURCE_IRQ,
  443. },
  444. };
  445. static struct platform_device i2c_bfin_twi_device = {
  446. .name = "i2c-bfin-twi",
  447. .id = 0,
  448. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  449. .resource = bfin_twi0_resource,
  450. };
  451. #endif
  452. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  453. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  454. static struct resource bfin_sport0_uart_resources[] = {
  455. {
  456. .start = SPORT0_TCR1,
  457. .end = SPORT0_MRCS3+4,
  458. .flags = IORESOURCE_MEM,
  459. },
  460. {
  461. .start = IRQ_SPORT0_RX,
  462. .end = IRQ_SPORT0_RX+1,
  463. .flags = IORESOURCE_IRQ,
  464. },
  465. {
  466. .start = IRQ_SPORT0_ERROR,
  467. .end = IRQ_SPORT0_ERROR,
  468. .flags = IORESOURCE_IRQ,
  469. },
  470. };
  471. static unsigned short bfin_sport0_peripherals[] = {
  472. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  473. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  474. };
  475. static struct platform_device bfin_sport0_uart_device = {
  476. .name = "bfin-sport-uart",
  477. .id = 0,
  478. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  479. .resource = bfin_sport0_uart_resources,
  480. .dev = {
  481. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  482. },
  483. };
  484. #endif
  485. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  486. static struct resource bfin_sport1_uart_resources[] = {
  487. {
  488. .start = SPORT1_TCR1,
  489. .end = SPORT1_MRCS3+4,
  490. .flags = IORESOURCE_MEM,
  491. },
  492. {
  493. .start = IRQ_SPORT1_RX,
  494. .end = IRQ_SPORT1_RX+1,
  495. .flags = IORESOURCE_IRQ,
  496. },
  497. {
  498. .start = IRQ_SPORT1_ERROR,
  499. .end = IRQ_SPORT1_ERROR,
  500. .flags = IORESOURCE_IRQ,
  501. },
  502. };
  503. static unsigned short bfin_sport1_peripherals[] = {
  504. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  505. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  506. };
  507. static struct platform_device bfin_sport1_uart_device = {
  508. .name = "bfin-sport-uart",
  509. .id = 1,
  510. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  511. .resource = bfin_sport1_uart_resources,
  512. .dev = {
  513. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  514. },
  515. };
  516. #endif
  517. #endif
  518. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  519. #include <linux/bfin_mac.h>
  520. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  521. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  522. {
  523. .addr = 1,
  524. .irq = IRQ_MAC_PHYINT,
  525. },
  526. };
  527. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  528. .phydev_number = 1,
  529. .phydev_data = bfin_phydev_data,
  530. .phy_mode = PHY_INTERFACE_MODE_MII,
  531. .mac_peripherals = bfin_mac_peripherals,
  532. };
  533. static struct platform_device bfin_mii_bus = {
  534. .name = "bfin_mii_bus",
  535. .dev = {
  536. .platform_data = &bfin_mii_bus_data,
  537. }
  538. };
  539. static struct platform_device bfin_mac_device = {
  540. .name = "bfin_mac",
  541. .dev = {
  542. .platform_data = &bfin_mii_bus,
  543. }
  544. };
  545. #endif
  546. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  547. #define PATA_INT IRQ_PF14
  548. static struct pata_platform_info bfin_pata_platform_data = {
  549. .ioport_shift = 2,
  550. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  551. };
  552. static struct resource bfin_pata_resources[] = {
  553. {
  554. .start = 0x2030C000,
  555. .end = 0x2030C01F,
  556. .flags = IORESOURCE_MEM,
  557. },
  558. {
  559. .start = 0x2030D018,
  560. .end = 0x2030D01B,
  561. .flags = IORESOURCE_MEM,
  562. },
  563. {
  564. .start = PATA_INT,
  565. .end = PATA_INT,
  566. .flags = IORESOURCE_IRQ,
  567. },
  568. };
  569. static struct platform_device bfin_pata_device = {
  570. .name = "pata_platform",
  571. .id = -1,
  572. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  573. .resource = bfin_pata_resources,
  574. .dev = {
  575. .platform_data = &bfin_pata_platform_data,
  576. }
  577. };
  578. #endif
  579. static const unsigned int cclk_vlev_datasheet[] =
  580. {
  581. VRPAIR(VLEV_085, 250000000),
  582. VRPAIR(VLEV_090, 376000000),
  583. VRPAIR(VLEV_095, 426000000),
  584. VRPAIR(VLEV_100, 426000000),
  585. VRPAIR(VLEV_105, 476000000),
  586. VRPAIR(VLEV_110, 476000000),
  587. VRPAIR(VLEV_115, 476000000),
  588. VRPAIR(VLEV_120, 500000000),
  589. VRPAIR(VLEV_125, 533000000),
  590. VRPAIR(VLEV_130, 600000000),
  591. };
  592. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  593. .tuple_tab = cclk_vlev_datasheet,
  594. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  595. .vr_settling_time = 25 /* us */,
  596. };
  597. static struct platform_device bfin_dpmc = {
  598. .name = "bfin dpmc",
  599. .dev = {
  600. .platform_data = &bfin_dmpc_vreg_data,
  601. },
  602. };
  603. static struct platform_device *cm_bf537_devices[] __initdata = {
  604. &bfin_dpmc,
  605. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  606. &hitachi_fb_device,
  607. #endif
  608. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  609. &rtc_device,
  610. #endif
  611. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  612. #ifdef CONFIG_SERIAL_BFIN_UART0
  613. &bfin_uart0_device,
  614. #endif
  615. #ifdef CONFIG_SERIAL_BFIN_UART1
  616. &bfin_uart1_device,
  617. #endif
  618. #endif
  619. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  620. #ifdef CONFIG_BFIN_SIR0
  621. &bfin_sir0_device,
  622. #endif
  623. #ifdef CONFIG_BFIN_SIR1
  624. &bfin_sir1_device,
  625. #endif
  626. #endif
  627. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  628. &i2c_bfin_twi_device,
  629. #endif
  630. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  631. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  632. &bfin_sport0_uart_device,
  633. #endif
  634. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  635. &bfin_sport1_uart_device,
  636. #endif
  637. #endif
  638. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  639. &isp1362_hcd_device,
  640. #endif
  641. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  642. &smc91x_device,
  643. #endif
  644. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  645. &bfin_mii_bus,
  646. &bfin_mac_device,
  647. #endif
  648. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  649. &net2272_bfin_device,
  650. #endif
  651. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  652. &bfin_spi0_device,
  653. #endif
  654. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  655. &bfin_pata_device,
  656. #endif
  657. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  658. &cm_flash_device,
  659. #endif
  660. };
  661. static int __init tcm_bf537_init(void)
  662. {
  663. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  664. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  665. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  666. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  667. #endif
  668. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  669. irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
  670. #endif
  671. return 0;
  672. }
  673. arch_initcall(tcm_bf537_init);
  674. static struct platform_device *cm_bf537_early_devices[] __initdata = {
  675. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  676. #ifdef CONFIG_SERIAL_BFIN_UART0
  677. &bfin_uart0_device,
  678. #endif
  679. #ifdef CONFIG_SERIAL_BFIN_UART1
  680. &bfin_uart1_device,
  681. #endif
  682. #endif
  683. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  684. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  685. &bfin_sport0_uart_device,
  686. #endif
  687. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  688. &bfin_sport1_uart_device,
  689. #endif
  690. #endif
  691. };
  692. void __init native_machine_early_platform_add_devices(void)
  693. {
  694. printk(KERN_INFO "register early platform devices\n");
  695. early_platform_add_devices(cm_bf537_early_devices,
  696. ARRAY_SIZE(cm_bf537_early_devices));
  697. }
  698. void bfin_get_ether_addr(char *addr)
  699. {
  700. random_ether_addr(addr);
  701. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  702. }
  703. EXPORT_SYMBOL(bfin_get_ether_addr);