stamp.c 75 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/io.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/nand.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/mtd/plat-ram.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/spi/flash.h>
  19. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  20. #include <linux/usb/isp1362.h>
  21. #endif
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/adp5588.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/ata_platform.h>
  26. #include <linux/irq.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/usb/sl811.h>
  29. #include <linux/spi/mmc_spi.h>
  30. #include <linux/leds.h>
  31. #include <linux/input.h>
  32. #include <asm/dma.h>
  33. #include <asm/bfin5xx_spi.h>
  34. #include <asm/reboot.h>
  35. #include <asm/portmux.h>
  36. #include <asm/dpmc.h>
  37. #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
  38. #include <linux/regulator/fixed.h>
  39. #endif
  40. #include <linux/regulator/machine.h>
  41. #include <linux/regulator/consumer.h>
  42. #include <linux/regulator/userspace-consumer.h>
  43. /*
  44. * Name the Board for the /proc/cpuinfo
  45. */
  46. const char bfin_board_name[] = "ADI BF537-STAMP";
  47. /*
  48. * Driver needs to know address, irq and flag pin.
  49. */
  50. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  51. #include <linux/usb/isp1760.h>
  52. static struct resource bfin_isp1760_resources[] = {
  53. [0] = {
  54. .start = 0x203C0000,
  55. .end = 0x203C0000 + 0x000fffff,
  56. .flags = IORESOURCE_MEM,
  57. },
  58. [1] = {
  59. .start = IRQ_PF7,
  60. .end = IRQ_PF7,
  61. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  62. },
  63. };
  64. static struct isp1760_platform_data isp1760_priv = {
  65. .is_isp1761 = 0,
  66. .bus_width_16 = 1,
  67. .port1_otg = 0,
  68. .analog_oc = 0,
  69. .dack_polarity_high = 0,
  70. .dreq_polarity_high = 0,
  71. };
  72. static struct platform_device bfin_isp1760_device = {
  73. .name = "isp1760",
  74. .id = 0,
  75. .dev = {
  76. .platform_data = &isp1760_priv,
  77. },
  78. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  79. .resource = bfin_isp1760_resources,
  80. };
  81. #endif
  82. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  83. #include <linux/gpio_keys.h>
  84. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  85. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  86. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  87. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  88. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  89. };
  90. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  91. .buttons = bfin_gpio_keys_table,
  92. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  93. };
  94. static struct platform_device bfin_device_gpiokeys = {
  95. .name = "gpio-keys",
  96. .dev = {
  97. .platform_data = &bfin_gpio_keys_data,
  98. },
  99. };
  100. #endif
  101. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  102. static struct resource bfin_pcmcia_cf_resources[] = {
  103. {
  104. .start = 0x20310000, /* IO PORT */
  105. .end = 0x20312000,
  106. .flags = IORESOURCE_MEM,
  107. }, {
  108. .start = 0x20311000, /* Attribute Memory */
  109. .end = 0x20311FFF,
  110. .flags = IORESOURCE_MEM,
  111. }, {
  112. .start = IRQ_PF4,
  113. .end = IRQ_PF4,
  114. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  115. }, {
  116. .start = 6, /* Card Detect PF6 */
  117. .end = 6,
  118. .flags = IORESOURCE_IRQ,
  119. },
  120. };
  121. static struct platform_device bfin_pcmcia_cf_device = {
  122. .name = "bfin_cf_pcmcia",
  123. .id = -1,
  124. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  125. .resource = bfin_pcmcia_cf_resources,
  126. };
  127. #endif
  128. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  129. static struct platform_device rtc_device = {
  130. .name = "rtc-bfin",
  131. .id = -1,
  132. };
  133. #endif
  134. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  135. #include <linux/smc91x.h>
  136. static struct smc91x_platdata smc91x_info = {
  137. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  138. .leda = RPC_LED_100_10,
  139. .ledb = RPC_LED_TX_RX,
  140. };
  141. static struct resource smc91x_resources[] = {
  142. {
  143. .name = "smc91x-regs",
  144. .start = 0x20300300,
  145. .end = 0x20300300 + 16,
  146. .flags = IORESOURCE_MEM,
  147. }, {
  148. .start = IRQ_PF7,
  149. .end = IRQ_PF7,
  150. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  151. },
  152. };
  153. static struct platform_device smc91x_device = {
  154. .name = "smc91x",
  155. .id = 0,
  156. .num_resources = ARRAY_SIZE(smc91x_resources),
  157. .resource = smc91x_resources,
  158. .dev = {
  159. .platform_data = &smc91x_info,
  160. },
  161. };
  162. #endif
  163. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  164. static struct resource dm9000_resources[] = {
  165. [0] = {
  166. .start = 0x203FB800,
  167. .end = 0x203FB800 + 1,
  168. .flags = IORESOURCE_MEM,
  169. },
  170. [1] = {
  171. .start = 0x203FB804,
  172. .end = 0x203FB804 + 1,
  173. .flags = IORESOURCE_MEM,
  174. },
  175. [2] = {
  176. .start = IRQ_PF9,
  177. .end = IRQ_PF9,
  178. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  179. },
  180. };
  181. static struct platform_device dm9000_device = {
  182. .name = "dm9000",
  183. .id = -1,
  184. .num_resources = ARRAY_SIZE(dm9000_resources),
  185. .resource = dm9000_resources,
  186. };
  187. #endif
  188. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  189. static struct resource sl811_hcd_resources[] = {
  190. {
  191. .start = 0x20340000,
  192. .end = 0x20340000,
  193. .flags = IORESOURCE_MEM,
  194. }, {
  195. .start = 0x20340004,
  196. .end = 0x20340004,
  197. .flags = IORESOURCE_MEM,
  198. }, {
  199. .start = IRQ_PF4,
  200. .end = IRQ_PF4,
  201. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  202. },
  203. };
  204. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  205. void sl811_port_power(struct device *dev, int is_on)
  206. {
  207. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  208. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  209. }
  210. #endif
  211. static struct sl811_platform_data sl811_priv = {
  212. .potpg = 10,
  213. .power = 250, /* == 500mA */
  214. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  215. .port_power = &sl811_port_power,
  216. #endif
  217. };
  218. static struct platform_device sl811_hcd_device = {
  219. .name = "sl811-hcd",
  220. .id = 0,
  221. .dev = {
  222. .platform_data = &sl811_priv,
  223. },
  224. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  225. .resource = sl811_hcd_resources,
  226. };
  227. #endif
  228. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  229. static struct resource isp1362_hcd_resources[] = {
  230. {
  231. .start = 0x20360000,
  232. .end = 0x20360000,
  233. .flags = IORESOURCE_MEM,
  234. }, {
  235. .start = 0x20360004,
  236. .end = 0x20360004,
  237. .flags = IORESOURCE_MEM,
  238. }, {
  239. .start = IRQ_PF3,
  240. .end = IRQ_PF3,
  241. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  242. },
  243. };
  244. static struct isp1362_platform_data isp1362_priv = {
  245. .sel15Kres = 1,
  246. .clknotstop = 0,
  247. .oc_enable = 0,
  248. .int_act_high = 0,
  249. .int_edge_triggered = 0,
  250. .remote_wakeup_connected = 0,
  251. .no_power_switching = 1,
  252. .power_switching_mode = 0,
  253. };
  254. static struct platform_device isp1362_hcd_device = {
  255. .name = "isp1362-hcd",
  256. .id = 0,
  257. .dev = {
  258. .platform_data = &isp1362_priv,
  259. },
  260. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  261. .resource = isp1362_hcd_resources,
  262. };
  263. #endif
  264. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  265. static unsigned short bfin_can_peripherals[] = {
  266. P_CAN0_RX, P_CAN0_TX, 0
  267. };
  268. static struct resource bfin_can_resources[] = {
  269. {
  270. .start = 0xFFC02A00,
  271. .end = 0xFFC02FFF,
  272. .flags = IORESOURCE_MEM,
  273. },
  274. {
  275. .start = IRQ_CAN_RX,
  276. .end = IRQ_CAN_RX,
  277. .flags = IORESOURCE_IRQ,
  278. },
  279. {
  280. .start = IRQ_CAN_TX,
  281. .end = IRQ_CAN_TX,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. {
  285. .start = IRQ_CAN_ERROR,
  286. .end = IRQ_CAN_ERROR,
  287. .flags = IORESOURCE_IRQ,
  288. },
  289. };
  290. static struct platform_device bfin_can_device = {
  291. .name = "bfin_can",
  292. .num_resources = ARRAY_SIZE(bfin_can_resources),
  293. .resource = bfin_can_resources,
  294. .dev = {
  295. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  296. },
  297. };
  298. #endif
  299. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  300. #include <linux/bfin_mac.h>
  301. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  302. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  303. {
  304. .addr = 1,
  305. .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  306. },
  307. };
  308. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  309. .phydev_number = 1,
  310. .phydev_data = bfin_phydev_data,
  311. .phy_mode = PHY_INTERFACE_MODE_MII,
  312. .mac_peripherals = bfin_mac_peripherals,
  313. };
  314. static struct platform_device bfin_mii_bus = {
  315. .name = "bfin_mii_bus",
  316. .dev = {
  317. .platform_data = &bfin_mii_bus_data,
  318. }
  319. };
  320. static struct platform_device bfin_mac_device = {
  321. .name = "bfin_mac",
  322. .dev = {
  323. .platform_data = &bfin_mii_bus,
  324. }
  325. };
  326. #endif
  327. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  328. static struct resource net2272_bfin_resources[] = {
  329. {
  330. .start = 0x20300000,
  331. .end = 0x20300000 + 0x100,
  332. .flags = IORESOURCE_MEM,
  333. }, {
  334. .start = IRQ_PF7,
  335. .end = IRQ_PF7,
  336. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  337. },
  338. };
  339. static struct platform_device net2272_bfin_device = {
  340. .name = "net2272",
  341. .id = -1,
  342. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  343. .resource = net2272_bfin_resources,
  344. };
  345. #endif
  346. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  347. #ifdef CONFIG_MTD_PARTITIONS
  348. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  349. static struct mtd_partition bfin_plat_nand_partitions[] = {
  350. {
  351. .name = "linux kernel(nand)",
  352. .size = 0x400000,
  353. .offset = 0,
  354. }, {
  355. .name = "file system(nand)",
  356. .size = MTDPART_SIZ_FULL,
  357. .offset = MTDPART_OFS_APPEND,
  358. },
  359. };
  360. #endif
  361. #define BFIN_NAND_PLAT_CLE 2
  362. #define BFIN_NAND_PLAT_ALE 1
  363. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  364. {
  365. struct nand_chip *this = mtd->priv;
  366. if (cmd == NAND_CMD_NONE)
  367. return;
  368. if (ctrl & NAND_CLE)
  369. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  370. else
  371. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  372. }
  373. #define BFIN_NAND_PLAT_READY GPIO_PF3
  374. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  375. {
  376. return gpio_get_value(BFIN_NAND_PLAT_READY);
  377. }
  378. static struct platform_nand_data bfin_plat_nand_data = {
  379. .chip = {
  380. .nr_chips = 1,
  381. .chip_delay = 30,
  382. #ifdef CONFIG_MTD_PARTITIONS
  383. .part_probe_types = part_probes,
  384. .partitions = bfin_plat_nand_partitions,
  385. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  386. #endif
  387. },
  388. .ctrl = {
  389. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  390. .dev_ready = bfin_plat_nand_dev_ready,
  391. },
  392. };
  393. #define MAX(x, y) (x > y ? x : y)
  394. static struct resource bfin_plat_nand_resources = {
  395. .start = 0x20212000,
  396. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  397. .flags = IORESOURCE_MEM,
  398. };
  399. static struct platform_device bfin_async_nand_device = {
  400. .name = "gen_nand",
  401. .id = -1,
  402. .num_resources = 1,
  403. .resource = &bfin_plat_nand_resources,
  404. .dev = {
  405. .platform_data = &bfin_plat_nand_data,
  406. },
  407. };
  408. static void bfin_plat_nand_init(void)
  409. {
  410. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  411. }
  412. #else
  413. static void bfin_plat_nand_init(void) {}
  414. #endif
  415. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  416. static struct mtd_partition stamp_partitions[] = {
  417. {
  418. .name = "bootloader(nor)",
  419. .size = 0x40000,
  420. .offset = 0,
  421. }, {
  422. .name = "linux kernel(nor)",
  423. .size = 0x180000,
  424. .offset = MTDPART_OFS_APPEND,
  425. }, {
  426. .name = "file system(nor)",
  427. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  428. .offset = MTDPART_OFS_APPEND,
  429. }, {
  430. .name = "MAC Address(nor)",
  431. .size = MTDPART_SIZ_FULL,
  432. .offset = 0x3F0000,
  433. .mask_flags = MTD_WRITEABLE,
  434. }
  435. };
  436. static struct physmap_flash_data stamp_flash_data = {
  437. .width = 2,
  438. .parts = stamp_partitions,
  439. .nr_parts = ARRAY_SIZE(stamp_partitions),
  440. #ifdef CONFIG_ROMKERNEL
  441. .probe_type = "map_rom",
  442. #endif
  443. };
  444. static struct resource stamp_flash_resource = {
  445. .start = 0x20000000,
  446. .end = 0x203fffff,
  447. .flags = IORESOURCE_MEM,
  448. };
  449. static struct platform_device stamp_flash_device = {
  450. .name = "physmap-flash",
  451. .id = 0,
  452. .dev = {
  453. .platform_data = &stamp_flash_data,
  454. },
  455. .num_resources = 1,
  456. .resource = &stamp_flash_resource,
  457. };
  458. #endif
  459. #if defined(CONFIG_MTD_M25P80) \
  460. || defined(CONFIG_MTD_M25P80_MODULE)
  461. static struct mtd_partition bfin_spi_flash_partitions[] = {
  462. {
  463. .name = "bootloader(spi)",
  464. .size = 0x00040000,
  465. .offset = 0,
  466. .mask_flags = MTD_CAP_ROM
  467. }, {
  468. .name = "linux kernel(spi)",
  469. .size = 0x180000,
  470. .offset = MTDPART_OFS_APPEND,
  471. }, {
  472. .name = "file system(spi)",
  473. .size = MTDPART_SIZ_FULL,
  474. .offset = MTDPART_OFS_APPEND,
  475. }
  476. };
  477. static struct flash_platform_data bfin_spi_flash_data = {
  478. .name = "m25p80",
  479. .parts = bfin_spi_flash_partitions,
  480. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  481. /* .type = "m25p64", */
  482. };
  483. /* SPI flash chip (m25p64) */
  484. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  485. .enable_dma = 0, /* use dma transfer with this chip*/
  486. .bits_per_word = 8,
  487. };
  488. #endif
  489. #if defined(CONFIG_BFIN_SPI_ADC) \
  490. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  491. /* SPI ADC chip */
  492. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  493. .enable_dma = 1, /* use dma transfer with this chip*/
  494. .bits_per_word = 16,
  495. };
  496. #endif
  497. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  498. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  499. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  500. .enable_dma = 0,
  501. .bits_per_word = 16,
  502. };
  503. #endif
  504. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
  505. || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  506. static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
  507. .enable_dma = 0,
  508. .bits_per_word = 8,
  509. };
  510. #endif
  511. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \
  512. || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  513. static struct bfin5xx_spi_chip adav801_spi_chip_info = {
  514. .enable_dma = 0,
  515. .bits_per_word = 8,
  516. };
  517. #endif
  518. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  519. #include <linux/input/ad714x.h>
  520. static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
  521. .enable_dma = 0,
  522. .bits_per_word = 16,
  523. };
  524. static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
  525. {
  526. .start_stage = 0,
  527. .end_stage = 7,
  528. .max_coord = 128,
  529. },
  530. };
  531. static struct ad714x_button_plat ad7147_spi_button_plat[] = {
  532. {
  533. .keycode = BTN_FORWARD,
  534. .l_mask = 0,
  535. .h_mask = 0x600,
  536. },
  537. {
  538. .keycode = BTN_LEFT,
  539. .l_mask = 0,
  540. .h_mask = 0x500,
  541. },
  542. {
  543. .keycode = BTN_MIDDLE,
  544. .l_mask = 0,
  545. .h_mask = 0x800,
  546. },
  547. {
  548. .keycode = BTN_RIGHT,
  549. .l_mask = 0x100,
  550. .h_mask = 0x400,
  551. },
  552. {
  553. .keycode = BTN_BACK,
  554. .l_mask = 0x200,
  555. .h_mask = 0x400,
  556. },
  557. };
  558. static struct ad714x_platform_data ad7147_spi_platform_data = {
  559. .slider_num = 1,
  560. .button_num = 5,
  561. .slider = ad7147_spi_slider_plat,
  562. .button = ad7147_spi_button_plat,
  563. .stage_cfg_reg = {
  564. {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  565. {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  566. {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
  567. {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
  568. {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
  569. {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
  570. {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  571. {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  572. {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
  573. {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
  574. {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
  575. {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
  576. },
  577. .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
  578. };
  579. #endif
  580. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  581. #include <linux/input/ad714x.h>
  582. static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
  583. {
  584. .keycode = BTN_1,
  585. .l_mask = 0,
  586. .h_mask = 0x1,
  587. },
  588. {
  589. .keycode = BTN_2,
  590. .l_mask = 0,
  591. .h_mask = 0x2,
  592. },
  593. {
  594. .keycode = BTN_3,
  595. .l_mask = 0,
  596. .h_mask = 0x4,
  597. },
  598. {
  599. .keycode = BTN_4,
  600. .l_mask = 0x0,
  601. .h_mask = 0x8,
  602. },
  603. };
  604. static struct ad714x_platform_data ad7142_i2c_platform_data = {
  605. .button_num = 4,
  606. .button = ad7142_i2c_button_plat,
  607. .stage_cfg_reg = {
  608. /* fixme: figure out right setting for all comoponent according
  609. * to hardware feature of EVAL-AD7142EB board */
  610. {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  611. {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  612. {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  613. {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  614. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  615. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  616. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  617. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  618. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  619. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  620. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  621. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  622. },
  623. .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
  624. };
  625. #endif
  626. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  627. static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
  628. .enable_dma = 0,
  629. .bits_per_word = 16,
  630. };
  631. #endif
  632. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  633. static unsigned short ad2s120x_platform_data[] = {
  634. /* used as SAMPLE and RDVEL */
  635. GPIO_PF5, GPIO_PF6, 0
  636. };
  637. static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
  638. .enable_dma = 0,
  639. .bits_per_word = 16,
  640. };
  641. #endif
  642. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  643. static unsigned short ad2s1210_platform_data[] = {
  644. /* use as SAMPLE, A0, A1 */
  645. GPIO_PF7, GPIO_PF8, GPIO_PF9,
  646. # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
  647. /* the RES0 and RES1 pins */
  648. GPIO_PF4, GPIO_PF5,
  649. # endif
  650. 0,
  651. };
  652. static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
  653. .enable_dma = 0,
  654. .bits_per_word = 8,
  655. };
  656. #endif
  657. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  658. static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
  659. .enable_dma = 0,
  660. .bits_per_word = 16,
  661. };
  662. #endif
  663. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  664. static unsigned short ad7816_platform_data[] = {
  665. GPIO_PF4, /* rdwr_pin */
  666. GPIO_PF5, /* convert_pin */
  667. GPIO_PF7, /* busy_pin */
  668. 0,
  669. };
  670. static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
  671. .enable_dma = 0,
  672. .bits_per_word = 8,
  673. };
  674. #endif
  675. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  676. static unsigned long adt7310_platform_data[3] = {
  677. /* INT bound temperature alarm event. line 1 */
  678. IRQ_PG4, IRQF_TRIGGER_LOW,
  679. /* CT bound temperature alarm event irq_flags. line 0 */
  680. IRQF_TRIGGER_LOW,
  681. };
  682. static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
  683. .enable_dma = 0,
  684. .bits_per_word = 8,
  685. };
  686. #endif
  687. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  688. static unsigned short ad7298_platform_data[] = {
  689. GPIO_PF7, /* busy_pin */
  690. 0,
  691. };
  692. static struct bfin5xx_spi_chip ad7298_spi_chip_info = {
  693. .enable_dma = 0,
  694. .bits_per_word = 16,
  695. };
  696. #endif
  697. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  698. static unsigned long adt7316_spi_data[2] = {
  699. IRQF_TRIGGER_LOW, /* interrupt flags */
  700. GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  701. };
  702. static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
  703. .enable_dma = 0,
  704. .bits_per_word = 8,
  705. };
  706. #endif
  707. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  708. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  709. static int bfin_mmc_spi_init(struct device *dev,
  710. irqreturn_t (*detect_int)(int, void *), void *data)
  711. {
  712. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  713. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  714. }
  715. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  716. {
  717. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  718. }
  719. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  720. .init = bfin_mmc_spi_init,
  721. .exit = bfin_mmc_spi_exit,
  722. .detect_delay = 100, /* msecs */
  723. };
  724. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  725. .enable_dma = 0,
  726. .bits_per_word = 8,
  727. .pio_interrupt = 0,
  728. };
  729. #endif
  730. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  731. #include <linux/spi/ad7877.h>
  732. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  733. .enable_dma = 0,
  734. .bits_per_word = 16,
  735. };
  736. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  737. .model = 7877,
  738. .vref_delay_usecs = 50, /* internal, no capacitor */
  739. .x_plate_ohms = 419,
  740. .y_plate_ohms = 486,
  741. .pressure_max = 1000,
  742. .pressure_min = 0,
  743. .stopacq_polarity = 1,
  744. .first_conversion_delay = 3,
  745. .acquisition_time = 1,
  746. .averaging = 1,
  747. .pen_down_acc_interval = 1,
  748. };
  749. #endif
  750. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  751. #include <linux/spi/ad7879.h>
  752. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  753. .model = 7879, /* Model = AD7879 */
  754. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  755. .pressure_max = 10000,
  756. .pressure_min = 0,
  757. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  758. .acquisition_time = 1, /* 4us acquisition time per sample */
  759. .median = 2, /* do 8 measurements */
  760. .averaging = 1, /* take the average of 4 middle samples */
  761. .pen_down_acc_interval = 255, /* 9.4 ms */
  762. .gpio_export = 1, /* Export GPIO to gpiolib */
  763. .gpio_base = -1, /* Dynamic allocation */
  764. };
  765. #endif
  766. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  767. #include <linux/input/adxl34x.h>
  768. static const struct adxl34x_platform_data adxl34x_info = {
  769. .x_axis_offset = 0,
  770. .y_axis_offset = 0,
  771. .z_axis_offset = 0,
  772. .tap_threshold = 0x31,
  773. .tap_duration = 0x10,
  774. .tap_latency = 0x60,
  775. .tap_window = 0xF0,
  776. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  777. .act_axis_control = 0xFF,
  778. .activity_threshold = 5,
  779. .inactivity_threshold = 3,
  780. .inactivity_time = 4,
  781. .free_fall_threshold = 0x7,
  782. .free_fall_time = 0x20,
  783. .data_rate = 0x8,
  784. .data_range = ADXL_FULL_RES,
  785. .ev_type = EV_ABS,
  786. .ev_code_x = ABS_X, /* EV_REL */
  787. .ev_code_y = ABS_Y, /* EV_REL */
  788. .ev_code_z = ABS_Z, /* EV_REL */
  789. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  790. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  791. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  792. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  793. .fifo_mode = ADXL_FIFO_STREAM,
  794. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  795. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  796. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  797. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  798. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  799. };
  800. #endif
  801. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  802. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  803. .enable_dma = 0,
  804. .bits_per_word = 16,
  805. };
  806. #endif
  807. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  808. static struct bfin5xx_spi_chip spidev_chip_info = {
  809. .enable_dma = 0,
  810. .bits_per_word = 8,
  811. };
  812. #endif
  813. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  814. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  815. .enable_dma = 0,
  816. .bits_per_word = 8,
  817. };
  818. #endif
  819. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  820. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  821. .enable_dma = 1,
  822. .bits_per_word = 8,
  823. };
  824. #endif
  825. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  826. static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
  827. .bits_per_word = 16,
  828. };
  829. #include <linux/spi/adf702x.h>
  830. #define TXREG 0x0160A470
  831. static const u32 adf7021_regs[] = {
  832. 0x09608FA0,
  833. 0x00575011,
  834. 0x00A7F092,
  835. 0x2B141563,
  836. 0x81F29E94,
  837. 0x00003155,
  838. 0x050A4F66,
  839. 0x00000007,
  840. 0x00000008,
  841. 0x000231E9,
  842. 0x3296354A,
  843. 0x891A2B3B,
  844. 0x00000D9C,
  845. 0x0000000D,
  846. 0x0000000E,
  847. 0x0000000F,
  848. };
  849. static struct adf702x_platform_data adf7021_platform_data = {
  850. .regs_base = (void *)SPORT1_TCR1,
  851. .dma_ch_rx = CH_SPORT1_RX,
  852. .dma_ch_tx = CH_SPORT1_TX,
  853. .irq_sport_err = IRQ_SPORT1_ERROR,
  854. .gpio_int_rfs = GPIO_PF8,
  855. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
  856. P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
  857. .adf702x_model = MODEL_ADF7021,
  858. .adf702x_regs = adf7021_regs,
  859. .tx_reg = TXREG,
  860. };
  861. static inline void adf702x_mac_init(void)
  862. {
  863. random_ether_addr(adf7021_platform_data.mac_addr);
  864. }
  865. #else
  866. static inline void adf702x_mac_init(void) {}
  867. #endif
  868. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  869. #include <linux/spi/ads7846.h>
  870. static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
  871. .bits_per_word = 8,
  872. };
  873. static int ads7873_get_pendown_state(void)
  874. {
  875. return gpio_get_value(GPIO_PF6);
  876. }
  877. static struct ads7846_platform_data __initdata ad7873_pdata = {
  878. .model = 7873, /* AD7873 */
  879. .x_max = 0xfff,
  880. .y_max = 0xfff,
  881. .x_plate_ohms = 620,
  882. .debounce_max = 1,
  883. .debounce_rep = 0,
  884. .debounce_tol = (~0),
  885. .get_pendown_state = ads7873_get_pendown_state,
  886. };
  887. #endif
  888. #if defined(CONFIG_MTD_DATAFLASH) \
  889. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  890. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  891. {
  892. .name = "bootloader(spi)",
  893. .size = 0x00040000,
  894. .offset = 0,
  895. .mask_flags = MTD_CAP_ROM
  896. }, {
  897. .name = "linux kernel(spi)",
  898. .size = 0x180000,
  899. .offset = MTDPART_OFS_APPEND,
  900. }, {
  901. .name = "file system(spi)",
  902. .size = MTDPART_SIZ_FULL,
  903. .offset = MTDPART_OFS_APPEND,
  904. }
  905. };
  906. static struct flash_platform_data bfin_spi_dataflash_data = {
  907. .name = "SPI Dataflash",
  908. .parts = bfin_spi_dataflash_partitions,
  909. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  910. };
  911. /* DataFlash chip */
  912. static struct bfin5xx_spi_chip data_flash_chip_info = {
  913. .enable_dma = 0, /* use dma transfer with this chip*/
  914. .bits_per_word = 8,
  915. };
  916. #endif
  917. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  918. static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
  919. .enable_dma = 0, /* use dma transfer with this chip*/
  920. .bits_per_word = 8,
  921. };
  922. #endif
  923. #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
  924. static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
  925. .enable_dma = 0, /* use dma transfer with this chip*/
  926. .bits_per_word = 8,
  927. };
  928. #endif
  929. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  930. #if defined(CONFIG_MTD_M25P80) \
  931. || defined(CONFIG_MTD_M25P80_MODULE)
  932. {
  933. /* the modalias must be the same as spi device driver name */
  934. .modalias = "m25p80", /* Name of spi_driver for this device */
  935. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  936. .bus_num = 0, /* Framework bus number */
  937. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  938. .platform_data = &bfin_spi_flash_data,
  939. .controller_data = &spi_flash_chip_info,
  940. .mode = SPI_MODE_3,
  941. },
  942. #endif
  943. #if defined(CONFIG_MTD_DATAFLASH) \
  944. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  945. { /* DataFlash chip */
  946. .modalias = "mtd_dataflash",
  947. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  948. .bus_num = 0, /* Framework bus number */
  949. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  950. .platform_data = &bfin_spi_dataflash_data,
  951. .controller_data = &data_flash_chip_info,
  952. .mode = SPI_MODE_3,
  953. },
  954. #endif
  955. #if defined(CONFIG_BFIN_SPI_ADC) \
  956. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  957. {
  958. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  959. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  960. .bus_num = 0, /* Framework bus number */
  961. .chip_select = 1, /* Framework chip select. */
  962. .platform_data = NULL, /* No spi_driver specific config */
  963. .controller_data = &spi_adc_chip_info,
  964. },
  965. #endif
  966. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  967. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  968. {
  969. .modalias = "ad183x",
  970. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  971. .bus_num = 0,
  972. .chip_select = 4,
  973. .platform_data = "ad1836", /* only includes chip name for the moment */
  974. .controller_data = &ad1836_spi_chip_info,
  975. .mode = SPI_MODE_3,
  976. },
  977. #endif
  978. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  979. {
  980. .modalias = "ad193x",
  981. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  982. .bus_num = 0,
  983. .chip_select = 5,
  984. .controller_data = &ad1938_spi_chip_info,
  985. .mode = SPI_MODE_3,
  986. },
  987. #endif
  988. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  989. {
  990. .modalias = "adav80x",
  991. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  992. .bus_num = 0,
  993. .chip_select = 1,
  994. .controller_data = &adav801_spi_chip_info,
  995. .mode = SPI_MODE_3,
  996. },
  997. #endif
  998. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  999. {
  1000. .modalias = "ad714x_captouch",
  1001. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1002. .irq = IRQ_PF4,
  1003. .bus_num = 0,
  1004. .chip_select = 5,
  1005. .mode = SPI_MODE_3,
  1006. .platform_data = &ad7147_spi_platform_data,
  1007. .controller_data = &ad7147_spi_chip_info,
  1008. },
  1009. #endif
  1010. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  1011. {
  1012. .modalias = "ad2s90",
  1013. .bus_num = 0,
  1014. .chip_select = 3, /* change it for your board */
  1015. .mode = SPI_MODE_3,
  1016. .platform_data = NULL,
  1017. .controller_data = &ad2s90_spi_chip_info,
  1018. },
  1019. #endif
  1020. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  1021. {
  1022. .modalias = "ad2s120x",
  1023. .bus_num = 0,
  1024. .chip_select = 4, /* CS, change it for your board */
  1025. .platform_data = ad2s120x_platform_data,
  1026. .controller_data = &ad2s120x_spi_chip_info,
  1027. },
  1028. #endif
  1029. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  1030. {
  1031. .modalias = "ad2s1210",
  1032. .max_speed_hz = 8192000,
  1033. .bus_num = 0,
  1034. .chip_select = 4, /* CS, change it for your board */
  1035. .platform_data = ad2s1210_platform_data,
  1036. .controller_data = &ad2s1210_spi_chip_info,
  1037. },
  1038. #endif
  1039. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  1040. {
  1041. .modalias = "ad7314",
  1042. .max_speed_hz = 1000000,
  1043. .bus_num = 0,
  1044. .chip_select = 4, /* CS, change it for your board */
  1045. .controller_data = &ad7314_spi_chip_info,
  1046. .mode = SPI_MODE_1,
  1047. },
  1048. #endif
  1049. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  1050. {
  1051. .modalias = "ad7818",
  1052. .max_speed_hz = 1000000,
  1053. .bus_num = 0,
  1054. .chip_select = 4, /* CS, change it for your board */
  1055. .platform_data = ad7816_platform_data,
  1056. .controller_data = &ad7816_spi_chip_info,
  1057. .mode = SPI_MODE_3,
  1058. },
  1059. #endif
  1060. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  1061. {
  1062. .modalias = "adt7310",
  1063. .max_speed_hz = 1000000,
  1064. .irq = IRQ_PG5, /* CT alarm event. Line 0 */
  1065. .bus_num = 0,
  1066. .chip_select = 4, /* CS, change it for your board */
  1067. .platform_data = adt7310_platform_data,
  1068. .controller_data = &adt7310_spi_chip_info,
  1069. .mode = SPI_MODE_3,
  1070. },
  1071. #endif
  1072. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  1073. {
  1074. .modalias = "ad7298",
  1075. .max_speed_hz = 1000000,
  1076. .bus_num = 0,
  1077. .chip_select = 4, /* CS, change it for your board */
  1078. .platform_data = ad7298_platform_data,
  1079. .controller_data = &ad7298_spi_chip_info,
  1080. .mode = SPI_MODE_3,
  1081. },
  1082. #endif
  1083. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  1084. {
  1085. .modalias = "adt7316",
  1086. .max_speed_hz = 1000000,
  1087. .irq = IRQ_PG5, /* interrupt line */
  1088. .bus_num = 0,
  1089. .chip_select = 4, /* CS, change it for your board */
  1090. .platform_data = adt7316_spi_data,
  1091. .controller_data = &adt7316_spi_chip_info,
  1092. .mode = SPI_MODE_3,
  1093. },
  1094. #endif
  1095. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  1096. {
  1097. .modalias = "mmc_spi",
  1098. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1099. .bus_num = 0,
  1100. .chip_select = 4,
  1101. .platform_data = &bfin_mmc_spi_pdata,
  1102. .controller_data = &mmc_spi_chip_info,
  1103. .mode = SPI_MODE_3,
  1104. },
  1105. #endif
  1106. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1107. {
  1108. .modalias = "ad7877",
  1109. .platform_data = &bfin_ad7877_ts_info,
  1110. .irq = IRQ_PF6,
  1111. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1112. .bus_num = 0,
  1113. .chip_select = 1,
  1114. .controller_data = &spi_ad7877_chip_info,
  1115. },
  1116. #endif
  1117. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  1118. {
  1119. .modalias = "ad7879",
  1120. .platform_data = &bfin_ad7879_ts_info,
  1121. .irq = IRQ_PF7,
  1122. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1123. .bus_num = 0,
  1124. .chip_select = 1,
  1125. .controller_data = &spi_ad7879_chip_info,
  1126. .mode = SPI_CPHA | SPI_CPOL,
  1127. },
  1128. #endif
  1129. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1130. {
  1131. .modalias = "spidev",
  1132. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1133. .bus_num = 0,
  1134. .chip_select = 1,
  1135. .controller_data = &spidev_chip_info,
  1136. },
  1137. #endif
  1138. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1139. {
  1140. .modalias = "bfin-lq035q1-spi",
  1141. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1142. .bus_num = 0,
  1143. .chip_select = 2,
  1144. .controller_data = &lq035q1_spi_chip_info,
  1145. .mode = SPI_CPHA | SPI_CPOL,
  1146. },
  1147. #endif
  1148. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  1149. {
  1150. .modalias = "enc28j60",
  1151. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1152. .irq = IRQ_PF6,
  1153. .bus_num = 0,
  1154. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1155. .controller_data = &enc28j60_spi_chip_info,
  1156. .mode = SPI_MODE_0,
  1157. },
  1158. #endif
  1159. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1160. {
  1161. .modalias = "adxl34x",
  1162. .platform_data = &adxl34x_info,
  1163. .irq = IRQ_PF6,
  1164. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1165. .bus_num = 0,
  1166. .chip_select = 2,
  1167. .controller_data = &spi_adxl34x_chip_info,
  1168. .mode = SPI_MODE_3,
  1169. },
  1170. #endif
  1171. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  1172. {
  1173. .modalias = "adf702x",
  1174. .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
  1175. .bus_num = 0,
  1176. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1177. .controller_data = &adf7021_spi_chip_info,
  1178. .platform_data = &adf7021_platform_data,
  1179. .mode = SPI_MODE_0,
  1180. },
  1181. #endif
  1182. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  1183. {
  1184. .modalias = "ads7846",
  1185. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1186. .bus_num = 0,
  1187. .irq = IRQ_PF6,
  1188. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1189. .controller_data = &ad7873_spi_chip_info,
  1190. .platform_data = &ad7873_pdata,
  1191. .mode = SPI_MODE_0,
  1192. },
  1193. #endif
  1194. #if defined(CONFIG_AD7476) \
  1195. || defined(CONFIG_AD7476_MODULE)
  1196. {
  1197. .modalias = "ad7476", /* Name of spi_driver for this device */
  1198. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  1199. .bus_num = 0, /* Framework bus number */
  1200. .chip_select = 1, /* Framework chip select. */
  1201. .platform_data = NULL, /* No spi_driver specific config */
  1202. .controller_data = &spi_ad7476_chip_info,
  1203. .mode = SPI_MODE_3,
  1204. },
  1205. #endif
  1206. #if defined(CONFIG_ADE7753) \
  1207. || defined(CONFIG_ADE7753_MODULE)
  1208. {
  1209. .modalias = "ade7753",
  1210. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1211. .bus_num = 0,
  1212. .chip_select = 1, /* CS, change it for your board */
  1213. .platform_data = NULL, /* No spi_driver specific config */
  1214. .mode = SPI_MODE_1,
  1215. },
  1216. #endif
  1217. #if defined(CONFIG_ADE7754) \
  1218. || defined(CONFIG_ADE7754_MODULE)
  1219. {
  1220. .modalias = "ade7754",
  1221. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1222. .bus_num = 0,
  1223. .chip_select = 1, /* CS, change it for your board */
  1224. .platform_data = NULL, /* No spi_driver specific config */
  1225. .mode = SPI_MODE_1,
  1226. },
  1227. #endif
  1228. #if defined(CONFIG_ADE7758) \
  1229. || defined(CONFIG_ADE7758_MODULE)
  1230. {
  1231. .modalias = "ade7758",
  1232. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1233. .bus_num = 0,
  1234. .chip_select = 1, /* CS, change it for your board */
  1235. .platform_data = NULL, /* No spi_driver specific config */
  1236. .mode = SPI_MODE_1,
  1237. },
  1238. #endif
  1239. #if defined(CONFIG_ADE7759) \
  1240. || defined(CONFIG_ADE7759_MODULE)
  1241. {
  1242. .modalias = "ade7759",
  1243. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1244. .bus_num = 0,
  1245. .chip_select = 1, /* CS, change it for your board */
  1246. .platform_data = NULL, /* No spi_driver specific config */
  1247. .mode = SPI_MODE_1,
  1248. },
  1249. #endif
  1250. #if defined(CONFIG_ADE7854_SPI) \
  1251. || defined(CONFIG_ADE7854_SPI_MODULE)
  1252. {
  1253. .modalias = "ade7854",
  1254. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1255. .bus_num = 0,
  1256. .chip_select = 1, /* CS, change it for your board */
  1257. .platform_data = NULL, /* No spi_driver specific config */
  1258. .mode = SPI_MODE_3,
  1259. },
  1260. #endif
  1261. #if defined(CONFIG_ADIS16060) \
  1262. || defined(CONFIG_ADIS16060_MODULE)
  1263. {
  1264. .modalias = "adis16060_r",
  1265. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1266. .bus_num = 0,
  1267. .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
  1268. .platform_data = NULL, /* No spi_driver specific config */
  1269. .mode = SPI_MODE_0,
  1270. },
  1271. {
  1272. .modalias = "adis16060_w",
  1273. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1274. .bus_num = 0,
  1275. .chip_select = 2, /* CS for write, change it for your board */
  1276. .platform_data = NULL, /* No spi_driver specific config */
  1277. .mode = SPI_MODE_1,
  1278. },
  1279. #endif
  1280. #if defined(CONFIG_ADIS16130) \
  1281. || defined(CONFIG_ADIS16130_MODULE)
  1282. {
  1283. .modalias = "adis16130",
  1284. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1285. .bus_num = 0,
  1286. .chip_select = 1, /* CS for read, change it for your board */
  1287. .platform_data = NULL, /* No spi_driver specific config */
  1288. .mode = SPI_MODE_3,
  1289. },
  1290. #endif
  1291. #if defined(CONFIG_ADIS16201) \
  1292. || defined(CONFIG_ADIS16201_MODULE)
  1293. {
  1294. .modalias = "adis16201",
  1295. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1296. .bus_num = 0,
  1297. .chip_select = 5, /* CS, change it for your board */
  1298. .platform_data = NULL, /* No spi_driver specific config */
  1299. .mode = SPI_MODE_3,
  1300. .irq = IRQ_PF4,
  1301. },
  1302. #endif
  1303. #if defined(CONFIG_ADIS16203) \
  1304. || defined(CONFIG_ADIS16203_MODULE)
  1305. {
  1306. .modalias = "adis16203",
  1307. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1308. .bus_num = 0,
  1309. .chip_select = 5, /* CS, change it for your board */
  1310. .platform_data = NULL, /* No spi_driver specific config */
  1311. .mode = SPI_MODE_3,
  1312. .irq = IRQ_PF4,
  1313. },
  1314. #endif
  1315. #if defined(CONFIG_ADIS16204) \
  1316. || defined(CONFIG_ADIS16204_MODULE)
  1317. {
  1318. .modalias = "adis16204",
  1319. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1320. .bus_num = 0,
  1321. .chip_select = 5, /* CS, change it for your board */
  1322. .platform_data = NULL, /* No spi_driver specific config */
  1323. .mode = SPI_MODE_3,
  1324. .irq = IRQ_PF4,
  1325. },
  1326. #endif
  1327. #if defined(CONFIG_ADIS16209) \
  1328. || defined(CONFIG_ADIS16209_MODULE)
  1329. {
  1330. .modalias = "adis16209",
  1331. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1332. .bus_num = 0,
  1333. .chip_select = 5, /* CS, change it for your board */
  1334. .platform_data = NULL, /* No spi_driver specific config */
  1335. .mode = SPI_MODE_3,
  1336. .irq = IRQ_PF4,
  1337. },
  1338. #endif
  1339. #if defined(CONFIG_ADIS16220) \
  1340. || defined(CONFIG_ADIS16220_MODULE)
  1341. {
  1342. .modalias = "adis16220",
  1343. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1344. .bus_num = 0,
  1345. .chip_select = 5, /* CS, change it for your board */
  1346. .platform_data = NULL, /* No spi_driver specific config */
  1347. .mode = SPI_MODE_3,
  1348. .irq = IRQ_PF4,
  1349. },
  1350. #endif
  1351. #if defined(CONFIG_ADIS16240) \
  1352. || defined(CONFIG_ADIS16240_MODULE)
  1353. {
  1354. .modalias = "adis16240",
  1355. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1356. .bus_num = 0,
  1357. .chip_select = 5, /* CS, change it for your board */
  1358. .platform_data = NULL, /* No spi_driver specific config */
  1359. .mode = SPI_MODE_3,
  1360. .irq = IRQ_PF4,
  1361. },
  1362. #endif
  1363. #if defined(CONFIG_ADIS16260) \
  1364. || defined(CONFIG_ADIS16260_MODULE)
  1365. {
  1366. .modalias = "adis16260",
  1367. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1368. .bus_num = 0,
  1369. .chip_select = 5, /* CS, change it for your board */
  1370. .platform_data = NULL, /* No spi_driver specific config */
  1371. .mode = SPI_MODE_3,
  1372. .irq = IRQ_PF4,
  1373. },
  1374. #endif
  1375. #if defined(CONFIG_ADIS16261) \
  1376. || defined(CONFIG_ADIS16261_MODULE)
  1377. {
  1378. .modalias = "adis16261",
  1379. .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
  1380. .bus_num = 0,
  1381. .chip_select = 1, /* CS, change it for your board */
  1382. .platform_data = NULL, /* No spi_driver specific config */
  1383. .mode = SPI_MODE_3,
  1384. },
  1385. #endif
  1386. #if defined(CONFIG_ADIS16300) \
  1387. || defined(CONFIG_ADIS16300_MODULE)
  1388. {
  1389. .modalias = "adis16300",
  1390. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1391. .bus_num = 0,
  1392. .chip_select = 5, /* CS, change it for your board */
  1393. .platform_data = NULL, /* No spi_driver specific config */
  1394. .mode = SPI_MODE_3,
  1395. .irq = IRQ_PF4,
  1396. },
  1397. #endif
  1398. #if defined(CONFIG_ADIS16350) \
  1399. || defined(CONFIG_ADIS16350_MODULE)
  1400. {
  1401. .modalias = "adis16364",
  1402. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1403. .bus_num = 0,
  1404. .chip_select = 5, /* CS, change it for your board */
  1405. .platform_data = NULL, /* No spi_driver specific config */
  1406. .mode = SPI_MODE_3,
  1407. .irq = IRQ_PF4,
  1408. },
  1409. #endif
  1410. #if defined(CONFIG_ADIS16400) \
  1411. || defined(CONFIG_ADIS16400_MODULE)
  1412. {
  1413. .modalias = "adis16400",
  1414. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1415. .bus_num = 0,
  1416. .chip_select = 1, /* CS, change it for your board */
  1417. .platform_data = NULL, /* No spi_driver specific config */
  1418. .mode = SPI_MODE_3,
  1419. },
  1420. #endif
  1421. };
  1422. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1423. /* SPI controller data */
  1424. static struct bfin5xx_spi_master bfin_spi0_info = {
  1425. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  1426. .enable_dma = 1, /* master has the ability to do dma transfer */
  1427. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1428. };
  1429. /* SPI (0) */
  1430. static struct resource bfin_spi0_resource[] = {
  1431. [0] = {
  1432. .start = SPI0_REGBASE,
  1433. .end = SPI0_REGBASE + 0xFF,
  1434. .flags = IORESOURCE_MEM,
  1435. },
  1436. [1] = {
  1437. .start = CH_SPI,
  1438. .end = CH_SPI,
  1439. .flags = IORESOURCE_DMA,
  1440. },
  1441. [2] = {
  1442. .start = IRQ_SPI,
  1443. .end = IRQ_SPI,
  1444. .flags = IORESOURCE_IRQ,
  1445. },
  1446. };
  1447. static struct platform_device bfin_spi0_device = {
  1448. .name = "bfin-spi",
  1449. .id = 0, /* Bus number */
  1450. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1451. .resource = bfin_spi0_resource,
  1452. .dev = {
  1453. .platform_data = &bfin_spi0_info, /* Passed to driver */
  1454. },
  1455. };
  1456. #endif /* spi master and devices */
  1457. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  1458. /* SPORT SPI controller data */
  1459. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  1460. .num_chipselect = 1, /* master only supports one device */
  1461. .enable_dma = 0, /* master don't support DMA */
  1462. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  1463. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  1464. };
  1465. static struct resource bfin_sport_spi0_resource[] = {
  1466. [0] = {
  1467. .start = SPORT0_TCR1,
  1468. .end = SPORT0_TCR1 + 0xFF,
  1469. .flags = IORESOURCE_MEM,
  1470. },
  1471. [1] = {
  1472. .start = IRQ_SPORT0_ERROR,
  1473. .end = IRQ_SPORT0_ERROR,
  1474. .flags = IORESOURCE_IRQ,
  1475. },
  1476. };
  1477. static struct platform_device bfin_sport_spi0_device = {
  1478. .name = "bfin-sport-spi",
  1479. .id = 1, /* Bus number */
  1480. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  1481. .resource = bfin_sport_spi0_resource,
  1482. .dev = {
  1483. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  1484. },
  1485. };
  1486. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  1487. .num_chipselect = 1, /* master only supports one device */
  1488. .enable_dma = 0, /* master don't support DMA */
  1489. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  1490. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  1491. };
  1492. static struct resource bfin_sport_spi1_resource[] = {
  1493. [0] = {
  1494. .start = SPORT1_TCR1,
  1495. .end = SPORT1_TCR1 + 0xFF,
  1496. .flags = IORESOURCE_MEM,
  1497. },
  1498. [1] = {
  1499. .start = IRQ_SPORT1_ERROR,
  1500. .end = IRQ_SPORT1_ERROR,
  1501. .flags = IORESOURCE_IRQ,
  1502. },
  1503. };
  1504. static struct platform_device bfin_sport_spi1_device = {
  1505. .name = "bfin-sport-spi",
  1506. .id = 2, /* Bus number */
  1507. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  1508. .resource = bfin_sport_spi1_resource,
  1509. .dev = {
  1510. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  1511. },
  1512. };
  1513. #endif /* sport spi master and devices */
  1514. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1515. static struct platform_device bfin_fb_device = {
  1516. .name = "bf537-lq035",
  1517. };
  1518. #endif
  1519. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1520. #include <asm/bfin-lq035q1.h>
  1521. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  1522. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  1523. .ppi_mode = USE_RGB565_16_BIT_PPI,
  1524. .use_bl = 0, /* let something else control the LCD Blacklight */
  1525. .gpio_bl = GPIO_PF7,
  1526. };
  1527. static struct resource bfin_lq035q1_resources[] = {
  1528. {
  1529. .start = IRQ_PPI_ERROR,
  1530. .end = IRQ_PPI_ERROR,
  1531. .flags = IORESOURCE_IRQ,
  1532. },
  1533. };
  1534. static struct platform_device bfin_lq035q1_device = {
  1535. .name = "bfin-lq035q1",
  1536. .id = -1,
  1537. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  1538. .resource = bfin_lq035q1_resources,
  1539. .dev = {
  1540. .platform_data = &bfin_lq035q1_data,
  1541. },
  1542. };
  1543. #endif
  1544. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1545. #ifdef CONFIG_SERIAL_BFIN_UART0
  1546. static struct resource bfin_uart0_resources[] = {
  1547. {
  1548. .start = UART0_THR,
  1549. .end = UART0_GCTL+2,
  1550. .flags = IORESOURCE_MEM,
  1551. },
  1552. {
  1553. .start = IRQ_UART0_RX,
  1554. .end = IRQ_UART0_RX+1,
  1555. .flags = IORESOURCE_IRQ,
  1556. },
  1557. {
  1558. .start = IRQ_UART0_ERROR,
  1559. .end = IRQ_UART0_ERROR,
  1560. .flags = IORESOURCE_IRQ,
  1561. },
  1562. {
  1563. .start = CH_UART0_TX,
  1564. .end = CH_UART0_TX,
  1565. .flags = IORESOURCE_DMA,
  1566. },
  1567. {
  1568. .start = CH_UART0_RX,
  1569. .end = CH_UART0_RX,
  1570. .flags = IORESOURCE_DMA,
  1571. },
  1572. #ifdef CONFIG_BFIN_UART0_CTSRTS
  1573. { /* CTS pin */
  1574. .start = GPIO_PG7,
  1575. .end = GPIO_PG7,
  1576. .flags = IORESOURCE_IO,
  1577. },
  1578. { /* RTS pin */
  1579. .start = GPIO_PG6,
  1580. .end = GPIO_PG6,
  1581. .flags = IORESOURCE_IO,
  1582. },
  1583. #endif
  1584. };
  1585. static unsigned short bfin_uart0_peripherals[] = {
  1586. P_UART0_TX, P_UART0_RX, 0
  1587. };
  1588. static struct platform_device bfin_uart0_device = {
  1589. .name = "bfin-uart",
  1590. .id = 0,
  1591. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  1592. .resource = bfin_uart0_resources,
  1593. .dev = {
  1594. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  1595. },
  1596. };
  1597. #endif
  1598. #ifdef CONFIG_SERIAL_BFIN_UART1
  1599. static struct resource bfin_uart1_resources[] = {
  1600. {
  1601. .start = UART1_THR,
  1602. .end = UART1_GCTL+2,
  1603. .flags = IORESOURCE_MEM,
  1604. },
  1605. {
  1606. .start = IRQ_UART1_RX,
  1607. .end = IRQ_UART1_RX+1,
  1608. .flags = IORESOURCE_IRQ,
  1609. },
  1610. {
  1611. .start = IRQ_UART1_ERROR,
  1612. .end = IRQ_UART1_ERROR,
  1613. .flags = IORESOURCE_IRQ,
  1614. },
  1615. {
  1616. .start = CH_UART1_TX,
  1617. .end = CH_UART1_TX,
  1618. .flags = IORESOURCE_DMA,
  1619. },
  1620. {
  1621. .start = CH_UART1_RX,
  1622. .end = CH_UART1_RX,
  1623. .flags = IORESOURCE_DMA,
  1624. },
  1625. };
  1626. static unsigned short bfin_uart1_peripherals[] = {
  1627. P_UART1_TX, P_UART1_RX, 0
  1628. };
  1629. static struct platform_device bfin_uart1_device = {
  1630. .name = "bfin-uart",
  1631. .id = 1,
  1632. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  1633. .resource = bfin_uart1_resources,
  1634. .dev = {
  1635. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  1636. },
  1637. };
  1638. #endif
  1639. #endif
  1640. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1641. #ifdef CONFIG_BFIN_SIR0
  1642. static struct resource bfin_sir0_resources[] = {
  1643. {
  1644. .start = 0xFFC00400,
  1645. .end = 0xFFC004FF,
  1646. .flags = IORESOURCE_MEM,
  1647. },
  1648. {
  1649. .start = IRQ_UART0_RX,
  1650. .end = IRQ_UART0_RX+1,
  1651. .flags = IORESOURCE_IRQ,
  1652. },
  1653. {
  1654. .start = CH_UART0_RX,
  1655. .end = CH_UART0_RX+1,
  1656. .flags = IORESOURCE_DMA,
  1657. },
  1658. };
  1659. static struct platform_device bfin_sir0_device = {
  1660. .name = "bfin_sir",
  1661. .id = 0,
  1662. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  1663. .resource = bfin_sir0_resources,
  1664. };
  1665. #endif
  1666. #ifdef CONFIG_BFIN_SIR1
  1667. static struct resource bfin_sir1_resources[] = {
  1668. {
  1669. .start = 0xFFC02000,
  1670. .end = 0xFFC020FF,
  1671. .flags = IORESOURCE_MEM,
  1672. },
  1673. {
  1674. .start = IRQ_UART1_RX,
  1675. .end = IRQ_UART1_RX+1,
  1676. .flags = IORESOURCE_IRQ,
  1677. },
  1678. {
  1679. .start = CH_UART1_RX,
  1680. .end = CH_UART1_RX+1,
  1681. .flags = IORESOURCE_DMA,
  1682. },
  1683. };
  1684. static struct platform_device bfin_sir1_device = {
  1685. .name = "bfin_sir",
  1686. .id = 1,
  1687. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  1688. .resource = bfin_sir1_resources,
  1689. };
  1690. #endif
  1691. #endif
  1692. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1693. static struct resource bfin_twi0_resource[] = {
  1694. [0] = {
  1695. .start = TWI0_REGBASE,
  1696. .end = TWI0_REGBASE,
  1697. .flags = IORESOURCE_MEM,
  1698. },
  1699. [1] = {
  1700. .start = IRQ_TWI,
  1701. .end = IRQ_TWI,
  1702. .flags = IORESOURCE_IRQ,
  1703. },
  1704. };
  1705. static struct platform_device i2c_bfin_twi_device = {
  1706. .name = "i2c-bfin-twi",
  1707. .id = 0,
  1708. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1709. .resource = bfin_twi0_resource,
  1710. };
  1711. #endif
  1712. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1713. static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
  1714. [0] = KEY_GRAVE,
  1715. [1] = KEY_1,
  1716. [2] = KEY_2,
  1717. [3] = KEY_3,
  1718. [4] = KEY_4,
  1719. [5] = KEY_5,
  1720. [6] = KEY_6,
  1721. [7] = KEY_7,
  1722. [8] = KEY_8,
  1723. [9] = KEY_9,
  1724. [10] = KEY_0,
  1725. [11] = KEY_MINUS,
  1726. [12] = KEY_EQUAL,
  1727. [13] = KEY_BACKSLASH,
  1728. [15] = KEY_KP0,
  1729. [16] = KEY_Q,
  1730. [17] = KEY_W,
  1731. [18] = KEY_E,
  1732. [19] = KEY_R,
  1733. [20] = KEY_T,
  1734. [21] = KEY_Y,
  1735. [22] = KEY_U,
  1736. [23] = KEY_I,
  1737. [24] = KEY_O,
  1738. [25] = KEY_P,
  1739. [26] = KEY_LEFTBRACE,
  1740. [27] = KEY_RIGHTBRACE,
  1741. [29] = KEY_KP1,
  1742. [30] = KEY_KP2,
  1743. [31] = KEY_KP3,
  1744. [32] = KEY_A,
  1745. [33] = KEY_S,
  1746. [34] = KEY_D,
  1747. [35] = KEY_F,
  1748. [36] = KEY_G,
  1749. [37] = KEY_H,
  1750. [38] = KEY_J,
  1751. [39] = KEY_K,
  1752. [40] = KEY_L,
  1753. [41] = KEY_SEMICOLON,
  1754. [42] = KEY_APOSTROPHE,
  1755. [43] = KEY_BACKSLASH,
  1756. [45] = KEY_KP4,
  1757. [46] = KEY_KP5,
  1758. [47] = KEY_KP6,
  1759. [48] = KEY_102ND,
  1760. [49] = KEY_Z,
  1761. [50] = KEY_X,
  1762. [51] = KEY_C,
  1763. [52] = KEY_V,
  1764. [53] = KEY_B,
  1765. [54] = KEY_N,
  1766. [55] = KEY_M,
  1767. [56] = KEY_COMMA,
  1768. [57] = KEY_DOT,
  1769. [58] = KEY_SLASH,
  1770. [60] = KEY_KPDOT,
  1771. [61] = KEY_KP7,
  1772. [62] = KEY_KP8,
  1773. [63] = KEY_KP9,
  1774. [64] = KEY_SPACE,
  1775. [65] = KEY_BACKSPACE,
  1776. [66] = KEY_TAB,
  1777. [67] = KEY_KPENTER,
  1778. [68] = KEY_ENTER,
  1779. [69] = KEY_ESC,
  1780. [70] = KEY_DELETE,
  1781. [74] = KEY_KPMINUS,
  1782. [76] = KEY_UP,
  1783. [77] = KEY_DOWN,
  1784. [78] = KEY_RIGHT,
  1785. [79] = KEY_LEFT,
  1786. };
  1787. static struct adp5588_kpad_platform_data adp5588_kpad_data = {
  1788. .rows = 8,
  1789. .cols = 10,
  1790. .keymap = adp5588_keymap,
  1791. .keymapsize = ARRAY_SIZE(adp5588_keymap),
  1792. .repeat = 0,
  1793. };
  1794. #endif
  1795. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1796. #include <linux/mfd/adp5520.h>
  1797. /*
  1798. * ADP5520/5501 Backlight Data
  1799. */
  1800. static struct adp5520_backlight_platform_data adp5520_backlight_data = {
  1801. .fade_in = ADP5520_FADE_T_1200ms,
  1802. .fade_out = ADP5520_FADE_T_1200ms,
  1803. .fade_led_law = ADP5520_BL_LAW_LINEAR,
  1804. .en_ambl_sens = 1,
  1805. .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
  1806. .l1_daylight_max = ADP5520_BL_CUR_mA(15),
  1807. .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
  1808. .l2_office_max = ADP5520_BL_CUR_mA(7),
  1809. .l2_office_dim = ADP5520_BL_CUR_mA(0),
  1810. .l3_dark_max = ADP5520_BL_CUR_mA(3),
  1811. .l3_dark_dim = ADP5520_BL_CUR_mA(0),
  1812. .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
  1813. .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
  1814. .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
  1815. .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
  1816. };
  1817. /*
  1818. * ADP5520/5501 LEDs Data
  1819. */
  1820. static struct led_info adp5520_leds[] = {
  1821. {
  1822. .name = "adp5520-led1",
  1823. .default_trigger = "none",
  1824. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  1825. },
  1826. #ifdef ADP5520_EN_ALL_LEDS
  1827. {
  1828. .name = "adp5520-led2",
  1829. .default_trigger = "none",
  1830. .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
  1831. },
  1832. {
  1833. .name = "adp5520-led3",
  1834. .default_trigger = "none",
  1835. .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
  1836. },
  1837. #endif
  1838. };
  1839. static struct adp5520_leds_platform_data adp5520_leds_data = {
  1840. .num_leds = ARRAY_SIZE(adp5520_leds),
  1841. .leds = adp5520_leds,
  1842. .fade_in = ADP5520_FADE_T_600ms,
  1843. .fade_out = ADP5520_FADE_T_600ms,
  1844. .led_on_time = ADP5520_LED_ONT_600ms,
  1845. };
  1846. /*
  1847. * ADP5520 GPIO Data
  1848. */
  1849. static struct adp5520_gpio_platform_data adp5520_gpio_data = {
  1850. .gpio_start = 50,
  1851. .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1852. .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1853. };
  1854. /*
  1855. * ADP5520 Keypad Data
  1856. */
  1857. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  1858. [ADP5520_KEY(0, 0)] = KEY_GRAVE,
  1859. [ADP5520_KEY(0, 1)] = KEY_1,
  1860. [ADP5520_KEY(0, 2)] = KEY_2,
  1861. [ADP5520_KEY(0, 3)] = KEY_3,
  1862. [ADP5520_KEY(1, 0)] = KEY_4,
  1863. [ADP5520_KEY(1, 1)] = KEY_5,
  1864. [ADP5520_KEY(1, 2)] = KEY_6,
  1865. [ADP5520_KEY(1, 3)] = KEY_7,
  1866. [ADP5520_KEY(2, 0)] = KEY_8,
  1867. [ADP5520_KEY(2, 1)] = KEY_9,
  1868. [ADP5520_KEY(2, 2)] = KEY_0,
  1869. [ADP5520_KEY(2, 3)] = KEY_MINUS,
  1870. [ADP5520_KEY(3, 0)] = KEY_EQUAL,
  1871. [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
  1872. [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
  1873. [ADP5520_KEY(3, 3)] = KEY_ENTER,
  1874. };
  1875. static struct adp5520_keys_platform_data adp5520_keys_data = {
  1876. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  1877. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  1878. .keymap = adp5520_keymap,
  1879. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  1880. .repeat = 0,
  1881. };
  1882. /*
  1883. * ADP5520/5501 Multifunction Device Init Data
  1884. */
  1885. static struct adp5520_platform_data adp5520_pdev_data = {
  1886. .backlight = &adp5520_backlight_data,
  1887. .leds = &adp5520_leds_data,
  1888. .gpio = &adp5520_gpio_data,
  1889. .keys = &adp5520_keys_data,
  1890. };
  1891. #endif
  1892. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  1893. static struct adp5588_gpio_platform_data adp5588_gpio_data = {
  1894. .gpio_start = 50,
  1895. .pullup_dis_mask = 0,
  1896. };
  1897. #endif
  1898. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  1899. #include <linux/i2c/adp8870.h>
  1900. static struct led_info adp8870_leds[] = {
  1901. {
  1902. .name = "adp8870-led7",
  1903. .default_trigger = "none",
  1904. .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
  1905. },
  1906. };
  1907. static struct adp8870_backlight_platform_data adp8870_pdata = {
  1908. .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
  1909. ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1910. .pwm_assign = 0, /* 1 = Enables PWM mode */
  1911. .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1912. .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1913. .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1914. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1915. .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1916. .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1917. .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1918. .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1919. .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1920. .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1921. .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1922. .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1923. .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1924. .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1925. .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1926. .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1927. .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1928. .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1929. .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1930. .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1931. .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1932. .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1933. .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1934. .leds = adp8870_leds,
  1935. .num_leds = ARRAY_SIZE(adp8870_leds),
  1936. .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1937. .led_fade_in = ADP8870_FADE_T_600ms,
  1938. .led_fade_out = ADP8870_FADE_T_600ms,
  1939. .led_on_time = ADP8870_LED_ONT_200ms,
  1940. };
  1941. #endif
  1942. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  1943. #include <linux/i2c/adp8860.h>
  1944. static struct led_info adp8860_leds[] = {
  1945. {
  1946. .name = "adp8860-led7",
  1947. .default_trigger = "none",
  1948. .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
  1949. },
  1950. };
  1951. static struct adp8860_backlight_platform_data adp8860_pdata = {
  1952. .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
  1953. ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1954. .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1955. .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1956. .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1957. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1958. .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1959. .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1960. .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1961. .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1962. .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1963. .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1964. .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1965. .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1966. .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1967. .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1968. .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1969. .leds = adp8860_leds,
  1970. .num_leds = ARRAY_SIZE(adp8860_leds),
  1971. .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1972. .led_fade_in = ADP8860_FADE_T_600ms,
  1973. .led_fade_out = ADP8860_FADE_T_600ms,
  1974. .led_on_time = ADP8860_LED_ONT_200ms,
  1975. };
  1976. #endif
  1977. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  1978. static struct regulator_consumer_supply ad5398_consumer = {
  1979. .supply = "current",
  1980. };
  1981. static struct regulator_init_data ad5398_regulator_data = {
  1982. .constraints = {
  1983. .name = "current range",
  1984. .max_uA = 120000,
  1985. .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
  1986. },
  1987. .num_consumer_supplies = 1,
  1988. .consumer_supplies = &ad5398_consumer,
  1989. };
  1990. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  1991. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  1992. static struct platform_device ad5398_virt_consumer_device = {
  1993. .name = "reg-virt-consumer",
  1994. .id = 0,
  1995. .dev = {
  1996. .platform_data = "current", /* Passed to driver */
  1997. },
  1998. };
  1999. #endif
  2000. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2001. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2002. static struct regulator_bulk_data ad5398_bulk_data = {
  2003. .supply = "current",
  2004. };
  2005. static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
  2006. .name = "ad5398",
  2007. .num_supplies = 1,
  2008. .supplies = &ad5398_bulk_data,
  2009. };
  2010. static struct platform_device ad5398_userspace_consumer_device = {
  2011. .name = "reg-userspace-consumer",
  2012. .id = 0,
  2013. .dev = {
  2014. .platform_data = &ad5398_userspace_comsumer_data,
  2015. },
  2016. };
  2017. #endif
  2018. #endif
  2019. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  2020. /* INT bound temperature alarm event. line 1 */
  2021. static unsigned long adt7410_platform_data[2] = {
  2022. IRQ_PG4, IRQF_TRIGGER_LOW,
  2023. };
  2024. #endif
  2025. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  2026. /* INT bound temperature alarm event. line 1 */
  2027. static unsigned long adt7316_i2c_data[2] = {
  2028. IRQF_TRIGGER_LOW, /* interrupt flags */
  2029. GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  2030. };
  2031. #endif
  2032. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  2033. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  2034. {
  2035. I2C_BOARD_INFO("ad1937", 0x04),
  2036. },
  2037. #endif
  2038. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  2039. {
  2040. I2C_BOARD_INFO("adav803", 0x10),
  2041. },
  2042. #endif
  2043. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  2044. {
  2045. I2C_BOARD_INFO("ad7142_captouch", 0x2C),
  2046. .irq = IRQ_PG5,
  2047. .platform_data = (void *)&ad7142_i2c_platform_data,
  2048. },
  2049. #endif
  2050. #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
  2051. {
  2052. I2C_BOARD_INFO("ad7150", 0x48),
  2053. .irq = IRQ_PG5, /* fixme: use real interrupt number */
  2054. },
  2055. #endif
  2056. #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
  2057. {
  2058. I2C_BOARD_INFO("ad7152", 0x48),
  2059. },
  2060. #endif
  2061. #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
  2062. {
  2063. I2C_BOARD_INFO("ad774x", 0x48),
  2064. },
  2065. #endif
  2066. #if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
  2067. {
  2068. I2C_BOARD_INFO("ad7414", 0x9),
  2069. .irq = IRQ_PG5,
  2070. .irq_flags = IRQF_TRIGGER_LOW,
  2071. },
  2072. #endif
  2073. #if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
  2074. {
  2075. I2C_BOARD_INFO("ad7417", 0xb),
  2076. .irq = IRQ_PG5,
  2077. .irq_flags = IRQF_TRIGGER_LOW,
  2078. .platform_data = (void *)GPIO_PF4,
  2079. },
  2080. #endif
  2081. #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
  2082. {
  2083. I2C_BOARD_INFO("ade7854", 0x38),
  2084. },
  2085. #endif
  2086. #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
  2087. {
  2088. I2C_BOARD_INFO("adt75", 0x9),
  2089. .irq = IRQ_PG5,
  2090. .irq_flags = IRQF_TRIGGER_LOW,
  2091. },
  2092. #endif
  2093. #if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)
  2094. {
  2095. I2C_BOARD_INFO("adt7408", 0x18),
  2096. .irq = IRQ_PG5,
  2097. .irq_flags = IRQF_TRIGGER_LOW,
  2098. },
  2099. #endif
  2100. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  2101. {
  2102. I2C_BOARD_INFO("adt7410", 0x48),
  2103. /* CT critical temperature event. line 0 */
  2104. .irq = IRQ_PG5,
  2105. .irq_flags = IRQF_TRIGGER_LOW,
  2106. .platform_data = (void *)&adt7410_platform_data,
  2107. },
  2108. #endif
  2109. #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
  2110. {
  2111. I2C_BOARD_INFO("ad7291", 0x20),
  2112. .irq = IRQ_PG5,
  2113. .irq_flags = IRQF_TRIGGER_LOW,
  2114. },
  2115. #endif
  2116. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  2117. {
  2118. I2C_BOARD_INFO("adt7316", 0x48),
  2119. .irq = IRQ_PG6,
  2120. .platform_data = (void *)&adt7316_i2c_data,
  2121. },
  2122. #endif
  2123. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  2124. {
  2125. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  2126. },
  2127. #endif
  2128. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  2129. {
  2130. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  2131. .irq = IRQ_PG6,
  2132. },
  2133. #endif
  2134. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  2135. {
  2136. I2C_BOARD_INFO("ad7879", 0x2F),
  2137. .irq = IRQ_PG5,
  2138. .platform_data = (void *)&bfin_ad7879_ts_info,
  2139. },
  2140. #endif
  2141. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  2142. {
  2143. I2C_BOARD_INFO("adp5588-keys", 0x34),
  2144. .irq = IRQ_PG0,
  2145. .platform_data = (void *)&adp5588_kpad_data,
  2146. },
  2147. #endif
  2148. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  2149. {
  2150. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  2151. .irq = IRQ_PG0,
  2152. .platform_data = (void *)&adp5520_pdev_data,
  2153. },
  2154. #endif
  2155. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  2156. {
  2157. I2C_BOARD_INFO("adxl34x", 0x53),
  2158. .irq = IRQ_PG3,
  2159. .platform_data = (void *)&adxl34x_info,
  2160. },
  2161. #endif
  2162. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  2163. {
  2164. I2C_BOARD_INFO("adp5588-gpio", 0x34),
  2165. .platform_data = (void *)&adp5588_gpio_data,
  2166. },
  2167. #endif
  2168. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  2169. {
  2170. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  2171. },
  2172. #endif
  2173. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2174. {
  2175. I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
  2176. },
  2177. #endif
  2178. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  2179. {
  2180. I2C_BOARD_INFO("adp8870", 0x2B),
  2181. .platform_data = (void *)&adp8870_pdata,
  2182. },
  2183. #endif
  2184. #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
  2185. {
  2186. I2C_BOARD_INFO("adau1371", 0x1A),
  2187. },
  2188. #endif
  2189. #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
  2190. {
  2191. I2C_BOARD_INFO("adau1761", 0x38),
  2192. },
  2193. #endif
  2194. #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
  2195. {
  2196. I2C_BOARD_INFO("adau1361", 0x38),
  2197. },
  2198. #endif
  2199. #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
  2200. {
  2201. I2C_BOARD_INFO("ad5258", 0x18),
  2202. },
  2203. #endif
  2204. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  2205. {
  2206. I2C_BOARD_INFO("ssm2602", 0x1b),
  2207. },
  2208. #endif
  2209. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2210. {
  2211. I2C_BOARD_INFO("ad5398", 0xC),
  2212. .platform_data = (void *)&ad5398_regulator_data,
  2213. },
  2214. #endif
  2215. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  2216. {
  2217. I2C_BOARD_INFO("adp8860", 0x2A),
  2218. .platform_data = (void *)&adp8860_pdata,
  2219. },
  2220. #endif
  2221. #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
  2222. {
  2223. I2C_BOARD_INFO("adau1373", 0x1A),
  2224. },
  2225. #endif
  2226. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  2227. {
  2228. I2C_BOARD_INFO("ad5252", 0x2e),
  2229. },
  2230. #endif
  2231. };
  2232. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2233. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2234. static struct resource bfin_sport0_uart_resources[] = {
  2235. {
  2236. .start = SPORT0_TCR1,
  2237. .end = SPORT0_MRCS3+4,
  2238. .flags = IORESOURCE_MEM,
  2239. },
  2240. {
  2241. .start = IRQ_SPORT0_RX,
  2242. .end = IRQ_SPORT0_RX+1,
  2243. .flags = IORESOURCE_IRQ,
  2244. },
  2245. {
  2246. .start = IRQ_SPORT0_ERROR,
  2247. .end = IRQ_SPORT0_ERROR,
  2248. .flags = IORESOURCE_IRQ,
  2249. },
  2250. };
  2251. static unsigned short bfin_sport0_peripherals[] = {
  2252. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  2253. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  2254. };
  2255. static struct platform_device bfin_sport0_uart_device = {
  2256. .name = "bfin-sport-uart",
  2257. .id = 0,
  2258. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  2259. .resource = bfin_sport0_uart_resources,
  2260. .dev = {
  2261. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  2262. },
  2263. };
  2264. #endif
  2265. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2266. static struct resource bfin_sport1_uart_resources[] = {
  2267. {
  2268. .start = SPORT1_TCR1,
  2269. .end = SPORT1_MRCS3+4,
  2270. .flags = IORESOURCE_MEM,
  2271. },
  2272. {
  2273. .start = IRQ_SPORT1_RX,
  2274. .end = IRQ_SPORT1_RX+1,
  2275. .flags = IORESOURCE_IRQ,
  2276. },
  2277. {
  2278. .start = IRQ_SPORT1_ERROR,
  2279. .end = IRQ_SPORT1_ERROR,
  2280. .flags = IORESOURCE_IRQ,
  2281. },
  2282. };
  2283. static unsigned short bfin_sport1_peripherals[] = {
  2284. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  2285. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  2286. };
  2287. static struct platform_device bfin_sport1_uart_device = {
  2288. .name = "bfin-sport-uart",
  2289. .id = 1,
  2290. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  2291. .resource = bfin_sport1_uart_resources,
  2292. .dev = {
  2293. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  2294. },
  2295. };
  2296. #endif
  2297. #endif
  2298. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2299. #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2300. /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
  2301. #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2302. #define PATA_INT IRQ_PF5
  2303. static struct pata_platform_info bfin_pata_platform_data = {
  2304. .ioport_shift = 1,
  2305. .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  2306. };
  2307. static struct resource bfin_pata_resources[] = {
  2308. {
  2309. .start = 0x20314020,
  2310. .end = 0x2031403F,
  2311. .flags = IORESOURCE_MEM,
  2312. },
  2313. {
  2314. .start = 0x2031401C,
  2315. .end = 0x2031401F,
  2316. .flags = IORESOURCE_MEM,
  2317. },
  2318. {
  2319. .start = PATA_INT,
  2320. .end = PATA_INT,
  2321. .flags = IORESOURCE_IRQ,
  2322. },
  2323. };
  2324. #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
  2325. static struct pata_platform_info bfin_pata_platform_data = {
  2326. .ioport_shift = 0,
  2327. };
  2328. /* CompactFlash Storage Card Memory Mapped Addressing
  2329. * /REG = A11 = 1
  2330. */
  2331. static struct resource bfin_pata_resources[] = {
  2332. {
  2333. .start = 0x20211800,
  2334. .end = 0x20211807,
  2335. .flags = IORESOURCE_MEM,
  2336. },
  2337. {
  2338. .start = 0x2021180E, /* Device Ctl */
  2339. .end = 0x2021180E,
  2340. .flags = IORESOURCE_MEM,
  2341. },
  2342. };
  2343. #endif
  2344. static struct platform_device bfin_pata_device = {
  2345. .name = "pata_platform",
  2346. .id = -1,
  2347. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  2348. .resource = bfin_pata_resources,
  2349. .dev = {
  2350. .platform_data = &bfin_pata_platform_data,
  2351. }
  2352. };
  2353. #endif
  2354. static const unsigned int cclk_vlev_datasheet[] =
  2355. {
  2356. VRPAIR(VLEV_085, 250000000),
  2357. VRPAIR(VLEV_090, 376000000),
  2358. VRPAIR(VLEV_095, 426000000),
  2359. VRPAIR(VLEV_100, 426000000),
  2360. VRPAIR(VLEV_105, 476000000),
  2361. VRPAIR(VLEV_110, 476000000),
  2362. VRPAIR(VLEV_115, 476000000),
  2363. VRPAIR(VLEV_120, 500000000),
  2364. VRPAIR(VLEV_125, 533000000),
  2365. VRPAIR(VLEV_130, 600000000),
  2366. };
  2367. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  2368. .tuple_tab = cclk_vlev_datasheet,
  2369. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  2370. .vr_settling_time = 25 /* us */,
  2371. };
  2372. static struct platform_device bfin_dpmc = {
  2373. .name = "bfin dpmc",
  2374. .dev = {
  2375. .platform_data = &bfin_dmpc_vreg_data,
  2376. },
  2377. };
  2378. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  2379. static struct platform_device bfin_i2s = {
  2380. .name = "bfin-i2s",
  2381. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2382. /* TODO: add platform data here */
  2383. };
  2384. #endif
  2385. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  2386. static struct platform_device bfin_tdm = {
  2387. .name = "bfin-tdm",
  2388. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2389. /* TODO: add platform data here */
  2390. };
  2391. #endif
  2392. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2393. static struct platform_device bfin_ac97 = {
  2394. .name = "bfin-ac97",
  2395. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2396. /* TODO: add platform data here */
  2397. };
  2398. #endif
  2399. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2400. #define REGULATOR_ADP122 "adp122"
  2401. #define REGULATOR_ADP122_UV 2500000
  2402. static struct regulator_consumer_supply adp122_consumers = {
  2403. .supply = REGULATOR_ADP122,
  2404. };
  2405. static struct regulator_init_data adp_switch_regulator_data = {
  2406. .constraints = {
  2407. .name = REGULATOR_ADP122,
  2408. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  2409. .min_uV = REGULATOR_ADP122_UV,
  2410. .max_uV = REGULATOR_ADP122_UV,
  2411. .min_uA = 0,
  2412. .max_uA = 300000,
  2413. },
  2414. .num_consumer_supplies = 1, /* only 1 */
  2415. .consumer_supplies = &adp122_consumers,
  2416. };
  2417. static struct fixed_voltage_config adp_switch_pdata = {
  2418. .supply_name = REGULATOR_ADP122,
  2419. .microvolts = REGULATOR_ADP122_UV,
  2420. .gpio = GPIO_PF2,
  2421. .enable_high = 1,
  2422. .enabled_at_boot = 0,
  2423. .init_data = &adp_switch_regulator_data,
  2424. };
  2425. static struct platform_device adp_switch_device = {
  2426. .name = "reg-fixed-voltage",
  2427. .id = 0,
  2428. .dev = {
  2429. .platform_data = &adp_switch_pdata,
  2430. },
  2431. };
  2432. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2433. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2434. static struct regulator_bulk_data adp122_bulk_data = {
  2435. .supply = REGULATOR_ADP122,
  2436. };
  2437. static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
  2438. .name = REGULATOR_ADP122,
  2439. .num_supplies = 1,
  2440. .supplies = &adp122_bulk_data,
  2441. };
  2442. static struct platform_device adp122_userspace_consumer_device = {
  2443. .name = "reg-userspace-consumer",
  2444. .id = 0,
  2445. .dev = {
  2446. .platform_data = &adp122_userspace_comsumer_data,
  2447. },
  2448. };
  2449. #endif
  2450. #endif
  2451. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2452. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2453. static struct resource iio_gpio_trigger_resources[] = {
  2454. [0] = {
  2455. .start = IRQ_PF5,
  2456. .end = IRQ_PF5,
  2457. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  2458. },
  2459. };
  2460. static struct platform_device iio_gpio_trigger = {
  2461. .name = "iio_gpio_trigger",
  2462. .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
  2463. .resource = iio_gpio_trigger_resources,
  2464. };
  2465. #endif
  2466. static struct platform_device *stamp_devices[] __initdata = {
  2467. &bfin_dpmc,
  2468. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  2469. &bfin_pcmcia_cf_device,
  2470. #endif
  2471. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  2472. &rtc_device,
  2473. #endif
  2474. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  2475. &sl811_hcd_device,
  2476. #endif
  2477. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  2478. &isp1362_hcd_device,
  2479. #endif
  2480. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  2481. &bfin_isp1760_device,
  2482. #endif
  2483. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  2484. &smc91x_device,
  2485. #endif
  2486. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  2487. &dm9000_device,
  2488. #endif
  2489. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  2490. &bfin_can_device,
  2491. #endif
  2492. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  2493. &bfin_mii_bus,
  2494. &bfin_mac_device,
  2495. #endif
  2496. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  2497. &net2272_bfin_device,
  2498. #endif
  2499. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  2500. &bfin_spi0_device,
  2501. #endif
  2502. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  2503. &bfin_sport_spi0_device,
  2504. &bfin_sport_spi1_device,
  2505. #endif
  2506. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2507. &bfin_fb_device,
  2508. #endif
  2509. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  2510. &bfin_lq035q1_device,
  2511. #endif
  2512. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  2513. #ifdef CONFIG_SERIAL_BFIN_UART0
  2514. &bfin_uart0_device,
  2515. #endif
  2516. #ifdef CONFIG_SERIAL_BFIN_UART1
  2517. &bfin_uart1_device,
  2518. #endif
  2519. #endif
  2520. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  2521. #ifdef CONFIG_BFIN_SIR0
  2522. &bfin_sir0_device,
  2523. #endif
  2524. #ifdef CONFIG_BFIN_SIR1
  2525. &bfin_sir1_device,
  2526. #endif
  2527. #endif
  2528. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  2529. &i2c_bfin_twi_device,
  2530. #endif
  2531. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2532. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2533. &bfin_sport0_uart_device,
  2534. #endif
  2535. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2536. &bfin_sport1_uart_device,
  2537. #endif
  2538. #endif
  2539. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2540. &bfin_pata_device,
  2541. #endif
  2542. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  2543. &bfin_device_gpiokeys,
  2544. #endif
  2545. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  2546. &bfin_async_nand_device,
  2547. #endif
  2548. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  2549. &stamp_flash_device,
  2550. #endif
  2551. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  2552. &bfin_i2s,
  2553. #endif
  2554. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  2555. &bfin_tdm,
  2556. #endif
  2557. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2558. &bfin_ac97,
  2559. #endif
  2560. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2561. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  2562. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  2563. &ad5398_virt_consumer_device,
  2564. #endif
  2565. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2566. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2567. &ad5398_userspace_consumer_device,
  2568. #endif
  2569. #endif
  2570. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2571. &adp_switch_device,
  2572. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2573. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2574. &adp122_userspace_consumer_device,
  2575. #endif
  2576. #endif
  2577. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2578. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2579. &iio_gpio_trigger,
  2580. #endif
  2581. };
  2582. static int __init stamp_init(void)
  2583. {
  2584. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  2585. bfin_plat_nand_init();
  2586. adf702x_mac_init();
  2587. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  2588. i2c_register_board_info(0, bfin_i2c_board_info,
  2589. ARRAY_SIZE(bfin_i2c_board_info));
  2590. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  2591. return 0;
  2592. }
  2593. arch_initcall(stamp_init);
  2594. static struct platform_device *stamp_early_devices[] __initdata = {
  2595. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  2596. #ifdef CONFIG_SERIAL_BFIN_UART0
  2597. &bfin_uart0_device,
  2598. #endif
  2599. #ifdef CONFIG_SERIAL_BFIN_UART1
  2600. &bfin_uart1_device,
  2601. #endif
  2602. #endif
  2603. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  2604. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2605. &bfin_sport0_uart_device,
  2606. #endif
  2607. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2608. &bfin_sport1_uart_device,
  2609. #endif
  2610. #endif
  2611. };
  2612. void __init native_machine_early_platform_add_devices(void)
  2613. {
  2614. printk(KERN_INFO "register early platform devices\n");
  2615. early_platform_add_devices(stamp_early_devices,
  2616. ARRAY_SIZE(stamp_early_devices));
  2617. }
  2618. void native_machine_restart(char *cmd)
  2619. {
  2620. /* workaround reboot hang when booting from SPI */
  2621. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  2622. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  2623. }
  2624. /*
  2625. * Currently the MAC address is saved in Flash by U-Boot
  2626. */
  2627. #define FLASH_MAC 0x203f0000
  2628. void bfin_get_ether_addr(char *addr)
  2629. {
  2630. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  2631. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  2632. }
  2633. EXPORT_SYMBOL(bfin_get_ether_addr);