cm_bf533.c 14 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/spi/mmc_spi.h>
  17. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  18. #include <linux/usb/isp1362.h>
  19. #endif
  20. #include <linux/irq.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/portmux.h>
  24. #include <asm/dpmc.h>
  25. /*
  26. * Name the Board for the /proc/cpuinfo
  27. */
  28. const char bfin_board_name[] = "Bluetechnix CM BF533";
  29. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  30. /* all SPI peripherals info goes here */
  31. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  32. static struct mtd_partition bfin_spi_flash_partitions[] = {
  33. {
  34. .name = "bootloader(spi)",
  35. .size = 0x00020000,
  36. .offset = 0,
  37. .mask_flags = MTD_CAP_ROM
  38. }, {
  39. .name = "linux kernel(spi)",
  40. .size = 0xe0000,
  41. .offset = 0x20000
  42. }, {
  43. .name = "file system(spi)",
  44. .size = 0x700000,
  45. .offset = 0x00100000,
  46. }
  47. };
  48. static struct flash_platform_data bfin_spi_flash_data = {
  49. .name = "m25p80",
  50. .parts = bfin_spi_flash_partitions,
  51. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  52. .type = "m25p64",
  53. };
  54. /* SPI flash chip (m25p64) */
  55. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  56. .enable_dma = 0, /* use dma transfer with this chip*/
  57. .bits_per_word = 8,
  58. };
  59. #endif
  60. /* SPI ADC chip */
  61. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  62. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  63. .enable_dma = 1, /* use dma transfer with this chip*/
  64. .bits_per_word = 16,
  65. };
  66. #endif
  67. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  68. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  69. .enable_dma = 0,
  70. .bits_per_word = 16,
  71. };
  72. #endif
  73. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  74. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  75. .enable_dma = 0,
  76. .bits_per_word = 8,
  77. };
  78. #endif
  79. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  80. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  81. {
  82. /* the modalias must be the same as spi device driver name */
  83. .modalias = "m25p80", /* Name of spi_driver for this device */
  84. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  85. .bus_num = 0, /* Framework bus number */
  86. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  87. .platform_data = &bfin_spi_flash_data,
  88. .controller_data = &spi_flash_chip_info,
  89. .mode = SPI_MODE_3,
  90. },
  91. #endif
  92. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  93. {
  94. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  95. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  96. .bus_num = 0, /* Framework bus number */
  97. .chip_select = 2, /* Framework chip select. */
  98. .platform_data = NULL, /* No spi_driver specific config */
  99. .controller_data = &spi_adc_chip_info,
  100. },
  101. #endif
  102. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  103. {
  104. .modalias = "ad183x",
  105. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  106. .bus_num = 0,
  107. .chip_select = 4,
  108. .controller_data = &ad1836_spi_chip_info,
  109. },
  110. #endif
  111. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  112. {
  113. .modalias = "mmc_spi",
  114. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  115. .bus_num = 0,
  116. .chip_select = 1,
  117. .controller_data = &mmc_spi_chip_info,
  118. .mode = SPI_MODE_3,
  119. },
  120. #endif
  121. };
  122. /* SPI (0) */
  123. static struct resource bfin_spi0_resource[] = {
  124. [0] = {
  125. .start = SPI0_REGBASE,
  126. .end = SPI0_REGBASE + 0xFF,
  127. .flags = IORESOURCE_MEM,
  128. },
  129. [1] = {
  130. .start = CH_SPI,
  131. .end = CH_SPI,
  132. .flags = IORESOURCE_DMA,
  133. },
  134. [2] = {
  135. .start = IRQ_SPI,
  136. .end = IRQ_SPI,
  137. .flags = IORESOURCE_IRQ,
  138. }
  139. };
  140. /* SPI controller data */
  141. static struct bfin5xx_spi_master bfin_spi0_info = {
  142. .num_chipselect = 8,
  143. .enable_dma = 1, /* master has the ability to do dma transfer */
  144. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  145. };
  146. static struct platform_device bfin_spi0_device = {
  147. .name = "bfin-spi",
  148. .id = 0, /* Bus number */
  149. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  150. .resource = bfin_spi0_resource,
  151. .dev = {
  152. .platform_data = &bfin_spi0_info, /* Passed to driver */
  153. },
  154. };
  155. #endif /* spi master and devices */
  156. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  157. static struct platform_device rtc_device = {
  158. .name = "rtc-bfin",
  159. .id = -1,
  160. };
  161. #endif
  162. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  163. #include <linux/smc91x.h>
  164. static struct smc91x_platdata smc91x_info = {
  165. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  166. .leda = RPC_LED_100_10,
  167. .ledb = RPC_LED_TX_RX,
  168. };
  169. static struct resource smc91x_resources[] = {
  170. {
  171. .start = 0x20200300,
  172. .end = 0x20200300 + 16,
  173. .flags = IORESOURCE_MEM,
  174. }, {
  175. .start = IRQ_PF0,
  176. .end = IRQ_PF0,
  177. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  178. },
  179. };
  180. static struct platform_device smc91x_device = {
  181. .name = "smc91x",
  182. .id = 0,
  183. .num_resources = ARRAY_SIZE(smc91x_resources),
  184. .resource = smc91x_resources,
  185. .dev = {
  186. .platform_data = &smc91x_info,
  187. },
  188. };
  189. #endif
  190. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  191. #include <linux/smsc911x.h>
  192. static struct resource smsc911x_resources[] = {
  193. {
  194. .name = "smsc911x-memory",
  195. .start = 0x20308000,
  196. .end = 0x20308000 + 0xFF,
  197. .flags = IORESOURCE_MEM,
  198. }, {
  199. .start = IRQ_PF8,
  200. .end = IRQ_PF8,
  201. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  202. },
  203. };
  204. static struct smsc911x_platform_config smsc911x_config = {
  205. .flags = SMSC911X_USE_16BIT,
  206. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  207. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  208. .phy_interface = PHY_INTERFACE_MODE_MII,
  209. };
  210. static struct platform_device smsc911x_device = {
  211. .name = "smsc911x",
  212. .id = 0,
  213. .num_resources = ARRAY_SIZE(smsc911x_resources),
  214. .resource = smsc911x_resources,
  215. .dev = {
  216. .platform_data = &smsc911x_config,
  217. },
  218. };
  219. #endif
  220. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  221. #ifdef CONFIG_SERIAL_BFIN_UART0
  222. static struct resource bfin_uart0_resources[] = {
  223. {
  224. .start = BFIN_UART_THR,
  225. .end = BFIN_UART_GCTL+2,
  226. .flags = IORESOURCE_MEM,
  227. },
  228. {
  229. .start = IRQ_UART0_RX,
  230. .end = IRQ_UART0_RX + 1,
  231. .flags = IORESOURCE_IRQ,
  232. },
  233. {
  234. .start = IRQ_UART0_ERROR,
  235. .end = IRQ_UART0_ERROR,
  236. .flags = IORESOURCE_IRQ,
  237. },
  238. {
  239. .start = CH_UART0_TX,
  240. .end = CH_UART0_TX,
  241. .flags = IORESOURCE_DMA,
  242. },
  243. {
  244. .start = CH_UART0_RX,
  245. .end = CH_UART0_RX,
  246. .flags = IORESOURCE_DMA,
  247. },
  248. };
  249. static unsigned short bfin_uart0_peripherals[] = {
  250. P_UART0_TX, P_UART0_RX, 0
  251. };
  252. static struct platform_device bfin_uart0_device = {
  253. .name = "bfin-uart",
  254. .id = 0,
  255. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  256. .resource = bfin_uart0_resources,
  257. .dev = {
  258. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  259. },
  260. };
  261. #endif
  262. #endif
  263. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  264. #ifdef CONFIG_BFIN_SIR0
  265. static struct resource bfin_sir0_resources[] = {
  266. {
  267. .start = 0xFFC00400,
  268. .end = 0xFFC004FF,
  269. .flags = IORESOURCE_MEM,
  270. },
  271. {
  272. .start = IRQ_UART0_RX,
  273. .end = IRQ_UART0_RX+1,
  274. .flags = IORESOURCE_IRQ,
  275. },
  276. {
  277. .start = CH_UART0_RX,
  278. .end = CH_UART0_RX+1,
  279. .flags = IORESOURCE_DMA,
  280. },
  281. };
  282. static struct platform_device bfin_sir0_device = {
  283. .name = "bfin_sir",
  284. .id = 0,
  285. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  286. .resource = bfin_sir0_resources,
  287. };
  288. #endif
  289. #endif
  290. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  291. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  292. static struct resource bfin_sport0_uart_resources[] = {
  293. {
  294. .start = SPORT0_TCR1,
  295. .end = SPORT0_MRCS3+4,
  296. .flags = IORESOURCE_MEM,
  297. },
  298. {
  299. .start = IRQ_SPORT0_RX,
  300. .end = IRQ_SPORT0_RX+1,
  301. .flags = IORESOURCE_IRQ,
  302. },
  303. {
  304. .start = IRQ_SPORT0_ERROR,
  305. .end = IRQ_SPORT0_ERROR,
  306. .flags = IORESOURCE_IRQ,
  307. },
  308. };
  309. static unsigned short bfin_sport0_peripherals[] = {
  310. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  311. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  312. };
  313. static struct platform_device bfin_sport0_uart_device = {
  314. .name = "bfin-sport-uart",
  315. .id = 0,
  316. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  317. .resource = bfin_sport0_uart_resources,
  318. .dev = {
  319. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  320. },
  321. };
  322. #endif
  323. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  324. static struct resource bfin_sport1_uart_resources[] = {
  325. {
  326. .start = SPORT1_TCR1,
  327. .end = SPORT1_MRCS3+4,
  328. .flags = IORESOURCE_MEM,
  329. },
  330. {
  331. .start = IRQ_SPORT1_RX,
  332. .end = IRQ_SPORT1_RX+1,
  333. .flags = IORESOURCE_IRQ,
  334. },
  335. {
  336. .start = IRQ_SPORT1_ERROR,
  337. .end = IRQ_SPORT1_ERROR,
  338. .flags = IORESOURCE_IRQ,
  339. },
  340. };
  341. static unsigned short bfin_sport1_peripherals[] = {
  342. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  343. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  344. };
  345. static struct platform_device bfin_sport1_uart_device = {
  346. .name = "bfin-sport-uart",
  347. .id = 1,
  348. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  349. .resource = bfin_sport1_uart_resources,
  350. .dev = {
  351. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  352. },
  353. };
  354. #endif
  355. #endif
  356. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  357. static struct resource isp1362_hcd_resources[] = {
  358. {
  359. .start = 0x20308000,
  360. .end = 0x20308000,
  361. .flags = IORESOURCE_MEM,
  362. }, {
  363. .start = 0x20308004,
  364. .end = 0x20308004,
  365. .flags = IORESOURCE_MEM,
  366. }, {
  367. .start = IRQ_PF4,
  368. .end = IRQ_PF4,
  369. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  370. },
  371. };
  372. static struct isp1362_platform_data isp1362_priv = {
  373. .sel15Kres = 1,
  374. .clknotstop = 0,
  375. .oc_enable = 0,
  376. .int_act_high = 0,
  377. .int_edge_triggered = 0,
  378. .remote_wakeup_connected = 0,
  379. .no_power_switching = 1,
  380. .power_switching_mode = 0,
  381. };
  382. static struct platform_device isp1362_hcd_device = {
  383. .name = "isp1362-hcd",
  384. .id = 0,
  385. .dev = {
  386. .platform_data = &isp1362_priv,
  387. },
  388. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  389. .resource = isp1362_hcd_resources,
  390. };
  391. #endif
  392. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  393. static struct resource net2272_bfin_resources[] = {
  394. {
  395. .start = 0x20300000,
  396. .end = 0x20300000 + 0x100,
  397. .flags = IORESOURCE_MEM,
  398. }, {
  399. .start = IRQ_PF6,
  400. .end = IRQ_PF6,
  401. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  402. },
  403. };
  404. static struct platform_device net2272_bfin_device = {
  405. .name = "net2272",
  406. .id = -1,
  407. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  408. .resource = net2272_bfin_resources,
  409. };
  410. #endif
  411. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  412. static struct mtd_partition para_partitions[] = {
  413. {
  414. .name = "bootloader(nor)",
  415. .size = 0x40000,
  416. .offset = 0,
  417. }, {
  418. .name = "linux+rootfs(nor)",
  419. .size = MTDPART_SIZ_FULL,
  420. .offset = MTDPART_OFS_APPEND,
  421. },
  422. };
  423. static struct physmap_flash_data para_flash_data = {
  424. .width = 2,
  425. .parts = para_partitions,
  426. .nr_parts = ARRAY_SIZE(para_partitions),
  427. };
  428. static struct resource para_flash_resource = {
  429. .start = 0x20000000,
  430. .end = 0x201fffff,
  431. .flags = IORESOURCE_MEM,
  432. };
  433. static struct platform_device para_flash_device = {
  434. .name = "physmap-flash",
  435. .id = 0,
  436. .dev = {
  437. .platform_data = &para_flash_data,
  438. },
  439. .num_resources = 1,
  440. .resource = &para_flash_resource,
  441. };
  442. #endif
  443. static const unsigned int cclk_vlev_datasheet[] =
  444. {
  445. VRPAIR(VLEV_085, 250000000),
  446. VRPAIR(VLEV_090, 376000000),
  447. VRPAIR(VLEV_095, 426000000),
  448. VRPAIR(VLEV_100, 426000000),
  449. VRPAIR(VLEV_105, 476000000),
  450. VRPAIR(VLEV_110, 476000000),
  451. VRPAIR(VLEV_115, 476000000),
  452. VRPAIR(VLEV_120, 600000000),
  453. VRPAIR(VLEV_125, 600000000),
  454. VRPAIR(VLEV_130, 600000000),
  455. };
  456. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  457. .tuple_tab = cclk_vlev_datasheet,
  458. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  459. .vr_settling_time = 25 /* us */,
  460. };
  461. static struct platform_device bfin_dpmc = {
  462. .name = "bfin dpmc",
  463. .dev = {
  464. .platform_data = &bfin_dmpc_vreg_data,
  465. },
  466. };
  467. static struct platform_device *cm_bf533_devices[] __initdata = {
  468. &bfin_dpmc,
  469. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  470. #ifdef CONFIG_SERIAL_BFIN_UART0
  471. &bfin_uart0_device,
  472. #endif
  473. #endif
  474. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  475. #ifdef CONFIG_BFIN_SIR0
  476. &bfin_sir0_device,
  477. #endif
  478. #endif
  479. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  480. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  481. &bfin_sport0_uart_device,
  482. #endif
  483. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  484. &bfin_sport1_uart_device,
  485. #endif
  486. #endif
  487. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  488. &rtc_device,
  489. #endif
  490. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  491. &isp1362_hcd_device,
  492. #endif
  493. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  494. &smc91x_device,
  495. #endif
  496. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  497. &smsc911x_device,
  498. #endif
  499. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  500. &net2272_bfin_device,
  501. #endif
  502. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  503. &bfin_spi0_device,
  504. #endif
  505. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  506. &para_flash_device,
  507. #endif
  508. };
  509. static int __init cm_bf533_init(void)
  510. {
  511. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  512. platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
  513. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  514. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  515. #endif
  516. return 0;
  517. }
  518. arch_initcall(cm_bf533_init);
  519. static struct platform_device *cm_bf533_early_devices[] __initdata = {
  520. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  521. #ifdef CONFIG_SERIAL_BFIN_UART0
  522. &bfin_uart0_device,
  523. #endif
  524. #endif
  525. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  526. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  527. &bfin_sport0_uart_device,
  528. #endif
  529. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  530. &bfin_sport1_uart_device,
  531. #endif
  532. #endif
  533. };
  534. void __init native_machine_early_platform_add_devices(void)
  535. {
  536. printk(KERN_INFO "register early platform devices\n");
  537. early_platform_add_devices(cm_bf533_early_devices,
  538. ARRAY_SIZE(cm_bf533_early_devices));
  539. }