system.h 1.9 KB

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  1. /*
  2. * Copyright (C) 1999 ARM Limited
  3. * Copyright (C) 2000 Deep Blue Solutions Ltd
  4. * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #ifndef __ASM_ARCH_MXC_SYSTEM_H__
  17. #define __ASM_ARCH_MXC_SYSTEM_H__
  18. #include <mach/hardware.h>
  19. #include <mach/common.h>
  20. extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
  21. static inline void arch_idle(void)
  22. {
  23. #ifdef CONFIG_ARCH_MXC91231
  24. if (cpu_is_mxc91231()) {
  25. /* Need this to set DSM low-power mode */
  26. mxc91231_prepare_idle();
  27. }
  28. #endif
  29. /* fix i.MX31 errata TLSbo65953 and i.MX35 errata ENGcm09472 */
  30. if (cpu_is_mx31() || cpu_is_mx35()) {
  31. unsigned long reg = 0;
  32. __asm__ __volatile__(
  33. /* disable I and D cache */
  34. "mrc p15, 0, %0, c1, c0, 0\n"
  35. "bic %0, %0, #0x00001000\n"
  36. "bic %0, %0, #0x00000004\n"
  37. "mcr p15, 0, %0, c1, c0, 0\n"
  38. /* invalidate I cache */
  39. "mov %0, #0\n"
  40. "mcr p15, 0, %0, c7, c5, 0\n"
  41. /* clear and invalidate D cache */
  42. "mov %0, #0\n"
  43. "mcr p15, 0, %0, c7, c14, 0\n"
  44. /* WFI */
  45. "mov %0, #0\n"
  46. "mcr p15, 0, %0, c7, c0, 4\n"
  47. "nop\n" "nop\n" "nop\n" "nop\n"
  48. "nop\n" "nop\n" "nop\n"
  49. /* enable I and D cache */
  50. "mrc p15, 0, %0, c1, c0, 0\n"
  51. "orr %0, %0, #0x00001000\n"
  52. "orr %0, %0, #0x00000004\n"
  53. "mcr p15, 0, %0, c1, c0, 0\n"
  54. : "=r" (reg));
  55. } else if (cpu_is_mx51())
  56. mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
  57. else
  58. cpu_do_idle();
  59. }
  60. void arch_reset(char mode, const char *cmd);
  61. #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */