pm.c 3.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166
  1. /* linux/arch/arm/mach-s5pv210/pm.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * S5PV210 - Power Management support
  7. *
  8. * Based on arch/arm/mach-s3c2410/pm.c
  9. * Copyright (c) 2006 Simtec Electronics
  10. * Ben Dooks <ben@simtec.co.uk>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/init.h>
  17. #include <linux/suspend.h>
  18. #include <linux/io.h>
  19. #include <plat/cpu.h>
  20. #include <plat/pm.h>
  21. #include <plat/regs-timer.h>
  22. #include <mach/regs-irq.h>
  23. #include <mach/regs-clock.h>
  24. static struct sleep_save s5pv210_core_save[] = {
  25. /* Clock source */
  26. SAVE_ITEM(S5P_CLK_SRC0),
  27. SAVE_ITEM(S5P_CLK_SRC1),
  28. SAVE_ITEM(S5P_CLK_SRC2),
  29. SAVE_ITEM(S5P_CLK_SRC3),
  30. SAVE_ITEM(S5P_CLK_SRC4),
  31. SAVE_ITEM(S5P_CLK_SRC5),
  32. SAVE_ITEM(S5P_CLK_SRC6),
  33. /* Clock source Mask */
  34. SAVE_ITEM(S5P_CLK_SRC_MASK0),
  35. SAVE_ITEM(S5P_CLK_SRC_MASK1),
  36. /* Clock Divider */
  37. SAVE_ITEM(S5P_CLK_DIV0),
  38. SAVE_ITEM(S5P_CLK_DIV1),
  39. SAVE_ITEM(S5P_CLK_DIV2),
  40. SAVE_ITEM(S5P_CLK_DIV3),
  41. SAVE_ITEM(S5P_CLK_DIV4),
  42. SAVE_ITEM(S5P_CLK_DIV5),
  43. SAVE_ITEM(S5P_CLK_DIV6),
  44. SAVE_ITEM(S5P_CLK_DIV7),
  45. /* Clock Main Gate */
  46. SAVE_ITEM(S5P_CLKGATE_MAIN0),
  47. SAVE_ITEM(S5P_CLKGATE_MAIN1),
  48. SAVE_ITEM(S5P_CLKGATE_MAIN2),
  49. /* Clock source Peri Gate */
  50. SAVE_ITEM(S5P_CLKGATE_PERI0),
  51. SAVE_ITEM(S5P_CLKGATE_PERI1),
  52. /* Clock source SCLK Gate */
  53. SAVE_ITEM(S5P_CLKGATE_SCLK0),
  54. SAVE_ITEM(S5P_CLKGATE_SCLK1),
  55. /* Clock IP Clock gate */
  56. SAVE_ITEM(S5P_CLKGATE_IP0),
  57. SAVE_ITEM(S5P_CLKGATE_IP1),
  58. SAVE_ITEM(S5P_CLKGATE_IP2),
  59. SAVE_ITEM(S5P_CLKGATE_IP3),
  60. SAVE_ITEM(S5P_CLKGATE_IP4),
  61. /* Clock Blcok and Bus gate */
  62. SAVE_ITEM(S5P_CLKGATE_BLOCK),
  63. SAVE_ITEM(S5P_CLKGATE_BUS0),
  64. /* Clock ETC */
  65. SAVE_ITEM(S5P_CLK_OUT),
  66. SAVE_ITEM(S5P_MDNIE_SEL),
  67. /* PWM Register */
  68. SAVE_ITEM(S3C2410_TCFG0),
  69. SAVE_ITEM(S3C2410_TCFG1),
  70. SAVE_ITEM(S3C64XX_TINT_CSTAT),
  71. SAVE_ITEM(S3C2410_TCON),
  72. SAVE_ITEM(S3C2410_TCNTB(0)),
  73. SAVE_ITEM(S3C2410_TCMPB(0)),
  74. SAVE_ITEM(S3C2410_TCNTO(0)),
  75. };
  76. void s5pv210_cpu_suspend(void)
  77. {
  78. unsigned long tmp;
  79. /* issue the standby signal into the pm unit. Note, we
  80. * issue a write-buffer drain just in case */
  81. tmp = 0;
  82. asm("b 1f\n\t"
  83. ".align 5\n\t"
  84. "1:\n\t"
  85. "mcr p15, 0, %0, c7, c10, 5\n\t"
  86. "mcr p15, 0, %0, c7, c10, 4\n\t"
  87. "wfi" : : "r" (tmp));
  88. /* we should never get past here */
  89. panic("sleep resumed to originator?");
  90. }
  91. static void s5pv210_pm_prepare(void)
  92. {
  93. unsigned int tmp;
  94. /* ensure at least INFORM0 has the resume address */
  95. __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
  96. tmp = __raw_readl(S5P_SLEEP_CFG);
  97. tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN);
  98. __raw_writel(tmp, S5P_SLEEP_CFG);
  99. /* WFI for SLEEP mode configuration by SYSCON */
  100. tmp = __raw_readl(S5P_PWR_CFG);
  101. tmp &= S5P_CFG_WFI_CLEAN;
  102. tmp |= S5P_CFG_WFI_SLEEP;
  103. __raw_writel(tmp, S5P_PWR_CFG);
  104. /* SYSCON interrupt handling disable */
  105. tmp = __raw_readl(S5P_OTHERS);
  106. tmp |= S5P_OTHER_SYSC_INTOFF;
  107. __raw_writel(tmp, S5P_OTHERS);
  108. s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
  109. }
  110. static int s5pv210_pm_add(struct sys_device *sysdev)
  111. {
  112. pm_cpu_prep = s5pv210_pm_prepare;
  113. pm_cpu_sleep = s5pv210_cpu_suspend;
  114. return 0;
  115. }
  116. static int s5pv210_pm_resume(struct sys_device *dev)
  117. {
  118. u32 tmp;
  119. tmp = __raw_readl(S5P_OTHERS);
  120. tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\
  121. S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART);
  122. __raw_writel(tmp , S5P_OTHERS);
  123. s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
  124. return 0;
  125. }
  126. static struct sysdev_driver s5pv210_pm_driver = {
  127. .add = s5pv210_pm_add,
  128. .resume = s5pv210_pm_resume,
  129. };
  130. static __init int s5pv210_pm_drvinit(void)
  131. {
  132. return sysdev_driver_register(&s5pv210_sysclass, &s5pv210_pm_driver);
  133. }
  134. arch_initcall(s5pv210_pm_drvinit);