pvrusb2-encoder.c 15 KB

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  1. /*
  2. *
  3. * $Id$
  4. *
  5. * Copyright (C) 2005 Mike Isely <isely@pobox.com>
  6. * Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/device.h> // for linux/firmware.h
  23. #include <linux/firmware.h>
  24. #include <linux/videodev2.h>
  25. #include <media/cx2341x.h>
  26. #include "pvrusb2-util.h"
  27. #include "pvrusb2-encoder.h"
  28. #include "pvrusb2-hdw-internal.h"
  29. #include "pvrusb2-debug.h"
  30. static u32 pvr_tbl_emphasis [] = {
  31. [PVR2_CVAL_AUDIOEMPHASIS_NONE] = 0x0 << 12,
  32. [PVR2_CVAL_AUDIOEMPHASIS_50_15] = 0x1 << 12,
  33. [PVR2_CVAL_AUDIOEMPHASIS_CCITT] = 0x3 << 12,
  34. };
  35. static u32 pvr_tbl_srate[] = {
  36. [PVR2_CVAL_SRATE_48] = 0x01,
  37. [PVR2_CVAL_SRATE_44_1] = 0x00,
  38. };
  39. static u32 pvr_tbl_audiobitrate[] = {
  40. [PVR2_CVAL_AUDIOBITRATE_384] = 0xe << 4,
  41. [PVR2_CVAL_AUDIOBITRATE_320] = 0xd << 4,
  42. [PVR2_CVAL_AUDIOBITRATE_256] = 0xc << 4,
  43. [PVR2_CVAL_AUDIOBITRATE_224] = 0xb << 4,
  44. [PVR2_CVAL_AUDIOBITRATE_192] = 0xa << 4,
  45. [PVR2_CVAL_AUDIOBITRATE_160] = 0x9 << 4,
  46. [PVR2_CVAL_AUDIOBITRATE_128] = 0x8 << 4,
  47. [PVR2_CVAL_AUDIOBITRATE_112] = 0x7 << 4,
  48. [PVR2_CVAL_AUDIOBITRATE_96] = 0x6 << 4,
  49. [PVR2_CVAL_AUDIOBITRATE_80] = 0x5 << 4,
  50. [PVR2_CVAL_AUDIOBITRATE_64] = 0x4 << 4,
  51. [PVR2_CVAL_AUDIOBITRATE_56] = 0x3 << 4,
  52. [PVR2_CVAL_AUDIOBITRATE_48] = 0x2 << 4,
  53. [PVR2_CVAL_AUDIOBITRATE_32] = 0x1 << 4,
  54. [PVR2_CVAL_AUDIOBITRATE_VBR] = 0x0 << 4,
  55. };
  56. /* Firmware mailbox flags - definitions found from ivtv */
  57. #define IVTV_MBOX_FIRMWARE_DONE 0x00000004
  58. #define IVTV_MBOX_DRIVER_DONE 0x00000002
  59. #define IVTV_MBOX_DRIVER_BUSY 0x00000001
  60. static int pvr2_write_encoder_words(struct pvr2_hdw *hdw,
  61. const u32 *data, unsigned int dlen)
  62. {
  63. unsigned int idx;
  64. int ret;
  65. unsigned int offs = 0;
  66. unsigned int chunkCnt;
  67. /*
  68. Format: First byte must be 0x01. Remaining 32 bit words are
  69. spread out into chunks of 7 bytes each, little-endian ordered,
  70. offset at zero within each 2 blank bytes following and a
  71. single byte that is 0x44 plus the offset of the word. Repeat
  72. request for additional words, with offset adjusted
  73. accordingly.
  74. */
  75. while (dlen) {
  76. chunkCnt = 8;
  77. if (chunkCnt > dlen) chunkCnt = dlen;
  78. memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
  79. hdw->cmd_buffer[0] = 0x01;
  80. for (idx = 0; idx < chunkCnt; idx++) {
  81. hdw->cmd_buffer[1+(idx*7)+6] = 0x44 + idx + offs;
  82. PVR2_DECOMPOSE_LE(hdw->cmd_buffer, 1+(idx*7),
  83. data[idx]);
  84. }
  85. ret = pvr2_send_request(hdw,
  86. hdw->cmd_buffer,1+(chunkCnt*7),
  87. 0,0);
  88. if (ret) return ret;
  89. data += chunkCnt;
  90. dlen -= chunkCnt;
  91. offs += chunkCnt;
  92. }
  93. return 0;
  94. }
  95. static int pvr2_read_encoder_words(struct pvr2_hdw *hdw,int statusFl,
  96. u32 *data, unsigned int dlen)
  97. {
  98. unsigned int idx;
  99. int ret;
  100. unsigned int offs = 0;
  101. unsigned int chunkCnt;
  102. /*
  103. Format: First byte must be 0x02 (status check) or 0x28 (read
  104. back block of 32 bit words). Next 6 bytes must be zero,
  105. followed by a single byte of 0x44+offset for portion to be
  106. read. Returned data is packed set of 32 bits words that were
  107. read.
  108. */
  109. while (dlen) {
  110. chunkCnt = 16;
  111. if (chunkCnt > dlen) chunkCnt = dlen;
  112. memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
  113. hdw->cmd_buffer[0] = statusFl ? 0x02 : 0x28;
  114. hdw->cmd_buffer[7] = 0x44 + offs;
  115. ret = pvr2_send_request(hdw,
  116. hdw->cmd_buffer,8,
  117. hdw->cmd_buffer,chunkCnt * 4);
  118. if (ret) return ret;
  119. for (idx = 0; idx < chunkCnt; idx++) {
  120. data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4);
  121. }
  122. data += chunkCnt;
  123. dlen -= chunkCnt;
  124. offs += chunkCnt;
  125. }
  126. return 0;
  127. }
  128. static int pvr2_write_encoder_vcmd (struct pvr2_hdw *hdw, u8 cmd,
  129. int args, ...)
  130. {
  131. unsigned int poll_count;
  132. int ret = 0;
  133. va_list vl;
  134. unsigned int idx;
  135. u32 wrData[16];
  136. u32 rdData[32];
  137. /*
  138. The encoder seems to speak entirely using blocks 32 bit words.
  139. In ivtv driver terms, this is a mailbox which we populate with
  140. data and watch what the hardware does with it. The first word
  141. is a set of flags used to control the transaction, the second
  142. word is the command to execute, the third byte is zero (ivtv
  143. driver suggests that this is some kind of return value), and
  144. the fourth byte is a specified timeout (windows driver always
  145. uses 0x00060000 except for one case when it is zero). All
  146. successive words are the argument words for the command.
  147. First, write out the entire set of words, with the first word
  148. being zero.
  149. Next, write out just the first word again, but set it to
  150. IVTV_MBOX_DRIVER_DONE | IVTV_DRIVER_BUSY this time (which
  151. probably means "go").
  152. Next, read back 16 words as status. Check the first word,
  153. which should have IVTV_MBOX_FIRMWARE_DONE set. If however
  154. that bit is not set, then the command isn't done so repeat the
  155. read.
  156. Next, read back 32 words and compare with the original
  157. arugments. Hopefully they will match.
  158. Finally, write out just the first word again, but set it to
  159. 0x0 this time (which probably means "idle").
  160. */
  161. LOCK_TAKE(hdw->ctl_lock); do {
  162. wrData[0] = 0;
  163. wrData[1] = cmd;
  164. wrData[2] = 0;
  165. wrData[3] = 0x00060000;
  166. va_start(vl, args);
  167. for (idx = 0; idx < args; idx++) {
  168. wrData[idx+4] = va_arg(vl, u32);
  169. }
  170. va_end(vl);
  171. args += 4;
  172. while (args < sizeof(wrData)/sizeof(wrData[0])) {
  173. wrData[args++] = 0;
  174. }
  175. ret = pvr2_write_encoder_words(hdw,wrData,args);
  176. if (ret) break;
  177. wrData[0] = IVTV_MBOX_DRIVER_DONE|IVTV_MBOX_DRIVER_BUSY;
  178. ret = pvr2_write_encoder_words(hdw,wrData,1);
  179. if (ret) break;
  180. poll_count = 0;
  181. while (1) {
  182. if (poll_count < 10000000) poll_count++;
  183. ret = pvr2_read_encoder_words(hdw,!0,rdData,1);
  184. if (ret) break;
  185. if (rdData[0] & IVTV_MBOX_FIRMWARE_DONE) {
  186. break;
  187. }
  188. if (poll_count == 100) {
  189. pvr2_trace(
  190. PVR2_TRACE_ERROR_LEGS,
  191. "***WARNING*** device's encoder"
  192. " appears to be stuck"
  193. " (status=0%08x)",rdData[0]);
  194. pvr2_trace(
  195. PVR2_TRACE_ERROR_LEGS,
  196. "Encoder command: 0x%02x",cmd);
  197. for (idx = 4; idx < args; idx++) {
  198. pvr2_trace(
  199. PVR2_TRACE_ERROR_LEGS,
  200. "Encoder arg%d: 0x%08x",
  201. idx-3,wrData[idx]);
  202. }
  203. pvr2_trace(
  204. PVR2_TRACE_ERROR_LEGS,
  205. "Giving up waiting."
  206. " It is likely that"
  207. " this is a bad idea...");
  208. ret = -EBUSY;
  209. break;
  210. }
  211. }
  212. if (ret) break;
  213. wrData[0] = 0x7;
  214. ret = pvr2_read_encoder_words(hdw,0,rdData,16);
  215. if (ret) break;
  216. for (idx = 0; idx < args; idx++) {
  217. if (rdData[idx] != wrData[idx]) {
  218. pvr2_trace(
  219. PVR2_TRACE_DEBUG,
  220. "pvr2_encoder idx %02x mismatch exp:"
  221. " %08x got: %08x",
  222. idx,wrData[idx],rdData[idx]);
  223. }
  224. }
  225. wrData[0] = 0x0;
  226. ret = pvr2_write_encoder_words(hdw,wrData,1);
  227. if (ret) break;
  228. } while(0); LOCK_GIVE(hdw->ctl_lock);
  229. return ret;
  230. }
  231. int pvr2_encoder_configure(struct pvr2_hdw *hdw)
  232. {
  233. int ret = 0, audio, i;
  234. v4l2_std_id vd_std = hdw->std_mask_cur;
  235. int height = hdw->res_ver_val;
  236. int width = hdw->res_hor_val;
  237. int height_full = !hdw->interlace_val;
  238. int is_30fps, is_ntsc;
  239. if (vd_std & V4L2_STD_NTSC) {
  240. is_ntsc=1;
  241. is_30fps=1;
  242. } else if (vd_std & V4L2_STD_PAL_M) {
  243. is_ntsc=0;
  244. is_30fps=1;
  245. } else {
  246. is_ntsc=0;
  247. is_30fps=0;
  248. }
  249. pvr2_trace(PVR2_TRACE_ENCODER,"pvr2_encoder_configure");
  250. /* set stream output port. Some notes here: The ivtv-derived
  251. encoder documentation says that this command only gets a
  252. single argument. However the Windows driver for the model
  253. 29xxx series hardware has been sending 0x01 as a second
  254. argument, while the Windows driver for the model 24xxx
  255. series hardware has been sending 0x02 as a second argument.
  256. Confusing matters further are the observations that 0x01
  257. for that second argument simply won't work on the 24xxx
  258. hardware, while 0x02 will work on the 29xxx - except that
  259. when we use 0x02 then xawtv breaks due to a loss of
  260. synchronization with the mpeg packet headers. While xawtv
  261. should be fixed to let it resync better (I did try to
  262. contact Gerd about this but he has not answered), it has
  263. also been determined that sending 0x00 as this mystery
  264. second argument seems to work on both hardware models AND
  265. xawtv works again. So we're going to send 0x00. */
  266. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_OUTPUT_PORT, 2,
  267. 0x01, 0x00);
  268. /* set the Program Index Information. We want I,P,B frames (max 400) */
  269. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_PGM_INDEX_INFO, 2,
  270. 0x07, 0x0190);
  271. /* NOTE : windows driver sends these */
  272. /* Mike Isely <isely@pobox.com> 7-Mar-2006 The windows driver
  273. sends the following commands but if we do the same then
  274. many apps are no longer able to read the video stream.
  275. Leaving these out seems to do no harm at all, so they're
  276. commented out for that reason. */
  277. #ifdef notdef
  278. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 5,0,0,0);
  279. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 3,1,0,0);
  280. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 8,0,0,0);
  281. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 4,1,0,0);
  282. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 0,3,0,0);
  283. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_MISC,4,15,0,0,0);
  284. #endif
  285. /* Strange compared to ivtv data. */
  286. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_NUM_VSYNC_LINES, 2,
  287. 0xf0, 0xf0);
  288. /* setup firmware to notify us about some events (don't know why...) */
  289. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_EVENT_NOTIFICATION, 4,
  290. 0, 0, 0x10000000, 0xffffffff);
  291. /* set fps to 25 or 30 (1 or 0)*/
  292. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_FRAME_RATE, 1,
  293. is_30fps ? 0 : 1);
  294. /* set encoding resolution */
  295. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_FRAME_SIZE, 2,
  296. (height_full ? height : (height / 2)),
  297. width);
  298. /* set encoding aspect ratio to 4:3 */
  299. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_ASPECT_RATIO, 1,
  300. 0x02);
  301. /* VBI */
  302. if (hdw->config == pvr2_config_vbi) {
  303. int lines = 2 * (is_30fps ? 12 : 18);
  304. int size = (4*((lines*1443+3)/4)) / lines;
  305. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_VBI_CONFIG, 7,
  306. 0xbd05, 1, 4,
  307. 0x25256262, 0x387f7f7f,
  308. lines , size);
  309. // 0x25256262, 0x13135454, lines , size);
  310. /* select vbi lines */
  311. #define line_used(l) (is_30fps ? (l >= 10 && l <= 21) : (l >= 6 && l <= 23))
  312. for (i = 2 ; i <= 24 ; i++){
  313. ret |= pvr2_write_encoder_vcmd(
  314. hdw,CX2341X_ENC_SET_VBI_LINE, 5,
  315. i-1,line_used(i), 0, 0, 0);
  316. ret |= pvr2_write_encoder_vcmd(
  317. hdw,CX2341X_ENC_SET_VBI_LINE, 5,
  318. (i-1) | (1 << 31),
  319. line_used(i), 0, 0, 0);
  320. }
  321. } else {
  322. ret |= pvr2_write_encoder_vcmd(
  323. hdw,CX2341X_ENC_SET_VBI_LINE, 5,
  324. 0xffffffff,0,0,0,0);
  325. }
  326. /* set stream type, depending on resolution. */
  327. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_STREAM_TYPE, 1,
  328. height_full ? 0x0a : 0x0b);
  329. /* set video bitrate */
  330. ret |= pvr2_write_encoder_vcmd(
  331. hdw, CX2341X_ENC_SET_BIT_RATE, 3,
  332. (hdw->vbr_val ? 1 : 0),
  333. hdw->videobitrate_val,
  334. hdw->videopeak_val / 400);
  335. /* setup GOP structure (GOP size = 0f or 0c, 3-1 = 2 B-frames) */
  336. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_GOP_PROPERTIES, 2,
  337. is_30fps ? 0x0f : 0x0c, 0x03);
  338. /* enable 3:2 pulldown */
  339. ret |= pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_SET_3_2_PULLDOWN,1,0);
  340. /* set GOP open/close property (open) */
  341. ret |= pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_SET_GOP_CLOSURE,1,0);
  342. /* set audio stream properties 0x40b9? 0100 0000 1011 1001 */
  343. audio = (pvr_tbl_audiobitrate[hdw->audiobitrate_val] |
  344. pvr_tbl_srate[hdw->srate_val] |
  345. hdw->audiolayer_val << 2 |
  346. (hdw->audiocrc_val ? 1 << 14 : 0) |
  347. pvr_tbl_emphasis[hdw->audioemphasis_val]);
  348. ret |= pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_SET_AUDIO_PROPERTIES,1,
  349. audio);
  350. /* set dynamic noise reduction filter to manual, Horiz/Vert */
  351. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_DNR_FILTER_MODE, 2,
  352. 0, 0x03);
  353. /* dynamic noise reduction filter param */
  354. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_DNR_FILTER_PROPS, 2
  355. , 0, 0);
  356. /* dynamic noise reduction median filter */
  357. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_SET_CORING_LEVELS, 4,
  358. 0, 0xff, 0, 0xff);
  359. /* spacial prefiler parameter */
  360. ret |= pvr2_write_encoder_vcmd(hdw,
  361. CX2341X_ENC_SET_SPATIAL_FILTER_TYPE, 2,
  362. 0x01, 0x01);
  363. /* initialize video input */
  364. ret |= pvr2_write_encoder_vcmd(hdw, CX2341X_ENC_INITIALIZE_INPUT, 0);
  365. if (!ret) {
  366. hdw->subsys_enabled_mask |= (1<<PVR2_SUBSYS_B_ENC_CFG);
  367. }
  368. return ret;
  369. }
  370. int pvr2_encoder_start(struct pvr2_hdw *hdw)
  371. {
  372. int status;
  373. /* unmask some interrupts */
  374. pvr2_write_register(hdw, 0x0048, 0xbfffffff);
  375. /* change some GPIO data */
  376. pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000481);
  377. pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000000);
  378. if (hdw->config == pvr2_config_vbi) {
  379. status = pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  380. 0x01,0x14);
  381. } else if (hdw->config == pvr2_config_mpeg) {
  382. status = pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  383. 0,0x13);
  384. } else {
  385. status = pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  386. 0,0x13);
  387. }
  388. if (!status) {
  389. hdw->subsys_enabled_mask |= (1<<PVR2_SUBSYS_B_ENC_RUN);
  390. }
  391. return status;
  392. }
  393. int pvr2_encoder_stop(struct pvr2_hdw *hdw)
  394. {
  395. int status;
  396. /* mask all interrupts */
  397. pvr2_write_register(hdw, 0x0048, 0xffffffff);
  398. if (hdw->config == pvr2_config_vbi) {
  399. status = pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  400. 0x01,0x01,0x14);
  401. } else if (hdw->config == pvr2_config_mpeg) {
  402. status = pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  403. 0x01,0,0x13);
  404. } else {
  405. status = pvr2_write_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  406. 0x01,0,0x13);
  407. }
  408. /* change some GPIO data */
  409. /* Note: Bit d7 of dir appears to control the LED. So we shut it
  410. off here. */
  411. pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000401);
  412. pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000000);
  413. if (!status) {
  414. hdw->subsys_enabled_mask &= ~(1<<PVR2_SUBSYS_B_ENC_RUN);
  415. }
  416. return status;
  417. }
  418. /*
  419. Stuff for Emacs to see, in order to encourage consistent editing style:
  420. *** Local Variables: ***
  421. *** mode: c ***
  422. *** fill-column: 70 ***
  423. *** tab-width: 8 ***
  424. *** c-basic-offset: 8 ***
  425. *** End: ***
  426. */