dmar.h 4.3 KB

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  1. /*
  2. * Copyright (c) 2006, Intel Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  15. * Place - Suite 330, Boston, MA 02111-1307 USA.
  16. *
  17. * Copyright (C) Ashok Raj <ashok.raj@intel.com>
  18. * Copyright (C) Shaohua Li <shaohua.li@intel.com>
  19. */
  20. #ifndef __DMAR_H__
  21. #define __DMAR_H__
  22. #include <linux/acpi.h>
  23. #include <linux/types.h>
  24. #include <linux/msi.h>
  25. #if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
  26. struct intel_iommu;
  27. struct dmar_drhd_unit {
  28. struct list_head list; /* list of drhd units */
  29. struct acpi_dmar_header *hdr; /* ACPI header */
  30. u64 reg_base_addr; /* register base address*/
  31. struct pci_dev **devices; /* target device array */
  32. int devices_cnt; /* target device count */
  33. u8 ignored:1; /* ignore drhd */
  34. u8 include_all:1;
  35. struct intel_iommu *iommu;
  36. };
  37. extern struct list_head dmar_drhd_units;
  38. #define for_each_drhd_unit(drhd) \
  39. list_for_each_entry(drhd, &dmar_drhd_units, list)
  40. extern int dmar_table_init(void);
  41. extern int early_dmar_detect(void);
  42. extern int dmar_dev_scope_init(void);
  43. /* Intel IOMMU detection */
  44. extern void detect_intel_iommu(void);
  45. extern int parse_ioapics_under_ir(void);
  46. extern int alloc_iommu(struct dmar_drhd_unit *);
  47. #else
  48. static inline void detect_intel_iommu(void)
  49. {
  50. return;
  51. }
  52. static inline int dmar_table_init(void)
  53. {
  54. return -ENODEV;
  55. }
  56. #endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */
  57. #ifdef CONFIG_INTR_REMAP
  58. extern int intr_remapping_enabled;
  59. extern int enable_intr_remapping(int);
  60. struct irte {
  61. union {
  62. struct {
  63. __u64 present : 1,
  64. fpd : 1,
  65. dst_mode : 1,
  66. redir_hint : 1,
  67. trigger_mode : 1,
  68. dlvry_mode : 3,
  69. avail : 4,
  70. __reserved_1 : 4,
  71. vector : 8,
  72. __reserved_2 : 8,
  73. dest_id : 32;
  74. };
  75. __u64 low;
  76. };
  77. union {
  78. struct {
  79. __u64 sid : 16,
  80. sq : 2,
  81. svt : 2,
  82. __reserved_3 : 44;
  83. };
  84. __u64 high;
  85. };
  86. };
  87. extern int get_irte(int irq, struct irte *entry);
  88. extern int modify_irte(int irq, struct irte *irte_modified);
  89. extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count);
  90. extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
  91. u16 sub_handle);
  92. extern int map_irq_to_irte_handle(int irq, u16 *sub_handle);
  93. extern int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index);
  94. extern int flush_irte(int irq);
  95. extern int free_irte(int irq);
  96. extern int irq_remapped(int irq);
  97. extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
  98. extern struct intel_iommu *map_ioapic_to_ir(int apic);
  99. #else
  100. #define irq_remapped(irq) (0)
  101. #define enable_intr_remapping(mode) (-1)
  102. #define intr_remapping_enabled (0)
  103. #endif
  104. #ifdef CONFIG_DMAR
  105. extern const char *dmar_get_fault_reason(u8 fault_reason);
  106. /* Can't use the common MSI interrupt functions
  107. * since DMAR is not a pci device
  108. */
  109. extern void dmar_msi_unmask(unsigned int irq);
  110. extern void dmar_msi_mask(unsigned int irq);
  111. extern void dmar_msi_read(int irq, struct msi_msg *msg);
  112. extern void dmar_msi_write(int irq, struct msi_msg *msg);
  113. extern int dmar_set_interrupt(struct intel_iommu *iommu);
  114. extern int arch_setup_dmar_msi(unsigned int irq);
  115. extern int iommu_detected, no_iommu;
  116. extern struct list_head dmar_rmrr_units;
  117. struct dmar_rmrr_unit {
  118. struct list_head list; /* list of rmrr units */
  119. struct acpi_dmar_header *hdr; /* ACPI header */
  120. u64 base_address; /* reserved base address*/
  121. u64 end_address; /* reserved end address */
  122. struct pci_dev **devices; /* target devices */
  123. int devices_cnt; /* target device count */
  124. };
  125. #define for_each_rmrr_units(rmrr) \
  126. list_for_each_entry(rmrr, &dmar_rmrr_units, list)
  127. /* Intel DMAR initialization functions */
  128. extern int intel_iommu_init(void);
  129. extern int dmar_disabled;
  130. #else
  131. static inline int intel_iommu_init(void)
  132. {
  133. #ifdef CONFIG_INTR_REMAP
  134. return dmar_dev_scope_init();
  135. #else
  136. return -ENODEV;
  137. #endif
  138. }
  139. #endif /* !CONFIG_DMAR */
  140. #endif /* __DMAR_H__ */