setup.c 4.8 KB

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  1. /*
  2. * Setup pointers to hardware dependent routines.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
  9. * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
  10. *
  11. */
  12. #include <linux/config.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/pci.h>
  15. #include <linux/init.h>
  16. #include <linux/pm.h>
  17. #include <linux/serial.h>
  18. #include <linux/serial_core.h>
  19. #include <asm/bootinfo.h>
  20. #include <asm/time.h>
  21. #include <asm/io.h>
  22. #include <asm/irq.h>
  23. #include <asm/processor.h>
  24. #include <asm/reboot.h>
  25. #include <asm/gt64120.h>
  26. #include <asm/serial.h>
  27. #include <asm/mach-cobalt/cobalt.h>
  28. extern void cobalt_machine_restart(char *command);
  29. extern void cobalt_machine_halt(void);
  30. extern void cobalt_machine_power_off(void);
  31. int cobalt_board_id;
  32. const char *get_system_type(void)
  33. {
  34. switch (cobalt_board_id) {
  35. case COBALT_BRD_ID_QUBE1:
  36. return "Cobalt Qube";
  37. case COBALT_BRD_ID_RAQ1:
  38. return "Cobalt RaQ";
  39. case COBALT_BRD_ID_QUBE2:
  40. return "Cobalt Qube2";
  41. case COBALT_BRD_ID_RAQ2:
  42. return "Cobalt RaQ2";
  43. }
  44. return "MIPS Cobalt";
  45. }
  46. static void __init cobalt_timer_setup(struct irqaction *irq)
  47. {
  48. /* Load timer value for 1KHz (TCLK is 50MHz) */
  49. GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS);
  50. /* Enable timer */
  51. GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS);
  52. /* Register interrupt */
  53. setup_irq(COBALT_GALILEO_IRQ, irq);
  54. /* Enable interrupt */
  55. GALILEO_OUTL(GALILEO_INTR_T0EXP | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
  56. }
  57. extern struct pci_ops gt64111_pci_ops;
  58. static struct resource cobalt_mem_resource = {
  59. "PCI memory", GT64111_MEM_BASE, GT64111_MEM_END, IORESOURCE_MEM
  60. };
  61. static struct resource cobalt_io_resource = {
  62. "PCI I/O", 0x1000, 0xffff, IORESOURCE_IO
  63. };
  64. static struct resource cobalt_io_resources[] = {
  65. { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
  66. { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
  67. { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
  68. { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
  69. { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
  70. };
  71. #define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
  72. static struct pci_controller cobalt_pci_controller = {
  73. .pci_ops = &gt64111_pci_ops,
  74. .mem_resource = &cobalt_mem_resource,
  75. .mem_offset = 0,
  76. .io_resource = &cobalt_io_resource,
  77. .io_offset = 0 - GT64111_IO_BASE
  78. };
  79. void __init plat_setup(void)
  80. {
  81. static struct uart_port uart;
  82. unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
  83. int i;
  84. _machine_restart = cobalt_machine_restart;
  85. _machine_halt = cobalt_machine_halt;
  86. pm_power_off = cobalt_machine_power_off;
  87. board_timer_setup = cobalt_timer_setup;
  88. set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE));
  89. /* I/O port resource must include UART and LCD/buttons */
  90. ioport_resource.end = 0x0fffffff;
  91. /*
  92. * This is a prom style console. We just poke at the
  93. * UART to make it talk.
  94. * Only use this console if you really screw up and can't
  95. * get to the stage of setting up a real serial console.
  96. */
  97. /*ns16550_setup_console();*/
  98. /* request I/O space for devices used on all i[345]86 PCs */
  99. for (i = 0; i < COBALT_IO_RESOURCES; i++)
  100. request_resource(&ioport_resource, cobalt_io_resources + i);
  101. /* Read the cobalt id register out of the PCI config space */
  102. PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
  103. cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
  104. cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
  105. cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
  106. printk("Cobalt board ID: %d\n", cobalt_board_id);
  107. #ifdef CONFIG_PCI
  108. register_pci_controller(&cobalt_pci_controller);
  109. #endif
  110. #ifdef CONFIG_SERIAL_8250
  111. if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
  112. uart.line = 0;
  113. uart.type = PORT_UNKNOWN;
  114. uart.uartclk = 18432000;
  115. uart.irq = COBALT_SERIAL_IRQ;
  116. uart.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
  117. uart.iobase = 0xc800000;
  118. uart.iotype = UPIO_PORT;
  119. early_serial_setup(&uart);
  120. }
  121. #endif
  122. }
  123. /*
  124. * Prom init. We read our one and only communication with the firmware.
  125. * Grab the amount of installed memory.
  126. * Better boot loaders (CoLo) pass a command line too :-)
  127. */
  128. void __init prom_init(void)
  129. {
  130. int narg, indx, posn, nchr;
  131. unsigned long memsz;
  132. char **argv;
  133. mips_machgroup = MACH_GROUP_COBALT;
  134. memsz = fw_arg0 & 0x7fff0000;
  135. narg = fw_arg0 & 0x0000ffff;
  136. if (narg) {
  137. arcs_cmdline[0] = '\0';
  138. argv = (char **) fw_arg1;
  139. posn = 0;
  140. for (indx = 1; indx < narg; ++indx) {
  141. nchr = strlen(argv[indx]);
  142. if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
  143. break;
  144. if (posn)
  145. arcs_cmdline[posn++] = ' ';
  146. strcpy(arcs_cmdline + posn, argv[indx]);
  147. posn += nchr;
  148. }
  149. }
  150. add_memory_region(0x0, memsz, BOOT_MEM_RAM);
  151. }
  152. unsigned long __init prom_free_prom_memory(void)
  153. {
  154. /* Nothing to do! */
  155. return 0;
  156. }