hpsa.c 142 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "2.0.2-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  95. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  96. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  100. /* board_id = Subsystem Device ID & Vendor ID
  101. * product = Marketing Name for the board
  102. * access = Address of the struct of function pointers
  103. */
  104. static struct board_type products[] = {
  105. {0x3241103C, "Smart Array P212", &SA5_access},
  106. {0x3243103C, "Smart Array P410", &SA5_access},
  107. {0x3245103C, "Smart Array P410i", &SA5_access},
  108. {0x3247103C, "Smart Array P411", &SA5_access},
  109. {0x3249103C, "Smart Array P812", &SA5_access},
  110. {0x324a103C, "Smart Array P712m", &SA5_access},
  111. {0x324b103C, "Smart Array P711m", &SA5_access},
  112. {0x3350103C, "Smart Array", &SA5_access},
  113. {0x3351103C, "Smart Array", &SA5_access},
  114. {0x3352103C, "Smart Array", &SA5_access},
  115. {0x3353103C, "Smart Array", &SA5_access},
  116. {0x3354103C, "Smart Array", &SA5_access},
  117. {0x3355103C, "Smart Array", &SA5_access},
  118. {0x3356103C, "Smart Array", &SA5_access},
  119. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  120. };
  121. static int number_of_controllers;
  122. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  123. static spinlock_t lockup_detector_lock;
  124. static struct task_struct *hpsa_lockup_detector;
  125. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  126. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  127. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  128. static void start_io(struct ctlr_info *h);
  129. #ifdef CONFIG_COMPAT
  130. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  131. #endif
  132. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  133. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  134. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  135. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  136. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  137. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  138. int cmd_type);
  139. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  140. static void hpsa_scan_start(struct Scsi_Host *);
  141. static int hpsa_scan_finished(struct Scsi_Host *sh,
  142. unsigned long elapsed_time);
  143. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  144. int qdepth, int reason);
  145. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  146. static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
  147. static int hpsa_slave_alloc(struct scsi_device *sdev);
  148. static void hpsa_slave_destroy(struct scsi_device *sdev);
  149. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  150. static int check_for_unit_attention(struct ctlr_info *h,
  151. struct CommandList *c);
  152. static void check_ioctl_unit_attention(struct ctlr_info *h,
  153. struct CommandList *c);
  154. /* performant mode helper functions */
  155. static void calc_bucket_map(int *bucket, int num_buckets,
  156. int nsgs, int *bucket_map);
  157. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  158. static inline u32 next_command(struct ctlr_info *h, u8 q);
  159. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  160. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  161. u64 *cfg_offset);
  162. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  163. unsigned long *memory_bar);
  164. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  165. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  166. void __iomem *vaddr, int wait_for_ready);
  167. static inline void finish_cmd(struct CommandList *c);
  168. #define BOARD_NOT_READY 0
  169. #define BOARD_READY 1
  170. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  171. {
  172. unsigned long *priv = shost_priv(sdev->host);
  173. return (struct ctlr_info *) *priv;
  174. }
  175. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  176. {
  177. unsigned long *priv = shost_priv(sh);
  178. return (struct ctlr_info *) *priv;
  179. }
  180. static int check_for_unit_attention(struct ctlr_info *h,
  181. struct CommandList *c)
  182. {
  183. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  184. return 0;
  185. switch (c->err_info->SenseInfo[12]) {
  186. case STATE_CHANGED:
  187. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  188. "detected, command retried\n", h->ctlr);
  189. break;
  190. case LUN_FAILED:
  191. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  192. "detected, action required\n", h->ctlr);
  193. break;
  194. case REPORT_LUNS_CHANGED:
  195. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  196. "changed, action required\n", h->ctlr);
  197. /*
  198. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  199. * target (array) devices.
  200. */
  201. break;
  202. case POWER_OR_RESET:
  203. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  204. "or device reset detected\n", h->ctlr);
  205. break;
  206. case UNIT_ATTENTION_CLEARED:
  207. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  208. "cleared by another initiator\n", h->ctlr);
  209. break;
  210. default:
  211. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  212. "unit attention detected\n", h->ctlr);
  213. break;
  214. }
  215. return 1;
  216. }
  217. static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
  218. {
  219. if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
  220. (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
  221. c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
  222. return 0;
  223. dev_warn(&h->pdev->dev, HPSA "device busy");
  224. return 1;
  225. }
  226. static ssize_t host_store_rescan(struct device *dev,
  227. struct device_attribute *attr,
  228. const char *buf, size_t count)
  229. {
  230. struct ctlr_info *h;
  231. struct Scsi_Host *shost = class_to_shost(dev);
  232. h = shost_to_hba(shost);
  233. hpsa_scan_start(h->scsi_host);
  234. return count;
  235. }
  236. static ssize_t host_show_firmware_revision(struct device *dev,
  237. struct device_attribute *attr, char *buf)
  238. {
  239. struct ctlr_info *h;
  240. struct Scsi_Host *shost = class_to_shost(dev);
  241. unsigned char *fwrev;
  242. h = shost_to_hba(shost);
  243. if (!h->hba_inquiry_data)
  244. return 0;
  245. fwrev = &h->hba_inquiry_data[32];
  246. return snprintf(buf, 20, "%c%c%c%c\n",
  247. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  248. }
  249. static ssize_t host_show_commands_outstanding(struct device *dev,
  250. struct device_attribute *attr, char *buf)
  251. {
  252. struct Scsi_Host *shost = class_to_shost(dev);
  253. struct ctlr_info *h = shost_to_hba(shost);
  254. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  255. }
  256. static ssize_t host_show_transport_mode(struct device *dev,
  257. struct device_attribute *attr, char *buf)
  258. {
  259. struct ctlr_info *h;
  260. struct Scsi_Host *shost = class_to_shost(dev);
  261. h = shost_to_hba(shost);
  262. return snprintf(buf, 20, "%s\n",
  263. h->transMethod & CFGTBL_Trans_Performant ?
  264. "performant" : "simple");
  265. }
  266. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  267. static u32 unresettable_controller[] = {
  268. 0x324a103C, /* Smart Array P712m */
  269. 0x324b103C, /* SmartArray P711m */
  270. 0x3223103C, /* Smart Array P800 */
  271. 0x3234103C, /* Smart Array P400 */
  272. 0x3235103C, /* Smart Array P400i */
  273. 0x3211103C, /* Smart Array E200i */
  274. 0x3212103C, /* Smart Array E200 */
  275. 0x3213103C, /* Smart Array E200i */
  276. 0x3214103C, /* Smart Array E200i */
  277. 0x3215103C, /* Smart Array E200i */
  278. 0x3237103C, /* Smart Array E500 */
  279. 0x323D103C, /* Smart Array P700m */
  280. 0x40800E11, /* Smart Array 5i */
  281. 0x409C0E11, /* Smart Array 6400 */
  282. 0x409D0E11, /* Smart Array 6400 EM */
  283. 0x40700E11, /* Smart Array 5300 */
  284. 0x40820E11, /* Smart Array 532 */
  285. 0x40830E11, /* Smart Array 5312 */
  286. 0x409A0E11, /* Smart Array 641 */
  287. 0x409B0E11, /* Smart Array 642 */
  288. 0x40910E11, /* Smart Array 6i */
  289. };
  290. /* List of controllers which cannot even be soft reset */
  291. static u32 soft_unresettable_controller[] = {
  292. 0x40800E11, /* Smart Array 5i */
  293. 0x40700E11, /* Smart Array 5300 */
  294. 0x40820E11, /* Smart Array 532 */
  295. 0x40830E11, /* Smart Array 5312 */
  296. 0x409A0E11, /* Smart Array 641 */
  297. 0x409B0E11, /* Smart Array 642 */
  298. 0x40910E11, /* Smart Array 6i */
  299. /* Exclude 640x boards. These are two pci devices in one slot
  300. * which share a battery backed cache module. One controls the
  301. * cache, the other accesses the cache through the one that controls
  302. * it. If we reset the one controlling the cache, the other will
  303. * likely not be happy. Just forbid resetting this conjoined mess.
  304. * The 640x isn't really supported by hpsa anyway.
  305. */
  306. 0x409C0E11, /* Smart Array 6400 */
  307. 0x409D0E11, /* Smart Array 6400 EM */
  308. };
  309. static int ctlr_is_hard_resettable(u32 board_id)
  310. {
  311. int i;
  312. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  313. if (unresettable_controller[i] == board_id)
  314. return 0;
  315. return 1;
  316. }
  317. static int ctlr_is_soft_resettable(u32 board_id)
  318. {
  319. int i;
  320. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  321. if (soft_unresettable_controller[i] == board_id)
  322. return 0;
  323. return 1;
  324. }
  325. static int ctlr_is_resettable(u32 board_id)
  326. {
  327. return ctlr_is_hard_resettable(board_id) ||
  328. ctlr_is_soft_resettable(board_id);
  329. }
  330. static ssize_t host_show_resettable(struct device *dev,
  331. struct device_attribute *attr, char *buf)
  332. {
  333. struct ctlr_info *h;
  334. struct Scsi_Host *shost = class_to_shost(dev);
  335. h = shost_to_hba(shost);
  336. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  337. }
  338. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  339. {
  340. return (scsi3addr[3] & 0xC0) == 0x40;
  341. }
  342. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  343. "1(ADM)", "UNKNOWN"
  344. };
  345. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  346. static ssize_t raid_level_show(struct device *dev,
  347. struct device_attribute *attr, char *buf)
  348. {
  349. ssize_t l = 0;
  350. unsigned char rlevel;
  351. struct ctlr_info *h;
  352. struct scsi_device *sdev;
  353. struct hpsa_scsi_dev_t *hdev;
  354. unsigned long flags;
  355. sdev = to_scsi_device(dev);
  356. h = sdev_to_hba(sdev);
  357. spin_lock_irqsave(&h->lock, flags);
  358. hdev = sdev->hostdata;
  359. if (!hdev) {
  360. spin_unlock_irqrestore(&h->lock, flags);
  361. return -ENODEV;
  362. }
  363. /* Is this even a logical drive? */
  364. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  365. spin_unlock_irqrestore(&h->lock, flags);
  366. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  367. return l;
  368. }
  369. rlevel = hdev->raid_level;
  370. spin_unlock_irqrestore(&h->lock, flags);
  371. if (rlevel > RAID_UNKNOWN)
  372. rlevel = RAID_UNKNOWN;
  373. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  374. return l;
  375. }
  376. static ssize_t lunid_show(struct device *dev,
  377. struct device_attribute *attr, char *buf)
  378. {
  379. struct ctlr_info *h;
  380. struct scsi_device *sdev;
  381. struct hpsa_scsi_dev_t *hdev;
  382. unsigned long flags;
  383. unsigned char lunid[8];
  384. sdev = to_scsi_device(dev);
  385. h = sdev_to_hba(sdev);
  386. spin_lock_irqsave(&h->lock, flags);
  387. hdev = sdev->hostdata;
  388. if (!hdev) {
  389. spin_unlock_irqrestore(&h->lock, flags);
  390. return -ENODEV;
  391. }
  392. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  393. spin_unlock_irqrestore(&h->lock, flags);
  394. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  395. lunid[0], lunid[1], lunid[2], lunid[3],
  396. lunid[4], lunid[5], lunid[6], lunid[7]);
  397. }
  398. static ssize_t unique_id_show(struct device *dev,
  399. struct device_attribute *attr, char *buf)
  400. {
  401. struct ctlr_info *h;
  402. struct scsi_device *sdev;
  403. struct hpsa_scsi_dev_t *hdev;
  404. unsigned long flags;
  405. unsigned char sn[16];
  406. sdev = to_scsi_device(dev);
  407. h = sdev_to_hba(sdev);
  408. spin_lock_irqsave(&h->lock, flags);
  409. hdev = sdev->hostdata;
  410. if (!hdev) {
  411. spin_unlock_irqrestore(&h->lock, flags);
  412. return -ENODEV;
  413. }
  414. memcpy(sn, hdev->device_id, sizeof(sn));
  415. spin_unlock_irqrestore(&h->lock, flags);
  416. return snprintf(buf, 16 * 2 + 2,
  417. "%02X%02X%02X%02X%02X%02X%02X%02X"
  418. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  419. sn[0], sn[1], sn[2], sn[3],
  420. sn[4], sn[5], sn[6], sn[7],
  421. sn[8], sn[9], sn[10], sn[11],
  422. sn[12], sn[13], sn[14], sn[15]);
  423. }
  424. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  425. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  426. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  427. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  428. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  429. host_show_firmware_revision, NULL);
  430. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  431. host_show_commands_outstanding, NULL);
  432. static DEVICE_ATTR(transport_mode, S_IRUGO,
  433. host_show_transport_mode, NULL);
  434. static DEVICE_ATTR(resettable, S_IRUGO,
  435. host_show_resettable, NULL);
  436. static struct device_attribute *hpsa_sdev_attrs[] = {
  437. &dev_attr_raid_level,
  438. &dev_attr_lunid,
  439. &dev_attr_unique_id,
  440. NULL,
  441. };
  442. static struct device_attribute *hpsa_shost_attrs[] = {
  443. &dev_attr_rescan,
  444. &dev_attr_firmware_revision,
  445. &dev_attr_commands_outstanding,
  446. &dev_attr_transport_mode,
  447. &dev_attr_resettable,
  448. NULL,
  449. };
  450. static struct scsi_host_template hpsa_driver_template = {
  451. .module = THIS_MODULE,
  452. .name = HPSA,
  453. .proc_name = HPSA,
  454. .queuecommand = hpsa_scsi_queue_command,
  455. .scan_start = hpsa_scan_start,
  456. .scan_finished = hpsa_scan_finished,
  457. .change_queue_depth = hpsa_change_queue_depth,
  458. .this_id = -1,
  459. .use_clustering = ENABLE_CLUSTERING,
  460. .eh_abort_handler = hpsa_eh_abort_handler,
  461. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  462. .ioctl = hpsa_ioctl,
  463. .slave_alloc = hpsa_slave_alloc,
  464. .slave_destroy = hpsa_slave_destroy,
  465. #ifdef CONFIG_COMPAT
  466. .compat_ioctl = hpsa_compat_ioctl,
  467. #endif
  468. .sdev_attrs = hpsa_sdev_attrs,
  469. .shost_attrs = hpsa_shost_attrs,
  470. .max_sectors = 8192,
  471. };
  472. /* Enqueuing and dequeuing functions for cmdlists. */
  473. static inline void addQ(struct list_head *list, struct CommandList *c)
  474. {
  475. list_add_tail(&c->list, list);
  476. }
  477. static inline u32 next_command(struct ctlr_info *h, u8 q)
  478. {
  479. u32 a;
  480. struct reply_pool *rq = &h->reply_queue[q];
  481. unsigned long flags;
  482. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  483. return h->access.command_completed(h, q);
  484. if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
  485. a = rq->head[rq->current_entry];
  486. rq->current_entry++;
  487. spin_lock_irqsave(&h->lock, flags);
  488. h->commands_outstanding--;
  489. spin_unlock_irqrestore(&h->lock, flags);
  490. } else {
  491. a = FIFO_EMPTY;
  492. }
  493. /* Check for wraparound */
  494. if (rq->current_entry == h->max_commands) {
  495. rq->current_entry = 0;
  496. rq->wraparound ^= 1;
  497. }
  498. return a;
  499. }
  500. /* set_performant_mode: Modify the tag for cciss performant
  501. * set bit 0 for pull model, bits 3-1 for block fetch
  502. * register number
  503. */
  504. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  505. {
  506. if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
  507. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  508. if (likely(h->msix_vector))
  509. c->Header.ReplyQueue =
  510. smp_processor_id() % h->nreply_queues;
  511. }
  512. }
  513. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  514. struct CommandList *c)
  515. {
  516. unsigned long flags;
  517. set_performant_mode(h, c);
  518. spin_lock_irqsave(&h->lock, flags);
  519. addQ(&h->reqQ, c);
  520. h->Qdepth++;
  521. spin_unlock_irqrestore(&h->lock, flags);
  522. start_io(h);
  523. }
  524. static inline void removeQ(struct CommandList *c)
  525. {
  526. if (WARN_ON(list_empty(&c->list)))
  527. return;
  528. list_del_init(&c->list);
  529. }
  530. static inline int is_hba_lunid(unsigned char scsi3addr[])
  531. {
  532. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  533. }
  534. static inline int is_scsi_rev_5(struct ctlr_info *h)
  535. {
  536. if (!h->hba_inquiry_data)
  537. return 0;
  538. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  539. return 1;
  540. return 0;
  541. }
  542. static int hpsa_find_target_lun(struct ctlr_info *h,
  543. unsigned char scsi3addr[], int bus, int *target, int *lun)
  544. {
  545. /* finds an unused bus, target, lun for a new physical device
  546. * assumes h->devlock is held
  547. */
  548. int i, found = 0;
  549. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  550. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  551. for (i = 0; i < h->ndevices; i++) {
  552. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  553. __set_bit(h->dev[i]->target, lun_taken);
  554. }
  555. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  556. if (i < HPSA_MAX_DEVICES) {
  557. /* *bus = 1; */
  558. *target = i;
  559. *lun = 0;
  560. found = 1;
  561. }
  562. return !found;
  563. }
  564. /* Add an entry into h->dev[] array. */
  565. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  566. struct hpsa_scsi_dev_t *device,
  567. struct hpsa_scsi_dev_t *added[], int *nadded)
  568. {
  569. /* assumes h->devlock is held */
  570. int n = h->ndevices;
  571. int i;
  572. unsigned char addr1[8], addr2[8];
  573. struct hpsa_scsi_dev_t *sd;
  574. if (n >= HPSA_MAX_DEVICES) {
  575. dev_err(&h->pdev->dev, "too many devices, some will be "
  576. "inaccessible.\n");
  577. return -1;
  578. }
  579. /* physical devices do not have lun or target assigned until now. */
  580. if (device->lun != -1)
  581. /* Logical device, lun is already assigned. */
  582. goto lun_assigned;
  583. /* If this device a non-zero lun of a multi-lun device
  584. * byte 4 of the 8-byte LUN addr will contain the logical
  585. * unit no, zero otherise.
  586. */
  587. if (device->scsi3addr[4] == 0) {
  588. /* This is not a non-zero lun of a multi-lun device */
  589. if (hpsa_find_target_lun(h, device->scsi3addr,
  590. device->bus, &device->target, &device->lun) != 0)
  591. return -1;
  592. goto lun_assigned;
  593. }
  594. /* This is a non-zero lun of a multi-lun device.
  595. * Search through our list and find the device which
  596. * has the same 8 byte LUN address, excepting byte 4.
  597. * Assign the same bus and target for this new LUN.
  598. * Use the logical unit number from the firmware.
  599. */
  600. memcpy(addr1, device->scsi3addr, 8);
  601. addr1[4] = 0;
  602. for (i = 0; i < n; i++) {
  603. sd = h->dev[i];
  604. memcpy(addr2, sd->scsi3addr, 8);
  605. addr2[4] = 0;
  606. /* differ only in byte 4? */
  607. if (memcmp(addr1, addr2, 8) == 0) {
  608. device->bus = sd->bus;
  609. device->target = sd->target;
  610. device->lun = device->scsi3addr[4];
  611. break;
  612. }
  613. }
  614. if (device->lun == -1) {
  615. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  616. " suspect firmware bug or unsupported hardware "
  617. "configuration.\n");
  618. return -1;
  619. }
  620. lun_assigned:
  621. h->dev[n] = device;
  622. h->ndevices++;
  623. added[*nadded] = device;
  624. (*nadded)++;
  625. /* initially, (before registering with scsi layer) we don't
  626. * know our hostno and we don't want to print anything first
  627. * time anyway (the scsi layer's inquiries will show that info)
  628. */
  629. /* if (hostno != -1) */
  630. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  631. scsi_device_type(device->devtype), hostno,
  632. device->bus, device->target, device->lun);
  633. return 0;
  634. }
  635. /* Update an entry in h->dev[] array. */
  636. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  637. int entry, struct hpsa_scsi_dev_t *new_entry)
  638. {
  639. /* assumes h->devlock is held */
  640. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  641. /* Raid level changed. */
  642. h->dev[entry]->raid_level = new_entry->raid_level;
  643. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  644. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  645. new_entry->target, new_entry->lun);
  646. }
  647. /* Replace an entry from h->dev[] array. */
  648. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  649. int entry, struct hpsa_scsi_dev_t *new_entry,
  650. struct hpsa_scsi_dev_t *added[], int *nadded,
  651. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  652. {
  653. /* assumes h->devlock is held */
  654. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  655. removed[*nremoved] = h->dev[entry];
  656. (*nremoved)++;
  657. /*
  658. * New physical devices won't have target/lun assigned yet
  659. * so we need to preserve the values in the slot we are replacing.
  660. */
  661. if (new_entry->target == -1) {
  662. new_entry->target = h->dev[entry]->target;
  663. new_entry->lun = h->dev[entry]->lun;
  664. }
  665. h->dev[entry] = new_entry;
  666. added[*nadded] = new_entry;
  667. (*nadded)++;
  668. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  669. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  670. new_entry->target, new_entry->lun);
  671. }
  672. /* Remove an entry from h->dev[] array. */
  673. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  674. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  675. {
  676. /* assumes h->devlock is held */
  677. int i;
  678. struct hpsa_scsi_dev_t *sd;
  679. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  680. sd = h->dev[entry];
  681. removed[*nremoved] = h->dev[entry];
  682. (*nremoved)++;
  683. for (i = entry; i < h->ndevices-1; i++)
  684. h->dev[i] = h->dev[i+1];
  685. h->ndevices--;
  686. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  687. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  688. sd->lun);
  689. }
  690. #define SCSI3ADDR_EQ(a, b) ( \
  691. (a)[7] == (b)[7] && \
  692. (a)[6] == (b)[6] && \
  693. (a)[5] == (b)[5] && \
  694. (a)[4] == (b)[4] && \
  695. (a)[3] == (b)[3] && \
  696. (a)[2] == (b)[2] && \
  697. (a)[1] == (b)[1] && \
  698. (a)[0] == (b)[0])
  699. static void fixup_botched_add(struct ctlr_info *h,
  700. struct hpsa_scsi_dev_t *added)
  701. {
  702. /* called when scsi_add_device fails in order to re-adjust
  703. * h->dev[] to match the mid layer's view.
  704. */
  705. unsigned long flags;
  706. int i, j;
  707. spin_lock_irqsave(&h->lock, flags);
  708. for (i = 0; i < h->ndevices; i++) {
  709. if (h->dev[i] == added) {
  710. for (j = i; j < h->ndevices-1; j++)
  711. h->dev[j] = h->dev[j+1];
  712. h->ndevices--;
  713. break;
  714. }
  715. }
  716. spin_unlock_irqrestore(&h->lock, flags);
  717. kfree(added);
  718. }
  719. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  720. struct hpsa_scsi_dev_t *dev2)
  721. {
  722. /* we compare everything except lun and target as these
  723. * are not yet assigned. Compare parts likely
  724. * to differ first
  725. */
  726. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  727. sizeof(dev1->scsi3addr)) != 0)
  728. return 0;
  729. if (memcmp(dev1->device_id, dev2->device_id,
  730. sizeof(dev1->device_id)) != 0)
  731. return 0;
  732. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  733. return 0;
  734. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  735. return 0;
  736. if (dev1->devtype != dev2->devtype)
  737. return 0;
  738. if (dev1->bus != dev2->bus)
  739. return 0;
  740. return 1;
  741. }
  742. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  743. struct hpsa_scsi_dev_t *dev2)
  744. {
  745. /* Device attributes that can change, but don't mean
  746. * that the device is a different device, nor that the OS
  747. * needs to be told anything about the change.
  748. */
  749. if (dev1->raid_level != dev2->raid_level)
  750. return 1;
  751. return 0;
  752. }
  753. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  754. * and return needle location in *index. If scsi3addr matches, but not
  755. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  756. * location in *index.
  757. * In the case of a minor device attribute change, such as RAID level, just
  758. * return DEVICE_UPDATED, along with the updated device's location in index.
  759. * If needle not found, return DEVICE_NOT_FOUND.
  760. */
  761. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  762. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  763. int *index)
  764. {
  765. int i;
  766. #define DEVICE_NOT_FOUND 0
  767. #define DEVICE_CHANGED 1
  768. #define DEVICE_SAME 2
  769. #define DEVICE_UPDATED 3
  770. for (i = 0; i < haystack_size; i++) {
  771. if (haystack[i] == NULL) /* previously removed. */
  772. continue;
  773. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  774. *index = i;
  775. if (device_is_the_same(needle, haystack[i])) {
  776. if (device_updated(needle, haystack[i]))
  777. return DEVICE_UPDATED;
  778. return DEVICE_SAME;
  779. } else {
  780. return DEVICE_CHANGED;
  781. }
  782. }
  783. }
  784. *index = -1;
  785. return DEVICE_NOT_FOUND;
  786. }
  787. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  788. struct hpsa_scsi_dev_t *sd[], int nsds)
  789. {
  790. /* sd contains scsi3 addresses and devtypes, and inquiry
  791. * data. This function takes what's in sd to be the current
  792. * reality and updates h->dev[] to reflect that reality.
  793. */
  794. int i, entry, device_change, changes = 0;
  795. struct hpsa_scsi_dev_t *csd;
  796. unsigned long flags;
  797. struct hpsa_scsi_dev_t **added, **removed;
  798. int nadded, nremoved;
  799. struct Scsi_Host *sh = NULL;
  800. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  801. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  802. if (!added || !removed) {
  803. dev_warn(&h->pdev->dev, "out of memory in "
  804. "adjust_hpsa_scsi_table\n");
  805. goto free_and_out;
  806. }
  807. spin_lock_irqsave(&h->devlock, flags);
  808. /* find any devices in h->dev[] that are not in
  809. * sd[] and remove them from h->dev[], and for any
  810. * devices which have changed, remove the old device
  811. * info and add the new device info.
  812. * If minor device attributes change, just update
  813. * the existing device structure.
  814. */
  815. i = 0;
  816. nremoved = 0;
  817. nadded = 0;
  818. while (i < h->ndevices) {
  819. csd = h->dev[i];
  820. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  821. if (device_change == DEVICE_NOT_FOUND) {
  822. changes++;
  823. hpsa_scsi_remove_entry(h, hostno, i,
  824. removed, &nremoved);
  825. continue; /* remove ^^^, hence i not incremented */
  826. } else if (device_change == DEVICE_CHANGED) {
  827. changes++;
  828. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  829. added, &nadded, removed, &nremoved);
  830. /* Set it to NULL to prevent it from being freed
  831. * at the bottom of hpsa_update_scsi_devices()
  832. */
  833. sd[entry] = NULL;
  834. } else if (device_change == DEVICE_UPDATED) {
  835. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  836. }
  837. i++;
  838. }
  839. /* Now, make sure every device listed in sd[] is also
  840. * listed in h->dev[], adding them if they aren't found
  841. */
  842. for (i = 0; i < nsds; i++) {
  843. if (!sd[i]) /* if already added above. */
  844. continue;
  845. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  846. h->ndevices, &entry);
  847. if (device_change == DEVICE_NOT_FOUND) {
  848. changes++;
  849. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  850. added, &nadded) != 0)
  851. break;
  852. sd[i] = NULL; /* prevent from being freed later. */
  853. } else if (device_change == DEVICE_CHANGED) {
  854. /* should never happen... */
  855. changes++;
  856. dev_warn(&h->pdev->dev,
  857. "device unexpectedly changed.\n");
  858. /* but if it does happen, we just ignore that device */
  859. }
  860. }
  861. spin_unlock_irqrestore(&h->devlock, flags);
  862. /* Don't notify scsi mid layer of any changes the first time through
  863. * (or if there are no changes) scsi_scan_host will do it later the
  864. * first time through.
  865. */
  866. if (hostno == -1 || !changes)
  867. goto free_and_out;
  868. sh = h->scsi_host;
  869. /* Notify scsi mid layer of any removed devices */
  870. for (i = 0; i < nremoved; i++) {
  871. struct scsi_device *sdev =
  872. scsi_device_lookup(sh, removed[i]->bus,
  873. removed[i]->target, removed[i]->lun);
  874. if (sdev != NULL) {
  875. scsi_remove_device(sdev);
  876. scsi_device_put(sdev);
  877. } else {
  878. /* We don't expect to get here.
  879. * future cmds to this device will get selection
  880. * timeout as if the device was gone.
  881. */
  882. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  883. " for removal.", hostno, removed[i]->bus,
  884. removed[i]->target, removed[i]->lun);
  885. }
  886. kfree(removed[i]);
  887. removed[i] = NULL;
  888. }
  889. /* Notify scsi mid layer of any added devices */
  890. for (i = 0; i < nadded; i++) {
  891. if (scsi_add_device(sh, added[i]->bus,
  892. added[i]->target, added[i]->lun) == 0)
  893. continue;
  894. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  895. "device not added.\n", hostno, added[i]->bus,
  896. added[i]->target, added[i]->lun);
  897. /* now we have to remove it from h->dev,
  898. * since it didn't get added to scsi mid layer
  899. */
  900. fixup_botched_add(h, added[i]);
  901. }
  902. free_and_out:
  903. kfree(added);
  904. kfree(removed);
  905. }
  906. /*
  907. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  908. * Assume's h->devlock is held.
  909. */
  910. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  911. int bus, int target, int lun)
  912. {
  913. int i;
  914. struct hpsa_scsi_dev_t *sd;
  915. for (i = 0; i < h->ndevices; i++) {
  916. sd = h->dev[i];
  917. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  918. return sd;
  919. }
  920. return NULL;
  921. }
  922. /* link sdev->hostdata to our per-device structure. */
  923. static int hpsa_slave_alloc(struct scsi_device *sdev)
  924. {
  925. struct hpsa_scsi_dev_t *sd;
  926. unsigned long flags;
  927. struct ctlr_info *h;
  928. h = sdev_to_hba(sdev);
  929. spin_lock_irqsave(&h->devlock, flags);
  930. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  931. sdev_id(sdev), sdev->lun);
  932. if (sd != NULL)
  933. sdev->hostdata = sd;
  934. spin_unlock_irqrestore(&h->devlock, flags);
  935. return 0;
  936. }
  937. static void hpsa_slave_destroy(struct scsi_device *sdev)
  938. {
  939. /* nothing to do. */
  940. }
  941. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  942. {
  943. int i;
  944. if (!h->cmd_sg_list)
  945. return;
  946. for (i = 0; i < h->nr_cmds; i++) {
  947. kfree(h->cmd_sg_list[i]);
  948. h->cmd_sg_list[i] = NULL;
  949. }
  950. kfree(h->cmd_sg_list);
  951. h->cmd_sg_list = NULL;
  952. }
  953. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  954. {
  955. int i;
  956. if (h->chainsize <= 0)
  957. return 0;
  958. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  959. GFP_KERNEL);
  960. if (!h->cmd_sg_list)
  961. return -ENOMEM;
  962. for (i = 0; i < h->nr_cmds; i++) {
  963. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  964. h->chainsize, GFP_KERNEL);
  965. if (!h->cmd_sg_list[i])
  966. goto clean;
  967. }
  968. return 0;
  969. clean:
  970. hpsa_free_sg_chain_blocks(h);
  971. return -ENOMEM;
  972. }
  973. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  974. struct CommandList *c)
  975. {
  976. struct SGDescriptor *chain_sg, *chain_block;
  977. u64 temp64;
  978. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  979. chain_block = h->cmd_sg_list[c->cmdindex];
  980. chain_sg->Ext = HPSA_SG_CHAIN;
  981. chain_sg->Len = sizeof(*chain_sg) *
  982. (c->Header.SGTotal - h->max_cmd_sg_entries);
  983. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  984. PCI_DMA_TODEVICE);
  985. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  986. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  987. }
  988. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  989. struct CommandList *c)
  990. {
  991. struct SGDescriptor *chain_sg;
  992. union u64bit temp64;
  993. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  994. return;
  995. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  996. temp64.val32.lower = chain_sg->Addr.lower;
  997. temp64.val32.upper = chain_sg->Addr.upper;
  998. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  999. }
  1000. static void complete_scsi_command(struct CommandList *cp)
  1001. {
  1002. struct scsi_cmnd *cmd;
  1003. struct ctlr_info *h;
  1004. struct ErrorInfo *ei;
  1005. unsigned char sense_key;
  1006. unsigned char asc; /* additional sense code */
  1007. unsigned char ascq; /* additional sense code qualifier */
  1008. unsigned long sense_data_size;
  1009. ei = cp->err_info;
  1010. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  1011. h = cp->h;
  1012. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  1013. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  1014. hpsa_unmap_sg_chain_block(h, cp);
  1015. cmd->result = (DID_OK << 16); /* host byte */
  1016. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  1017. cmd->result |= ei->ScsiStatus;
  1018. /* copy the sense data whether we need to or not. */
  1019. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1020. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1021. else
  1022. sense_data_size = sizeof(ei->SenseInfo);
  1023. if (ei->SenseLen < sense_data_size)
  1024. sense_data_size = ei->SenseLen;
  1025. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1026. scsi_set_resid(cmd, ei->ResidualCnt);
  1027. if (ei->CommandStatus == 0) {
  1028. cmd->scsi_done(cmd);
  1029. cmd_free(h, cp);
  1030. return;
  1031. }
  1032. /* an error has occurred */
  1033. switch (ei->CommandStatus) {
  1034. case CMD_TARGET_STATUS:
  1035. if (ei->ScsiStatus) {
  1036. /* Get sense key */
  1037. sense_key = 0xf & ei->SenseInfo[2];
  1038. /* Get additional sense code */
  1039. asc = ei->SenseInfo[12];
  1040. /* Get addition sense code qualifier */
  1041. ascq = ei->SenseInfo[13];
  1042. }
  1043. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1044. if (check_for_unit_attention(h, cp)) {
  1045. cmd->result = DID_SOFT_ERROR << 16;
  1046. break;
  1047. }
  1048. if (sense_key == ILLEGAL_REQUEST) {
  1049. /*
  1050. * SCSI REPORT_LUNS is commonly unsupported on
  1051. * Smart Array. Suppress noisy complaint.
  1052. */
  1053. if (cp->Request.CDB[0] == REPORT_LUNS)
  1054. break;
  1055. /* If ASC/ASCQ indicate Logical Unit
  1056. * Not Supported condition,
  1057. */
  1058. if ((asc == 0x25) && (ascq == 0x0)) {
  1059. dev_warn(&h->pdev->dev, "cp %p "
  1060. "has check condition\n", cp);
  1061. break;
  1062. }
  1063. }
  1064. if (sense_key == NOT_READY) {
  1065. /* If Sense is Not Ready, Logical Unit
  1066. * Not ready, Manual Intervention
  1067. * required
  1068. */
  1069. if ((asc == 0x04) && (ascq == 0x03)) {
  1070. dev_warn(&h->pdev->dev, "cp %p "
  1071. "has check condition: unit "
  1072. "not ready, manual "
  1073. "intervention required\n", cp);
  1074. break;
  1075. }
  1076. }
  1077. if (sense_key == ABORTED_COMMAND) {
  1078. /* Aborted command is retryable */
  1079. dev_warn(&h->pdev->dev, "cp %p "
  1080. "has check condition: aborted command: "
  1081. "ASC: 0x%x, ASCQ: 0x%x\n",
  1082. cp, asc, ascq);
  1083. cmd->result = DID_SOFT_ERROR << 16;
  1084. break;
  1085. }
  1086. /* Must be some other type of check condition */
  1087. dev_dbg(&h->pdev->dev, "cp %p has check condition: "
  1088. "unknown type: "
  1089. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1090. "Returning result: 0x%x, "
  1091. "cmd=[%02x %02x %02x %02x %02x "
  1092. "%02x %02x %02x %02x %02x %02x "
  1093. "%02x %02x %02x %02x %02x]\n",
  1094. cp, sense_key, asc, ascq,
  1095. cmd->result,
  1096. cmd->cmnd[0], cmd->cmnd[1],
  1097. cmd->cmnd[2], cmd->cmnd[3],
  1098. cmd->cmnd[4], cmd->cmnd[5],
  1099. cmd->cmnd[6], cmd->cmnd[7],
  1100. cmd->cmnd[8], cmd->cmnd[9],
  1101. cmd->cmnd[10], cmd->cmnd[11],
  1102. cmd->cmnd[12], cmd->cmnd[13],
  1103. cmd->cmnd[14], cmd->cmnd[15]);
  1104. break;
  1105. }
  1106. /* Problem was not a check condition
  1107. * Pass it up to the upper layers...
  1108. */
  1109. if (ei->ScsiStatus) {
  1110. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1111. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1112. "Returning result: 0x%x\n",
  1113. cp, ei->ScsiStatus,
  1114. sense_key, asc, ascq,
  1115. cmd->result);
  1116. } else { /* scsi status is zero??? How??? */
  1117. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1118. "Returning no connection.\n", cp),
  1119. /* Ordinarily, this case should never happen,
  1120. * but there is a bug in some released firmware
  1121. * revisions that allows it to happen if, for
  1122. * example, a 4100 backplane loses power and
  1123. * the tape drive is in it. We assume that
  1124. * it's a fatal error of some kind because we
  1125. * can't show that it wasn't. We will make it
  1126. * look like selection timeout since that is
  1127. * the most common reason for this to occur,
  1128. * and it's severe enough.
  1129. */
  1130. cmd->result = DID_NO_CONNECT << 16;
  1131. }
  1132. break;
  1133. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1134. break;
  1135. case CMD_DATA_OVERRUN:
  1136. dev_warn(&h->pdev->dev, "cp %p has"
  1137. " completed with data overrun "
  1138. "reported\n", cp);
  1139. break;
  1140. case CMD_INVALID: {
  1141. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1142. print_cmd(cp); */
  1143. /* We get CMD_INVALID if you address a non-existent device
  1144. * instead of a selection timeout (no response). You will
  1145. * see this if you yank out a drive, then try to access it.
  1146. * This is kind of a shame because it means that any other
  1147. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1148. * missing target. */
  1149. cmd->result = DID_NO_CONNECT << 16;
  1150. }
  1151. break;
  1152. case CMD_PROTOCOL_ERR:
  1153. dev_warn(&h->pdev->dev, "cp %p has "
  1154. "protocol error \n", cp);
  1155. break;
  1156. case CMD_HARDWARE_ERR:
  1157. cmd->result = DID_ERROR << 16;
  1158. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1159. break;
  1160. case CMD_CONNECTION_LOST:
  1161. cmd->result = DID_ERROR << 16;
  1162. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1163. break;
  1164. case CMD_ABORTED:
  1165. cmd->result = DID_ABORT << 16;
  1166. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1167. cp, ei->ScsiStatus);
  1168. break;
  1169. case CMD_ABORT_FAILED:
  1170. cmd->result = DID_ERROR << 16;
  1171. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1172. break;
  1173. case CMD_UNSOLICITED_ABORT:
  1174. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1175. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1176. "abort\n", cp);
  1177. break;
  1178. case CMD_TIMEOUT:
  1179. cmd->result = DID_TIME_OUT << 16;
  1180. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1181. break;
  1182. case CMD_UNABORTABLE:
  1183. cmd->result = DID_ERROR << 16;
  1184. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1185. break;
  1186. default:
  1187. cmd->result = DID_ERROR << 16;
  1188. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1189. cp, ei->CommandStatus);
  1190. }
  1191. cmd->scsi_done(cmd);
  1192. cmd_free(h, cp);
  1193. }
  1194. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1195. struct CommandList *c, int sg_used, int data_direction)
  1196. {
  1197. int i;
  1198. union u64bit addr64;
  1199. for (i = 0; i < sg_used; i++) {
  1200. addr64.val32.lower = c->SG[i].Addr.lower;
  1201. addr64.val32.upper = c->SG[i].Addr.upper;
  1202. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1203. data_direction);
  1204. }
  1205. }
  1206. static void hpsa_map_one(struct pci_dev *pdev,
  1207. struct CommandList *cp,
  1208. unsigned char *buf,
  1209. size_t buflen,
  1210. int data_direction)
  1211. {
  1212. u64 addr64;
  1213. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1214. cp->Header.SGList = 0;
  1215. cp->Header.SGTotal = 0;
  1216. return;
  1217. }
  1218. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1219. cp->SG[0].Addr.lower =
  1220. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1221. cp->SG[0].Addr.upper =
  1222. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1223. cp->SG[0].Len = buflen;
  1224. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1225. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1226. }
  1227. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1228. struct CommandList *c)
  1229. {
  1230. DECLARE_COMPLETION_ONSTACK(wait);
  1231. c->waiting = &wait;
  1232. enqueue_cmd_and_start_io(h, c);
  1233. wait_for_completion(&wait);
  1234. }
  1235. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1236. struct CommandList *c)
  1237. {
  1238. unsigned long flags;
  1239. /* If controller lockup detected, fake a hardware error. */
  1240. spin_lock_irqsave(&h->lock, flags);
  1241. if (unlikely(h->lockup_detected)) {
  1242. spin_unlock_irqrestore(&h->lock, flags);
  1243. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1244. } else {
  1245. spin_unlock_irqrestore(&h->lock, flags);
  1246. hpsa_scsi_do_simple_cmd_core(h, c);
  1247. }
  1248. }
  1249. #define MAX_DRIVER_CMD_RETRIES 25
  1250. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1251. struct CommandList *c, int data_direction)
  1252. {
  1253. int backoff_time = 10, retry_count = 0;
  1254. do {
  1255. memset(c->err_info, 0, sizeof(*c->err_info));
  1256. hpsa_scsi_do_simple_cmd_core(h, c);
  1257. retry_count++;
  1258. if (retry_count > 3) {
  1259. msleep(backoff_time);
  1260. if (backoff_time < 1000)
  1261. backoff_time *= 2;
  1262. }
  1263. } while ((check_for_unit_attention(h, c) ||
  1264. check_for_busy(h, c)) &&
  1265. retry_count <= MAX_DRIVER_CMD_RETRIES);
  1266. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1267. }
  1268. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1269. {
  1270. struct ErrorInfo *ei;
  1271. struct device *d = &cp->h->pdev->dev;
  1272. ei = cp->err_info;
  1273. switch (ei->CommandStatus) {
  1274. case CMD_TARGET_STATUS:
  1275. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1276. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1277. ei->ScsiStatus);
  1278. if (ei->ScsiStatus == 0)
  1279. dev_warn(d, "SCSI status is abnormally zero. "
  1280. "(probably indicates selection timeout "
  1281. "reported incorrectly due to a known "
  1282. "firmware bug, circa July, 2001.)\n");
  1283. break;
  1284. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1285. dev_info(d, "UNDERRUN\n");
  1286. break;
  1287. case CMD_DATA_OVERRUN:
  1288. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1289. break;
  1290. case CMD_INVALID: {
  1291. /* controller unfortunately reports SCSI passthru's
  1292. * to non-existent targets as invalid commands.
  1293. */
  1294. dev_warn(d, "cp %p is reported invalid (probably means "
  1295. "target device no longer present)\n", cp);
  1296. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1297. print_cmd(cp); */
  1298. }
  1299. break;
  1300. case CMD_PROTOCOL_ERR:
  1301. dev_warn(d, "cp %p has protocol error \n", cp);
  1302. break;
  1303. case CMD_HARDWARE_ERR:
  1304. /* cmd->result = DID_ERROR << 16; */
  1305. dev_warn(d, "cp %p had hardware error\n", cp);
  1306. break;
  1307. case CMD_CONNECTION_LOST:
  1308. dev_warn(d, "cp %p had connection lost\n", cp);
  1309. break;
  1310. case CMD_ABORTED:
  1311. dev_warn(d, "cp %p was aborted\n", cp);
  1312. break;
  1313. case CMD_ABORT_FAILED:
  1314. dev_warn(d, "cp %p reports abort failed\n", cp);
  1315. break;
  1316. case CMD_UNSOLICITED_ABORT:
  1317. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1318. break;
  1319. case CMD_TIMEOUT:
  1320. dev_warn(d, "cp %p timed out\n", cp);
  1321. break;
  1322. case CMD_UNABORTABLE:
  1323. dev_warn(d, "Command unabortable\n");
  1324. break;
  1325. default:
  1326. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1327. ei->CommandStatus);
  1328. }
  1329. }
  1330. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1331. unsigned char page, unsigned char *buf,
  1332. unsigned char bufsize)
  1333. {
  1334. int rc = IO_OK;
  1335. struct CommandList *c;
  1336. struct ErrorInfo *ei;
  1337. c = cmd_special_alloc(h);
  1338. if (c == NULL) { /* trouble... */
  1339. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1340. return -ENOMEM;
  1341. }
  1342. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1343. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1344. ei = c->err_info;
  1345. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1346. hpsa_scsi_interpret_error(c);
  1347. rc = -1;
  1348. }
  1349. cmd_special_free(h, c);
  1350. return rc;
  1351. }
  1352. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1353. {
  1354. int rc = IO_OK;
  1355. struct CommandList *c;
  1356. struct ErrorInfo *ei;
  1357. c = cmd_special_alloc(h);
  1358. if (c == NULL) { /* trouble... */
  1359. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1360. return -ENOMEM;
  1361. }
  1362. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1363. hpsa_scsi_do_simple_cmd_core(h, c);
  1364. /* no unmap needed here because no data xfer. */
  1365. ei = c->err_info;
  1366. if (ei->CommandStatus != 0) {
  1367. hpsa_scsi_interpret_error(c);
  1368. rc = -1;
  1369. }
  1370. cmd_special_free(h, c);
  1371. return rc;
  1372. }
  1373. static void hpsa_get_raid_level(struct ctlr_info *h,
  1374. unsigned char *scsi3addr, unsigned char *raid_level)
  1375. {
  1376. int rc;
  1377. unsigned char *buf;
  1378. *raid_level = RAID_UNKNOWN;
  1379. buf = kzalloc(64, GFP_KERNEL);
  1380. if (!buf)
  1381. return;
  1382. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1383. if (rc == 0)
  1384. *raid_level = buf[8];
  1385. if (*raid_level > RAID_UNKNOWN)
  1386. *raid_level = RAID_UNKNOWN;
  1387. kfree(buf);
  1388. return;
  1389. }
  1390. /* Get the device id from inquiry page 0x83 */
  1391. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1392. unsigned char *device_id, int buflen)
  1393. {
  1394. int rc;
  1395. unsigned char *buf;
  1396. if (buflen > 16)
  1397. buflen = 16;
  1398. buf = kzalloc(64, GFP_KERNEL);
  1399. if (!buf)
  1400. return -1;
  1401. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1402. if (rc == 0)
  1403. memcpy(device_id, &buf[8], buflen);
  1404. kfree(buf);
  1405. return rc != 0;
  1406. }
  1407. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1408. struct ReportLUNdata *buf, int bufsize,
  1409. int extended_response)
  1410. {
  1411. int rc = IO_OK;
  1412. struct CommandList *c;
  1413. unsigned char scsi3addr[8];
  1414. struct ErrorInfo *ei;
  1415. c = cmd_special_alloc(h);
  1416. if (c == NULL) { /* trouble... */
  1417. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1418. return -1;
  1419. }
  1420. /* address the controller */
  1421. memset(scsi3addr, 0, sizeof(scsi3addr));
  1422. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1423. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1424. if (extended_response)
  1425. c->Request.CDB[1] = extended_response;
  1426. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1427. ei = c->err_info;
  1428. if (ei->CommandStatus != 0 &&
  1429. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1430. hpsa_scsi_interpret_error(c);
  1431. rc = -1;
  1432. }
  1433. cmd_special_free(h, c);
  1434. return rc;
  1435. }
  1436. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1437. struct ReportLUNdata *buf,
  1438. int bufsize, int extended_response)
  1439. {
  1440. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1441. }
  1442. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1443. struct ReportLUNdata *buf, int bufsize)
  1444. {
  1445. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1446. }
  1447. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1448. int bus, int target, int lun)
  1449. {
  1450. device->bus = bus;
  1451. device->target = target;
  1452. device->lun = lun;
  1453. }
  1454. static int hpsa_update_device_info(struct ctlr_info *h,
  1455. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1456. unsigned char *is_OBDR_device)
  1457. {
  1458. #define OBDR_SIG_OFFSET 43
  1459. #define OBDR_TAPE_SIG "$DR-10"
  1460. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1461. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1462. unsigned char *inq_buff;
  1463. unsigned char *obdr_sig;
  1464. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1465. if (!inq_buff)
  1466. goto bail_out;
  1467. /* Do an inquiry to the device to see what it is. */
  1468. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1469. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1470. /* Inquiry failed (msg printed already) */
  1471. dev_err(&h->pdev->dev,
  1472. "hpsa_update_device_info: inquiry failed\n");
  1473. goto bail_out;
  1474. }
  1475. this_device->devtype = (inq_buff[0] & 0x1f);
  1476. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1477. memcpy(this_device->vendor, &inq_buff[8],
  1478. sizeof(this_device->vendor));
  1479. memcpy(this_device->model, &inq_buff[16],
  1480. sizeof(this_device->model));
  1481. memset(this_device->device_id, 0,
  1482. sizeof(this_device->device_id));
  1483. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1484. sizeof(this_device->device_id));
  1485. if (this_device->devtype == TYPE_DISK &&
  1486. is_logical_dev_addr_mode(scsi3addr))
  1487. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1488. else
  1489. this_device->raid_level = RAID_UNKNOWN;
  1490. if (is_OBDR_device) {
  1491. /* See if this is a One-Button-Disaster-Recovery device
  1492. * by looking for "$DR-10" at offset 43 in inquiry data.
  1493. */
  1494. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1495. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1496. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1497. OBDR_SIG_LEN) == 0);
  1498. }
  1499. kfree(inq_buff);
  1500. return 0;
  1501. bail_out:
  1502. kfree(inq_buff);
  1503. return 1;
  1504. }
  1505. static unsigned char *ext_target_model[] = {
  1506. "MSA2012",
  1507. "MSA2024",
  1508. "MSA2312",
  1509. "MSA2324",
  1510. "P2000 G3 SAS",
  1511. NULL,
  1512. };
  1513. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1514. {
  1515. int i;
  1516. for (i = 0; ext_target_model[i]; i++)
  1517. if (strncmp(device->model, ext_target_model[i],
  1518. strlen(ext_target_model[i])) == 0)
  1519. return 1;
  1520. return 0;
  1521. }
  1522. /* Helper function to assign bus, target, lun mapping of devices.
  1523. * Puts non-external target logical volumes on bus 0, external target logical
  1524. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1525. * Logical drive target and lun are assigned at this time, but
  1526. * physical device lun and target assignment are deferred (assigned
  1527. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1528. */
  1529. static void figure_bus_target_lun(struct ctlr_info *h,
  1530. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1531. {
  1532. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1533. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1534. /* physical device, target and lun filled in later */
  1535. if (is_hba_lunid(lunaddrbytes))
  1536. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1537. else
  1538. /* defer target, lun assignment for physical devices */
  1539. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1540. return;
  1541. }
  1542. /* It's a logical device */
  1543. if (is_ext_target(h, device)) {
  1544. /* external target way, put logicals on bus 1
  1545. * and match target/lun numbers box
  1546. * reports, other smart array, bus 0, target 0, match lunid
  1547. */
  1548. hpsa_set_bus_target_lun(device,
  1549. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1550. return;
  1551. }
  1552. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1553. }
  1554. /*
  1555. * If there is no lun 0 on a target, linux won't find any devices.
  1556. * For the external targets (arrays), we have to manually detect the enclosure
  1557. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1558. * it for some reason. *tmpdevice is the target we're adding,
  1559. * this_device is a pointer into the current element of currentsd[]
  1560. * that we're building up in update_scsi_devices(), below.
  1561. * lunzerobits is a bitmap that tracks which targets already have a
  1562. * lun 0 assigned.
  1563. * Returns 1 if an enclosure was added, 0 if not.
  1564. */
  1565. static int add_ext_target_dev(struct ctlr_info *h,
  1566. struct hpsa_scsi_dev_t *tmpdevice,
  1567. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1568. unsigned long lunzerobits[], int *n_ext_target_devs)
  1569. {
  1570. unsigned char scsi3addr[8];
  1571. if (test_bit(tmpdevice->target, lunzerobits))
  1572. return 0; /* There is already a lun 0 on this target. */
  1573. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1574. return 0; /* It's the logical targets that may lack lun 0. */
  1575. if (!is_ext_target(h, tmpdevice))
  1576. return 0; /* Only external target devices have this problem. */
  1577. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1578. return 0;
  1579. memset(scsi3addr, 0, 8);
  1580. scsi3addr[3] = tmpdevice->target;
  1581. if (is_hba_lunid(scsi3addr))
  1582. return 0; /* Don't add the RAID controller here. */
  1583. if (is_scsi_rev_5(h))
  1584. return 0; /* p1210m doesn't need to do this. */
  1585. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1586. dev_warn(&h->pdev->dev, "Maximum number of external "
  1587. "target devices exceeded. Check your hardware "
  1588. "configuration.");
  1589. return 0;
  1590. }
  1591. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1592. return 0;
  1593. (*n_ext_target_devs)++;
  1594. hpsa_set_bus_target_lun(this_device,
  1595. tmpdevice->bus, tmpdevice->target, 0);
  1596. set_bit(tmpdevice->target, lunzerobits);
  1597. return 1;
  1598. }
  1599. /*
  1600. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1601. * logdev. The number of luns in physdev and logdev are returned in
  1602. * *nphysicals and *nlogicals, respectively.
  1603. * Returns 0 on success, -1 otherwise.
  1604. */
  1605. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1606. int reportlunsize,
  1607. struct ReportLUNdata *physdev, u32 *nphysicals,
  1608. struct ReportLUNdata *logdev, u32 *nlogicals)
  1609. {
  1610. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1611. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1612. return -1;
  1613. }
  1614. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1615. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1616. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1617. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1618. *nphysicals - HPSA_MAX_PHYS_LUN);
  1619. *nphysicals = HPSA_MAX_PHYS_LUN;
  1620. }
  1621. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1622. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1623. return -1;
  1624. }
  1625. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1626. /* Reject Logicals in excess of our max capability. */
  1627. if (*nlogicals > HPSA_MAX_LUN) {
  1628. dev_warn(&h->pdev->dev,
  1629. "maximum logical LUNs (%d) exceeded. "
  1630. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1631. *nlogicals - HPSA_MAX_LUN);
  1632. *nlogicals = HPSA_MAX_LUN;
  1633. }
  1634. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1635. dev_warn(&h->pdev->dev,
  1636. "maximum logical + physical LUNs (%d) exceeded. "
  1637. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1638. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1639. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1640. }
  1641. return 0;
  1642. }
  1643. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1644. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1645. struct ReportLUNdata *logdev_list)
  1646. {
  1647. /* Helper function, figure out where the LUN ID info is coming from
  1648. * given index i, lists of physical and logical devices, where in
  1649. * the list the raid controller is supposed to appear (first or last)
  1650. */
  1651. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1652. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1653. if (i == raid_ctlr_position)
  1654. return RAID_CTLR_LUNID;
  1655. if (i < logicals_start)
  1656. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1657. if (i < last_device)
  1658. return &logdev_list->LUN[i - nphysicals -
  1659. (raid_ctlr_position == 0)][0];
  1660. BUG();
  1661. return NULL;
  1662. }
  1663. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1664. {
  1665. /* the idea here is we could get notified
  1666. * that some devices have changed, so we do a report
  1667. * physical luns and report logical luns cmd, and adjust
  1668. * our list of devices accordingly.
  1669. *
  1670. * The scsi3addr's of devices won't change so long as the
  1671. * adapter is not reset. That means we can rescan and
  1672. * tell which devices we already know about, vs. new
  1673. * devices, vs. disappearing devices.
  1674. */
  1675. struct ReportLUNdata *physdev_list = NULL;
  1676. struct ReportLUNdata *logdev_list = NULL;
  1677. u32 nphysicals = 0;
  1678. u32 nlogicals = 0;
  1679. u32 ndev_allocated = 0;
  1680. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1681. int ncurrent = 0;
  1682. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1683. int i, n_ext_target_devs, ndevs_to_allocate;
  1684. int raid_ctlr_position;
  1685. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1686. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1687. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1688. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1689. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1690. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1691. dev_err(&h->pdev->dev, "out of memory\n");
  1692. goto out;
  1693. }
  1694. memset(lunzerobits, 0, sizeof(lunzerobits));
  1695. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1696. logdev_list, &nlogicals))
  1697. goto out;
  1698. /* We might see up to the maximum number of logical and physical disks
  1699. * plus external target devices, and a device for the local RAID
  1700. * controller.
  1701. */
  1702. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1703. /* Allocate the per device structures */
  1704. for (i = 0; i < ndevs_to_allocate; i++) {
  1705. if (i >= HPSA_MAX_DEVICES) {
  1706. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1707. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1708. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1709. break;
  1710. }
  1711. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1712. if (!currentsd[i]) {
  1713. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1714. __FILE__, __LINE__);
  1715. goto out;
  1716. }
  1717. ndev_allocated++;
  1718. }
  1719. if (unlikely(is_scsi_rev_5(h)))
  1720. raid_ctlr_position = 0;
  1721. else
  1722. raid_ctlr_position = nphysicals + nlogicals;
  1723. /* adjust our table of devices */
  1724. n_ext_target_devs = 0;
  1725. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1726. u8 *lunaddrbytes, is_OBDR = 0;
  1727. /* Figure out where the LUN ID info is coming from */
  1728. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1729. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1730. /* skip masked physical devices. */
  1731. if (lunaddrbytes[3] & 0xC0 &&
  1732. i < nphysicals + (raid_ctlr_position == 0))
  1733. continue;
  1734. /* Get device type, vendor, model, device id */
  1735. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1736. &is_OBDR))
  1737. continue; /* skip it if we can't talk to it. */
  1738. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1739. this_device = currentsd[ncurrent];
  1740. /*
  1741. * For external target devices, we have to insert a LUN 0 which
  1742. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1743. * is nonetheless an enclosure device there. We have to
  1744. * present that otherwise linux won't find anything if
  1745. * there is no lun 0.
  1746. */
  1747. if (add_ext_target_dev(h, tmpdevice, this_device,
  1748. lunaddrbytes, lunzerobits,
  1749. &n_ext_target_devs)) {
  1750. ncurrent++;
  1751. this_device = currentsd[ncurrent];
  1752. }
  1753. *this_device = *tmpdevice;
  1754. switch (this_device->devtype) {
  1755. case TYPE_ROM:
  1756. /* We don't *really* support actual CD-ROM devices,
  1757. * just "One Button Disaster Recovery" tape drive
  1758. * which temporarily pretends to be a CD-ROM drive.
  1759. * So we check that the device is really an OBDR tape
  1760. * device by checking for "$DR-10" in bytes 43-48 of
  1761. * the inquiry data.
  1762. */
  1763. if (is_OBDR)
  1764. ncurrent++;
  1765. break;
  1766. case TYPE_DISK:
  1767. if (i < nphysicals)
  1768. break;
  1769. ncurrent++;
  1770. break;
  1771. case TYPE_TAPE:
  1772. case TYPE_MEDIUM_CHANGER:
  1773. ncurrent++;
  1774. break;
  1775. case TYPE_RAID:
  1776. /* Only present the Smartarray HBA as a RAID controller.
  1777. * If it's a RAID controller other than the HBA itself
  1778. * (an external RAID controller, MSA500 or similar)
  1779. * don't present it.
  1780. */
  1781. if (!is_hba_lunid(lunaddrbytes))
  1782. break;
  1783. ncurrent++;
  1784. break;
  1785. default:
  1786. break;
  1787. }
  1788. if (ncurrent >= HPSA_MAX_DEVICES)
  1789. break;
  1790. }
  1791. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1792. out:
  1793. kfree(tmpdevice);
  1794. for (i = 0; i < ndev_allocated; i++)
  1795. kfree(currentsd[i]);
  1796. kfree(currentsd);
  1797. kfree(physdev_list);
  1798. kfree(logdev_list);
  1799. }
  1800. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1801. * dma mapping and fills in the scatter gather entries of the
  1802. * hpsa command, cp.
  1803. */
  1804. static int hpsa_scatter_gather(struct ctlr_info *h,
  1805. struct CommandList *cp,
  1806. struct scsi_cmnd *cmd)
  1807. {
  1808. unsigned int len;
  1809. struct scatterlist *sg;
  1810. u64 addr64;
  1811. int use_sg, i, sg_index, chained;
  1812. struct SGDescriptor *curr_sg;
  1813. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1814. use_sg = scsi_dma_map(cmd);
  1815. if (use_sg < 0)
  1816. return use_sg;
  1817. if (!use_sg)
  1818. goto sglist_finished;
  1819. curr_sg = cp->SG;
  1820. chained = 0;
  1821. sg_index = 0;
  1822. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1823. if (i == h->max_cmd_sg_entries - 1 &&
  1824. use_sg > h->max_cmd_sg_entries) {
  1825. chained = 1;
  1826. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1827. sg_index = 0;
  1828. }
  1829. addr64 = (u64) sg_dma_address(sg);
  1830. len = sg_dma_len(sg);
  1831. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1832. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1833. curr_sg->Len = len;
  1834. curr_sg->Ext = 0; /* we are not chaining */
  1835. curr_sg++;
  1836. }
  1837. if (use_sg + chained > h->maxSG)
  1838. h->maxSG = use_sg + chained;
  1839. if (chained) {
  1840. cp->Header.SGList = h->max_cmd_sg_entries;
  1841. cp->Header.SGTotal = (u16) (use_sg + 1);
  1842. hpsa_map_sg_chain_block(h, cp);
  1843. return 0;
  1844. }
  1845. sglist_finished:
  1846. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1847. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1848. return 0;
  1849. }
  1850. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1851. void (*done)(struct scsi_cmnd *))
  1852. {
  1853. struct ctlr_info *h;
  1854. struct hpsa_scsi_dev_t *dev;
  1855. unsigned char scsi3addr[8];
  1856. struct CommandList *c;
  1857. unsigned long flags;
  1858. /* Get the ptr to our adapter structure out of cmd->host. */
  1859. h = sdev_to_hba(cmd->device);
  1860. dev = cmd->device->hostdata;
  1861. if (!dev) {
  1862. cmd->result = DID_NO_CONNECT << 16;
  1863. done(cmd);
  1864. return 0;
  1865. }
  1866. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1867. spin_lock_irqsave(&h->lock, flags);
  1868. if (unlikely(h->lockup_detected)) {
  1869. spin_unlock_irqrestore(&h->lock, flags);
  1870. cmd->result = DID_ERROR << 16;
  1871. done(cmd);
  1872. return 0;
  1873. }
  1874. spin_unlock_irqrestore(&h->lock, flags);
  1875. c = cmd_alloc(h);
  1876. if (c == NULL) { /* trouble... */
  1877. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1878. return SCSI_MLQUEUE_HOST_BUSY;
  1879. }
  1880. /* Fill in the command list header */
  1881. cmd->scsi_done = done; /* save this for use by completion code */
  1882. /* save c in case we have to abort it */
  1883. cmd->host_scribble = (unsigned char *) c;
  1884. c->cmd_type = CMD_SCSI;
  1885. c->scsi_cmd = cmd;
  1886. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1887. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1888. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1889. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1890. /* Fill in the request block... */
  1891. c->Request.Timeout = 0;
  1892. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1893. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1894. c->Request.CDBLen = cmd->cmd_len;
  1895. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1896. c->Request.Type.Type = TYPE_CMD;
  1897. c->Request.Type.Attribute = ATTR_SIMPLE;
  1898. switch (cmd->sc_data_direction) {
  1899. case DMA_TO_DEVICE:
  1900. c->Request.Type.Direction = XFER_WRITE;
  1901. break;
  1902. case DMA_FROM_DEVICE:
  1903. c->Request.Type.Direction = XFER_READ;
  1904. break;
  1905. case DMA_NONE:
  1906. c->Request.Type.Direction = XFER_NONE;
  1907. break;
  1908. case DMA_BIDIRECTIONAL:
  1909. /* This can happen if a buggy application does a scsi passthru
  1910. * and sets both inlen and outlen to non-zero. ( see
  1911. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1912. */
  1913. c->Request.Type.Direction = XFER_RSVD;
  1914. /* This is technically wrong, and hpsa controllers should
  1915. * reject it with CMD_INVALID, which is the most correct
  1916. * response, but non-fibre backends appear to let it
  1917. * slide by, and give the same results as if this field
  1918. * were set correctly. Either way is acceptable for
  1919. * our purposes here.
  1920. */
  1921. break;
  1922. default:
  1923. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1924. cmd->sc_data_direction);
  1925. BUG();
  1926. break;
  1927. }
  1928. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1929. cmd_free(h, c);
  1930. return SCSI_MLQUEUE_HOST_BUSY;
  1931. }
  1932. enqueue_cmd_and_start_io(h, c);
  1933. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1934. return 0;
  1935. }
  1936. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1937. static void hpsa_scan_start(struct Scsi_Host *sh)
  1938. {
  1939. struct ctlr_info *h = shost_to_hba(sh);
  1940. unsigned long flags;
  1941. /* wait until any scan already in progress is finished. */
  1942. while (1) {
  1943. spin_lock_irqsave(&h->scan_lock, flags);
  1944. if (h->scan_finished)
  1945. break;
  1946. spin_unlock_irqrestore(&h->scan_lock, flags);
  1947. wait_event(h->scan_wait_queue, h->scan_finished);
  1948. /* Note: We don't need to worry about a race between this
  1949. * thread and driver unload because the midlayer will
  1950. * have incremented the reference count, so unload won't
  1951. * happen if we're in here.
  1952. */
  1953. }
  1954. h->scan_finished = 0; /* mark scan as in progress */
  1955. spin_unlock_irqrestore(&h->scan_lock, flags);
  1956. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1957. spin_lock_irqsave(&h->scan_lock, flags);
  1958. h->scan_finished = 1; /* mark scan as finished. */
  1959. wake_up_all(&h->scan_wait_queue);
  1960. spin_unlock_irqrestore(&h->scan_lock, flags);
  1961. }
  1962. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1963. unsigned long elapsed_time)
  1964. {
  1965. struct ctlr_info *h = shost_to_hba(sh);
  1966. unsigned long flags;
  1967. int finished;
  1968. spin_lock_irqsave(&h->scan_lock, flags);
  1969. finished = h->scan_finished;
  1970. spin_unlock_irqrestore(&h->scan_lock, flags);
  1971. return finished;
  1972. }
  1973. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1974. int qdepth, int reason)
  1975. {
  1976. struct ctlr_info *h = sdev_to_hba(sdev);
  1977. if (reason != SCSI_QDEPTH_DEFAULT)
  1978. return -ENOTSUPP;
  1979. if (qdepth < 1)
  1980. qdepth = 1;
  1981. else
  1982. if (qdepth > h->nr_cmds)
  1983. qdepth = h->nr_cmds;
  1984. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1985. return sdev->queue_depth;
  1986. }
  1987. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1988. {
  1989. /* we are being forcibly unloaded, and may not refuse. */
  1990. scsi_remove_host(h->scsi_host);
  1991. scsi_host_put(h->scsi_host);
  1992. h->scsi_host = NULL;
  1993. }
  1994. static int hpsa_register_scsi(struct ctlr_info *h)
  1995. {
  1996. struct Scsi_Host *sh;
  1997. int error;
  1998. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1999. if (sh == NULL)
  2000. goto fail;
  2001. sh->io_port = 0;
  2002. sh->n_io_port = 0;
  2003. sh->this_id = -1;
  2004. sh->max_channel = 3;
  2005. sh->max_cmd_len = MAX_COMMAND_SIZE;
  2006. sh->max_lun = HPSA_MAX_LUN;
  2007. sh->max_id = HPSA_MAX_LUN;
  2008. sh->can_queue = h->nr_cmds;
  2009. sh->cmd_per_lun = h->nr_cmds;
  2010. sh->sg_tablesize = h->maxsgentries;
  2011. h->scsi_host = sh;
  2012. sh->hostdata[0] = (unsigned long) h;
  2013. sh->irq = h->intr[h->intr_mode];
  2014. sh->unique_id = sh->irq;
  2015. error = scsi_add_host(sh, &h->pdev->dev);
  2016. if (error)
  2017. goto fail_host_put;
  2018. scsi_scan_host(sh);
  2019. return 0;
  2020. fail_host_put:
  2021. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  2022. " failed for controller %d\n", __func__, h->ctlr);
  2023. scsi_host_put(sh);
  2024. return error;
  2025. fail:
  2026. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2027. " failed for controller %d\n", __func__, h->ctlr);
  2028. return -ENOMEM;
  2029. }
  2030. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2031. unsigned char lunaddr[])
  2032. {
  2033. int rc = 0;
  2034. int count = 0;
  2035. int waittime = 1; /* seconds */
  2036. struct CommandList *c;
  2037. c = cmd_special_alloc(h);
  2038. if (!c) {
  2039. dev_warn(&h->pdev->dev, "out of memory in "
  2040. "wait_for_device_to_become_ready.\n");
  2041. return IO_ERROR;
  2042. }
  2043. /* Send test unit ready until device ready, or give up. */
  2044. while (count < HPSA_TUR_RETRY_LIMIT) {
  2045. /* Wait for a bit. do this first, because if we send
  2046. * the TUR right away, the reset will just abort it.
  2047. */
  2048. msleep(1000 * waittime);
  2049. count++;
  2050. /* Increase wait time with each try, up to a point. */
  2051. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2052. waittime = waittime * 2;
  2053. /* Send the Test Unit Ready */
  2054. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  2055. hpsa_scsi_do_simple_cmd_core(h, c);
  2056. /* no unmap needed here because no data xfer. */
  2057. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2058. break;
  2059. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2060. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2061. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2062. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2063. break;
  2064. dev_warn(&h->pdev->dev, "waiting %d secs "
  2065. "for device to become ready.\n", waittime);
  2066. rc = 1; /* device not ready. */
  2067. }
  2068. if (rc)
  2069. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2070. else
  2071. dev_warn(&h->pdev->dev, "device is ready.\n");
  2072. cmd_special_free(h, c);
  2073. return rc;
  2074. }
  2075. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2076. * complaining. Doing a host- or bus-reset can't do anything good here.
  2077. */
  2078. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2079. {
  2080. int rc;
  2081. struct ctlr_info *h;
  2082. struct hpsa_scsi_dev_t *dev;
  2083. /* find the controller to which the command to be aborted was sent */
  2084. h = sdev_to_hba(scsicmd->device);
  2085. if (h == NULL) /* paranoia */
  2086. return FAILED;
  2087. dev = scsicmd->device->hostdata;
  2088. if (!dev) {
  2089. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2090. "device lookup failed.\n");
  2091. return FAILED;
  2092. }
  2093. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2094. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2095. /* send a reset to the SCSI LUN which the command was sent to */
  2096. rc = hpsa_send_reset(h, dev->scsi3addr);
  2097. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2098. return SUCCESS;
  2099. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2100. return FAILED;
  2101. }
  2102. static void swizzle_abort_tag(u8 *tag)
  2103. {
  2104. u8 original_tag[8];
  2105. memcpy(original_tag, tag, 8);
  2106. tag[0] = original_tag[3];
  2107. tag[1] = original_tag[2];
  2108. tag[2] = original_tag[1];
  2109. tag[3] = original_tag[0];
  2110. tag[4] = original_tag[7];
  2111. tag[5] = original_tag[6];
  2112. tag[6] = original_tag[5];
  2113. tag[7] = original_tag[4];
  2114. }
  2115. static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
  2116. struct CommandList *abort, int swizzle)
  2117. {
  2118. int rc = IO_OK;
  2119. struct CommandList *c;
  2120. struct ErrorInfo *ei;
  2121. c = cmd_special_alloc(h);
  2122. if (c == NULL) { /* trouble... */
  2123. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  2124. return -ENOMEM;
  2125. }
  2126. fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);
  2127. if (swizzle)
  2128. swizzle_abort_tag(&c->Request.CDB[4]);
  2129. hpsa_scsi_do_simple_cmd_core(h, c);
  2130. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
  2131. __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
  2132. /* no unmap needed here because no data xfer. */
  2133. ei = c->err_info;
  2134. switch (ei->CommandStatus) {
  2135. case CMD_SUCCESS:
  2136. break;
  2137. case CMD_UNABORTABLE: /* Very common, don't make noise. */
  2138. rc = -1;
  2139. break;
  2140. default:
  2141. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
  2142. __func__, abort->Header.Tag.upper,
  2143. abort->Header.Tag.lower);
  2144. hpsa_scsi_interpret_error(c);
  2145. rc = -1;
  2146. break;
  2147. }
  2148. cmd_special_free(h, c);
  2149. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
  2150. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2151. return rc;
  2152. }
  2153. /*
  2154. * hpsa_find_cmd_in_queue
  2155. *
  2156. * Used to determine whether a command (find) is still present
  2157. * in queue_head. Optionally excludes the last element of queue_head.
  2158. *
  2159. * This is used to avoid unnecessary aborts. Commands in h->reqQ have
  2160. * not yet been submitted, and so can be aborted by the driver without
  2161. * sending an abort to the hardware.
  2162. *
  2163. * Returns pointer to command if found in queue, NULL otherwise.
  2164. */
  2165. static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
  2166. struct scsi_cmnd *find, struct list_head *queue_head)
  2167. {
  2168. unsigned long flags;
  2169. struct CommandList *c = NULL; /* ptr into cmpQ */
  2170. if (!find)
  2171. return 0;
  2172. spin_lock_irqsave(&h->lock, flags);
  2173. list_for_each_entry(c, queue_head, list) {
  2174. if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
  2175. continue;
  2176. if (c->scsi_cmd == find) {
  2177. spin_unlock_irqrestore(&h->lock, flags);
  2178. return c;
  2179. }
  2180. }
  2181. spin_unlock_irqrestore(&h->lock, flags);
  2182. return NULL;
  2183. }
  2184. static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
  2185. u8 *tag, struct list_head *queue_head)
  2186. {
  2187. unsigned long flags;
  2188. struct CommandList *c;
  2189. spin_lock_irqsave(&h->lock, flags);
  2190. list_for_each_entry(c, queue_head, list) {
  2191. if (memcmp(&c->Header.Tag, tag, 8) != 0)
  2192. continue;
  2193. spin_unlock_irqrestore(&h->lock, flags);
  2194. return c;
  2195. }
  2196. spin_unlock_irqrestore(&h->lock, flags);
  2197. return NULL;
  2198. }
  2199. /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
  2200. * tell which kind we're dealing with, so we send the abort both ways. There
  2201. * shouldn't be any collisions between swizzled and unswizzled tags due to the
  2202. * way we construct our tags but we check anyway in case the assumptions which
  2203. * make this true someday become false.
  2204. */
  2205. static int hpsa_send_abort_both_ways(struct ctlr_info *h,
  2206. unsigned char *scsi3addr, struct CommandList *abort)
  2207. {
  2208. u8 swizzled_tag[8];
  2209. struct CommandList *c;
  2210. int rc = 0, rc2 = 0;
  2211. /* we do not expect to find the swizzled tag in our queue, but
  2212. * check anyway just to be sure the assumptions which make this
  2213. * the case haven't become wrong.
  2214. */
  2215. memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
  2216. swizzle_abort_tag(swizzled_tag);
  2217. c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
  2218. if (c != NULL) {
  2219. dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
  2220. return hpsa_send_abort(h, scsi3addr, abort, 0);
  2221. }
  2222. rc = hpsa_send_abort(h, scsi3addr, abort, 0);
  2223. /* if the command is still in our queue, we can't conclude that it was
  2224. * aborted (it might have just completed normally) but in any case
  2225. * we don't need to try to abort it another way.
  2226. */
  2227. c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
  2228. if (c)
  2229. rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
  2230. return rc && rc2;
  2231. }
  2232. /* Send an abort for the specified command.
  2233. * If the device and controller support it,
  2234. * send a task abort request.
  2235. */
  2236. static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
  2237. {
  2238. int i, rc;
  2239. struct ctlr_info *h;
  2240. struct hpsa_scsi_dev_t *dev;
  2241. struct CommandList *abort; /* pointer to command to be aborted */
  2242. struct CommandList *found;
  2243. struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
  2244. char msg[256]; /* For debug messaging. */
  2245. int ml = 0;
  2246. /* Find the controller of the command to be aborted */
  2247. h = sdev_to_hba(sc->device);
  2248. if (WARN(h == NULL,
  2249. "ABORT REQUEST FAILED, Controller lookup failed.\n"))
  2250. return FAILED;
  2251. /* Check that controller supports some kind of task abort */
  2252. if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
  2253. !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
  2254. return FAILED;
  2255. memset(msg, 0, sizeof(msg));
  2256. ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
  2257. h->scsi_host->host_no, sc->device->channel,
  2258. sc->device->id, sc->device->lun);
  2259. /* Find the device of the command to be aborted */
  2260. dev = sc->device->hostdata;
  2261. if (!dev) {
  2262. dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
  2263. msg);
  2264. return FAILED;
  2265. }
  2266. /* Get SCSI command to be aborted */
  2267. abort = (struct CommandList *) sc->host_scribble;
  2268. if (abort == NULL) {
  2269. dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
  2270. msg);
  2271. return FAILED;
  2272. }
  2273. ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
  2274. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2275. as = (struct scsi_cmnd *) abort->scsi_cmd;
  2276. if (as != NULL)
  2277. ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
  2278. as->cmnd[0], as->serial_number);
  2279. dev_dbg(&h->pdev->dev, "%s\n", msg);
  2280. dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
  2281. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2282. /* Search reqQ to See if command is queued but not submitted,
  2283. * if so, complete the command with aborted status and remove
  2284. * it from the reqQ.
  2285. */
  2286. found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
  2287. if (found) {
  2288. found->err_info->CommandStatus = CMD_ABORTED;
  2289. finish_cmd(found);
  2290. dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
  2291. msg);
  2292. return SUCCESS;
  2293. }
  2294. /* not in reqQ, if also not in cmpQ, must have already completed */
  2295. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2296. if (!found) {
  2297. dev_dbg(&h->pdev->dev, "%s Request FAILED (not known to driver).\n",
  2298. msg);
  2299. return SUCCESS;
  2300. }
  2301. /*
  2302. * Command is in flight, or possibly already completed
  2303. * by the firmware (but not to the scsi mid layer) but we can't
  2304. * distinguish which. Send the abort down.
  2305. */
  2306. rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
  2307. if (rc != 0) {
  2308. dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
  2309. dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
  2310. h->scsi_host->host_no,
  2311. dev->bus, dev->target, dev->lun);
  2312. return FAILED;
  2313. }
  2314. dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
  2315. /* If the abort(s) above completed and actually aborted the
  2316. * command, then the command to be aborted should already be
  2317. * completed. If not, wait around a bit more to see if they
  2318. * manage to complete normally.
  2319. */
  2320. #define ABORT_COMPLETE_WAIT_SECS 30
  2321. for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
  2322. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2323. if (!found)
  2324. return SUCCESS;
  2325. msleep(100);
  2326. }
  2327. dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
  2328. msg, ABORT_COMPLETE_WAIT_SECS);
  2329. return FAILED;
  2330. }
  2331. /*
  2332. * For operations that cannot sleep, a command block is allocated at init,
  2333. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2334. * which ones are free or in use. Lock must be held when calling this.
  2335. * cmd_free() is the complement.
  2336. */
  2337. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2338. {
  2339. struct CommandList *c;
  2340. int i;
  2341. union u64bit temp64;
  2342. dma_addr_t cmd_dma_handle, err_dma_handle;
  2343. unsigned long flags;
  2344. spin_lock_irqsave(&h->lock, flags);
  2345. do {
  2346. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2347. if (i == h->nr_cmds) {
  2348. spin_unlock_irqrestore(&h->lock, flags);
  2349. return NULL;
  2350. }
  2351. } while (test_and_set_bit
  2352. (i & (BITS_PER_LONG - 1),
  2353. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2354. h->nr_allocs++;
  2355. spin_unlock_irqrestore(&h->lock, flags);
  2356. c = h->cmd_pool + i;
  2357. memset(c, 0, sizeof(*c));
  2358. cmd_dma_handle = h->cmd_pool_dhandle
  2359. + i * sizeof(*c);
  2360. c->err_info = h->errinfo_pool + i;
  2361. memset(c->err_info, 0, sizeof(*c->err_info));
  2362. err_dma_handle = h->errinfo_pool_dhandle
  2363. + i * sizeof(*c->err_info);
  2364. c->cmdindex = i;
  2365. INIT_LIST_HEAD(&c->list);
  2366. c->busaddr = (u32) cmd_dma_handle;
  2367. temp64.val = (u64) err_dma_handle;
  2368. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2369. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2370. c->ErrDesc.Len = sizeof(*c->err_info);
  2371. c->h = h;
  2372. return c;
  2373. }
  2374. /* For operations that can wait for kmalloc to possibly sleep,
  2375. * this routine can be called. Lock need not be held to call
  2376. * cmd_special_alloc. cmd_special_free() is the complement.
  2377. */
  2378. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2379. {
  2380. struct CommandList *c;
  2381. union u64bit temp64;
  2382. dma_addr_t cmd_dma_handle, err_dma_handle;
  2383. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2384. if (c == NULL)
  2385. return NULL;
  2386. memset(c, 0, sizeof(*c));
  2387. c->cmdindex = -1;
  2388. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2389. &err_dma_handle);
  2390. if (c->err_info == NULL) {
  2391. pci_free_consistent(h->pdev,
  2392. sizeof(*c), c, cmd_dma_handle);
  2393. return NULL;
  2394. }
  2395. memset(c->err_info, 0, sizeof(*c->err_info));
  2396. INIT_LIST_HEAD(&c->list);
  2397. c->busaddr = (u32) cmd_dma_handle;
  2398. temp64.val = (u64) err_dma_handle;
  2399. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2400. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2401. c->ErrDesc.Len = sizeof(*c->err_info);
  2402. c->h = h;
  2403. return c;
  2404. }
  2405. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2406. {
  2407. int i;
  2408. unsigned long flags;
  2409. i = c - h->cmd_pool;
  2410. spin_lock_irqsave(&h->lock, flags);
  2411. clear_bit(i & (BITS_PER_LONG - 1),
  2412. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2413. h->nr_frees++;
  2414. spin_unlock_irqrestore(&h->lock, flags);
  2415. }
  2416. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2417. {
  2418. union u64bit temp64;
  2419. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2420. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2421. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2422. c->err_info, (dma_addr_t) temp64.val);
  2423. pci_free_consistent(h->pdev, sizeof(*c),
  2424. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2425. }
  2426. #ifdef CONFIG_COMPAT
  2427. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2428. {
  2429. IOCTL32_Command_struct __user *arg32 =
  2430. (IOCTL32_Command_struct __user *) arg;
  2431. IOCTL_Command_struct arg64;
  2432. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2433. int err;
  2434. u32 cp;
  2435. memset(&arg64, 0, sizeof(arg64));
  2436. err = 0;
  2437. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2438. sizeof(arg64.LUN_info));
  2439. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2440. sizeof(arg64.Request));
  2441. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2442. sizeof(arg64.error_info));
  2443. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2444. err |= get_user(cp, &arg32->buf);
  2445. arg64.buf = compat_ptr(cp);
  2446. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2447. if (err)
  2448. return -EFAULT;
  2449. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2450. if (err)
  2451. return err;
  2452. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2453. sizeof(arg32->error_info));
  2454. if (err)
  2455. return -EFAULT;
  2456. return err;
  2457. }
  2458. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2459. int cmd, void *arg)
  2460. {
  2461. BIG_IOCTL32_Command_struct __user *arg32 =
  2462. (BIG_IOCTL32_Command_struct __user *) arg;
  2463. BIG_IOCTL_Command_struct arg64;
  2464. BIG_IOCTL_Command_struct __user *p =
  2465. compat_alloc_user_space(sizeof(arg64));
  2466. int err;
  2467. u32 cp;
  2468. memset(&arg64, 0, sizeof(arg64));
  2469. err = 0;
  2470. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2471. sizeof(arg64.LUN_info));
  2472. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2473. sizeof(arg64.Request));
  2474. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2475. sizeof(arg64.error_info));
  2476. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2477. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2478. err |= get_user(cp, &arg32->buf);
  2479. arg64.buf = compat_ptr(cp);
  2480. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2481. if (err)
  2482. return -EFAULT;
  2483. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2484. if (err)
  2485. return err;
  2486. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2487. sizeof(arg32->error_info));
  2488. if (err)
  2489. return -EFAULT;
  2490. return err;
  2491. }
  2492. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2493. {
  2494. switch (cmd) {
  2495. case CCISS_GETPCIINFO:
  2496. case CCISS_GETINTINFO:
  2497. case CCISS_SETINTINFO:
  2498. case CCISS_GETNODENAME:
  2499. case CCISS_SETNODENAME:
  2500. case CCISS_GETHEARTBEAT:
  2501. case CCISS_GETBUSTYPES:
  2502. case CCISS_GETFIRMVER:
  2503. case CCISS_GETDRIVVER:
  2504. case CCISS_REVALIDVOLS:
  2505. case CCISS_DEREGDISK:
  2506. case CCISS_REGNEWDISK:
  2507. case CCISS_REGNEWD:
  2508. case CCISS_RESCANDISK:
  2509. case CCISS_GETLUNINFO:
  2510. return hpsa_ioctl(dev, cmd, arg);
  2511. case CCISS_PASSTHRU32:
  2512. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2513. case CCISS_BIG_PASSTHRU32:
  2514. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2515. default:
  2516. return -ENOIOCTLCMD;
  2517. }
  2518. }
  2519. #endif
  2520. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2521. {
  2522. struct hpsa_pci_info pciinfo;
  2523. if (!argp)
  2524. return -EINVAL;
  2525. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2526. pciinfo.bus = h->pdev->bus->number;
  2527. pciinfo.dev_fn = h->pdev->devfn;
  2528. pciinfo.board_id = h->board_id;
  2529. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2530. return -EFAULT;
  2531. return 0;
  2532. }
  2533. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2534. {
  2535. DriverVer_type DriverVer;
  2536. unsigned char vmaj, vmin, vsubmin;
  2537. int rc;
  2538. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2539. &vmaj, &vmin, &vsubmin);
  2540. if (rc != 3) {
  2541. dev_info(&h->pdev->dev, "driver version string '%s' "
  2542. "unrecognized.", HPSA_DRIVER_VERSION);
  2543. vmaj = 0;
  2544. vmin = 0;
  2545. vsubmin = 0;
  2546. }
  2547. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2548. if (!argp)
  2549. return -EINVAL;
  2550. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2551. return -EFAULT;
  2552. return 0;
  2553. }
  2554. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2555. {
  2556. IOCTL_Command_struct iocommand;
  2557. struct CommandList *c;
  2558. char *buff = NULL;
  2559. union u64bit temp64;
  2560. if (!argp)
  2561. return -EINVAL;
  2562. if (!capable(CAP_SYS_RAWIO))
  2563. return -EPERM;
  2564. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2565. return -EFAULT;
  2566. if ((iocommand.buf_size < 1) &&
  2567. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2568. return -EINVAL;
  2569. }
  2570. if (iocommand.buf_size > 0) {
  2571. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2572. if (buff == NULL)
  2573. return -EFAULT;
  2574. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2575. /* Copy the data into the buffer we created */
  2576. if (copy_from_user(buff, iocommand.buf,
  2577. iocommand.buf_size)) {
  2578. kfree(buff);
  2579. return -EFAULT;
  2580. }
  2581. } else {
  2582. memset(buff, 0, iocommand.buf_size);
  2583. }
  2584. }
  2585. c = cmd_special_alloc(h);
  2586. if (c == NULL) {
  2587. kfree(buff);
  2588. return -ENOMEM;
  2589. }
  2590. /* Fill in the command type */
  2591. c->cmd_type = CMD_IOCTL_PEND;
  2592. /* Fill in Command Header */
  2593. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2594. if (iocommand.buf_size > 0) { /* buffer to fill */
  2595. c->Header.SGList = 1;
  2596. c->Header.SGTotal = 1;
  2597. } else { /* no buffers to fill */
  2598. c->Header.SGList = 0;
  2599. c->Header.SGTotal = 0;
  2600. }
  2601. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2602. /* use the kernel address the cmd block for tag */
  2603. c->Header.Tag.lower = c->busaddr;
  2604. /* Fill in Request block */
  2605. memcpy(&c->Request, &iocommand.Request,
  2606. sizeof(c->Request));
  2607. /* Fill in the scatter gather information */
  2608. if (iocommand.buf_size > 0) {
  2609. temp64.val = pci_map_single(h->pdev, buff,
  2610. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2611. c->SG[0].Addr.lower = temp64.val32.lower;
  2612. c->SG[0].Addr.upper = temp64.val32.upper;
  2613. c->SG[0].Len = iocommand.buf_size;
  2614. c->SG[0].Ext = 0; /* we are not chaining*/
  2615. }
  2616. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2617. if (iocommand.buf_size > 0)
  2618. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2619. check_ioctl_unit_attention(h, c);
  2620. /* Copy the error information out */
  2621. memcpy(&iocommand.error_info, c->err_info,
  2622. sizeof(iocommand.error_info));
  2623. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2624. kfree(buff);
  2625. cmd_special_free(h, c);
  2626. return -EFAULT;
  2627. }
  2628. if (iocommand.Request.Type.Direction == XFER_READ &&
  2629. iocommand.buf_size > 0) {
  2630. /* Copy the data out of the buffer we created */
  2631. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2632. kfree(buff);
  2633. cmd_special_free(h, c);
  2634. return -EFAULT;
  2635. }
  2636. }
  2637. kfree(buff);
  2638. cmd_special_free(h, c);
  2639. return 0;
  2640. }
  2641. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2642. {
  2643. BIG_IOCTL_Command_struct *ioc;
  2644. struct CommandList *c;
  2645. unsigned char **buff = NULL;
  2646. int *buff_size = NULL;
  2647. union u64bit temp64;
  2648. BYTE sg_used = 0;
  2649. int status = 0;
  2650. int i;
  2651. u32 left;
  2652. u32 sz;
  2653. BYTE __user *data_ptr;
  2654. if (!argp)
  2655. return -EINVAL;
  2656. if (!capable(CAP_SYS_RAWIO))
  2657. return -EPERM;
  2658. ioc = (BIG_IOCTL_Command_struct *)
  2659. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2660. if (!ioc) {
  2661. status = -ENOMEM;
  2662. goto cleanup1;
  2663. }
  2664. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2665. status = -EFAULT;
  2666. goto cleanup1;
  2667. }
  2668. if ((ioc->buf_size < 1) &&
  2669. (ioc->Request.Type.Direction != XFER_NONE)) {
  2670. status = -EINVAL;
  2671. goto cleanup1;
  2672. }
  2673. /* Check kmalloc limits using all SGs */
  2674. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2675. status = -EINVAL;
  2676. goto cleanup1;
  2677. }
  2678. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2679. status = -EINVAL;
  2680. goto cleanup1;
  2681. }
  2682. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2683. if (!buff) {
  2684. status = -ENOMEM;
  2685. goto cleanup1;
  2686. }
  2687. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2688. if (!buff_size) {
  2689. status = -ENOMEM;
  2690. goto cleanup1;
  2691. }
  2692. left = ioc->buf_size;
  2693. data_ptr = ioc->buf;
  2694. while (left) {
  2695. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2696. buff_size[sg_used] = sz;
  2697. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2698. if (buff[sg_used] == NULL) {
  2699. status = -ENOMEM;
  2700. goto cleanup1;
  2701. }
  2702. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2703. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2704. status = -ENOMEM;
  2705. goto cleanup1;
  2706. }
  2707. } else
  2708. memset(buff[sg_used], 0, sz);
  2709. left -= sz;
  2710. data_ptr += sz;
  2711. sg_used++;
  2712. }
  2713. c = cmd_special_alloc(h);
  2714. if (c == NULL) {
  2715. status = -ENOMEM;
  2716. goto cleanup1;
  2717. }
  2718. c->cmd_type = CMD_IOCTL_PEND;
  2719. c->Header.ReplyQueue = 0;
  2720. c->Header.SGList = c->Header.SGTotal = sg_used;
  2721. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2722. c->Header.Tag.lower = c->busaddr;
  2723. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2724. if (ioc->buf_size > 0) {
  2725. int i;
  2726. for (i = 0; i < sg_used; i++) {
  2727. temp64.val = pci_map_single(h->pdev, buff[i],
  2728. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2729. c->SG[i].Addr.lower = temp64.val32.lower;
  2730. c->SG[i].Addr.upper = temp64.val32.upper;
  2731. c->SG[i].Len = buff_size[i];
  2732. /* we are not chaining */
  2733. c->SG[i].Ext = 0;
  2734. }
  2735. }
  2736. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2737. if (sg_used)
  2738. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2739. check_ioctl_unit_attention(h, c);
  2740. /* Copy the error information out */
  2741. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2742. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2743. cmd_special_free(h, c);
  2744. status = -EFAULT;
  2745. goto cleanup1;
  2746. }
  2747. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2748. /* Copy the data out of the buffer we created */
  2749. BYTE __user *ptr = ioc->buf;
  2750. for (i = 0; i < sg_used; i++) {
  2751. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2752. cmd_special_free(h, c);
  2753. status = -EFAULT;
  2754. goto cleanup1;
  2755. }
  2756. ptr += buff_size[i];
  2757. }
  2758. }
  2759. cmd_special_free(h, c);
  2760. status = 0;
  2761. cleanup1:
  2762. if (buff) {
  2763. for (i = 0; i < sg_used; i++)
  2764. kfree(buff[i]);
  2765. kfree(buff);
  2766. }
  2767. kfree(buff_size);
  2768. kfree(ioc);
  2769. return status;
  2770. }
  2771. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2772. struct CommandList *c)
  2773. {
  2774. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2775. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2776. (void) check_for_unit_attention(h, c);
  2777. }
  2778. /*
  2779. * ioctl
  2780. */
  2781. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2782. {
  2783. struct ctlr_info *h;
  2784. void __user *argp = (void __user *)arg;
  2785. h = sdev_to_hba(dev);
  2786. switch (cmd) {
  2787. case CCISS_DEREGDISK:
  2788. case CCISS_REGNEWDISK:
  2789. case CCISS_REGNEWD:
  2790. hpsa_scan_start(h->scsi_host);
  2791. return 0;
  2792. case CCISS_GETPCIINFO:
  2793. return hpsa_getpciinfo_ioctl(h, argp);
  2794. case CCISS_GETDRIVVER:
  2795. return hpsa_getdrivver_ioctl(h, argp);
  2796. case CCISS_PASSTHRU:
  2797. return hpsa_passthru_ioctl(h, argp);
  2798. case CCISS_BIG_PASSTHRU:
  2799. return hpsa_big_passthru_ioctl(h, argp);
  2800. default:
  2801. return -ENOTTY;
  2802. }
  2803. }
  2804. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2805. unsigned char *scsi3addr, u8 reset_type)
  2806. {
  2807. struct CommandList *c;
  2808. c = cmd_alloc(h);
  2809. if (!c)
  2810. return -ENOMEM;
  2811. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2812. RAID_CTLR_LUNID, TYPE_MSG);
  2813. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2814. c->waiting = NULL;
  2815. enqueue_cmd_and_start_io(h, c);
  2816. /* Don't wait for completion, the reset won't complete. Don't free
  2817. * the command either. This is the last command we will send before
  2818. * re-initializing everything, so it doesn't matter and won't leak.
  2819. */
  2820. return 0;
  2821. }
  2822. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2823. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2824. int cmd_type)
  2825. {
  2826. int pci_dir = XFER_NONE;
  2827. struct CommandList *a; /* for commands to be aborted */
  2828. c->cmd_type = CMD_IOCTL_PEND;
  2829. c->Header.ReplyQueue = 0;
  2830. if (buff != NULL && size > 0) {
  2831. c->Header.SGList = 1;
  2832. c->Header.SGTotal = 1;
  2833. } else {
  2834. c->Header.SGList = 0;
  2835. c->Header.SGTotal = 0;
  2836. }
  2837. c->Header.Tag.lower = c->busaddr;
  2838. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2839. c->Request.Type.Type = cmd_type;
  2840. if (cmd_type == TYPE_CMD) {
  2841. switch (cmd) {
  2842. case HPSA_INQUIRY:
  2843. /* are we trying to read a vital product page */
  2844. if (page_code != 0) {
  2845. c->Request.CDB[1] = 0x01;
  2846. c->Request.CDB[2] = page_code;
  2847. }
  2848. c->Request.CDBLen = 6;
  2849. c->Request.Type.Attribute = ATTR_SIMPLE;
  2850. c->Request.Type.Direction = XFER_READ;
  2851. c->Request.Timeout = 0;
  2852. c->Request.CDB[0] = HPSA_INQUIRY;
  2853. c->Request.CDB[4] = size & 0xFF;
  2854. break;
  2855. case HPSA_REPORT_LOG:
  2856. case HPSA_REPORT_PHYS:
  2857. /* Talking to controller so It's a physical command
  2858. mode = 00 target = 0. Nothing to write.
  2859. */
  2860. c->Request.CDBLen = 12;
  2861. c->Request.Type.Attribute = ATTR_SIMPLE;
  2862. c->Request.Type.Direction = XFER_READ;
  2863. c->Request.Timeout = 0;
  2864. c->Request.CDB[0] = cmd;
  2865. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2866. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2867. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2868. c->Request.CDB[9] = size & 0xFF;
  2869. break;
  2870. case HPSA_CACHE_FLUSH:
  2871. c->Request.CDBLen = 12;
  2872. c->Request.Type.Attribute = ATTR_SIMPLE;
  2873. c->Request.Type.Direction = XFER_WRITE;
  2874. c->Request.Timeout = 0;
  2875. c->Request.CDB[0] = BMIC_WRITE;
  2876. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2877. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2878. c->Request.CDB[8] = size & 0xFF;
  2879. break;
  2880. case TEST_UNIT_READY:
  2881. c->Request.CDBLen = 6;
  2882. c->Request.Type.Attribute = ATTR_SIMPLE;
  2883. c->Request.Type.Direction = XFER_NONE;
  2884. c->Request.Timeout = 0;
  2885. break;
  2886. default:
  2887. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2888. BUG();
  2889. return;
  2890. }
  2891. } else if (cmd_type == TYPE_MSG) {
  2892. switch (cmd) {
  2893. case HPSA_DEVICE_RESET_MSG:
  2894. c->Request.CDBLen = 16;
  2895. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2896. c->Request.Type.Attribute = ATTR_SIMPLE;
  2897. c->Request.Type.Direction = XFER_NONE;
  2898. c->Request.Timeout = 0; /* Don't time out */
  2899. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2900. c->Request.CDB[0] = cmd;
  2901. c->Request.CDB[1] = 0x03; /* Reset target above */
  2902. /* If bytes 4-7 are zero, it means reset the */
  2903. /* LunID device */
  2904. c->Request.CDB[4] = 0x00;
  2905. c->Request.CDB[5] = 0x00;
  2906. c->Request.CDB[6] = 0x00;
  2907. c->Request.CDB[7] = 0x00;
  2908. break;
  2909. case HPSA_ABORT_MSG:
  2910. a = buff; /* point to command to be aborted */
  2911. dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
  2912. a->Header.Tag.upper, a->Header.Tag.lower,
  2913. c->Header.Tag.upper, c->Header.Tag.lower);
  2914. c->Request.CDBLen = 16;
  2915. c->Request.Type.Type = TYPE_MSG;
  2916. c->Request.Type.Attribute = ATTR_SIMPLE;
  2917. c->Request.Type.Direction = XFER_WRITE;
  2918. c->Request.Timeout = 0; /* Don't time out */
  2919. c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
  2920. c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
  2921. c->Request.CDB[2] = 0x00; /* reserved */
  2922. c->Request.CDB[3] = 0x00; /* reserved */
  2923. /* Tag to abort goes in CDB[4]-CDB[11] */
  2924. c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
  2925. c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
  2926. c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
  2927. c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
  2928. c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
  2929. c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
  2930. c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
  2931. c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
  2932. c->Request.CDB[12] = 0x00; /* reserved */
  2933. c->Request.CDB[13] = 0x00; /* reserved */
  2934. c->Request.CDB[14] = 0x00; /* reserved */
  2935. c->Request.CDB[15] = 0x00; /* reserved */
  2936. break;
  2937. default:
  2938. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2939. cmd);
  2940. BUG();
  2941. }
  2942. } else {
  2943. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2944. BUG();
  2945. }
  2946. switch (c->Request.Type.Direction) {
  2947. case XFER_READ:
  2948. pci_dir = PCI_DMA_FROMDEVICE;
  2949. break;
  2950. case XFER_WRITE:
  2951. pci_dir = PCI_DMA_TODEVICE;
  2952. break;
  2953. case XFER_NONE:
  2954. pci_dir = PCI_DMA_NONE;
  2955. break;
  2956. default:
  2957. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2958. }
  2959. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2960. return;
  2961. }
  2962. /*
  2963. * Map (physical) PCI mem into (virtual) kernel space
  2964. */
  2965. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2966. {
  2967. ulong page_base = ((ulong) base) & PAGE_MASK;
  2968. ulong page_offs = ((ulong) base) - page_base;
  2969. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2970. return page_remapped ? (page_remapped + page_offs) : NULL;
  2971. }
  2972. /* Takes cmds off the submission queue and sends them to the hardware,
  2973. * then puts them on the queue of cmds waiting for completion.
  2974. */
  2975. static void start_io(struct ctlr_info *h)
  2976. {
  2977. struct CommandList *c;
  2978. unsigned long flags;
  2979. spin_lock_irqsave(&h->lock, flags);
  2980. while (!list_empty(&h->reqQ)) {
  2981. c = list_entry(h->reqQ.next, struct CommandList, list);
  2982. /* can't do anything if fifo is full */
  2983. if ((h->access.fifo_full(h))) {
  2984. dev_warn(&h->pdev->dev, "fifo full\n");
  2985. break;
  2986. }
  2987. /* Get the first entry from the Request Q */
  2988. removeQ(c);
  2989. h->Qdepth--;
  2990. /* Put job onto the completed Q */
  2991. addQ(&h->cmpQ, c);
  2992. /* Must increment commands_outstanding before unlocking
  2993. * and submitting to avoid race checking for fifo full
  2994. * condition.
  2995. */
  2996. h->commands_outstanding++;
  2997. if (h->commands_outstanding > h->max_outstanding)
  2998. h->max_outstanding = h->commands_outstanding;
  2999. /* Tell the controller execute command */
  3000. spin_unlock_irqrestore(&h->lock, flags);
  3001. h->access.submit_command(h, c);
  3002. spin_lock_irqsave(&h->lock, flags);
  3003. }
  3004. spin_unlock_irqrestore(&h->lock, flags);
  3005. }
  3006. static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
  3007. {
  3008. return h->access.command_completed(h, q);
  3009. }
  3010. static inline bool interrupt_pending(struct ctlr_info *h)
  3011. {
  3012. return h->access.intr_pending(h);
  3013. }
  3014. static inline long interrupt_not_for_us(struct ctlr_info *h)
  3015. {
  3016. return (h->access.intr_pending(h) == 0) ||
  3017. (h->interrupts_enabled == 0);
  3018. }
  3019. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  3020. u32 raw_tag)
  3021. {
  3022. if (unlikely(tag_index >= h->nr_cmds)) {
  3023. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3024. return 1;
  3025. }
  3026. return 0;
  3027. }
  3028. static inline void finish_cmd(struct CommandList *c)
  3029. {
  3030. unsigned long flags;
  3031. spin_lock_irqsave(&c->h->lock, flags);
  3032. removeQ(c);
  3033. spin_unlock_irqrestore(&c->h->lock, flags);
  3034. if (likely(c->cmd_type == CMD_SCSI))
  3035. complete_scsi_command(c);
  3036. else if (c->cmd_type == CMD_IOCTL_PEND)
  3037. complete(c->waiting);
  3038. }
  3039. static inline u32 hpsa_tag_contains_index(u32 tag)
  3040. {
  3041. return tag & DIRECT_LOOKUP_BIT;
  3042. }
  3043. static inline u32 hpsa_tag_to_index(u32 tag)
  3044. {
  3045. return tag >> DIRECT_LOOKUP_SHIFT;
  3046. }
  3047. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  3048. {
  3049. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  3050. #define HPSA_SIMPLE_ERROR_BITS 0x03
  3051. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  3052. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  3053. return tag & ~HPSA_PERF_ERROR_BITS;
  3054. }
  3055. /* process completion of an indexed ("direct lookup") command */
  3056. static inline void process_indexed_cmd(struct ctlr_info *h,
  3057. u32 raw_tag)
  3058. {
  3059. u32 tag_index;
  3060. struct CommandList *c;
  3061. tag_index = hpsa_tag_to_index(raw_tag);
  3062. if (!bad_tag(h, tag_index, raw_tag)) {
  3063. c = h->cmd_pool + tag_index;
  3064. finish_cmd(c);
  3065. }
  3066. }
  3067. /* process completion of a non-indexed command */
  3068. static inline void process_nonindexed_cmd(struct ctlr_info *h,
  3069. u32 raw_tag)
  3070. {
  3071. u32 tag;
  3072. struct CommandList *c = NULL;
  3073. unsigned long flags;
  3074. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  3075. spin_lock_irqsave(&h->lock, flags);
  3076. list_for_each_entry(c, &h->cmpQ, list) {
  3077. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  3078. spin_unlock_irqrestore(&h->lock, flags);
  3079. finish_cmd(c);
  3080. return;
  3081. }
  3082. }
  3083. spin_unlock_irqrestore(&h->lock, flags);
  3084. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3085. }
  3086. /* Some controllers, like p400, will give us one interrupt
  3087. * after a soft reset, even if we turned interrupts off.
  3088. * Only need to check for this in the hpsa_xxx_discard_completions
  3089. * functions.
  3090. */
  3091. static int ignore_bogus_interrupt(struct ctlr_info *h)
  3092. {
  3093. if (likely(!reset_devices))
  3094. return 0;
  3095. if (likely(h->interrupts_enabled))
  3096. return 0;
  3097. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  3098. "(known firmware bug.) Ignoring.\n");
  3099. return 1;
  3100. }
  3101. /*
  3102. * Convert &h->q[x] (passed to interrupt handlers) back to h.
  3103. * Relies on (h-q[x] == x) being true for x such that
  3104. * 0 <= x < MAX_REPLY_QUEUES.
  3105. */
  3106. static struct ctlr_info *queue_to_hba(u8 *queue)
  3107. {
  3108. return container_of((queue - *queue), struct ctlr_info, q[0]);
  3109. }
  3110. static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
  3111. {
  3112. struct ctlr_info *h = queue_to_hba(queue);
  3113. u8 q = *(u8 *) queue;
  3114. u32 raw_tag;
  3115. if (ignore_bogus_interrupt(h))
  3116. return IRQ_NONE;
  3117. if (interrupt_not_for_us(h))
  3118. return IRQ_NONE;
  3119. h->last_intr_timestamp = get_jiffies_64();
  3120. while (interrupt_pending(h)) {
  3121. raw_tag = get_next_completion(h, q);
  3122. while (raw_tag != FIFO_EMPTY)
  3123. raw_tag = next_command(h, q);
  3124. }
  3125. return IRQ_HANDLED;
  3126. }
  3127. static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
  3128. {
  3129. struct ctlr_info *h = queue_to_hba(queue);
  3130. u32 raw_tag;
  3131. u8 q = *(u8 *) queue;
  3132. if (ignore_bogus_interrupt(h))
  3133. return IRQ_NONE;
  3134. h->last_intr_timestamp = get_jiffies_64();
  3135. raw_tag = get_next_completion(h, q);
  3136. while (raw_tag != FIFO_EMPTY)
  3137. raw_tag = next_command(h, q);
  3138. return IRQ_HANDLED;
  3139. }
  3140. static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
  3141. {
  3142. struct ctlr_info *h = queue_to_hba((u8 *) queue);
  3143. u32 raw_tag;
  3144. u8 q = *(u8 *) queue;
  3145. if (interrupt_not_for_us(h))
  3146. return IRQ_NONE;
  3147. h->last_intr_timestamp = get_jiffies_64();
  3148. while (interrupt_pending(h)) {
  3149. raw_tag = get_next_completion(h, q);
  3150. while (raw_tag != FIFO_EMPTY) {
  3151. if (likely(hpsa_tag_contains_index(raw_tag)))
  3152. process_indexed_cmd(h, raw_tag);
  3153. else
  3154. process_nonindexed_cmd(h, raw_tag);
  3155. raw_tag = next_command(h, q);
  3156. }
  3157. }
  3158. return IRQ_HANDLED;
  3159. }
  3160. static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
  3161. {
  3162. struct ctlr_info *h = queue_to_hba(queue);
  3163. u32 raw_tag;
  3164. u8 q = *(u8 *) queue;
  3165. h->last_intr_timestamp = get_jiffies_64();
  3166. raw_tag = get_next_completion(h, q);
  3167. while (raw_tag != FIFO_EMPTY) {
  3168. if (likely(hpsa_tag_contains_index(raw_tag)))
  3169. process_indexed_cmd(h, raw_tag);
  3170. else
  3171. process_nonindexed_cmd(h, raw_tag);
  3172. raw_tag = next_command(h, q);
  3173. }
  3174. return IRQ_HANDLED;
  3175. }
  3176. /* Send a message CDB to the firmware. Careful, this only works
  3177. * in simple mode, not performant mode due to the tag lookup.
  3178. * We only ever use this immediately after a controller reset.
  3179. */
  3180. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  3181. unsigned char type)
  3182. {
  3183. struct Command {
  3184. struct CommandListHeader CommandHeader;
  3185. struct RequestBlock Request;
  3186. struct ErrDescriptor ErrorDescriptor;
  3187. };
  3188. struct Command *cmd;
  3189. static const size_t cmd_sz = sizeof(*cmd) +
  3190. sizeof(cmd->ErrorDescriptor);
  3191. dma_addr_t paddr64;
  3192. uint32_t paddr32, tag;
  3193. void __iomem *vaddr;
  3194. int i, err;
  3195. vaddr = pci_ioremap_bar(pdev, 0);
  3196. if (vaddr == NULL)
  3197. return -ENOMEM;
  3198. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3199. * CCISS commands, so they must be allocated from the lower 4GiB of
  3200. * memory.
  3201. */
  3202. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3203. if (err) {
  3204. iounmap(vaddr);
  3205. return -ENOMEM;
  3206. }
  3207. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3208. if (cmd == NULL) {
  3209. iounmap(vaddr);
  3210. return -ENOMEM;
  3211. }
  3212. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3213. * although there's no guarantee, we assume that the address is at
  3214. * least 4-byte aligned (most likely, it's page-aligned).
  3215. */
  3216. paddr32 = paddr64;
  3217. cmd->CommandHeader.ReplyQueue = 0;
  3218. cmd->CommandHeader.SGList = 0;
  3219. cmd->CommandHeader.SGTotal = 0;
  3220. cmd->CommandHeader.Tag.lower = paddr32;
  3221. cmd->CommandHeader.Tag.upper = 0;
  3222. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3223. cmd->Request.CDBLen = 16;
  3224. cmd->Request.Type.Type = TYPE_MSG;
  3225. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3226. cmd->Request.Type.Direction = XFER_NONE;
  3227. cmd->Request.Timeout = 0; /* Don't time out */
  3228. cmd->Request.CDB[0] = opcode;
  3229. cmd->Request.CDB[1] = type;
  3230. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  3231. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  3232. cmd->ErrorDescriptor.Addr.upper = 0;
  3233. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  3234. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3235. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  3236. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3237. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  3238. break;
  3239. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  3240. }
  3241. iounmap(vaddr);
  3242. /* we leak the DMA buffer here ... no choice since the controller could
  3243. * still complete the command.
  3244. */
  3245. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  3246. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  3247. opcode, type);
  3248. return -ETIMEDOUT;
  3249. }
  3250. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3251. if (tag & HPSA_ERROR_BIT) {
  3252. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3253. opcode, type);
  3254. return -EIO;
  3255. }
  3256. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3257. opcode, type);
  3258. return 0;
  3259. }
  3260. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  3261. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  3262. void * __iomem vaddr, u32 use_doorbell)
  3263. {
  3264. u16 pmcsr;
  3265. int pos;
  3266. if (use_doorbell) {
  3267. /* For everything after the P600, the PCI power state method
  3268. * of resetting the controller doesn't work, so we have this
  3269. * other way using the doorbell register.
  3270. */
  3271. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3272. writel(use_doorbell, vaddr + SA5_DOORBELL);
  3273. } else { /* Try to do it the PCI power state way */
  3274. /* Quoting from the Open CISS Specification: "The Power
  3275. * Management Control/Status Register (CSR) controls the power
  3276. * state of the device. The normal operating state is D0,
  3277. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3278. * the controller, place the interface device in D3 then to D0,
  3279. * this causes a secondary PCI reset which will reset the
  3280. * controller." */
  3281. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3282. if (pos == 0) {
  3283. dev_err(&pdev->dev,
  3284. "hpsa_reset_controller: "
  3285. "PCI PM not supported\n");
  3286. return -ENODEV;
  3287. }
  3288. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3289. /* enter the D3hot power management state */
  3290. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3291. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3292. pmcsr |= PCI_D3hot;
  3293. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3294. msleep(500);
  3295. /* enter the D0 power management state */
  3296. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3297. pmcsr |= PCI_D0;
  3298. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3299. /*
  3300. * The P600 requires a small delay when changing states.
  3301. * Otherwise we may think the board did not reset and we bail.
  3302. * This for kdump only and is particular to the P600.
  3303. */
  3304. msleep(500);
  3305. }
  3306. return 0;
  3307. }
  3308. static __devinit void init_driver_version(char *driver_version, int len)
  3309. {
  3310. memset(driver_version, 0, len);
  3311. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  3312. }
  3313. static __devinit int write_driver_ver_to_cfgtable(
  3314. struct CfgTable __iomem *cfgtable)
  3315. {
  3316. char *driver_version;
  3317. int i, size = sizeof(cfgtable->driver_version);
  3318. driver_version = kmalloc(size, GFP_KERNEL);
  3319. if (!driver_version)
  3320. return -ENOMEM;
  3321. init_driver_version(driver_version, size);
  3322. for (i = 0; i < size; i++)
  3323. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3324. kfree(driver_version);
  3325. return 0;
  3326. }
  3327. static __devinit void read_driver_ver_from_cfgtable(
  3328. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  3329. {
  3330. int i;
  3331. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3332. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3333. }
  3334. static __devinit int controller_reset_failed(
  3335. struct CfgTable __iomem *cfgtable)
  3336. {
  3337. char *driver_ver, *old_driver_ver;
  3338. int rc, size = sizeof(cfgtable->driver_version);
  3339. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3340. if (!old_driver_ver)
  3341. return -ENOMEM;
  3342. driver_ver = old_driver_ver + size;
  3343. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3344. * should have been changed, otherwise we know the reset failed.
  3345. */
  3346. init_driver_version(old_driver_ver, size);
  3347. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3348. rc = !memcmp(driver_ver, old_driver_ver, size);
  3349. kfree(old_driver_ver);
  3350. return rc;
  3351. }
  3352. /* This does a hard reset of the controller using PCI power management
  3353. * states or the using the doorbell register.
  3354. */
  3355. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3356. {
  3357. u64 cfg_offset;
  3358. u32 cfg_base_addr;
  3359. u64 cfg_base_addr_index;
  3360. void __iomem *vaddr;
  3361. unsigned long paddr;
  3362. u32 misc_fw_support;
  3363. int rc;
  3364. struct CfgTable __iomem *cfgtable;
  3365. u32 use_doorbell;
  3366. u32 board_id;
  3367. u16 command_register;
  3368. /* For controllers as old as the P600, this is very nearly
  3369. * the same thing as
  3370. *
  3371. * pci_save_state(pci_dev);
  3372. * pci_set_power_state(pci_dev, PCI_D3hot);
  3373. * pci_set_power_state(pci_dev, PCI_D0);
  3374. * pci_restore_state(pci_dev);
  3375. *
  3376. * For controllers newer than the P600, the pci power state
  3377. * method of resetting doesn't work so we have another way
  3378. * using the doorbell register.
  3379. */
  3380. rc = hpsa_lookup_board_id(pdev, &board_id);
  3381. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3382. dev_warn(&pdev->dev, "Not resetting device.\n");
  3383. return -ENODEV;
  3384. }
  3385. /* if controller is soft- but not hard resettable... */
  3386. if (!ctlr_is_hard_resettable(board_id))
  3387. return -ENOTSUPP; /* try soft reset later. */
  3388. /* Save the PCI command register */
  3389. pci_read_config_word(pdev, 4, &command_register);
  3390. /* Turn the board off. This is so that later pci_restore_state()
  3391. * won't turn the board on before the rest of config space is ready.
  3392. */
  3393. pci_disable_device(pdev);
  3394. pci_save_state(pdev);
  3395. /* find the first memory BAR, so we can find the cfg table */
  3396. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3397. if (rc)
  3398. return rc;
  3399. vaddr = remap_pci_mem(paddr, 0x250);
  3400. if (!vaddr)
  3401. return -ENOMEM;
  3402. /* find cfgtable in order to check if reset via doorbell is supported */
  3403. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3404. &cfg_base_addr_index, &cfg_offset);
  3405. if (rc)
  3406. goto unmap_vaddr;
  3407. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3408. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3409. if (!cfgtable) {
  3410. rc = -ENOMEM;
  3411. goto unmap_vaddr;
  3412. }
  3413. rc = write_driver_ver_to_cfgtable(cfgtable);
  3414. if (rc)
  3415. goto unmap_vaddr;
  3416. /* If reset via doorbell register is supported, use that.
  3417. * There are two such methods. Favor the newest method.
  3418. */
  3419. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3420. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3421. if (use_doorbell) {
  3422. use_doorbell = DOORBELL_CTLR_RESET2;
  3423. } else {
  3424. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3425. if (use_doorbell) {
  3426. dev_warn(&pdev->dev, "Soft reset not supported. "
  3427. "Firmware update is required.\n");
  3428. rc = -ENOTSUPP; /* try soft reset */
  3429. goto unmap_cfgtable;
  3430. }
  3431. }
  3432. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3433. if (rc)
  3434. goto unmap_cfgtable;
  3435. pci_restore_state(pdev);
  3436. rc = pci_enable_device(pdev);
  3437. if (rc) {
  3438. dev_warn(&pdev->dev, "failed to enable device.\n");
  3439. goto unmap_cfgtable;
  3440. }
  3441. pci_write_config_word(pdev, 4, command_register);
  3442. /* Some devices (notably the HP Smart Array 5i Controller)
  3443. need a little pause here */
  3444. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3445. /* Wait for board to become not ready, then ready. */
  3446. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3447. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3448. if (rc) {
  3449. dev_warn(&pdev->dev,
  3450. "failed waiting for board to reset."
  3451. " Will try soft reset.\n");
  3452. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3453. goto unmap_cfgtable;
  3454. }
  3455. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3456. if (rc) {
  3457. dev_warn(&pdev->dev,
  3458. "failed waiting for board to become ready "
  3459. "after hard reset\n");
  3460. goto unmap_cfgtable;
  3461. }
  3462. rc = controller_reset_failed(vaddr);
  3463. if (rc < 0)
  3464. goto unmap_cfgtable;
  3465. if (rc) {
  3466. dev_warn(&pdev->dev, "Unable to successfully reset "
  3467. "controller. Will try soft reset.\n");
  3468. rc = -ENOTSUPP;
  3469. } else {
  3470. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3471. }
  3472. unmap_cfgtable:
  3473. iounmap(cfgtable);
  3474. unmap_vaddr:
  3475. iounmap(vaddr);
  3476. return rc;
  3477. }
  3478. /*
  3479. * We cannot read the structure directly, for portability we must use
  3480. * the io functions.
  3481. * This is for debug only.
  3482. */
  3483. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3484. {
  3485. #ifdef HPSA_DEBUG
  3486. int i;
  3487. char temp_name[17];
  3488. dev_info(dev, "Controller Configuration information\n");
  3489. dev_info(dev, "------------------------------------\n");
  3490. for (i = 0; i < 4; i++)
  3491. temp_name[i] = readb(&(tb->Signature[i]));
  3492. temp_name[4] = '\0';
  3493. dev_info(dev, " Signature = %s\n", temp_name);
  3494. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3495. dev_info(dev, " Transport methods supported = 0x%x\n",
  3496. readl(&(tb->TransportSupport)));
  3497. dev_info(dev, " Transport methods active = 0x%x\n",
  3498. readl(&(tb->TransportActive)));
  3499. dev_info(dev, " Requested transport Method = 0x%x\n",
  3500. readl(&(tb->HostWrite.TransportRequest)));
  3501. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3502. readl(&(tb->HostWrite.CoalIntDelay)));
  3503. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3504. readl(&(tb->HostWrite.CoalIntCount)));
  3505. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3506. readl(&(tb->CmdsOutMax)));
  3507. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3508. for (i = 0; i < 16; i++)
  3509. temp_name[i] = readb(&(tb->ServerName[i]));
  3510. temp_name[16] = '\0';
  3511. dev_info(dev, " Server Name = %s\n", temp_name);
  3512. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3513. readl(&(tb->HeartBeat)));
  3514. #endif /* HPSA_DEBUG */
  3515. }
  3516. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3517. {
  3518. int i, offset, mem_type, bar_type;
  3519. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3520. return 0;
  3521. offset = 0;
  3522. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3523. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3524. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3525. offset += 4;
  3526. else {
  3527. mem_type = pci_resource_flags(pdev, i) &
  3528. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3529. switch (mem_type) {
  3530. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3531. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3532. offset += 4; /* 32 bit */
  3533. break;
  3534. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3535. offset += 8;
  3536. break;
  3537. default: /* reserved in PCI 2.2 */
  3538. dev_warn(&pdev->dev,
  3539. "base address is invalid\n");
  3540. return -1;
  3541. break;
  3542. }
  3543. }
  3544. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3545. return i + 1;
  3546. }
  3547. return -1;
  3548. }
  3549. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3550. * controllers that are capable. If not, we use IO-APIC mode.
  3551. */
  3552. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3553. {
  3554. #ifdef CONFIG_PCI_MSI
  3555. int err, i;
  3556. struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
  3557. for (i = 0; i < MAX_REPLY_QUEUES; i++) {
  3558. hpsa_msix_entries[i].vector = 0;
  3559. hpsa_msix_entries[i].entry = i;
  3560. }
  3561. /* Some boards advertise MSI but don't really support it */
  3562. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3563. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3564. goto default_int_mode;
  3565. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3566. dev_info(&h->pdev->dev, "MSIX\n");
  3567. err = pci_enable_msix(h->pdev, hpsa_msix_entries,
  3568. MAX_REPLY_QUEUES);
  3569. if (!err) {
  3570. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3571. h->intr[i] = hpsa_msix_entries[i].vector;
  3572. h->msix_vector = 1;
  3573. return;
  3574. }
  3575. if (err > 0) {
  3576. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3577. "available\n", err);
  3578. goto default_int_mode;
  3579. } else {
  3580. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3581. err);
  3582. goto default_int_mode;
  3583. }
  3584. }
  3585. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3586. dev_info(&h->pdev->dev, "MSI\n");
  3587. if (!pci_enable_msi(h->pdev))
  3588. h->msi_vector = 1;
  3589. else
  3590. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3591. }
  3592. default_int_mode:
  3593. #endif /* CONFIG_PCI_MSI */
  3594. /* if we get here we're going to use the default interrupt mode */
  3595. h->intr[h->intr_mode] = h->pdev->irq;
  3596. }
  3597. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3598. {
  3599. int i;
  3600. u32 subsystem_vendor_id, subsystem_device_id;
  3601. subsystem_vendor_id = pdev->subsystem_vendor;
  3602. subsystem_device_id = pdev->subsystem_device;
  3603. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3604. subsystem_vendor_id;
  3605. for (i = 0; i < ARRAY_SIZE(products); i++)
  3606. if (*board_id == products[i].board_id)
  3607. return i;
  3608. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3609. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3610. !hpsa_allow_any) {
  3611. dev_warn(&pdev->dev, "unrecognized board ID: "
  3612. "0x%08x, ignoring.\n", *board_id);
  3613. return -ENODEV;
  3614. }
  3615. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3616. }
  3617. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3618. unsigned long *memory_bar)
  3619. {
  3620. int i;
  3621. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3622. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3623. /* addressing mode bits already removed */
  3624. *memory_bar = pci_resource_start(pdev, i);
  3625. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3626. *memory_bar);
  3627. return 0;
  3628. }
  3629. dev_warn(&pdev->dev, "no memory BAR found\n");
  3630. return -ENODEV;
  3631. }
  3632. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3633. void __iomem *vaddr, int wait_for_ready)
  3634. {
  3635. int i, iterations;
  3636. u32 scratchpad;
  3637. if (wait_for_ready)
  3638. iterations = HPSA_BOARD_READY_ITERATIONS;
  3639. else
  3640. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3641. for (i = 0; i < iterations; i++) {
  3642. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3643. if (wait_for_ready) {
  3644. if (scratchpad == HPSA_FIRMWARE_READY)
  3645. return 0;
  3646. } else {
  3647. if (scratchpad != HPSA_FIRMWARE_READY)
  3648. return 0;
  3649. }
  3650. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3651. }
  3652. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3653. return -ENODEV;
  3654. }
  3655. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3656. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3657. u64 *cfg_offset)
  3658. {
  3659. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3660. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3661. *cfg_base_addr &= (u32) 0x0000ffff;
  3662. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3663. if (*cfg_base_addr_index == -1) {
  3664. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3665. return -ENODEV;
  3666. }
  3667. return 0;
  3668. }
  3669. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3670. {
  3671. u64 cfg_offset;
  3672. u32 cfg_base_addr;
  3673. u64 cfg_base_addr_index;
  3674. u32 trans_offset;
  3675. int rc;
  3676. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3677. &cfg_base_addr_index, &cfg_offset);
  3678. if (rc)
  3679. return rc;
  3680. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3681. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3682. if (!h->cfgtable)
  3683. return -ENOMEM;
  3684. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3685. if (rc)
  3686. return rc;
  3687. /* Find performant mode table. */
  3688. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3689. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3690. cfg_base_addr_index)+cfg_offset+trans_offset,
  3691. sizeof(*h->transtable));
  3692. if (!h->transtable)
  3693. return -ENOMEM;
  3694. return 0;
  3695. }
  3696. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3697. {
  3698. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3699. /* Limit commands in memory limited kdump scenario. */
  3700. if (reset_devices && h->max_commands > 32)
  3701. h->max_commands = 32;
  3702. if (h->max_commands < 16) {
  3703. dev_warn(&h->pdev->dev, "Controller reports "
  3704. "max supported commands of %d, an obvious lie. "
  3705. "Using 16. Ensure that firmware is up to date.\n",
  3706. h->max_commands);
  3707. h->max_commands = 16;
  3708. }
  3709. }
  3710. /* Interrogate the hardware for some limits:
  3711. * max commands, max SG elements without chaining, and with chaining,
  3712. * SG chain block size, etc.
  3713. */
  3714. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3715. {
  3716. hpsa_get_max_perf_mode_cmds(h);
  3717. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3718. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3719. /*
  3720. * Limit in-command s/g elements to 32 save dma'able memory.
  3721. * Howvever spec says if 0, use 31
  3722. */
  3723. h->max_cmd_sg_entries = 31;
  3724. if (h->maxsgentries > 512) {
  3725. h->max_cmd_sg_entries = 32;
  3726. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3727. h->maxsgentries--; /* save one for chain pointer */
  3728. } else {
  3729. h->maxsgentries = 31; /* default to traditional values */
  3730. h->chainsize = 0;
  3731. }
  3732. /* Find out what task management functions are supported and cache */
  3733. h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
  3734. }
  3735. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3736. {
  3737. if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
  3738. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3739. return false;
  3740. }
  3741. return true;
  3742. }
  3743. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3744. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3745. {
  3746. #ifdef CONFIG_X86
  3747. u32 prefetch;
  3748. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3749. prefetch |= 0x100;
  3750. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3751. #endif
  3752. }
  3753. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3754. * in a prefetch beyond physical memory.
  3755. */
  3756. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3757. {
  3758. u32 dma_prefetch;
  3759. if (h->board_id != 0x3225103C)
  3760. return;
  3761. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3762. dma_prefetch |= 0x8000;
  3763. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3764. }
  3765. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3766. {
  3767. int i;
  3768. u32 doorbell_value;
  3769. unsigned long flags;
  3770. /* under certain very rare conditions, this can take awhile.
  3771. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3772. * as we enter this code.)
  3773. */
  3774. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3775. spin_lock_irqsave(&h->lock, flags);
  3776. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3777. spin_unlock_irqrestore(&h->lock, flags);
  3778. if (!(doorbell_value & CFGTBL_ChangeReq))
  3779. break;
  3780. /* delay and try again */
  3781. usleep_range(10000, 20000);
  3782. }
  3783. }
  3784. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3785. {
  3786. u32 trans_support;
  3787. trans_support = readl(&(h->cfgtable->TransportSupport));
  3788. if (!(trans_support & SIMPLE_MODE))
  3789. return -ENOTSUPP;
  3790. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3791. /* Update the field, and then ring the doorbell */
  3792. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3793. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3794. hpsa_wait_for_mode_change_ack(h);
  3795. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3796. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3797. dev_warn(&h->pdev->dev,
  3798. "unable to get board into simple mode\n");
  3799. return -ENODEV;
  3800. }
  3801. h->transMethod = CFGTBL_Trans_Simple;
  3802. return 0;
  3803. }
  3804. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3805. {
  3806. int prod_index, err;
  3807. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3808. if (prod_index < 0)
  3809. return -ENODEV;
  3810. h->product_name = products[prod_index].product_name;
  3811. h->access = *(products[prod_index].access);
  3812. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3813. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3814. err = pci_enable_device(h->pdev);
  3815. if (err) {
  3816. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3817. return err;
  3818. }
  3819. /* Enable bus mastering (pci_disable_device may disable this) */
  3820. pci_set_master(h->pdev);
  3821. err = pci_request_regions(h->pdev, HPSA);
  3822. if (err) {
  3823. dev_err(&h->pdev->dev,
  3824. "cannot obtain PCI resources, aborting\n");
  3825. return err;
  3826. }
  3827. hpsa_interrupt_mode(h);
  3828. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3829. if (err)
  3830. goto err_out_free_res;
  3831. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3832. if (!h->vaddr) {
  3833. err = -ENOMEM;
  3834. goto err_out_free_res;
  3835. }
  3836. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3837. if (err)
  3838. goto err_out_free_res;
  3839. err = hpsa_find_cfgtables(h);
  3840. if (err)
  3841. goto err_out_free_res;
  3842. hpsa_find_board_params(h);
  3843. if (!hpsa_CISS_signature_present(h)) {
  3844. err = -ENODEV;
  3845. goto err_out_free_res;
  3846. }
  3847. hpsa_enable_scsi_prefetch(h);
  3848. hpsa_p600_dma_prefetch_quirk(h);
  3849. err = hpsa_enter_simple_mode(h);
  3850. if (err)
  3851. goto err_out_free_res;
  3852. return 0;
  3853. err_out_free_res:
  3854. if (h->transtable)
  3855. iounmap(h->transtable);
  3856. if (h->cfgtable)
  3857. iounmap(h->cfgtable);
  3858. if (h->vaddr)
  3859. iounmap(h->vaddr);
  3860. pci_disable_device(h->pdev);
  3861. pci_release_regions(h->pdev);
  3862. return err;
  3863. }
  3864. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3865. {
  3866. int rc;
  3867. #define HBA_INQUIRY_BYTE_COUNT 64
  3868. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3869. if (!h->hba_inquiry_data)
  3870. return;
  3871. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3872. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3873. if (rc != 0) {
  3874. kfree(h->hba_inquiry_data);
  3875. h->hba_inquiry_data = NULL;
  3876. }
  3877. }
  3878. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3879. {
  3880. int rc, i;
  3881. if (!reset_devices)
  3882. return 0;
  3883. /* Reset the controller with a PCI power-cycle or via doorbell */
  3884. rc = hpsa_kdump_hard_reset_controller(pdev);
  3885. /* -ENOTSUPP here means we cannot reset the controller
  3886. * but it's already (and still) up and running in
  3887. * "performant mode". Or, it might be 640x, which can't reset
  3888. * due to concerns about shared bbwc between 6402/6404 pair.
  3889. */
  3890. if (rc == -ENOTSUPP)
  3891. return rc; /* just try to do the kdump anyhow. */
  3892. if (rc)
  3893. return -ENODEV;
  3894. /* Now try to get the controller to respond to a no-op */
  3895. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3896. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3897. if (hpsa_noop(pdev) == 0)
  3898. break;
  3899. else
  3900. dev_warn(&pdev->dev, "no-op failed%s\n",
  3901. (i < 11 ? "; re-trying" : ""));
  3902. }
  3903. return 0;
  3904. }
  3905. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3906. {
  3907. h->cmd_pool_bits = kzalloc(
  3908. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3909. sizeof(unsigned long), GFP_KERNEL);
  3910. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3911. h->nr_cmds * sizeof(*h->cmd_pool),
  3912. &(h->cmd_pool_dhandle));
  3913. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3914. h->nr_cmds * sizeof(*h->errinfo_pool),
  3915. &(h->errinfo_pool_dhandle));
  3916. if ((h->cmd_pool_bits == NULL)
  3917. || (h->cmd_pool == NULL)
  3918. || (h->errinfo_pool == NULL)) {
  3919. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3920. return -ENOMEM;
  3921. }
  3922. return 0;
  3923. }
  3924. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3925. {
  3926. kfree(h->cmd_pool_bits);
  3927. if (h->cmd_pool)
  3928. pci_free_consistent(h->pdev,
  3929. h->nr_cmds * sizeof(struct CommandList),
  3930. h->cmd_pool, h->cmd_pool_dhandle);
  3931. if (h->errinfo_pool)
  3932. pci_free_consistent(h->pdev,
  3933. h->nr_cmds * sizeof(struct ErrorInfo),
  3934. h->errinfo_pool,
  3935. h->errinfo_pool_dhandle);
  3936. }
  3937. static int hpsa_request_irq(struct ctlr_info *h,
  3938. irqreturn_t (*msixhandler)(int, void *),
  3939. irqreturn_t (*intxhandler)(int, void *))
  3940. {
  3941. int rc, i;
  3942. /*
  3943. * initialize h->q[x] = x so that interrupt handlers know which
  3944. * queue to process.
  3945. */
  3946. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3947. h->q[i] = (u8) i;
  3948. if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
  3949. /* If performant mode and MSI-X, use multiple reply queues */
  3950. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3951. rc = request_irq(h->intr[i], msixhandler,
  3952. 0, h->devname,
  3953. &h->q[i]);
  3954. } else {
  3955. /* Use single reply pool */
  3956. if (h->msix_vector || h->msi_vector) {
  3957. rc = request_irq(h->intr[h->intr_mode],
  3958. msixhandler, 0, h->devname,
  3959. &h->q[h->intr_mode]);
  3960. } else {
  3961. rc = request_irq(h->intr[h->intr_mode],
  3962. intxhandler, IRQF_SHARED, h->devname,
  3963. &h->q[h->intr_mode]);
  3964. }
  3965. }
  3966. if (rc) {
  3967. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3968. h->intr[h->intr_mode], h->devname);
  3969. return -ENODEV;
  3970. }
  3971. return 0;
  3972. }
  3973. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3974. {
  3975. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3976. HPSA_RESET_TYPE_CONTROLLER)) {
  3977. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3978. return -EIO;
  3979. }
  3980. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3981. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3982. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3983. return -1;
  3984. }
  3985. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3986. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3987. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3988. "after soft reset.\n");
  3989. return -1;
  3990. }
  3991. return 0;
  3992. }
  3993. static void free_irqs(struct ctlr_info *h)
  3994. {
  3995. int i;
  3996. if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
  3997. /* Single reply queue, only one irq to free */
  3998. i = h->intr_mode;
  3999. free_irq(h->intr[i], &h->q[i]);
  4000. return;
  4001. }
  4002. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4003. free_irq(h->intr[i], &h->q[i]);
  4004. }
  4005. static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
  4006. {
  4007. free_irqs(h);
  4008. #ifdef CONFIG_PCI_MSI
  4009. if (h->msix_vector) {
  4010. if (h->pdev->msix_enabled)
  4011. pci_disable_msix(h->pdev);
  4012. } else if (h->msi_vector) {
  4013. if (h->pdev->msi_enabled)
  4014. pci_disable_msi(h->pdev);
  4015. }
  4016. #endif /* CONFIG_PCI_MSI */
  4017. }
  4018. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  4019. {
  4020. hpsa_free_irqs_and_disable_msix(h);
  4021. hpsa_free_sg_chain_blocks(h);
  4022. hpsa_free_cmd_pool(h);
  4023. kfree(h->blockFetchTable);
  4024. pci_free_consistent(h->pdev, h->reply_pool_size,
  4025. h->reply_pool, h->reply_pool_dhandle);
  4026. if (h->vaddr)
  4027. iounmap(h->vaddr);
  4028. if (h->transtable)
  4029. iounmap(h->transtable);
  4030. if (h->cfgtable)
  4031. iounmap(h->cfgtable);
  4032. pci_release_regions(h->pdev);
  4033. kfree(h);
  4034. }
  4035. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  4036. {
  4037. assert_spin_locked(&lockup_detector_lock);
  4038. if (!hpsa_lockup_detector)
  4039. return;
  4040. if (h->lockup_detected)
  4041. return; /* already stopped the lockup detector */
  4042. list_del(&h->lockup_list);
  4043. }
  4044. /* Called when controller lockup detected. */
  4045. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  4046. {
  4047. struct CommandList *c = NULL;
  4048. assert_spin_locked(&h->lock);
  4049. /* Mark all outstanding commands as failed and complete them. */
  4050. while (!list_empty(list)) {
  4051. c = list_entry(list->next, struct CommandList, list);
  4052. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  4053. finish_cmd(c);
  4054. }
  4055. }
  4056. static void controller_lockup_detected(struct ctlr_info *h)
  4057. {
  4058. unsigned long flags;
  4059. assert_spin_locked(&lockup_detector_lock);
  4060. remove_ctlr_from_lockup_detector_list(h);
  4061. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4062. spin_lock_irqsave(&h->lock, flags);
  4063. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  4064. spin_unlock_irqrestore(&h->lock, flags);
  4065. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  4066. h->lockup_detected);
  4067. pci_disable_device(h->pdev);
  4068. spin_lock_irqsave(&h->lock, flags);
  4069. fail_all_cmds_on_list(h, &h->cmpQ);
  4070. fail_all_cmds_on_list(h, &h->reqQ);
  4071. spin_unlock_irqrestore(&h->lock, flags);
  4072. }
  4073. #define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
  4074. #define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
  4075. static void detect_controller_lockup(struct ctlr_info *h)
  4076. {
  4077. u64 now;
  4078. u32 heartbeat;
  4079. unsigned long flags;
  4080. assert_spin_locked(&lockup_detector_lock);
  4081. now = get_jiffies_64();
  4082. /* If we've received an interrupt recently, we're ok. */
  4083. if (time_after64(h->last_intr_timestamp +
  4084. (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
  4085. return;
  4086. /*
  4087. * If we've already checked the heartbeat recently, we're ok.
  4088. * This could happen if someone sends us a signal. We
  4089. * otherwise don't care about signals in this thread.
  4090. */
  4091. if (time_after64(h->last_heartbeat_timestamp +
  4092. (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
  4093. return;
  4094. /* If heartbeat has not changed since we last looked, we're not ok. */
  4095. spin_lock_irqsave(&h->lock, flags);
  4096. heartbeat = readl(&h->cfgtable->HeartBeat);
  4097. spin_unlock_irqrestore(&h->lock, flags);
  4098. if (h->last_heartbeat == heartbeat) {
  4099. controller_lockup_detected(h);
  4100. return;
  4101. }
  4102. /* We're ok. */
  4103. h->last_heartbeat = heartbeat;
  4104. h->last_heartbeat_timestamp = now;
  4105. }
  4106. static int detect_controller_lockup_thread(void *notused)
  4107. {
  4108. struct ctlr_info *h;
  4109. unsigned long flags;
  4110. while (1) {
  4111. struct list_head *this, *tmp;
  4112. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  4113. if (kthread_should_stop())
  4114. break;
  4115. spin_lock_irqsave(&lockup_detector_lock, flags);
  4116. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  4117. h = list_entry(this, struct ctlr_info, lockup_list);
  4118. detect_controller_lockup(h);
  4119. }
  4120. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4121. }
  4122. return 0;
  4123. }
  4124. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  4125. {
  4126. unsigned long flags;
  4127. spin_lock_irqsave(&lockup_detector_lock, flags);
  4128. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  4129. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4130. }
  4131. static void start_controller_lockup_detector(struct ctlr_info *h)
  4132. {
  4133. /* Start the lockup detector thread if not already started */
  4134. if (!hpsa_lockup_detector) {
  4135. spin_lock_init(&lockup_detector_lock);
  4136. hpsa_lockup_detector =
  4137. kthread_run(detect_controller_lockup_thread,
  4138. NULL, HPSA);
  4139. }
  4140. if (!hpsa_lockup_detector) {
  4141. dev_warn(&h->pdev->dev,
  4142. "Could not start lockup detector thread\n");
  4143. return;
  4144. }
  4145. add_ctlr_to_lockup_detector_list(h);
  4146. }
  4147. static void stop_controller_lockup_detector(struct ctlr_info *h)
  4148. {
  4149. unsigned long flags;
  4150. spin_lock_irqsave(&lockup_detector_lock, flags);
  4151. remove_ctlr_from_lockup_detector_list(h);
  4152. /* If the list of ctlr's to monitor is empty, stop the thread */
  4153. if (list_empty(&hpsa_ctlr_list)) {
  4154. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4155. kthread_stop(hpsa_lockup_detector);
  4156. spin_lock_irqsave(&lockup_detector_lock, flags);
  4157. hpsa_lockup_detector = NULL;
  4158. }
  4159. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4160. }
  4161. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  4162. const struct pci_device_id *ent)
  4163. {
  4164. int dac, rc;
  4165. struct ctlr_info *h;
  4166. int try_soft_reset = 0;
  4167. unsigned long flags;
  4168. if (number_of_controllers == 0)
  4169. printk(KERN_INFO DRIVER_NAME "\n");
  4170. rc = hpsa_init_reset_devices(pdev);
  4171. if (rc) {
  4172. if (rc != -ENOTSUPP)
  4173. return rc;
  4174. /* If the reset fails in a particular way (it has no way to do
  4175. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  4176. * a soft reset once we get the controller configured up to the
  4177. * point that it can accept a command.
  4178. */
  4179. try_soft_reset = 1;
  4180. rc = 0;
  4181. }
  4182. reinit_after_soft_reset:
  4183. /* Command structures must be aligned on a 32-byte boundary because
  4184. * the 5 lower bits of the address are used by the hardware. and by
  4185. * the driver. See comments in hpsa.h for more info.
  4186. */
  4187. #define COMMANDLIST_ALIGNMENT 32
  4188. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  4189. h = kzalloc(sizeof(*h), GFP_KERNEL);
  4190. if (!h)
  4191. return -ENOMEM;
  4192. h->pdev = pdev;
  4193. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  4194. INIT_LIST_HEAD(&h->cmpQ);
  4195. INIT_LIST_HEAD(&h->reqQ);
  4196. spin_lock_init(&h->lock);
  4197. spin_lock_init(&h->scan_lock);
  4198. rc = hpsa_pci_init(h);
  4199. if (rc != 0)
  4200. goto clean1;
  4201. sprintf(h->devname, HPSA "%d", number_of_controllers);
  4202. h->ctlr = number_of_controllers;
  4203. number_of_controllers++;
  4204. /* configure PCI DMA stuff */
  4205. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  4206. if (rc == 0) {
  4207. dac = 1;
  4208. } else {
  4209. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4210. if (rc == 0) {
  4211. dac = 0;
  4212. } else {
  4213. dev_err(&pdev->dev, "no suitable DMA available\n");
  4214. goto clean1;
  4215. }
  4216. }
  4217. /* make sure the board interrupts are off */
  4218. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4219. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  4220. goto clean2;
  4221. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  4222. h->devname, pdev->device,
  4223. h->intr[h->intr_mode], dac ? "" : " not");
  4224. if (hpsa_allocate_cmd_pool(h))
  4225. goto clean4;
  4226. if (hpsa_allocate_sg_chain_blocks(h))
  4227. goto clean4;
  4228. init_waitqueue_head(&h->scan_wait_queue);
  4229. h->scan_finished = 1; /* no scan currently in progress */
  4230. pci_set_drvdata(pdev, h);
  4231. h->ndevices = 0;
  4232. h->scsi_host = NULL;
  4233. spin_lock_init(&h->devlock);
  4234. hpsa_put_ctlr_into_performant_mode(h);
  4235. /* At this point, the controller is ready to take commands.
  4236. * Now, if reset_devices and the hard reset didn't work, try
  4237. * the soft reset and see if that works.
  4238. */
  4239. if (try_soft_reset) {
  4240. /* This is kind of gross. We may or may not get a completion
  4241. * from the soft reset command, and if we do, then the value
  4242. * from the fifo may or may not be valid. So, we wait 10 secs
  4243. * after the reset throwing away any completions we get during
  4244. * that time. Unregister the interrupt handler and register
  4245. * fake ones to scoop up any residual completions.
  4246. */
  4247. spin_lock_irqsave(&h->lock, flags);
  4248. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4249. spin_unlock_irqrestore(&h->lock, flags);
  4250. free_irqs(h);
  4251. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  4252. hpsa_intx_discard_completions);
  4253. if (rc) {
  4254. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  4255. "soft reset.\n");
  4256. goto clean4;
  4257. }
  4258. rc = hpsa_kdump_soft_reset(h);
  4259. if (rc)
  4260. /* Neither hard nor soft reset worked, we're hosed. */
  4261. goto clean4;
  4262. dev_info(&h->pdev->dev, "Board READY.\n");
  4263. dev_info(&h->pdev->dev,
  4264. "Waiting for stale completions to drain.\n");
  4265. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4266. msleep(10000);
  4267. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4268. rc = controller_reset_failed(h->cfgtable);
  4269. if (rc)
  4270. dev_info(&h->pdev->dev,
  4271. "Soft reset appears to have failed.\n");
  4272. /* since the controller's reset, we have to go back and re-init
  4273. * everything. Easiest to just forget what we've done and do it
  4274. * all over again.
  4275. */
  4276. hpsa_undo_allocations_after_kdump_soft_reset(h);
  4277. try_soft_reset = 0;
  4278. if (rc)
  4279. /* don't go to clean4, we already unallocated */
  4280. return -ENODEV;
  4281. goto reinit_after_soft_reset;
  4282. }
  4283. /* Turn the interrupts on so we can service requests */
  4284. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4285. hpsa_hba_inquiry(h);
  4286. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  4287. start_controller_lockup_detector(h);
  4288. return 1;
  4289. clean4:
  4290. hpsa_free_sg_chain_blocks(h);
  4291. hpsa_free_cmd_pool(h);
  4292. free_irqs(h);
  4293. clean2:
  4294. clean1:
  4295. kfree(h);
  4296. return rc;
  4297. }
  4298. static void hpsa_flush_cache(struct ctlr_info *h)
  4299. {
  4300. char *flush_buf;
  4301. struct CommandList *c;
  4302. flush_buf = kzalloc(4, GFP_KERNEL);
  4303. if (!flush_buf)
  4304. return;
  4305. c = cmd_special_alloc(h);
  4306. if (!c) {
  4307. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  4308. goto out_of_memory;
  4309. }
  4310. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  4311. RAID_CTLR_LUNID, TYPE_CMD);
  4312. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  4313. if (c->err_info->CommandStatus != 0)
  4314. dev_warn(&h->pdev->dev,
  4315. "error flushing cache on controller\n");
  4316. cmd_special_free(h, c);
  4317. out_of_memory:
  4318. kfree(flush_buf);
  4319. }
  4320. static void hpsa_shutdown(struct pci_dev *pdev)
  4321. {
  4322. struct ctlr_info *h;
  4323. h = pci_get_drvdata(pdev);
  4324. /* Turn board interrupts off and send the flush cache command
  4325. * sendcmd will turn off interrupt, and send the flush...
  4326. * To write all data in the battery backed cache to disks
  4327. */
  4328. hpsa_flush_cache(h);
  4329. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4330. hpsa_free_irqs_and_disable_msix(h);
  4331. }
  4332. static void __devexit hpsa_free_device_info(struct ctlr_info *h)
  4333. {
  4334. int i;
  4335. for (i = 0; i < h->ndevices; i++)
  4336. kfree(h->dev[i]);
  4337. }
  4338. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  4339. {
  4340. struct ctlr_info *h;
  4341. if (pci_get_drvdata(pdev) == NULL) {
  4342. dev_err(&pdev->dev, "unable to remove device\n");
  4343. return;
  4344. }
  4345. h = pci_get_drvdata(pdev);
  4346. stop_controller_lockup_detector(h);
  4347. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4348. hpsa_shutdown(pdev);
  4349. iounmap(h->vaddr);
  4350. iounmap(h->transtable);
  4351. iounmap(h->cfgtable);
  4352. hpsa_free_device_info(h);
  4353. hpsa_free_sg_chain_blocks(h);
  4354. pci_free_consistent(h->pdev,
  4355. h->nr_cmds * sizeof(struct CommandList),
  4356. h->cmd_pool, h->cmd_pool_dhandle);
  4357. pci_free_consistent(h->pdev,
  4358. h->nr_cmds * sizeof(struct ErrorInfo),
  4359. h->errinfo_pool, h->errinfo_pool_dhandle);
  4360. pci_free_consistent(h->pdev, h->reply_pool_size,
  4361. h->reply_pool, h->reply_pool_dhandle);
  4362. kfree(h->cmd_pool_bits);
  4363. kfree(h->blockFetchTable);
  4364. kfree(h->hba_inquiry_data);
  4365. pci_disable_device(pdev);
  4366. pci_release_regions(pdev);
  4367. pci_set_drvdata(pdev, NULL);
  4368. kfree(h);
  4369. }
  4370. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4371. __attribute__((unused)) pm_message_t state)
  4372. {
  4373. return -ENOSYS;
  4374. }
  4375. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4376. {
  4377. return -ENOSYS;
  4378. }
  4379. static struct pci_driver hpsa_pci_driver = {
  4380. .name = HPSA,
  4381. .probe = hpsa_init_one,
  4382. .remove = __devexit_p(hpsa_remove_one),
  4383. .id_table = hpsa_pci_device_id, /* id_table */
  4384. .shutdown = hpsa_shutdown,
  4385. .suspend = hpsa_suspend,
  4386. .resume = hpsa_resume,
  4387. };
  4388. /* Fill in bucket_map[], given nsgs (the max number of
  4389. * scatter gather elements supported) and bucket[],
  4390. * which is an array of 8 integers. The bucket[] array
  4391. * contains 8 different DMA transfer sizes (in 16
  4392. * byte increments) which the controller uses to fetch
  4393. * commands. This function fills in bucket_map[], which
  4394. * maps a given number of scatter gather elements to one of
  4395. * the 8 DMA transfer sizes. The point of it is to allow the
  4396. * controller to only do as much DMA as needed to fetch the
  4397. * command, with the DMA transfer size encoded in the lower
  4398. * bits of the command address.
  4399. */
  4400. static void calc_bucket_map(int bucket[], int num_buckets,
  4401. int nsgs, int *bucket_map)
  4402. {
  4403. int i, j, b, size;
  4404. /* even a command with 0 SGs requires 4 blocks */
  4405. #define MINIMUM_TRANSFER_BLOCKS 4
  4406. #define NUM_BUCKETS 8
  4407. /* Note, bucket_map must have nsgs+1 entries. */
  4408. for (i = 0; i <= nsgs; i++) {
  4409. /* Compute size of a command with i SG entries */
  4410. size = i + MINIMUM_TRANSFER_BLOCKS;
  4411. b = num_buckets; /* Assume the biggest bucket */
  4412. /* Find the bucket that is just big enough */
  4413. for (j = 0; j < 8; j++) {
  4414. if (bucket[j] >= size) {
  4415. b = j;
  4416. break;
  4417. }
  4418. }
  4419. /* for a command with i SG entries, use bucket b. */
  4420. bucket_map[i] = b;
  4421. }
  4422. }
  4423. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  4424. u32 use_short_tags)
  4425. {
  4426. int i;
  4427. unsigned long register_value;
  4428. /* This is a bit complicated. There are 8 registers on
  4429. * the controller which we write to to tell it 8 different
  4430. * sizes of commands which there may be. It's a way of
  4431. * reducing the DMA done to fetch each command. Encoded into
  4432. * each command's tag are 3 bits which communicate to the controller
  4433. * which of the eight sizes that command fits within. The size of
  4434. * each command depends on how many scatter gather entries there are.
  4435. * Each SG entry requires 16 bytes. The eight registers are programmed
  4436. * with the number of 16-byte blocks a command of that size requires.
  4437. * The smallest command possible requires 5 such 16 byte blocks.
  4438. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4439. * blocks. Note, this only extends to the SG entries contained
  4440. * within the command block, and does not extend to chained blocks
  4441. * of SG elements. bft[] contains the eight values we write to
  4442. * the registers. They are not evenly distributed, but have more
  4443. * sizes for small commands, and fewer sizes for larger commands.
  4444. */
  4445. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4446. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4447. /* 5 = 1 s/g entry or 4k
  4448. * 6 = 2 s/g entry or 8k
  4449. * 8 = 4 s/g entry or 16k
  4450. * 10 = 6 s/g entry or 24k
  4451. */
  4452. /* Controller spec: zero out this buffer. */
  4453. memset(h->reply_pool, 0, h->reply_pool_size);
  4454. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4455. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4456. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4457. for (i = 0; i < 8; i++)
  4458. writel(bft[i], &h->transtable->BlockFetch[i]);
  4459. /* size of controller ring buffer */
  4460. writel(h->max_commands, &h->transtable->RepQSize);
  4461. writel(h->nreply_queues, &h->transtable->RepQCount);
  4462. writel(0, &h->transtable->RepQCtrAddrLow32);
  4463. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4464. for (i = 0; i < h->nreply_queues; i++) {
  4465. writel(0, &h->transtable->RepQAddr[i].upper);
  4466. writel(h->reply_pool_dhandle +
  4467. (h->max_commands * sizeof(u64) * i),
  4468. &h->transtable->RepQAddr[i].lower);
  4469. }
  4470. writel(CFGTBL_Trans_Performant | use_short_tags |
  4471. CFGTBL_Trans_enable_directed_msix,
  4472. &(h->cfgtable->HostWrite.TransportRequest));
  4473. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4474. hpsa_wait_for_mode_change_ack(h);
  4475. register_value = readl(&(h->cfgtable->TransportActive));
  4476. if (!(register_value & CFGTBL_Trans_Performant)) {
  4477. dev_warn(&h->pdev->dev, "unable to get board into"
  4478. " performant mode\n");
  4479. return;
  4480. }
  4481. /* Change the access methods to the performant access methods */
  4482. h->access = SA5_performant_access;
  4483. h->transMethod = CFGTBL_Trans_Performant;
  4484. }
  4485. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4486. {
  4487. u32 trans_support;
  4488. int i;
  4489. if (hpsa_simple_mode)
  4490. return;
  4491. trans_support = readl(&(h->cfgtable->TransportSupport));
  4492. if (!(trans_support & PERFORMANT_MODE))
  4493. return;
  4494. h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
  4495. hpsa_get_max_perf_mode_cmds(h);
  4496. /* Performant mode ring buffer and supporting data structures */
  4497. h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
  4498. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4499. &(h->reply_pool_dhandle));
  4500. for (i = 0; i < h->nreply_queues; i++) {
  4501. h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
  4502. h->reply_queue[i].size = h->max_commands;
  4503. h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
  4504. h->reply_queue[i].current_entry = 0;
  4505. }
  4506. /* Need a block fetch table for performant mode */
  4507. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4508. sizeof(u32)), GFP_KERNEL);
  4509. if ((h->reply_pool == NULL)
  4510. || (h->blockFetchTable == NULL))
  4511. goto clean_up;
  4512. hpsa_enter_performant_mode(h,
  4513. trans_support & CFGTBL_Trans_use_short_tags);
  4514. return;
  4515. clean_up:
  4516. if (h->reply_pool)
  4517. pci_free_consistent(h->pdev, h->reply_pool_size,
  4518. h->reply_pool, h->reply_pool_dhandle);
  4519. kfree(h->blockFetchTable);
  4520. }
  4521. /*
  4522. * This is it. Register the PCI driver information for the cards we control
  4523. * the OS will call our registered routines when it finds one of our cards.
  4524. */
  4525. static int __init hpsa_init(void)
  4526. {
  4527. return pci_register_driver(&hpsa_pci_driver);
  4528. }
  4529. static void __exit hpsa_cleanup(void)
  4530. {
  4531. pci_unregister_driver(&hpsa_pci_driver);
  4532. }
  4533. module_init(hpsa_init);
  4534. module_exit(hpsa_cleanup);