cx88-dvb.c 32 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  54. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  55. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  56. MODULE_LICENSE("GPL");
  57. static unsigned int debug;
  58. module_param(debug, int, 0644);
  59. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  60. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  61. #define dprintk(level,fmt, arg...) if (debug >= level) \
  62. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  63. /* ------------------------------------------------------------------ */
  64. static int dvb_buf_setup(struct videobuf_queue *q,
  65. unsigned int *count, unsigned int *size)
  66. {
  67. struct cx8802_dev *dev = q->priv_data;
  68. dev->ts_packet_size = 188 * 4;
  69. dev->ts_packet_count = 32;
  70. *size = dev->ts_packet_size * dev->ts_packet_count;
  71. *count = 32;
  72. return 0;
  73. }
  74. static int dvb_buf_prepare(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb, enum v4l2_field field)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  79. }
  80. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  81. {
  82. struct cx8802_dev *dev = q->priv_data;
  83. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  84. }
  85. static void dvb_buf_release(struct videobuf_queue *q,
  86. struct videobuf_buffer *vb)
  87. {
  88. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  89. }
  90. static struct videobuf_queue_ops dvb_qops = {
  91. .buf_setup = dvb_buf_setup,
  92. .buf_prepare = dvb_buf_prepare,
  93. .buf_queue = dvb_buf_queue,
  94. .buf_release = dvb_buf_release,
  95. };
  96. /* ------------------------------------------------------------------ */
  97. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  98. {
  99. struct cx8802_dev *dev= fe->dvb->priv;
  100. struct cx8802_driver *drv = NULL;
  101. int ret = 0;
  102. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  103. if (drv) {
  104. if (acquire)
  105. ret = drv->request_acquire(drv);
  106. else
  107. ret = drv->request_release(drv);
  108. }
  109. return ret;
  110. }
  111. /* ------------------------------------------------------------------ */
  112. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  113. {
  114. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  115. static u8 reset [] = { RESET, 0x80 };
  116. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  117. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  118. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  119. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  120. mt352_write(fe, clock_config, sizeof(clock_config));
  121. udelay(200);
  122. mt352_write(fe, reset, sizeof(reset));
  123. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  124. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  125. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  126. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  127. return 0;
  128. }
  129. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  130. {
  131. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  132. static u8 reset [] = { RESET, 0x80 };
  133. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  134. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  135. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  136. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  137. mt352_write(fe, clock_config, sizeof(clock_config));
  138. udelay(200);
  139. mt352_write(fe, reset, sizeof(reset));
  140. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  141. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  142. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  143. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  144. return 0;
  145. }
  146. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  147. {
  148. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  149. static u8 reset [] = { 0x50, 0x80 };
  150. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  151. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  152. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  153. static u8 dntv_extra[] = { 0xB5, 0x7A };
  154. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  155. mt352_write(fe, clock_config, sizeof(clock_config));
  156. udelay(2000);
  157. mt352_write(fe, reset, sizeof(reset));
  158. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  159. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  160. udelay(2000);
  161. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  162. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  163. return 0;
  164. }
  165. static struct mt352_config dvico_fusionhdtv = {
  166. .demod_address = 0x0f,
  167. .demod_init = dvico_fusionhdtv_demod_init,
  168. };
  169. static struct mt352_config dntv_live_dvbt_config = {
  170. .demod_address = 0x0f,
  171. .demod_init = dntv_live_dvbt_demod_init,
  172. };
  173. static struct mt352_config dvico_fusionhdtv_dual = {
  174. .demod_address = 0x0f,
  175. .demod_init = dvico_dual_demod_init,
  176. };
  177. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  178. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  179. {
  180. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  181. static u8 reset [] = { 0x50, 0x80 };
  182. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  183. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  184. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  185. static u8 dntv_extra[] = { 0xB5, 0x7A };
  186. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  187. mt352_write(fe, clock_config, sizeof(clock_config));
  188. udelay(2000);
  189. mt352_write(fe, reset, sizeof(reset));
  190. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  191. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  192. udelay(2000);
  193. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  194. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  195. return 0;
  196. }
  197. static struct mt352_config dntv_live_dvbt_pro_config = {
  198. .demod_address = 0x0f,
  199. .no_tuner = 1,
  200. .demod_init = dntv_live_dvbt_pro_demod_init,
  201. };
  202. #endif
  203. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  204. .demod_address = 0x0f,
  205. .no_tuner = 1,
  206. };
  207. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  208. .demod_address = 0x0f,
  209. .if2 = 45600,
  210. .no_tuner = 1,
  211. };
  212. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  213. .demod_address = 0x0f,
  214. .if2 = 4560,
  215. .no_tuner = 1,
  216. .demod_init = dvico_fusionhdtv_demod_init,
  217. };
  218. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  219. .demod_address = 0x0f,
  220. };
  221. static struct cx22702_config connexant_refboard_config = {
  222. .demod_address = 0x43,
  223. .output_mode = CX22702_SERIAL_OUTPUT,
  224. };
  225. static struct cx22702_config hauppauge_hvr_config = {
  226. .demod_address = 0x63,
  227. .output_mode = CX22702_SERIAL_OUTPUT,
  228. };
  229. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  230. {
  231. struct cx8802_dev *dev= fe->dvb->priv;
  232. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  233. return 0;
  234. }
  235. static struct or51132_config pchdtv_hd3000 = {
  236. .demod_address = 0x15,
  237. .set_ts_params = or51132_set_ts_param,
  238. };
  239. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  240. {
  241. struct cx8802_dev *dev= fe->dvb->priv;
  242. struct cx88_core *core = dev->core;
  243. dprintk(1, "%s: index = %d\n", __func__, index);
  244. if (index == 0)
  245. cx_clear(MO_GP0_IO, 8);
  246. else
  247. cx_set(MO_GP0_IO, 8);
  248. return 0;
  249. }
  250. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  251. {
  252. struct cx8802_dev *dev= fe->dvb->priv;
  253. if (is_punctured)
  254. dev->ts_gen_cntrl |= 0x04;
  255. else
  256. dev->ts_gen_cntrl &= ~0x04;
  257. return 0;
  258. }
  259. static struct lgdt330x_config fusionhdtv_3_gold = {
  260. .demod_address = 0x0e,
  261. .demod_chip = LGDT3302,
  262. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  263. .set_ts_params = lgdt330x_set_ts_param,
  264. };
  265. static struct lgdt330x_config fusionhdtv_5_gold = {
  266. .demod_address = 0x0e,
  267. .demod_chip = LGDT3303,
  268. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  269. .set_ts_params = lgdt330x_set_ts_param,
  270. };
  271. static struct lgdt330x_config pchdtv_hd5500 = {
  272. .demod_address = 0x59,
  273. .demod_chip = LGDT3303,
  274. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  275. .set_ts_params = lgdt330x_set_ts_param,
  276. };
  277. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  278. {
  279. struct cx8802_dev *dev= fe->dvb->priv;
  280. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  281. return 0;
  282. }
  283. static struct nxt200x_config ati_hdtvwonder = {
  284. .demod_address = 0x0a,
  285. .set_ts_params = nxt200x_set_ts_param,
  286. };
  287. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  288. int is_punctured)
  289. {
  290. struct cx8802_dev *dev= fe->dvb->priv;
  291. dev->ts_gen_cntrl = 0x02;
  292. return 0;
  293. }
  294. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  295. fe_sec_voltage_t voltage)
  296. {
  297. struct cx8802_dev *dev= fe->dvb->priv;
  298. struct cx88_core *core = dev->core;
  299. if (voltage == SEC_VOLTAGE_OFF)
  300. cx_write(MO_GP0_IO, 0x000006fb);
  301. else
  302. cx_write(MO_GP0_IO, 0x000006f9);
  303. if (core->prev_set_voltage)
  304. return core->prev_set_voltage(fe, voltage);
  305. return 0;
  306. }
  307. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  308. fe_sec_voltage_t voltage)
  309. {
  310. struct cx8802_dev *dev= fe->dvb->priv;
  311. struct cx88_core *core = dev->core;
  312. if (voltage == SEC_VOLTAGE_OFF) {
  313. dprintk(1,"LNB Voltage OFF\n");
  314. cx_write(MO_GP0_IO, 0x0000efff);
  315. }
  316. if (core->prev_set_voltage)
  317. return core->prev_set_voltage(fe, voltage);
  318. return 0;
  319. }
  320. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  321. fe_sec_voltage_t voltage)
  322. {
  323. struct cx8802_dev *dev= fe->dvb->priv;
  324. struct cx88_core *core = dev->core;
  325. switch (voltage) {
  326. case SEC_VOLTAGE_13:
  327. printk("LNB Voltage SEC_VOLTAGE_13\n");
  328. cx_write(MO_GP0_IO, 0x00006040);
  329. break;
  330. case SEC_VOLTAGE_18:
  331. printk("LNB Voltage SEC_VOLTAGE_18\n");
  332. cx_write(MO_GP0_IO, 0x00006060);
  333. break;
  334. case SEC_VOLTAGE_OFF:
  335. printk("LNB Voltage SEC_VOLTAGE_off\n");
  336. break;
  337. }
  338. if (core->prev_set_voltage)
  339. return core->prev_set_voltage(fe, voltage);
  340. return 0;
  341. }
  342. static struct cx24123_config geniatech_dvbs_config = {
  343. .demod_address = 0x55,
  344. .set_ts_params = cx24123_set_ts_param,
  345. };
  346. static struct cx24123_config hauppauge_novas_config = {
  347. .demod_address = 0x55,
  348. .set_ts_params = cx24123_set_ts_param,
  349. };
  350. static struct cx24123_config kworld_dvbs_100_config = {
  351. .demod_address = 0x15,
  352. .set_ts_params = cx24123_set_ts_param,
  353. .lnb_polarity = 1,
  354. };
  355. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  356. .demod_address = 0x32 >> 1,
  357. .output_mode = S5H1409_PARALLEL_OUTPUT,
  358. .gpio = S5H1409_GPIO_ON,
  359. .qam_if = 44000,
  360. .inversion = S5H1409_INVERSION_OFF,
  361. .status_mode = S5H1409_DEMODLOCKING,
  362. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  363. };
  364. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  365. .demod_address = 0x32 >> 1,
  366. .output_mode = S5H1409_SERIAL_OUTPUT,
  367. .gpio = S5H1409_GPIO_OFF,
  368. .inversion = S5H1409_INVERSION_OFF,
  369. .status_mode = S5H1409_DEMODLOCKING,
  370. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  371. };
  372. static struct s5h1409_config kworld_atsc_120_config = {
  373. .demod_address = 0x32 >> 1,
  374. .output_mode = S5H1409_SERIAL_OUTPUT,
  375. .gpio = S5H1409_GPIO_OFF,
  376. .inversion = S5H1409_INVERSION_OFF,
  377. .status_mode = S5H1409_DEMODLOCKING,
  378. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  379. };
  380. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  381. .i2c_address = 0x64,
  382. .if_khz = 5380,
  383. };
  384. static struct zl10353_config cx88_geniatech_x8000_mt = {
  385. .demod_address = (0x1e >> 1),
  386. .no_tuner = 1,
  387. };
  388. static struct s5h1411_config dvico_fusionhdtv7_config = {
  389. .output_mode = S5H1411_SERIAL_OUTPUT,
  390. .gpio = S5H1411_GPIO_ON,
  391. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  392. .qam_if = S5H1411_IF_44000,
  393. .vsb_if = S5H1411_IF_44000,
  394. .inversion = S5H1411_INVERSION_OFF,
  395. .status_mode = S5H1411_DEMODLOCKING
  396. };
  397. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  398. .i2c_address = 0xc2 >> 1,
  399. .if_khz = 5380,
  400. };
  401. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  402. {
  403. struct dvb_frontend *fe;
  404. struct xc2028_ctrl ctl;
  405. struct xc2028_config cfg = {
  406. .i2c_adap = &dev->core->i2c_adap,
  407. .i2c_addr = addr,
  408. .ctrl = &ctl,
  409. };
  410. if (!dev->dvb.frontend) {
  411. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  412. "Can't attach xc3028\n",
  413. dev->core->name);
  414. return -EINVAL;
  415. }
  416. /*
  417. * Some xc3028 devices may be hidden by an I2C gate. This is known
  418. * to happen with some s5h1409-based devices.
  419. * Now that I2C gate is open, sets up xc3028 configuration
  420. */
  421. cx88_setup_xc3028(dev->core, &ctl);
  422. fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
  423. if (!fe) {
  424. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  425. dev->core->name);
  426. return -EINVAL;
  427. }
  428. printk(KERN_INFO "%s/2: xc3028 attached\n",
  429. dev->core->name);
  430. return 0;
  431. }
  432. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  433. int is_punctured)
  434. {
  435. struct cx8802_dev *dev = fe->dvb->priv;
  436. dev->ts_gen_cntrl = 0x2;
  437. return 0;
  438. }
  439. static int cx24116_reset_device(struct dvb_frontend *fe)
  440. {
  441. struct cx8802_dev *dev = fe->dvb->priv;
  442. struct cx88_core *core = dev->core;
  443. /* Reset the part */
  444. cx_write(MO_SRST_IO, 0);
  445. msleep(10);
  446. cx_write(MO_SRST_IO, 1);
  447. msleep(10);
  448. return 0;
  449. }
  450. static struct cx24116_config hauppauge_hvr4000_config = {
  451. .demod_address = 0x05,
  452. .set_ts_params = cx24116_set_ts_param,
  453. .reset_device = cx24116_reset_device,
  454. };
  455. static struct cx24116_config tevii_s460_config = {
  456. .demod_address = 0x55,
  457. .set_ts_params = cx24116_set_ts_param,
  458. .reset_device = cx24116_reset_device,
  459. };
  460. static struct stv0299_config tevii_tuner_sharp_config = {
  461. .demod_address = 0x68,
  462. .inittab = sharp_z0194a__inittab,
  463. .mclk = 88000000UL,
  464. .invert = 1,
  465. .skip_reinit = 0,
  466. .lock_output = 1,
  467. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  468. .min_delay_ms = 100,
  469. .set_symbol_rate = sharp_z0194a__set_symbol_rate,
  470. .set_ts_params = cx24116_set_ts_param,
  471. };
  472. static struct stv0288_config tevii_tuner_earda_config = {
  473. .demod_address = 0x68,
  474. .min_delay_ms = 100,
  475. .set_ts_params = cx24116_set_ts_param,
  476. };
  477. static int dvb_register(struct cx8802_dev *dev)
  478. {
  479. struct cx88_core *core = dev->core;
  480. /* init struct videobuf_dvb */
  481. dev->dvb.name = core->name;
  482. dev->ts_gen_cntrl = 0x0c;
  483. /* init frontend */
  484. switch (core->boardnr) {
  485. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  486. dev->dvb.frontend = dvb_attach(cx22702_attach,
  487. &connexant_refboard_config,
  488. &core->i2c_adap);
  489. if (dev->dvb.frontend != NULL) {
  490. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  491. 0x61, &core->i2c_adap,
  492. DVB_PLL_THOMSON_DTT759X))
  493. goto frontend_detach;
  494. }
  495. break;
  496. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  497. case CX88_BOARD_CONEXANT_DVB_T1:
  498. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  499. case CX88_BOARD_WINFAST_DTV1000:
  500. dev->dvb.frontend = dvb_attach(cx22702_attach,
  501. &connexant_refboard_config,
  502. &core->i2c_adap);
  503. if (dev->dvb.frontend != NULL) {
  504. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  505. 0x60, &core->i2c_adap,
  506. DVB_PLL_THOMSON_DTT7579))
  507. goto frontend_detach;
  508. }
  509. break;
  510. case CX88_BOARD_WINFAST_DTV2000H:
  511. case CX88_BOARD_HAUPPAUGE_HVR1100:
  512. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  513. case CX88_BOARD_HAUPPAUGE_HVR1300:
  514. case CX88_BOARD_HAUPPAUGE_HVR3000:
  515. dev->dvb.frontend = dvb_attach(cx22702_attach,
  516. &hauppauge_hvr_config,
  517. &core->i2c_adap);
  518. if (dev->dvb.frontend != NULL) {
  519. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  520. &core->i2c_adap, 0x61,
  521. TUNER_PHILIPS_FMD1216ME_MK3))
  522. goto frontend_detach;
  523. }
  524. break;
  525. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  526. dev->dvb.frontend = dvb_attach(mt352_attach,
  527. &dvico_fusionhdtv,
  528. &core->i2c_adap);
  529. if (dev->dvb.frontend != NULL) {
  530. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  531. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  532. goto frontend_detach;
  533. break;
  534. }
  535. /* ZL10353 replaces MT352 on later cards */
  536. dev->dvb.frontend = dvb_attach(zl10353_attach,
  537. &dvico_fusionhdtv_plus_v1_1,
  538. &core->i2c_adap);
  539. if (dev->dvb.frontend != NULL) {
  540. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  541. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  542. goto frontend_detach;
  543. }
  544. break;
  545. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  546. /* The tin box says DEE1601, but it seems to be DTT7579
  547. * compatible, with a slightly different MT352 AGC gain. */
  548. dev->dvb.frontend = dvb_attach(mt352_attach,
  549. &dvico_fusionhdtv_dual,
  550. &core->i2c_adap);
  551. if (dev->dvb.frontend != NULL) {
  552. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  553. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  554. goto frontend_detach;
  555. break;
  556. }
  557. /* ZL10353 replaces MT352 on later cards */
  558. dev->dvb.frontend = dvb_attach(zl10353_attach,
  559. &dvico_fusionhdtv_plus_v1_1,
  560. &core->i2c_adap);
  561. if (dev->dvb.frontend != NULL) {
  562. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  563. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  564. goto frontend_detach;
  565. }
  566. break;
  567. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  568. dev->dvb.frontend = dvb_attach(mt352_attach,
  569. &dvico_fusionhdtv,
  570. &core->i2c_adap);
  571. if (dev->dvb.frontend != NULL) {
  572. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  573. 0x61, NULL, DVB_PLL_LG_Z201))
  574. goto frontend_detach;
  575. }
  576. break;
  577. case CX88_BOARD_KWORLD_DVB_T:
  578. case CX88_BOARD_DNTV_LIVE_DVB_T:
  579. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  580. dev->dvb.frontend = dvb_attach(mt352_attach,
  581. &dntv_live_dvbt_config,
  582. &core->i2c_adap);
  583. if (dev->dvb.frontend != NULL) {
  584. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  585. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  586. goto frontend_detach;
  587. }
  588. break;
  589. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  590. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  591. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  592. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  593. &dev->vp3054->adap);
  594. if (dev->dvb.frontend != NULL) {
  595. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  596. &core->i2c_adap, 0x61,
  597. TUNER_PHILIPS_FMD1216ME_MK3))
  598. goto frontend_detach;
  599. }
  600. #else
  601. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  602. core->name);
  603. #endif
  604. break;
  605. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  606. dev->dvb.frontend = dvb_attach(zl10353_attach,
  607. &dvico_fusionhdtv_hybrid,
  608. &core->i2c_adap);
  609. if (dev->dvb.frontend != NULL) {
  610. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  611. &core->i2c_adap, 0x61,
  612. TUNER_THOMSON_FE6600))
  613. goto frontend_detach;
  614. }
  615. break;
  616. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  617. dev->dvb.frontend = dvb_attach(zl10353_attach,
  618. &dvico_fusionhdtv_xc3028,
  619. &core->i2c_adap);
  620. if (dev->dvb.frontend == NULL)
  621. dev->dvb.frontend = dvb_attach(mt352_attach,
  622. &dvico_fusionhdtv_mt352_xc3028,
  623. &core->i2c_adap);
  624. /*
  625. * On this board, the demod provides the I2C bus pullup.
  626. * We must not permit gate_ctrl to be performed, or
  627. * the xc3028 cannot communicate on the bus.
  628. */
  629. if (dev->dvb.frontend)
  630. dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  631. if (attach_xc3028(0x61, dev) < 0)
  632. return -EINVAL;
  633. break;
  634. case CX88_BOARD_PCHDTV_HD3000:
  635. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  636. &core->i2c_adap);
  637. if (dev->dvb.frontend != NULL) {
  638. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  639. &core->i2c_adap, 0x61,
  640. TUNER_THOMSON_DTT761X))
  641. goto frontend_detach;
  642. }
  643. break;
  644. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  645. dev->ts_gen_cntrl = 0x08;
  646. /* Do a hardware reset of chip before using it. */
  647. cx_clear(MO_GP0_IO, 1);
  648. mdelay(100);
  649. cx_set(MO_GP0_IO, 1);
  650. mdelay(200);
  651. /* Select RF connector callback */
  652. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  653. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  654. &fusionhdtv_3_gold,
  655. &core->i2c_adap);
  656. if (dev->dvb.frontend != NULL) {
  657. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  658. &core->i2c_adap, 0x61,
  659. TUNER_MICROTUNE_4042FI5))
  660. goto frontend_detach;
  661. }
  662. break;
  663. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  664. dev->ts_gen_cntrl = 0x08;
  665. /* Do a hardware reset of chip before using it. */
  666. cx_clear(MO_GP0_IO, 1);
  667. mdelay(100);
  668. cx_set(MO_GP0_IO, 9);
  669. mdelay(200);
  670. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  671. &fusionhdtv_3_gold,
  672. &core->i2c_adap);
  673. if (dev->dvb.frontend != NULL) {
  674. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  675. &core->i2c_adap, 0x61,
  676. TUNER_THOMSON_DTT761X))
  677. goto frontend_detach;
  678. }
  679. break;
  680. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  681. dev->ts_gen_cntrl = 0x08;
  682. /* Do a hardware reset of chip before using it. */
  683. cx_clear(MO_GP0_IO, 1);
  684. mdelay(100);
  685. cx_set(MO_GP0_IO, 1);
  686. mdelay(200);
  687. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  688. &fusionhdtv_5_gold,
  689. &core->i2c_adap);
  690. if (dev->dvb.frontend != NULL) {
  691. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  692. &core->i2c_adap, 0x61,
  693. TUNER_LG_TDVS_H06XF))
  694. goto frontend_detach;
  695. if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
  696. &core->i2c_adap, 0x43))
  697. goto frontend_detach;
  698. }
  699. break;
  700. case CX88_BOARD_PCHDTV_HD5500:
  701. dev->ts_gen_cntrl = 0x08;
  702. /* Do a hardware reset of chip before using it. */
  703. cx_clear(MO_GP0_IO, 1);
  704. mdelay(100);
  705. cx_set(MO_GP0_IO, 1);
  706. mdelay(200);
  707. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  708. &pchdtv_hd5500,
  709. &core->i2c_adap);
  710. if (dev->dvb.frontend != NULL) {
  711. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  712. &core->i2c_adap, 0x61,
  713. TUNER_LG_TDVS_H06XF))
  714. goto frontend_detach;
  715. if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
  716. &core->i2c_adap, 0x43))
  717. goto frontend_detach;
  718. }
  719. break;
  720. case CX88_BOARD_ATI_HDTVWONDER:
  721. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  722. &ati_hdtvwonder,
  723. &core->i2c_adap);
  724. if (dev->dvb.frontend != NULL) {
  725. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  726. &core->i2c_adap, 0x61,
  727. TUNER_PHILIPS_TUV1236D))
  728. goto frontend_detach;
  729. }
  730. break;
  731. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  732. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  733. dev->dvb.frontend = dvb_attach(cx24123_attach,
  734. &hauppauge_novas_config,
  735. &core->i2c_adap);
  736. if (dev->dvb.frontend) {
  737. if (!dvb_attach(isl6421_attach, dev->dvb.frontend,
  738. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  739. goto frontend_detach;
  740. }
  741. break;
  742. case CX88_BOARD_KWORLD_DVBS_100:
  743. dev->dvb.frontend = dvb_attach(cx24123_attach,
  744. &kworld_dvbs_100_config,
  745. &core->i2c_adap);
  746. if (dev->dvb.frontend) {
  747. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  748. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  749. }
  750. break;
  751. case CX88_BOARD_GENIATECH_DVBS:
  752. dev->dvb.frontend = dvb_attach(cx24123_attach,
  753. &geniatech_dvbs_config,
  754. &core->i2c_adap);
  755. if (dev->dvb.frontend) {
  756. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  757. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  758. }
  759. break;
  760. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  761. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  762. &pinnacle_pctv_hd_800i_config,
  763. &core->i2c_adap);
  764. if (dev->dvb.frontend != NULL) {
  765. if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
  766. &core->i2c_adap,
  767. &pinnacle_pctv_hd_800i_tuner_config))
  768. goto frontend_detach;
  769. }
  770. break;
  771. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  772. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  773. &dvico_hdtv5_pci_nano_config,
  774. &core->i2c_adap);
  775. if (dev->dvb.frontend != NULL) {
  776. struct dvb_frontend *fe;
  777. struct xc2028_config cfg = {
  778. .i2c_adap = &core->i2c_adap,
  779. .i2c_addr = 0x61,
  780. };
  781. static struct xc2028_ctrl ctl = {
  782. .fname = XC2028_DEFAULT_FIRMWARE,
  783. .max_len = 64,
  784. .scode_table = XC3028_FE_OREN538,
  785. };
  786. fe = dvb_attach(xc2028_attach,
  787. dev->dvb.frontend, &cfg);
  788. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  789. fe->ops.tuner_ops.set_config(fe, &ctl);
  790. }
  791. break;
  792. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  793. dev->dvb.frontend = dvb_attach(zl10353_attach,
  794. &cx88_geniatech_x8000_mt,
  795. &core->i2c_adap);
  796. if (attach_xc3028(0x61, dev) < 0)
  797. goto frontend_detach;
  798. break;
  799. case CX88_BOARD_GENIATECH_X8000_MT:
  800. dev->ts_gen_cntrl = 0x00;
  801. dev->dvb.frontend = dvb_attach(zl10353_attach,
  802. &cx88_geniatech_x8000_mt,
  803. &core->i2c_adap);
  804. if (attach_xc3028(0x61, dev) < 0)
  805. goto frontend_detach;
  806. break;
  807. case CX88_BOARD_KWORLD_ATSC_120:
  808. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  809. &kworld_atsc_120_config,
  810. &core->i2c_adap);
  811. if (attach_xc3028(0x61, dev) < 0)
  812. goto frontend_detach;
  813. break;
  814. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  815. dev->dvb.frontend = dvb_attach(s5h1411_attach,
  816. &dvico_fusionhdtv7_config,
  817. &core->i2c_adap);
  818. if (dev->dvb.frontend != NULL) {
  819. if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
  820. &core->i2c_adap,
  821. &dvico_fusionhdtv7_tuner_config))
  822. goto frontend_detach;
  823. }
  824. break;
  825. case CX88_BOARD_HAUPPAUGE_HVR4000:
  826. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  827. /* Support for DVB-S only, not DVB-T support */
  828. dev->dvb.frontend = dvb_attach(cx24116_attach,
  829. &hauppauge_hvr4000_config,
  830. &dev->core->i2c_adap);
  831. if (dev->dvb.frontend) {
  832. dvb_attach(isl6421_attach, dev->dvb.frontend,
  833. &dev->core->i2c_adap,
  834. 0x08, ISL6421_DCL, 0x00);
  835. }
  836. break;
  837. case CX88_BOARD_TEVII_S420:
  838. dev->dvb.frontend = dvb_attach(stv0299_attach,
  839. &tevii_tuner_sharp_config,
  840. &core->i2c_adap);
  841. if (dev->dvb.frontend != NULL) {
  842. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  843. &core->i2c_adap, DVB_PLL_OPERA1))
  844. goto frontend_detach;
  845. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  846. dev->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  847. } else {
  848. dev->dvb.frontend = dvb_attach(stv0288_attach,
  849. &tevii_tuner_earda_config,
  850. &core->i2c_adap);
  851. if (dev->dvb.frontend != NULL) {
  852. if (!dvb_attach(stb6000_attach, dev->dvb.frontend, 0x61,
  853. &core->i2c_adap))
  854. goto frontend_detach;
  855. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  856. dev->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  857. }
  858. }
  859. break;
  860. case CX88_BOARD_TEVII_S460:
  861. dev->dvb.frontend = dvb_attach(cx24116_attach,
  862. &tevii_s460_config,
  863. &core->i2c_adap);
  864. if (dev->dvb.frontend != NULL) {
  865. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  866. dev->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  867. }
  868. break;
  869. case CX88_BOARD_OMICOM_SS4_PCI:
  870. dev->dvb.frontend = dvb_attach(cx24116_attach,
  871. &hauppauge_hvr4000_config,
  872. &core->i2c_adap);
  873. if (dev->dvb.frontend != NULL) {
  874. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  875. dev->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  876. }
  877. break;
  878. case CX88_BOARD_TBS_8920:
  879. dev->dvb.frontend = dvb_attach(cx24116_attach,
  880. &hauppauge_hvr4000_config,
  881. &core->i2c_adap);
  882. if (dev->dvb.frontend != NULL) {
  883. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  884. dev->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  885. }
  886. break;
  887. default:
  888. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  889. core->name);
  890. break;
  891. }
  892. if (NULL == dev->dvb.frontend) {
  893. printk(KERN_ERR
  894. "%s/2: frontend initialization failed\n",
  895. core->name);
  896. return -EINVAL;
  897. }
  898. /* define general-purpose callback pointer */
  899. dev->dvb.frontend->callback = cx88_tuner_callback;
  900. /* Ensure all frontends negotiate bus access */
  901. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  902. /* Put the analog decoder in standby to keep it quiet */
  903. cx88_call_i2c_clients(core, TUNER_SET_STANDBY, NULL);
  904. /* register everything */
  905. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev,
  906. &dev->pci->dev, adapter_nr);
  907. frontend_detach:
  908. if (dev->dvb.frontend) {
  909. dvb_frontend_detach(dev->dvb.frontend);
  910. dev->dvb.frontend = NULL;
  911. }
  912. return -EINVAL;
  913. }
  914. /* ----------------------------------------------------------- */
  915. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  916. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  917. {
  918. struct cx88_core *core = drv->core;
  919. int err = 0;
  920. dprintk( 1, "%s\n", __func__);
  921. switch (core->boardnr) {
  922. case CX88_BOARD_HAUPPAUGE_HVR1300:
  923. /* We arrive here with either the cx23416 or the cx22702
  924. * on the bus. Take the bus from the cx23416 and enable the
  925. * cx22702 demod
  926. */
  927. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  928. cx_clear(MO_GP0_IO, 0x00000004);
  929. udelay(1000);
  930. break;
  931. default:
  932. err = -ENODEV;
  933. }
  934. return err;
  935. }
  936. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  937. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  938. {
  939. struct cx88_core *core = drv->core;
  940. int err = 0;
  941. dprintk( 1, "%s\n", __func__);
  942. switch (core->boardnr) {
  943. case CX88_BOARD_HAUPPAUGE_HVR1300:
  944. /* Do Nothing, leave the cx22702 on the bus. */
  945. break;
  946. default:
  947. err = -ENODEV;
  948. }
  949. return err;
  950. }
  951. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  952. {
  953. struct cx88_core *core = drv->core;
  954. struct cx8802_dev *dev = drv->core->dvbdev;
  955. int err;
  956. dprintk( 1, "%s\n", __func__);
  957. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  958. core->boardnr,
  959. core->name,
  960. core->pci_bus,
  961. core->pci_slot);
  962. err = -ENODEV;
  963. if (!(core->board.mpeg & CX88_MPEG_DVB))
  964. goto fail_core;
  965. /* If vp3054 isn't enabled, a stub will just return 0 */
  966. err = vp3054_i2c_probe(dev);
  967. if (0 != err)
  968. goto fail_core;
  969. /* dvb stuff */
  970. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  971. videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
  972. &dev->pci->dev, &dev->slock,
  973. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  974. V4L2_FIELD_TOP,
  975. sizeof(struct cx88_buffer),
  976. dev);
  977. err = dvb_register(dev);
  978. if (err != 0)
  979. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  980. core->name, err);
  981. fail_core:
  982. return err;
  983. }
  984. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  985. {
  986. struct cx8802_dev *dev = drv->core->dvbdev;
  987. /* dvb */
  988. if (dev->dvb.frontend)
  989. videobuf_dvb_unregister(&dev->dvb);
  990. vp3054_i2c_remove(dev);
  991. return 0;
  992. }
  993. static struct cx8802_driver cx8802_dvb_driver = {
  994. .type_id = CX88_MPEG_DVB,
  995. .hw_access = CX8802_DRVCTL_SHARED,
  996. .probe = cx8802_dvb_probe,
  997. .remove = cx8802_dvb_remove,
  998. .advise_acquire = cx8802_dvb_advise_acquire,
  999. .advise_release = cx8802_dvb_advise_release,
  1000. };
  1001. static int dvb_init(void)
  1002. {
  1003. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1004. (CX88_VERSION_CODE >> 16) & 0xff,
  1005. (CX88_VERSION_CODE >> 8) & 0xff,
  1006. CX88_VERSION_CODE & 0xff);
  1007. #ifdef SNAPSHOT
  1008. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1009. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1010. #endif
  1011. return cx8802_register_driver(&cx8802_dvb_driver);
  1012. }
  1013. static void dvb_fini(void)
  1014. {
  1015. cx8802_unregister_driver(&cx8802_dvb_driver);
  1016. }
  1017. module_init(dvb_init);
  1018. module_exit(dvb_fini);
  1019. /*
  1020. * Local variables:
  1021. * c-basic-offset: 8
  1022. * compile-command: "make DVB=1"
  1023. * End:
  1024. */