mmc.h 8.9 KB

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  1. /*
  2. * Header for MultiMediaCard (MMC)
  3. *
  4. * Copyright 2002 Hewlett-Packard Company
  5. *
  6. * Use consistent with the GNU GPL is permitted,
  7. * provided that this copyright notice is
  8. * preserved in its entirety in all copies and derived works.
  9. *
  10. * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
  11. * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
  12. * FITNESS FOR ANY PARTICULAR PURPOSE.
  13. *
  14. * Many thanks to Alessandro Rubini and Jonathan Corbet!
  15. *
  16. * Based strongly on code by:
  17. *
  18. * Author: Yong-iL Joh <tolkien@mizi.com>
  19. * Date : $Date: 2002/06/18 12:37:30 $
  20. *
  21. * Author: Andrew Christian
  22. * 15 May 2002
  23. */
  24. #ifndef MMC_MMC_H
  25. #define MMC_MMC_H
  26. /* Standard MMC commands (4.1) type argument response */
  27. /* class 1 */
  28. #define MMC_GO_IDLE_STATE 0 /* bc */
  29. #define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
  30. #define MMC_ALL_SEND_CID 2 /* bcr R2 */
  31. #define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
  32. #define MMC_SET_DSR 4 /* bc [31:16] RCA */
  33. #define MMC_SWITCH 6 /* ac [31:0] See below R1b */
  34. #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
  35. #define MMC_SEND_EXT_CSD 8 /* adtc R1 */
  36. #define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
  37. #define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
  38. #define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
  39. #define MMC_STOP_TRANSMISSION 12 /* ac R1b */
  40. #define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
  41. #define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
  42. /* class 2 */
  43. #define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
  44. #define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
  45. #define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
  46. /* class 3 */
  47. #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
  48. /* class 4 */
  49. #define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
  50. #define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
  51. #define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
  52. #define MMC_PROGRAM_CID 26 /* adtc R1 */
  53. #define MMC_PROGRAM_CSD 27 /* adtc R1 */
  54. /* class 6 */
  55. #define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
  56. #define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
  57. #define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
  58. /* class 5 */
  59. #define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
  60. #define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
  61. #define MMC_ERASE 38 /* ac R1b */
  62. /* class 9 */
  63. #define MMC_FAST_IO 39 /* ac <Complex> R4 */
  64. #define MMC_GO_IRQ_STATE 40 /* bcr R5 */
  65. /* class 7 */
  66. #define MMC_LOCK_UNLOCK 42 /* adtc R1b */
  67. /* class 8 */
  68. #define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
  69. #define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
  70. /*
  71. * MMC_SWITCH argument format:
  72. *
  73. * [31:26] Always 0
  74. * [25:24] Access Mode
  75. * [23:16] Location of target Byte in EXT_CSD
  76. * [15:08] Value Byte
  77. * [07:03] Always 0
  78. * [02:00] Command Set
  79. */
  80. /*
  81. MMC status in R1
  82. Type
  83. e : error bit
  84. s : status bit
  85. r : detected and set for the actual command response
  86. x : detected and set during command execution. the host must poll
  87. the card by sending status command in order to read these bits.
  88. Clear condition
  89. a : according to the card state
  90. b : always related to the previous command. Reception of
  91. a valid command will clear it (with a delay of one command)
  92. c : clear by read
  93. */
  94. #define R1_OUT_OF_RANGE (1 << 31) /* er, c */
  95. #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
  96. #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
  97. #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
  98. #define R1_ERASE_PARAM (1 << 27) /* ex, c */
  99. #define R1_WP_VIOLATION (1 << 26) /* erx, c */
  100. #define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
  101. #define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
  102. #define R1_COM_CRC_ERROR (1 << 23) /* er, b */
  103. #define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
  104. #define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
  105. #define R1_CC_ERROR (1 << 20) /* erx, c */
  106. #define R1_ERROR (1 << 19) /* erx, c */
  107. #define R1_UNDERRUN (1 << 18) /* ex, c */
  108. #define R1_OVERRUN (1 << 17) /* ex, c */
  109. #define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
  110. #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
  111. #define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
  112. #define R1_ERASE_RESET (1 << 13) /* sr, c */
  113. #define R1_STATUS(x) (x & 0xFFFFE000)
  114. #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
  115. #define R1_READY_FOR_DATA (1 << 8) /* sx, a */
  116. #define R1_APP_CMD (1 << 5) /* sr, c */
  117. /* These are unpacked versions of the actual responses */
  118. struct _mmc_csd {
  119. u8 csd_structure;
  120. u8 spec_vers;
  121. u8 taac;
  122. u8 nsac;
  123. u8 tran_speed;
  124. u16 ccc;
  125. u8 read_bl_len;
  126. u8 read_bl_partial;
  127. u8 write_blk_misalign;
  128. u8 read_blk_misalign;
  129. u8 dsr_imp;
  130. u16 c_size;
  131. u8 vdd_r_curr_min;
  132. u8 vdd_r_curr_max;
  133. u8 vdd_w_curr_min;
  134. u8 vdd_w_curr_max;
  135. u8 c_size_mult;
  136. union {
  137. struct { /* MMC system specification version 3.1 */
  138. u8 erase_grp_size;
  139. u8 erase_grp_mult;
  140. } v31;
  141. struct { /* MMC system specification version 2.2 */
  142. u8 sector_size;
  143. u8 erase_grp_size;
  144. } v22;
  145. } erase;
  146. u8 wp_grp_size;
  147. u8 wp_grp_enable;
  148. u8 default_ecc;
  149. u8 r2w_factor;
  150. u8 write_bl_len;
  151. u8 write_bl_partial;
  152. u8 file_format_grp;
  153. u8 copy;
  154. u8 perm_write_protect;
  155. u8 tmp_write_protect;
  156. u8 file_format;
  157. u8 ecc;
  158. };
  159. /*
  160. * OCR bits are mostly in host.h
  161. */
  162. #define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */
  163. /*
  164. * Card Command Classes (CCC)
  165. */
  166. #define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
  167. /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
  168. #define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
  169. /* (CMD11) */
  170. #define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */
  171. /* (CMD16,17,18) */
  172. #define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */
  173. /* (CMD20) */
  174. #define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */
  175. /* (CMD16,24,25,26,27) */
  176. #define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */
  177. /* (CMD32,33,34,35,36,37,38,39) */
  178. #define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */
  179. /* (CMD28,29,30) */
  180. #define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */
  181. /* (CMD16,CMD42) */
  182. #define CCC_APP_SPEC (1<<8) /* (8) Application specific */
  183. /* (CMD55,56,57,ACMD*) */
  184. #define CCC_IO_MODE (1<<9) /* (9) I/O mode */
  185. /* (CMD5,39,40,52,53) */
  186. #define CCC_SWITCH (1<<10) /* (10) High speed switch */
  187. /* (CMD6,34,35,36,37,50) */
  188. /* (11) Reserved */
  189. /* (CMD?) */
  190. /*
  191. * CSD field definitions
  192. */
  193. #define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */
  194. #define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */
  195. #define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
  196. #define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */
  197. #define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */
  198. #define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */
  199. #define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */
  200. #define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */
  201. #define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */
  202. /*
  203. * EXT_CSD fields
  204. */
  205. #define EXT_CSD_BUS_WIDTH 183 /* R/W */
  206. #define EXT_CSD_HS_TIMING 185 /* R/W */
  207. #define EXT_CSD_CARD_TYPE 196 /* RO */
  208. #define EXT_CSD_REV 192 /* RO */
  209. #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
  210. /*
  211. * EXT_CSD field definitions
  212. */
  213. #define EXT_CSD_CMD_SET_NORMAL (1<<0)
  214. #define EXT_CSD_CMD_SET_SECURE (1<<1)
  215. #define EXT_CSD_CMD_SET_CPSECURE (1<<2)
  216. #define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
  217. #define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
  218. #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
  219. #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
  220. #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
  221. /*
  222. * MMC_SWITCH access modes
  223. */
  224. #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
  225. #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
  226. #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
  227. #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
  228. #endif /* MMC_MMC_PROTOCOL_H */