copypage-v4wt.c 2.0 KB

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  1. /*
  2. * linux/arch/arm/mm/copypage-v4wt.S
  3. *
  4. * Copyright (C) 1995-1999 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This is for CPUs with a writethrough cache and 'flush ID cache' is
  11. * the only supported cache operation.
  12. */
  13. #include <linux/init.h>
  14. #include <asm/page.h>
  15. /*
  16. * ARMv4 optimised copy_user_page
  17. *
  18. * Since we have writethrough caches, we don't have to worry about
  19. * dirty data in the cache. However, we do have to ensure that
  20. * subsequent reads are up to date.
  21. */
  22. void __attribute__((naked))
  23. v4wt_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
  24. {
  25. asm("\
  26. stmfd sp!, {r4, lr} @ 2\n\
  27. mov r2, %0 @ 1\n\
  28. ldmia r1!, {r3, r4, ip, lr} @ 4\n\
  29. 1: stmia r0!, {r3, r4, ip, lr} @ 4\n\
  30. ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\
  31. stmia r0!, {r3, r4, ip, lr} @ 4\n\
  32. ldmia r1!, {r3, r4, ip, lr} @ 4\n\
  33. stmia r0!, {r3, r4, ip, lr} @ 4\n\
  34. ldmia r1!, {r3, r4, ip, lr} @ 4\n\
  35. subs r2, r2, #1 @ 1\n\
  36. stmia r0!, {r3, r4, ip, lr} @ 4\n\
  37. ldmneia r1!, {r3, r4, ip, lr} @ 4\n\
  38. bne 1b @ 1\n\
  39. mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
  40. ldmfd sp!, {r4, pc} @ 3"
  41. :
  42. : "I" (PAGE_SIZE / 64));
  43. }
  44. /*
  45. * ARMv4 optimised clear_user_page
  46. *
  47. * Same story as above.
  48. */
  49. void __attribute__((naked))
  50. v4wt_clear_user_page(void *kaddr, unsigned long vaddr)
  51. {
  52. asm("\
  53. str lr, [sp, #-4]!\n\
  54. mov r1, %0 @ 1\n\
  55. mov r2, #0 @ 1\n\
  56. mov r3, #0 @ 1\n\
  57. mov ip, #0 @ 1\n\
  58. mov lr, #0 @ 1\n\
  59. 1: stmia r0!, {r2, r3, ip, lr} @ 4\n\
  60. stmia r0!, {r2, r3, ip, lr} @ 4\n\
  61. stmia r0!, {r2, r3, ip, lr} @ 4\n\
  62. stmia r0!, {r2, r3, ip, lr} @ 4\n\
  63. subs r1, r1, #1 @ 1\n\
  64. bne 1b @ 1\n\
  65. mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\
  66. ldr pc, [sp], #4"
  67. :
  68. : "I" (PAGE_SIZE / 64));
  69. }
  70. struct cpu_user_fns v4wt_user_fns __initdata = {
  71. .cpu_clear_user_page = v4wt_clear_user_page,
  72. .cpu_copy_user_page = v4wt_copy_user_page,
  73. };