qla_init.c 128 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /* SRB Extensions ---------------------------------------------------------- */
  36. static void
  37. qla2x00_ctx_sp_timeout(unsigned long __data)
  38. {
  39. srb_t *sp = (srb_t *)__data;
  40. struct srb_ctx *ctx;
  41. fc_port_t *fcport = sp->fcport;
  42. struct qla_hw_data *ha = fcport->vha->hw;
  43. struct req_que *req;
  44. unsigned long flags;
  45. spin_lock_irqsave(&ha->hardware_lock, flags);
  46. req = ha->req_q_map[0];
  47. req->outstanding_cmds[sp->handle] = NULL;
  48. ctx = sp->ctx;
  49. ctx->timeout(sp);
  50. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  51. ctx->free(sp);
  52. }
  53. void
  54. qla2x00_ctx_sp_free(srb_t *sp)
  55. {
  56. struct srb_ctx *ctx = sp->ctx;
  57. kfree(ctx);
  58. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  59. }
  60. inline srb_t *
  61. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  62. unsigned long tmo)
  63. {
  64. srb_t *sp;
  65. struct qla_hw_data *ha = vha->hw;
  66. struct srb_ctx *ctx;
  67. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  68. if (!sp)
  69. goto done;
  70. ctx = kzalloc(size, GFP_KERNEL);
  71. if (!ctx) {
  72. mempool_free(sp, ha->srb_mempool);
  73. goto done;
  74. }
  75. memset(sp, 0, sizeof(*sp));
  76. sp->fcport = fcport;
  77. sp->ctx = ctx;
  78. ctx->free = qla2x00_ctx_sp_free;
  79. init_timer(&ctx->timer);
  80. if (!tmo)
  81. goto done;
  82. ctx->timer.expires = jiffies + tmo * HZ;
  83. ctx->timer.data = (unsigned long)sp;
  84. ctx->timer.function = qla2x00_ctx_sp_timeout;
  85. add_timer(&ctx->timer);
  86. done:
  87. return sp;
  88. }
  89. /* Asynchronous Login/Logout Routines -------------------------------------- */
  90. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  91. static void
  92. qla2x00_async_logio_timeout(srb_t *sp)
  93. {
  94. fc_port_t *fcport = sp->fcport;
  95. struct srb_logio *lio = sp->ctx;
  96. DEBUG2(printk(KERN_WARNING
  97. "scsi(%ld:%x): Async-%s timeout.\n",
  98. fcport->vha->host_no, sp->handle,
  99. lio->ctx.type == SRB_LOGIN_CMD ? "login": "logout"));
  100. if (lio->ctx.type == SRB_LOGIN_CMD)
  101. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  102. }
  103. int
  104. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  105. uint16_t *data)
  106. {
  107. struct qla_hw_data *ha = vha->hw;
  108. srb_t *sp;
  109. struct srb_logio *lio;
  110. int rval;
  111. rval = QLA_FUNCTION_FAILED;
  112. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  113. ELS_TMO_2_RATOV(ha) + 2);
  114. if (!sp)
  115. goto done;
  116. lio = sp->ctx;
  117. lio->ctx.type = SRB_LOGIN_CMD;
  118. lio->ctx.timeout = qla2x00_async_logio_timeout;
  119. lio->flags |= SRB_LOGIN_COND_PLOGI;
  120. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  121. lio->flags |= SRB_LOGIN_RETRIED;
  122. rval = qla2x00_start_sp(sp);
  123. if (rval != QLA_SUCCESS)
  124. goto done_free_sp;
  125. DEBUG2(printk(KERN_DEBUG
  126. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  127. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  128. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  129. fcport->login_retry));
  130. return rval;
  131. done_free_sp:
  132. del_timer_sync(&lio->ctx.timer);
  133. lio->ctx.free(sp);
  134. done:
  135. return rval;
  136. }
  137. int
  138. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  139. {
  140. struct qla_hw_data *ha = vha->hw;
  141. srb_t *sp;
  142. struct srb_logio *lio;
  143. int rval;
  144. rval = QLA_FUNCTION_FAILED;
  145. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  146. ELS_TMO_2_RATOV(ha) + 2);
  147. if (!sp)
  148. goto done;
  149. lio = sp->ctx;
  150. lio->ctx.type = SRB_LOGOUT_CMD;
  151. lio->ctx.timeout = qla2x00_async_logio_timeout;
  152. rval = qla2x00_start_sp(sp);
  153. if (rval != QLA_SUCCESS)
  154. goto done_free_sp;
  155. DEBUG2(printk(KERN_DEBUG
  156. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  157. fcport->vha->host_no, sp->handle, fcport->loop_id,
  158. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  159. return rval;
  160. done_free_sp:
  161. del_timer_sync(&lio->ctx.timer);
  162. lio->ctx.free(sp);
  163. done:
  164. return rval;
  165. }
  166. int
  167. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  168. uint16_t *data)
  169. {
  170. int rval;
  171. uint8_t opts = 0;
  172. switch (data[0]) {
  173. case MBS_COMMAND_COMPLETE:
  174. if (fcport->flags & FCF_FCP2_DEVICE)
  175. opts |= BIT_1;
  176. rval = qla2x00_get_port_database(vha, fcport, opts);
  177. if (rval != QLA_SUCCESS)
  178. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  179. else
  180. qla2x00_update_fcport(vha, fcport);
  181. break;
  182. case MBS_COMMAND_ERROR:
  183. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  184. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  185. else
  186. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  187. break;
  188. case MBS_PORT_ID_USED:
  189. fcport->loop_id = data[1];
  190. qla2x00_post_async_login_work(vha, fcport, NULL);
  191. break;
  192. case MBS_LOOP_ID_USED:
  193. fcport->loop_id++;
  194. rval = qla2x00_find_new_loop_id(vha, fcport);
  195. if (rval != QLA_SUCCESS) {
  196. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  197. break;
  198. }
  199. qla2x00_post_async_login_work(vha, fcport, NULL);
  200. break;
  201. }
  202. return QLA_SUCCESS;
  203. }
  204. int
  205. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  206. uint16_t *data)
  207. {
  208. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  209. return QLA_SUCCESS;
  210. }
  211. /****************************************************************************/
  212. /* QLogic ISP2x00 Hardware Support Functions. */
  213. /****************************************************************************/
  214. /*
  215. * qla2x00_initialize_adapter
  216. * Initialize board.
  217. *
  218. * Input:
  219. * ha = adapter block pointer.
  220. *
  221. * Returns:
  222. * 0 = success
  223. */
  224. int
  225. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  226. {
  227. int rval;
  228. struct qla_hw_data *ha = vha->hw;
  229. struct req_que *req = ha->req_q_map[0];
  230. /* Clear adapter flags. */
  231. vha->flags.online = 0;
  232. ha->flags.chip_reset_done = 0;
  233. vha->flags.reset_active = 0;
  234. ha->flags.pci_channel_io_perm_failure = 0;
  235. ha->flags.eeh_busy = 0;
  236. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  237. atomic_set(&vha->loop_state, LOOP_DOWN);
  238. vha->device_flags = DFLG_NO_CABLE;
  239. vha->dpc_flags = 0;
  240. vha->flags.management_server_logged_in = 0;
  241. vha->marker_needed = 0;
  242. ha->isp_abort_cnt = 0;
  243. ha->beacon_blink_led = 0;
  244. set_bit(0, ha->req_qid_map);
  245. set_bit(0, ha->rsp_qid_map);
  246. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  247. rval = ha->isp_ops->pci_config(vha);
  248. if (rval) {
  249. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  250. vha->host_no));
  251. return (rval);
  252. }
  253. ha->isp_ops->reset_chip(vha);
  254. rval = qla2xxx_get_flash_info(vha);
  255. if (rval) {
  256. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  257. vha->host_no));
  258. return (rval);
  259. }
  260. ha->isp_ops->get_flash_version(vha, req->ring);
  261. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  262. ha->isp_ops->nvram_config(vha);
  263. if (ha->flags.disable_serdes) {
  264. /* Mask HBA via NVRAM settings? */
  265. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  266. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  267. vha->port_name[0], vha->port_name[1],
  268. vha->port_name[2], vha->port_name[3],
  269. vha->port_name[4], vha->port_name[5],
  270. vha->port_name[6], vha->port_name[7]);
  271. return QLA_FUNCTION_FAILED;
  272. }
  273. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  274. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  275. rval = ha->isp_ops->chip_diag(vha);
  276. if (rval)
  277. return (rval);
  278. rval = qla2x00_setup_chip(vha);
  279. if (rval)
  280. return (rval);
  281. }
  282. if (IS_QLA84XX(ha)) {
  283. ha->cs84xx = qla84xx_get_chip(vha);
  284. if (!ha->cs84xx) {
  285. qla_printk(KERN_ERR, ha,
  286. "Unable to configure ISP84XX.\n");
  287. return QLA_FUNCTION_FAILED;
  288. }
  289. }
  290. rval = qla2x00_init_rings(vha);
  291. ha->flags.chip_reset_done = 1;
  292. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  293. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  294. rval = qla84xx_init_chip(vha);
  295. if (rval != QLA_SUCCESS) {
  296. qla_printk(KERN_ERR, ha,
  297. "Unable to initialize ISP84XX.\n");
  298. qla84xx_put_chip(vha);
  299. }
  300. }
  301. return (rval);
  302. }
  303. /**
  304. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  305. * @ha: HA context
  306. *
  307. * Returns 0 on success.
  308. */
  309. int
  310. qla2100_pci_config(scsi_qla_host_t *vha)
  311. {
  312. uint16_t w;
  313. unsigned long flags;
  314. struct qla_hw_data *ha = vha->hw;
  315. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  316. pci_set_master(ha->pdev);
  317. pci_try_set_mwi(ha->pdev);
  318. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  319. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  320. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  321. pci_disable_rom(ha->pdev);
  322. /* Get PCI bus information. */
  323. spin_lock_irqsave(&ha->hardware_lock, flags);
  324. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  325. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  326. return QLA_SUCCESS;
  327. }
  328. /**
  329. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  330. * @ha: HA context
  331. *
  332. * Returns 0 on success.
  333. */
  334. int
  335. qla2300_pci_config(scsi_qla_host_t *vha)
  336. {
  337. uint16_t w;
  338. unsigned long flags = 0;
  339. uint32_t cnt;
  340. struct qla_hw_data *ha = vha->hw;
  341. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  342. pci_set_master(ha->pdev);
  343. pci_try_set_mwi(ha->pdev);
  344. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  345. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  346. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  347. w &= ~PCI_COMMAND_INTX_DISABLE;
  348. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  349. /*
  350. * If this is a 2300 card and not 2312, reset the
  351. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  352. * the 2310 also reports itself as a 2300 so we need to get the
  353. * fb revision level -- a 6 indicates it really is a 2300 and
  354. * not a 2310.
  355. */
  356. if (IS_QLA2300(ha)) {
  357. spin_lock_irqsave(&ha->hardware_lock, flags);
  358. /* Pause RISC. */
  359. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  360. for (cnt = 0; cnt < 30000; cnt++) {
  361. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  362. break;
  363. udelay(10);
  364. }
  365. /* Select FPM registers. */
  366. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  367. RD_REG_WORD(&reg->ctrl_status);
  368. /* Get the fb rev level */
  369. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  370. if (ha->fb_rev == FPM_2300)
  371. pci_clear_mwi(ha->pdev);
  372. /* Deselect FPM registers. */
  373. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  374. RD_REG_WORD(&reg->ctrl_status);
  375. /* Release RISC module. */
  376. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  377. for (cnt = 0; cnt < 30000; cnt++) {
  378. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  379. break;
  380. udelay(10);
  381. }
  382. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  383. }
  384. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  385. pci_disable_rom(ha->pdev);
  386. /* Get PCI bus information. */
  387. spin_lock_irqsave(&ha->hardware_lock, flags);
  388. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  389. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  390. return QLA_SUCCESS;
  391. }
  392. /**
  393. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  394. * @ha: HA context
  395. *
  396. * Returns 0 on success.
  397. */
  398. int
  399. qla24xx_pci_config(scsi_qla_host_t *vha)
  400. {
  401. uint16_t w;
  402. unsigned long flags = 0;
  403. struct qla_hw_data *ha = vha->hw;
  404. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  405. pci_set_master(ha->pdev);
  406. pci_try_set_mwi(ha->pdev);
  407. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  408. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  409. w &= ~PCI_COMMAND_INTX_DISABLE;
  410. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  411. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  412. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  413. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  414. pcix_set_mmrbc(ha->pdev, 2048);
  415. /* PCIe -- adjust Maximum Read Request Size (2048). */
  416. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  417. pcie_set_readrq(ha->pdev, 2048);
  418. pci_disable_rom(ha->pdev);
  419. ha->chip_revision = ha->pdev->revision;
  420. /* Get PCI bus information. */
  421. spin_lock_irqsave(&ha->hardware_lock, flags);
  422. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  423. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  424. return QLA_SUCCESS;
  425. }
  426. /**
  427. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  428. * @ha: HA context
  429. *
  430. * Returns 0 on success.
  431. */
  432. int
  433. qla25xx_pci_config(scsi_qla_host_t *vha)
  434. {
  435. uint16_t w;
  436. struct qla_hw_data *ha = vha->hw;
  437. pci_set_master(ha->pdev);
  438. pci_try_set_mwi(ha->pdev);
  439. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  440. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  441. w &= ~PCI_COMMAND_INTX_DISABLE;
  442. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  443. /* PCIe -- adjust Maximum Read Request Size (2048). */
  444. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  445. pcie_set_readrq(ha->pdev, 2048);
  446. pci_disable_rom(ha->pdev);
  447. ha->chip_revision = ha->pdev->revision;
  448. return QLA_SUCCESS;
  449. }
  450. /**
  451. * qla2x00_isp_firmware() - Choose firmware image.
  452. * @ha: HA context
  453. *
  454. * Returns 0 on success.
  455. */
  456. static int
  457. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  458. {
  459. int rval;
  460. uint16_t loop_id, topo, sw_cap;
  461. uint8_t domain, area, al_pa;
  462. struct qla_hw_data *ha = vha->hw;
  463. /* Assume loading risc code */
  464. rval = QLA_FUNCTION_FAILED;
  465. if (ha->flags.disable_risc_code_load) {
  466. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  467. vha->host_no));
  468. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  469. /* Verify checksum of loaded RISC code. */
  470. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  471. if (rval == QLA_SUCCESS) {
  472. /* And, verify we are not in ROM code. */
  473. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  474. &area, &domain, &topo, &sw_cap);
  475. }
  476. }
  477. if (rval) {
  478. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  479. vha->host_no));
  480. }
  481. return (rval);
  482. }
  483. /**
  484. * qla2x00_reset_chip() - Reset ISP chip.
  485. * @ha: HA context
  486. *
  487. * Returns 0 on success.
  488. */
  489. void
  490. qla2x00_reset_chip(scsi_qla_host_t *vha)
  491. {
  492. unsigned long flags = 0;
  493. struct qla_hw_data *ha = vha->hw;
  494. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  495. uint32_t cnt;
  496. uint16_t cmd;
  497. if (unlikely(pci_channel_offline(ha->pdev)))
  498. return;
  499. ha->isp_ops->disable_intrs(ha);
  500. spin_lock_irqsave(&ha->hardware_lock, flags);
  501. /* Turn off master enable */
  502. cmd = 0;
  503. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  504. cmd &= ~PCI_COMMAND_MASTER;
  505. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  506. if (!IS_QLA2100(ha)) {
  507. /* Pause RISC. */
  508. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  509. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  510. for (cnt = 0; cnt < 30000; cnt++) {
  511. if ((RD_REG_WORD(&reg->hccr) &
  512. HCCR_RISC_PAUSE) != 0)
  513. break;
  514. udelay(100);
  515. }
  516. } else {
  517. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  518. udelay(10);
  519. }
  520. /* Select FPM registers. */
  521. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  522. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  523. /* FPM Soft Reset. */
  524. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  525. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  526. /* Toggle Fpm Reset. */
  527. if (!IS_QLA2200(ha)) {
  528. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  529. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  530. }
  531. /* Select frame buffer registers. */
  532. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  533. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  534. /* Reset frame buffer FIFOs. */
  535. if (IS_QLA2200(ha)) {
  536. WRT_FB_CMD_REG(ha, reg, 0xa000);
  537. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  538. } else {
  539. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  540. /* Read back fb_cmd until zero or 3 seconds max */
  541. for (cnt = 0; cnt < 3000; cnt++) {
  542. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  543. break;
  544. udelay(100);
  545. }
  546. }
  547. /* Select RISC module registers. */
  548. WRT_REG_WORD(&reg->ctrl_status, 0);
  549. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  550. /* Reset RISC processor. */
  551. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  552. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  553. /* Release RISC processor. */
  554. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  555. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  556. }
  557. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  558. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  559. /* Reset ISP chip. */
  560. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  561. /* Wait for RISC to recover from reset. */
  562. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  563. /*
  564. * It is necessary to for a delay here since the card doesn't
  565. * respond to PCI reads during a reset. On some architectures
  566. * this will result in an MCA.
  567. */
  568. udelay(20);
  569. for (cnt = 30000; cnt; cnt--) {
  570. if ((RD_REG_WORD(&reg->ctrl_status) &
  571. CSR_ISP_SOFT_RESET) == 0)
  572. break;
  573. udelay(100);
  574. }
  575. } else
  576. udelay(10);
  577. /* Reset RISC processor. */
  578. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  579. WRT_REG_WORD(&reg->semaphore, 0);
  580. /* Release RISC processor. */
  581. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  582. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  583. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  584. for (cnt = 0; cnt < 30000; cnt++) {
  585. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  586. break;
  587. udelay(100);
  588. }
  589. } else
  590. udelay(100);
  591. /* Turn on master enable */
  592. cmd |= PCI_COMMAND_MASTER;
  593. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  594. /* Disable RISC pause on FPM parity error. */
  595. if (!IS_QLA2100(ha)) {
  596. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  597. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  598. }
  599. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  600. }
  601. /**
  602. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  603. * @ha: HA context
  604. *
  605. * Returns 0 on success.
  606. */
  607. static inline void
  608. qla24xx_reset_risc(scsi_qla_host_t *vha)
  609. {
  610. unsigned long flags = 0;
  611. struct qla_hw_data *ha = vha->hw;
  612. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  613. uint32_t cnt, d2;
  614. uint16_t wd;
  615. spin_lock_irqsave(&ha->hardware_lock, flags);
  616. /* Reset RISC. */
  617. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  618. for (cnt = 0; cnt < 30000; cnt++) {
  619. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  620. break;
  621. udelay(10);
  622. }
  623. WRT_REG_DWORD(&reg->ctrl_status,
  624. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  625. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  626. udelay(100);
  627. /* Wait for firmware to complete NVRAM accesses. */
  628. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  629. for (cnt = 10000 ; cnt && d2; cnt--) {
  630. udelay(5);
  631. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  632. barrier();
  633. }
  634. /* Wait for soft-reset to complete. */
  635. d2 = RD_REG_DWORD(&reg->ctrl_status);
  636. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  637. udelay(5);
  638. d2 = RD_REG_DWORD(&reg->ctrl_status);
  639. barrier();
  640. }
  641. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  642. RD_REG_DWORD(&reg->hccr);
  643. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  644. RD_REG_DWORD(&reg->hccr);
  645. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  646. RD_REG_DWORD(&reg->hccr);
  647. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  648. for (cnt = 6000000 ; cnt && d2; cnt--) {
  649. udelay(5);
  650. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  651. barrier();
  652. }
  653. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  654. if (IS_NOPOLLING_TYPE(ha))
  655. ha->isp_ops->enable_intrs(ha);
  656. }
  657. /**
  658. * qla24xx_reset_chip() - Reset ISP24xx chip.
  659. * @ha: HA context
  660. *
  661. * Returns 0 on success.
  662. */
  663. void
  664. qla24xx_reset_chip(scsi_qla_host_t *vha)
  665. {
  666. struct qla_hw_data *ha = vha->hw;
  667. if (pci_channel_offline(ha->pdev) &&
  668. ha->flags.pci_channel_io_perm_failure) {
  669. return;
  670. }
  671. ha->isp_ops->disable_intrs(ha);
  672. /* Perform RISC reset. */
  673. qla24xx_reset_risc(vha);
  674. }
  675. /**
  676. * qla2x00_chip_diag() - Test chip for proper operation.
  677. * @ha: HA context
  678. *
  679. * Returns 0 on success.
  680. */
  681. int
  682. qla2x00_chip_diag(scsi_qla_host_t *vha)
  683. {
  684. int rval;
  685. struct qla_hw_data *ha = vha->hw;
  686. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  687. unsigned long flags = 0;
  688. uint16_t data;
  689. uint32_t cnt;
  690. uint16_t mb[5];
  691. struct req_que *req = ha->req_q_map[0];
  692. /* Assume a failed state */
  693. rval = QLA_FUNCTION_FAILED;
  694. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  695. vha->host_no, (u_long)&reg->flash_address));
  696. spin_lock_irqsave(&ha->hardware_lock, flags);
  697. /* Reset ISP chip. */
  698. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  699. /*
  700. * We need to have a delay here since the card will not respond while
  701. * in reset causing an MCA on some architectures.
  702. */
  703. udelay(20);
  704. data = qla2x00_debounce_register(&reg->ctrl_status);
  705. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  706. udelay(5);
  707. data = RD_REG_WORD(&reg->ctrl_status);
  708. barrier();
  709. }
  710. if (!cnt)
  711. goto chip_diag_failed;
  712. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  713. vha->host_no));
  714. /* Reset RISC processor. */
  715. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  716. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  717. /* Workaround for QLA2312 PCI parity error */
  718. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  719. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  720. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  721. udelay(5);
  722. data = RD_MAILBOX_REG(ha, reg, 0);
  723. barrier();
  724. }
  725. } else
  726. udelay(10);
  727. if (!cnt)
  728. goto chip_diag_failed;
  729. /* Check product ID of chip */
  730. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  731. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  732. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  733. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  734. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  735. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  736. mb[3] != PROD_ID_3) {
  737. qla_printk(KERN_WARNING, ha,
  738. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  739. goto chip_diag_failed;
  740. }
  741. ha->product_id[0] = mb[1];
  742. ha->product_id[1] = mb[2];
  743. ha->product_id[2] = mb[3];
  744. ha->product_id[3] = mb[4];
  745. /* Adjust fw RISC transfer size */
  746. if (req->length > 1024)
  747. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  748. else
  749. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  750. req->length;
  751. if (IS_QLA2200(ha) &&
  752. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  753. /* Limit firmware transfer size with a 2200A */
  754. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  755. vha->host_no));
  756. ha->device_type |= DT_ISP2200A;
  757. ha->fw_transfer_size = 128;
  758. }
  759. /* Wrap Incoming Mailboxes Test. */
  760. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  761. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  762. rval = qla2x00_mbx_reg_test(vha);
  763. if (rval) {
  764. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  765. vha->host_no));
  766. qla_printk(KERN_WARNING, ha,
  767. "Failed mailbox send register test\n");
  768. }
  769. else {
  770. /* Flag a successful rval */
  771. rval = QLA_SUCCESS;
  772. }
  773. spin_lock_irqsave(&ha->hardware_lock, flags);
  774. chip_diag_failed:
  775. if (rval)
  776. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  777. "****\n", vha->host_no));
  778. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  779. return (rval);
  780. }
  781. /**
  782. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  783. * @ha: HA context
  784. *
  785. * Returns 0 on success.
  786. */
  787. int
  788. qla24xx_chip_diag(scsi_qla_host_t *vha)
  789. {
  790. int rval;
  791. struct qla_hw_data *ha = vha->hw;
  792. struct req_que *req = ha->req_q_map[0];
  793. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  794. rval = qla2x00_mbx_reg_test(vha);
  795. if (rval) {
  796. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  797. vha->host_no));
  798. qla_printk(KERN_WARNING, ha,
  799. "Failed mailbox send register test\n");
  800. } else {
  801. /* Flag a successful rval */
  802. rval = QLA_SUCCESS;
  803. }
  804. return rval;
  805. }
  806. void
  807. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  808. {
  809. int rval;
  810. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  811. eft_size, fce_size, mq_size;
  812. dma_addr_t tc_dma;
  813. void *tc;
  814. struct qla_hw_data *ha = vha->hw;
  815. struct req_que *req = ha->req_q_map[0];
  816. struct rsp_que *rsp = ha->rsp_q_map[0];
  817. if (ha->fw_dump) {
  818. qla_printk(KERN_WARNING, ha,
  819. "Firmware dump previously allocated.\n");
  820. return;
  821. }
  822. ha->fw_dumped = 0;
  823. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  824. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  825. fixed_size = sizeof(struct qla2100_fw_dump);
  826. } else if (IS_QLA23XX(ha)) {
  827. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  828. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  829. sizeof(uint16_t);
  830. } else if (IS_FWI2_CAPABLE(ha)) {
  831. if (IS_QLA81XX(ha))
  832. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  833. else if (IS_QLA25XX(ha))
  834. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  835. else
  836. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  837. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  838. sizeof(uint32_t);
  839. if (ha->mqenable)
  840. mq_size = sizeof(struct qla2xxx_mq_chain);
  841. /* Allocate memory for Fibre Channel Event Buffer. */
  842. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  843. goto try_eft;
  844. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  845. GFP_KERNEL);
  846. if (!tc) {
  847. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  848. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  849. goto try_eft;
  850. }
  851. memset(tc, 0, FCE_SIZE);
  852. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  853. ha->fce_mb, &ha->fce_bufs);
  854. if (rval) {
  855. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  856. "FCE (%d).\n", rval);
  857. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  858. tc_dma);
  859. ha->flags.fce_enabled = 0;
  860. goto try_eft;
  861. }
  862. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  863. FCE_SIZE / 1024);
  864. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  865. ha->flags.fce_enabled = 1;
  866. ha->fce_dma = tc_dma;
  867. ha->fce = tc;
  868. try_eft:
  869. /* Allocate memory for Extended Trace Buffer. */
  870. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  871. GFP_KERNEL);
  872. if (!tc) {
  873. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  874. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  875. goto cont_alloc;
  876. }
  877. memset(tc, 0, EFT_SIZE);
  878. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  879. if (rval) {
  880. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  881. "EFT (%d).\n", rval);
  882. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  883. tc_dma);
  884. goto cont_alloc;
  885. }
  886. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  887. EFT_SIZE / 1024);
  888. eft_size = EFT_SIZE;
  889. ha->eft_dma = tc_dma;
  890. ha->eft = tc;
  891. }
  892. cont_alloc:
  893. req_q_size = req->length * sizeof(request_t);
  894. rsp_q_size = rsp->length * sizeof(response_t);
  895. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  896. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  897. ha->chain_offset = dump_size;
  898. dump_size += mq_size + fce_size;
  899. ha->fw_dump = vmalloc(dump_size);
  900. if (!ha->fw_dump) {
  901. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  902. "firmware dump!!!\n", dump_size / 1024);
  903. if (ha->eft) {
  904. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  905. ha->eft_dma);
  906. ha->eft = NULL;
  907. ha->eft_dma = 0;
  908. }
  909. return;
  910. }
  911. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  912. dump_size / 1024);
  913. ha->fw_dump_len = dump_size;
  914. ha->fw_dump->signature[0] = 'Q';
  915. ha->fw_dump->signature[1] = 'L';
  916. ha->fw_dump->signature[2] = 'G';
  917. ha->fw_dump->signature[3] = 'C';
  918. ha->fw_dump->version = __constant_htonl(1);
  919. ha->fw_dump->fixed_size = htonl(fixed_size);
  920. ha->fw_dump->mem_size = htonl(mem_size);
  921. ha->fw_dump->req_q_size = htonl(req_q_size);
  922. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  923. ha->fw_dump->eft_size = htonl(eft_size);
  924. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  925. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  926. ha->fw_dump->header_size =
  927. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  928. }
  929. static int
  930. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  931. {
  932. #define MPS_MASK 0xe0
  933. int rval;
  934. uint16_t dc;
  935. uint32_t dw;
  936. struct qla_hw_data *ha = vha->hw;
  937. if (!IS_QLA81XX(vha->hw))
  938. return QLA_SUCCESS;
  939. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  940. if (rval != QLA_SUCCESS) {
  941. DEBUG2(qla_printk(KERN_WARNING, ha,
  942. "Sync-MPI: Unable to acquire semaphore.\n"));
  943. goto done;
  944. }
  945. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  946. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  947. if (rval != QLA_SUCCESS) {
  948. DEBUG2(qla_printk(KERN_WARNING, ha,
  949. "Sync-MPI: Unable to read sync.\n"));
  950. goto done_release;
  951. }
  952. dc &= MPS_MASK;
  953. if (dc == (dw & MPS_MASK))
  954. goto done_release;
  955. dw &= ~MPS_MASK;
  956. dw |= dc;
  957. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  958. if (rval != QLA_SUCCESS) {
  959. DEBUG2(qla_printk(KERN_WARNING, ha,
  960. "Sync-MPI: Unable to gain sync.\n"));
  961. }
  962. done_release:
  963. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  964. if (rval != QLA_SUCCESS) {
  965. DEBUG2(qla_printk(KERN_WARNING, ha,
  966. "Sync-MPI: Unable to release semaphore.\n"));
  967. }
  968. done:
  969. return rval;
  970. }
  971. /**
  972. * qla2x00_setup_chip() - Load and start RISC firmware.
  973. * @ha: HA context
  974. *
  975. * Returns 0 on success.
  976. */
  977. static int
  978. qla2x00_setup_chip(scsi_qla_host_t *vha)
  979. {
  980. int rval;
  981. uint32_t srisc_address = 0;
  982. struct qla_hw_data *ha = vha->hw;
  983. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  984. unsigned long flags;
  985. uint16_t fw_major_version;
  986. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  987. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  988. spin_lock_irqsave(&ha->hardware_lock, flags);
  989. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  990. RD_REG_WORD(&reg->hccr);
  991. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  992. }
  993. qla81xx_mpi_sync(vha);
  994. /* Load firmware sequences */
  995. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  996. if (rval == QLA_SUCCESS) {
  997. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  998. "code.\n", vha->host_no));
  999. rval = qla2x00_verify_checksum(vha, srisc_address);
  1000. if (rval == QLA_SUCCESS) {
  1001. /* Start firmware execution. */
  1002. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1003. "firmware.\n", vha->host_no));
  1004. rval = qla2x00_execute_fw(vha, srisc_address);
  1005. /* Retrieve firmware information. */
  1006. if (rval == QLA_SUCCESS) {
  1007. fw_major_version = ha->fw_major_version;
  1008. rval = qla2x00_get_fw_version(vha,
  1009. &ha->fw_major_version,
  1010. &ha->fw_minor_version,
  1011. &ha->fw_subminor_version,
  1012. &ha->fw_attributes, &ha->fw_memory_size,
  1013. ha->mpi_version, &ha->mpi_capabilities,
  1014. ha->phy_version);
  1015. if (rval != QLA_SUCCESS)
  1016. goto failed;
  1017. ha->flags.npiv_supported = 0;
  1018. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1019. (ha->fw_attributes & BIT_2)) {
  1020. ha->flags.npiv_supported = 1;
  1021. if ((!ha->max_npiv_vports) ||
  1022. ((ha->max_npiv_vports + 1) %
  1023. MIN_MULTI_ID_FABRIC))
  1024. ha->max_npiv_vports =
  1025. MIN_MULTI_ID_FABRIC - 1;
  1026. }
  1027. qla2x00_get_resource_cnts(vha, NULL,
  1028. &ha->fw_xcb_count, NULL, NULL,
  1029. &ha->max_npiv_vports, NULL);
  1030. if (!fw_major_version && ql2xallocfwdump)
  1031. qla2x00_alloc_fw_dump(vha);
  1032. }
  1033. } else {
  1034. DEBUG2(printk(KERN_INFO
  1035. "scsi(%ld): ISP Firmware failed checksum.\n",
  1036. vha->host_no));
  1037. }
  1038. }
  1039. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1040. /* Enable proper parity. */
  1041. spin_lock_irqsave(&ha->hardware_lock, flags);
  1042. if (IS_QLA2300(ha))
  1043. /* SRAM parity */
  1044. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1045. else
  1046. /* SRAM, Instruction RAM and GP RAM parity */
  1047. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1048. RD_REG_WORD(&reg->hccr);
  1049. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1050. }
  1051. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1052. uint32_t size;
  1053. rval = qla81xx_fac_get_sector_size(vha, &size);
  1054. if (rval == QLA_SUCCESS) {
  1055. ha->flags.fac_supported = 1;
  1056. ha->fdt_block_size = size << 2;
  1057. } else {
  1058. qla_printk(KERN_ERR, ha,
  1059. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1060. ha->fw_major_version, ha->fw_minor_version,
  1061. ha->fw_subminor_version);
  1062. }
  1063. }
  1064. failed:
  1065. if (rval) {
  1066. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1067. vha->host_no));
  1068. }
  1069. return (rval);
  1070. }
  1071. /**
  1072. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1073. * @ha: HA context
  1074. *
  1075. * Beginning of request ring has initialization control block already built
  1076. * by nvram config routine.
  1077. *
  1078. * Returns 0 on success.
  1079. */
  1080. void
  1081. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1082. {
  1083. uint16_t cnt;
  1084. response_t *pkt;
  1085. rsp->ring_ptr = rsp->ring;
  1086. rsp->ring_index = 0;
  1087. rsp->status_srb = NULL;
  1088. pkt = rsp->ring_ptr;
  1089. for (cnt = 0; cnt < rsp->length; cnt++) {
  1090. pkt->signature = RESPONSE_PROCESSED;
  1091. pkt++;
  1092. }
  1093. }
  1094. /**
  1095. * qla2x00_update_fw_options() - Read and process firmware options.
  1096. * @ha: HA context
  1097. *
  1098. * Returns 0 on success.
  1099. */
  1100. void
  1101. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1102. {
  1103. uint16_t swing, emphasis, tx_sens, rx_sens;
  1104. struct qla_hw_data *ha = vha->hw;
  1105. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1106. qla2x00_get_fw_options(vha, ha->fw_options);
  1107. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1108. return;
  1109. /* Serial Link options. */
  1110. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1111. vha->host_no));
  1112. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1113. sizeof(ha->fw_seriallink_options)));
  1114. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1115. if (ha->fw_seriallink_options[3] & BIT_2) {
  1116. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1117. /* 1G settings */
  1118. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1119. emphasis = (ha->fw_seriallink_options[2] &
  1120. (BIT_4 | BIT_3)) >> 3;
  1121. tx_sens = ha->fw_seriallink_options[0] &
  1122. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1123. rx_sens = (ha->fw_seriallink_options[0] &
  1124. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1125. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1126. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1127. if (rx_sens == 0x0)
  1128. rx_sens = 0x3;
  1129. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1130. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1131. ha->fw_options[10] |= BIT_5 |
  1132. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1133. (tx_sens & (BIT_1 | BIT_0));
  1134. /* 2G settings */
  1135. swing = (ha->fw_seriallink_options[2] &
  1136. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1137. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1138. tx_sens = ha->fw_seriallink_options[1] &
  1139. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1140. rx_sens = (ha->fw_seriallink_options[1] &
  1141. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1142. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1143. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1144. if (rx_sens == 0x0)
  1145. rx_sens = 0x3;
  1146. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1147. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1148. ha->fw_options[11] |= BIT_5 |
  1149. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1150. (tx_sens & (BIT_1 | BIT_0));
  1151. }
  1152. /* FCP2 options. */
  1153. /* Return command IOCBs without waiting for an ABTS to complete. */
  1154. ha->fw_options[3] |= BIT_13;
  1155. /* LED scheme. */
  1156. if (ha->flags.enable_led_scheme)
  1157. ha->fw_options[2] |= BIT_12;
  1158. /* Detect ISP6312. */
  1159. if (IS_QLA6312(ha))
  1160. ha->fw_options[2] |= BIT_13;
  1161. /* Update firmware options. */
  1162. qla2x00_set_fw_options(vha, ha->fw_options);
  1163. }
  1164. void
  1165. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1166. {
  1167. int rval;
  1168. struct qla_hw_data *ha = vha->hw;
  1169. /* Update Serial Link options. */
  1170. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1171. return;
  1172. rval = qla2x00_set_serdes_params(vha,
  1173. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1174. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1175. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1176. if (rval != QLA_SUCCESS) {
  1177. qla_printk(KERN_WARNING, ha,
  1178. "Unable to update Serial Link options (%x).\n", rval);
  1179. }
  1180. }
  1181. void
  1182. qla2x00_config_rings(struct scsi_qla_host *vha)
  1183. {
  1184. struct qla_hw_data *ha = vha->hw;
  1185. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1186. struct req_que *req = ha->req_q_map[0];
  1187. struct rsp_que *rsp = ha->rsp_q_map[0];
  1188. /* Setup ring parameters in initialization control block. */
  1189. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1190. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1191. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1192. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1193. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1194. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1195. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1196. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1197. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1198. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1199. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1200. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1201. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1202. }
  1203. void
  1204. qla24xx_config_rings(struct scsi_qla_host *vha)
  1205. {
  1206. struct qla_hw_data *ha = vha->hw;
  1207. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1208. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1209. struct qla_msix_entry *msix;
  1210. struct init_cb_24xx *icb;
  1211. uint16_t rid = 0;
  1212. struct req_que *req = ha->req_q_map[0];
  1213. struct rsp_que *rsp = ha->rsp_q_map[0];
  1214. /* Setup ring parameters in initialization control block. */
  1215. icb = (struct init_cb_24xx *)ha->init_cb;
  1216. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1217. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1218. icb->request_q_length = cpu_to_le16(req->length);
  1219. icb->response_q_length = cpu_to_le16(rsp->length);
  1220. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1221. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1222. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1223. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1224. if (ha->mqenable) {
  1225. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1226. icb->rid = __constant_cpu_to_le16(rid);
  1227. if (ha->flags.msix_enabled) {
  1228. msix = &ha->msix_entries[1];
  1229. DEBUG2_17(printk(KERN_INFO
  1230. "Registering vector 0x%x for base que\n", msix->entry));
  1231. icb->msix = cpu_to_le16(msix->entry);
  1232. }
  1233. /* Use alternate PCI bus number */
  1234. if (MSB(rid))
  1235. icb->firmware_options_2 |=
  1236. __constant_cpu_to_le32(BIT_19);
  1237. /* Use alternate PCI devfn */
  1238. if (LSB(rid))
  1239. icb->firmware_options_2 |=
  1240. __constant_cpu_to_le32(BIT_18);
  1241. /* Use Disable MSIX Handshake mode for capable adapters */
  1242. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1243. icb->firmware_options_2 &=
  1244. __constant_cpu_to_le32(~BIT_22);
  1245. ha->flags.disable_msix_handshake = 1;
  1246. qla_printk(KERN_INFO, ha,
  1247. "MSIX Handshake Disable Mode turned on\n");
  1248. } else {
  1249. icb->firmware_options_2 |=
  1250. __constant_cpu_to_le32(BIT_22);
  1251. }
  1252. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1253. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1254. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1255. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1256. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1257. } else {
  1258. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1259. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1260. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1261. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1262. }
  1263. /* PCI posting */
  1264. RD_REG_DWORD(&ioreg->hccr);
  1265. }
  1266. /**
  1267. * qla2x00_init_rings() - Initializes firmware.
  1268. * @ha: HA context
  1269. *
  1270. * Beginning of request ring has initialization control block already built
  1271. * by nvram config routine.
  1272. *
  1273. * Returns 0 on success.
  1274. */
  1275. static int
  1276. qla2x00_init_rings(scsi_qla_host_t *vha)
  1277. {
  1278. int rval;
  1279. unsigned long flags = 0;
  1280. int cnt, que;
  1281. struct qla_hw_data *ha = vha->hw;
  1282. struct req_que *req;
  1283. struct rsp_que *rsp;
  1284. struct scsi_qla_host *vp;
  1285. struct mid_init_cb_24xx *mid_init_cb =
  1286. (struct mid_init_cb_24xx *) ha->init_cb;
  1287. spin_lock_irqsave(&ha->hardware_lock, flags);
  1288. /* Clear outstanding commands array. */
  1289. for (que = 0; que < ha->max_req_queues; que++) {
  1290. req = ha->req_q_map[que];
  1291. if (!req)
  1292. continue;
  1293. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1294. req->outstanding_cmds[cnt] = NULL;
  1295. req->current_outstanding_cmd = 1;
  1296. /* Initialize firmware. */
  1297. req->ring_ptr = req->ring;
  1298. req->ring_index = 0;
  1299. req->cnt = req->length;
  1300. }
  1301. for (que = 0; que < ha->max_rsp_queues; que++) {
  1302. rsp = ha->rsp_q_map[que];
  1303. if (!rsp)
  1304. continue;
  1305. /* Initialize response queue entries */
  1306. qla2x00_init_response_q_entries(rsp);
  1307. }
  1308. /* Clear RSCN queue. */
  1309. list_for_each_entry(vp, &ha->vp_list, list) {
  1310. vp->rscn_in_ptr = 0;
  1311. vp->rscn_out_ptr = 0;
  1312. }
  1313. ha->isp_ops->config_rings(vha);
  1314. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1315. /* Update any ISP specific firmware options before initialization. */
  1316. ha->isp_ops->update_fw_options(vha);
  1317. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1318. if (ha->flags.npiv_supported) {
  1319. if (ha->operating_mode == LOOP)
  1320. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1321. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1322. }
  1323. if (IS_FWI2_CAPABLE(ha)) {
  1324. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1325. mid_init_cb->init_cb.execution_throttle =
  1326. cpu_to_le16(ha->fw_xcb_count);
  1327. }
  1328. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1329. if (rval) {
  1330. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1331. vha->host_no));
  1332. } else {
  1333. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1334. vha->host_no));
  1335. }
  1336. return (rval);
  1337. }
  1338. /**
  1339. * qla2x00_fw_ready() - Waits for firmware ready.
  1340. * @ha: HA context
  1341. *
  1342. * Returns 0 on success.
  1343. */
  1344. static int
  1345. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1346. {
  1347. int rval;
  1348. unsigned long wtime, mtime, cs84xx_time;
  1349. uint16_t min_wait; /* Minimum wait time if loop is down */
  1350. uint16_t wait_time; /* Wait time if loop is coming ready */
  1351. uint16_t state[5];
  1352. struct qla_hw_data *ha = vha->hw;
  1353. rval = QLA_SUCCESS;
  1354. /* 20 seconds for loop down. */
  1355. min_wait = 20;
  1356. /*
  1357. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1358. * our own processing.
  1359. */
  1360. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1361. wait_time = min_wait;
  1362. }
  1363. /* Min wait time if loop down */
  1364. mtime = jiffies + (min_wait * HZ);
  1365. /* wait time before firmware ready */
  1366. wtime = jiffies + (wait_time * HZ);
  1367. /* Wait for ISP to finish LIP */
  1368. if (!vha->flags.init_done)
  1369. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1370. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1371. vha->host_no));
  1372. do {
  1373. rval = qla2x00_get_firmware_state(vha, state);
  1374. if (rval == QLA_SUCCESS) {
  1375. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1376. vha->device_flags &= ~DFLG_NO_CABLE;
  1377. }
  1378. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1379. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1380. "84xx=%x.\n", vha->host_no, state[0],
  1381. state[2]));
  1382. if ((state[2] & FSTATE_LOGGED_IN) &&
  1383. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1384. DEBUG16(printk("scsi(%ld): Sending "
  1385. "verify iocb.\n", vha->host_no));
  1386. cs84xx_time = jiffies;
  1387. rval = qla84xx_init_chip(vha);
  1388. if (rval != QLA_SUCCESS)
  1389. break;
  1390. /* Add time taken to initialize. */
  1391. cs84xx_time = jiffies - cs84xx_time;
  1392. wtime += cs84xx_time;
  1393. mtime += cs84xx_time;
  1394. DEBUG16(printk("scsi(%ld): Increasing "
  1395. "wait time by %ld. New time %ld\n",
  1396. vha->host_no, cs84xx_time, wtime));
  1397. }
  1398. } else if (state[0] == FSTATE_READY) {
  1399. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1400. vha->host_no));
  1401. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1402. &ha->login_timeout, &ha->r_a_tov);
  1403. rval = QLA_SUCCESS;
  1404. break;
  1405. }
  1406. rval = QLA_FUNCTION_FAILED;
  1407. if (atomic_read(&vha->loop_down_timer) &&
  1408. state[0] != FSTATE_READY) {
  1409. /* Loop down. Timeout on min_wait for states
  1410. * other than Wait for Login.
  1411. */
  1412. if (time_after_eq(jiffies, mtime)) {
  1413. qla_printk(KERN_INFO, ha,
  1414. "Cable is unplugged...\n");
  1415. vha->device_flags |= DFLG_NO_CABLE;
  1416. break;
  1417. }
  1418. }
  1419. } else {
  1420. /* Mailbox cmd failed. Timeout on min_wait. */
  1421. if (time_after_eq(jiffies, mtime))
  1422. break;
  1423. }
  1424. if (time_after_eq(jiffies, wtime))
  1425. break;
  1426. /* Delay for a while */
  1427. msleep(500);
  1428. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1429. vha->host_no, state[0], jiffies));
  1430. } while (1);
  1431. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1432. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1433. jiffies));
  1434. if (rval) {
  1435. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1436. vha->host_no));
  1437. }
  1438. return (rval);
  1439. }
  1440. /*
  1441. * qla2x00_configure_hba
  1442. * Setup adapter context.
  1443. *
  1444. * Input:
  1445. * ha = adapter state pointer.
  1446. *
  1447. * Returns:
  1448. * 0 = success
  1449. *
  1450. * Context:
  1451. * Kernel context.
  1452. */
  1453. static int
  1454. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1455. {
  1456. int rval;
  1457. uint16_t loop_id;
  1458. uint16_t topo;
  1459. uint16_t sw_cap;
  1460. uint8_t al_pa;
  1461. uint8_t area;
  1462. uint8_t domain;
  1463. char connect_type[22];
  1464. struct qla_hw_data *ha = vha->hw;
  1465. /* Get host addresses. */
  1466. rval = qla2x00_get_adapter_id(vha,
  1467. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1468. if (rval != QLA_SUCCESS) {
  1469. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1470. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1471. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1472. __func__, vha->host_no));
  1473. } else {
  1474. qla_printk(KERN_WARNING, ha,
  1475. "ERROR -- Unable to get host loop ID.\n");
  1476. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1477. }
  1478. return (rval);
  1479. }
  1480. if (topo == 4) {
  1481. qla_printk(KERN_INFO, ha,
  1482. "Cannot get topology - retrying.\n");
  1483. return (QLA_FUNCTION_FAILED);
  1484. }
  1485. vha->loop_id = loop_id;
  1486. /* initialize */
  1487. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1488. ha->operating_mode = LOOP;
  1489. ha->switch_cap = 0;
  1490. switch (topo) {
  1491. case 0:
  1492. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1493. vha->host_no));
  1494. ha->current_topology = ISP_CFG_NL;
  1495. strcpy(connect_type, "(Loop)");
  1496. break;
  1497. case 1:
  1498. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1499. vha->host_no));
  1500. ha->switch_cap = sw_cap;
  1501. ha->current_topology = ISP_CFG_FL;
  1502. strcpy(connect_type, "(FL_Port)");
  1503. break;
  1504. case 2:
  1505. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1506. vha->host_no));
  1507. ha->operating_mode = P2P;
  1508. ha->current_topology = ISP_CFG_N;
  1509. strcpy(connect_type, "(N_Port-to-N_Port)");
  1510. break;
  1511. case 3:
  1512. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1513. vha->host_no));
  1514. ha->switch_cap = sw_cap;
  1515. ha->operating_mode = P2P;
  1516. ha->current_topology = ISP_CFG_F;
  1517. strcpy(connect_type, "(F_Port)");
  1518. break;
  1519. default:
  1520. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1521. "Using NL.\n",
  1522. vha->host_no, topo));
  1523. ha->current_topology = ISP_CFG_NL;
  1524. strcpy(connect_type, "(Loop)");
  1525. break;
  1526. }
  1527. /* Save Host port and loop ID. */
  1528. /* byte order - Big Endian */
  1529. vha->d_id.b.domain = domain;
  1530. vha->d_id.b.area = area;
  1531. vha->d_id.b.al_pa = al_pa;
  1532. if (!vha->flags.init_done)
  1533. qla_printk(KERN_INFO, ha,
  1534. "Topology - %s, Host Loop address 0x%x\n",
  1535. connect_type, vha->loop_id);
  1536. if (rval) {
  1537. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1538. } else {
  1539. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1540. }
  1541. return(rval);
  1542. }
  1543. static inline void
  1544. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1545. char *def)
  1546. {
  1547. char *st, *en;
  1548. uint16_t index;
  1549. struct qla_hw_data *ha = vha->hw;
  1550. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1551. !IS_QLA81XX(ha);
  1552. if (memcmp(model, BINZERO, len) != 0) {
  1553. strncpy(ha->model_number, model, len);
  1554. st = en = ha->model_number;
  1555. en += len - 1;
  1556. while (en > st) {
  1557. if (*en != 0x20 && *en != 0x00)
  1558. break;
  1559. *en-- = '\0';
  1560. }
  1561. index = (ha->pdev->subsystem_device & 0xff);
  1562. if (use_tbl &&
  1563. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1564. index < QLA_MODEL_NAMES)
  1565. strncpy(ha->model_desc,
  1566. qla2x00_model_name[index * 2 + 1],
  1567. sizeof(ha->model_desc) - 1);
  1568. } else {
  1569. index = (ha->pdev->subsystem_device & 0xff);
  1570. if (use_tbl &&
  1571. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1572. index < QLA_MODEL_NAMES) {
  1573. strcpy(ha->model_number,
  1574. qla2x00_model_name[index * 2]);
  1575. strncpy(ha->model_desc,
  1576. qla2x00_model_name[index * 2 + 1],
  1577. sizeof(ha->model_desc) - 1);
  1578. } else {
  1579. strcpy(ha->model_number, def);
  1580. }
  1581. }
  1582. if (IS_FWI2_CAPABLE(ha))
  1583. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1584. sizeof(ha->model_desc));
  1585. }
  1586. /* On sparc systems, obtain port and node WWN from firmware
  1587. * properties.
  1588. */
  1589. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1590. {
  1591. #ifdef CONFIG_SPARC
  1592. struct qla_hw_data *ha = vha->hw;
  1593. struct pci_dev *pdev = ha->pdev;
  1594. struct device_node *dp = pci_device_to_OF_node(pdev);
  1595. const u8 *val;
  1596. int len;
  1597. val = of_get_property(dp, "port-wwn", &len);
  1598. if (val && len >= WWN_SIZE)
  1599. memcpy(nv->port_name, val, WWN_SIZE);
  1600. val = of_get_property(dp, "node-wwn", &len);
  1601. if (val && len >= WWN_SIZE)
  1602. memcpy(nv->node_name, val, WWN_SIZE);
  1603. #endif
  1604. }
  1605. /*
  1606. * NVRAM configuration for ISP 2xxx
  1607. *
  1608. * Input:
  1609. * ha = adapter block pointer.
  1610. *
  1611. * Output:
  1612. * initialization control block in response_ring
  1613. * host adapters parameters in host adapter block
  1614. *
  1615. * Returns:
  1616. * 0 = success.
  1617. */
  1618. int
  1619. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1620. {
  1621. int rval;
  1622. uint8_t chksum = 0;
  1623. uint16_t cnt;
  1624. uint8_t *dptr1, *dptr2;
  1625. struct qla_hw_data *ha = vha->hw;
  1626. init_cb_t *icb = ha->init_cb;
  1627. nvram_t *nv = ha->nvram;
  1628. uint8_t *ptr = ha->nvram;
  1629. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1630. rval = QLA_SUCCESS;
  1631. /* Determine NVRAM starting address. */
  1632. ha->nvram_size = sizeof(nvram_t);
  1633. ha->nvram_base = 0;
  1634. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1635. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1636. ha->nvram_base = 0x80;
  1637. /* Get NVRAM data and calculate checksum. */
  1638. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1639. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1640. chksum += *ptr++;
  1641. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1642. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1643. /* Bad NVRAM data, set defaults parameters. */
  1644. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1645. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1646. /* Reset NVRAM data. */
  1647. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1648. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1649. nv->nvram_version);
  1650. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1651. "invalid -- WWPN) defaults.\n");
  1652. /*
  1653. * Set default initialization control block.
  1654. */
  1655. memset(nv, 0, ha->nvram_size);
  1656. nv->parameter_block_version = ICB_VERSION;
  1657. if (IS_QLA23XX(ha)) {
  1658. nv->firmware_options[0] = BIT_2 | BIT_1;
  1659. nv->firmware_options[1] = BIT_7 | BIT_5;
  1660. nv->add_firmware_options[0] = BIT_5;
  1661. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1662. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1663. nv->special_options[1] = BIT_7;
  1664. } else if (IS_QLA2200(ha)) {
  1665. nv->firmware_options[0] = BIT_2 | BIT_1;
  1666. nv->firmware_options[1] = BIT_7 | BIT_5;
  1667. nv->add_firmware_options[0] = BIT_5;
  1668. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1669. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1670. } else if (IS_QLA2100(ha)) {
  1671. nv->firmware_options[0] = BIT_3 | BIT_1;
  1672. nv->firmware_options[1] = BIT_5;
  1673. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1674. }
  1675. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1676. nv->execution_throttle = __constant_cpu_to_le16(16);
  1677. nv->retry_count = 8;
  1678. nv->retry_delay = 1;
  1679. nv->port_name[0] = 33;
  1680. nv->port_name[3] = 224;
  1681. nv->port_name[4] = 139;
  1682. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1683. nv->login_timeout = 4;
  1684. /*
  1685. * Set default host adapter parameters
  1686. */
  1687. nv->host_p[1] = BIT_2;
  1688. nv->reset_delay = 5;
  1689. nv->port_down_retry_count = 8;
  1690. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1691. nv->link_down_timeout = 60;
  1692. rval = 1;
  1693. }
  1694. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1695. /*
  1696. * The SN2 does not provide BIOS emulation which means you can't change
  1697. * potentially bogus BIOS settings. Force the use of default settings
  1698. * for link rate and frame size. Hope that the rest of the settings
  1699. * are valid.
  1700. */
  1701. if (ia64_platform_is("sn2")) {
  1702. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1703. if (IS_QLA23XX(ha))
  1704. nv->special_options[1] = BIT_7;
  1705. }
  1706. #endif
  1707. /* Reset Initialization control block */
  1708. memset(icb, 0, ha->init_cb_size);
  1709. /*
  1710. * Setup driver NVRAM options.
  1711. */
  1712. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1713. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1714. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1715. nv->firmware_options[1] &= ~BIT_4;
  1716. if (IS_QLA23XX(ha)) {
  1717. nv->firmware_options[0] |= BIT_2;
  1718. nv->firmware_options[0] &= ~BIT_3;
  1719. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1720. if (IS_QLA2300(ha)) {
  1721. if (ha->fb_rev == FPM_2310) {
  1722. strcpy(ha->model_number, "QLA2310");
  1723. } else {
  1724. strcpy(ha->model_number, "QLA2300");
  1725. }
  1726. } else {
  1727. qla2x00_set_model_info(vha, nv->model_number,
  1728. sizeof(nv->model_number), "QLA23xx");
  1729. }
  1730. } else if (IS_QLA2200(ha)) {
  1731. nv->firmware_options[0] |= BIT_2;
  1732. /*
  1733. * 'Point-to-point preferred, else loop' is not a safe
  1734. * connection mode setting.
  1735. */
  1736. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1737. (BIT_5 | BIT_4)) {
  1738. /* Force 'loop preferred, else point-to-point'. */
  1739. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1740. nv->add_firmware_options[0] |= BIT_5;
  1741. }
  1742. strcpy(ha->model_number, "QLA22xx");
  1743. } else /*if (IS_QLA2100(ha))*/ {
  1744. strcpy(ha->model_number, "QLA2100");
  1745. }
  1746. /*
  1747. * Copy over NVRAM RISC parameter block to initialization control block.
  1748. */
  1749. dptr1 = (uint8_t *)icb;
  1750. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1751. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1752. while (cnt--)
  1753. *dptr1++ = *dptr2++;
  1754. /* Copy 2nd half. */
  1755. dptr1 = (uint8_t *)icb->add_firmware_options;
  1756. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1757. while (cnt--)
  1758. *dptr1++ = *dptr2++;
  1759. /* Use alternate WWN? */
  1760. if (nv->host_p[1] & BIT_7) {
  1761. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1762. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1763. }
  1764. /* Prepare nodename */
  1765. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1766. /*
  1767. * Firmware will apply the following mask if the nodename was
  1768. * not provided.
  1769. */
  1770. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1771. icb->node_name[0] &= 0xF0;
  1772. }
  1773. /*
  1774. * Set host adapter parameters.
  1775. */
  1776. if (nv->host_p[0] & BIT_7)
  1777. ql2xextended_error_logging = 1;
  1778. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1779. /* Always load RISC code on non ISP2[12]00 chips. */
  1780. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1781. ha->flags.disable_risc_code_load = 0;
  1782. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1783. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1784. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1785. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1786. ha->flags.disable_serdes = 0;
  1787. ha->operating_mode =
  1788. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1789. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1790. sizeof(ha->fw_seriallink_options));
  1791. /* save HBA serial number */
  1792. ha->serial0 = icb->port_name[5];
  1793. ha->serial1 = icb->port_name[6];
  1794. ha->serial2 = icb->port_name[7];
  1795. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1796. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1797. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1798. ha->retry_count = nv->retry_count;
  1799. /* Set minimum login_timeout to 4 seconds. */
  1800. if (nv->login_timeout < ql2xlogintimeout)
  1801. nv->login_timeout = ql2xlogintimeout;
  1802. if (nv->login_timeout < 4)
  1803. nv->login_timeout = 4;
  1804. ha->login_timeout = nv->login_timeout;
  1805. icb->login_timeout = nv->login_timeout;
  1806. /* Set minimum RATOV to 100 tenths of a second. */
  1807. ha->r_a_tov = 100;
  1808. ha->loop_reset_delay = nv->reset_delay;
  1809. /* Link Down Timeout = 0:
  1810. *
  1811. * When Port Down timer expires we will start returning
  1812. * I/O's to OS with "DID_NO_CONNECT".
  1813. *
  1814. * Link Down Timeout != 0:
  1815. *
  1816. * The driver waits for the link to come up after link down
  1817. * before returning I/Os to OS with "DID_NO_CONNECT".
  1818. */
  1819. if (nv->link_down_timeout == 0) {
  1820. ha->loop_down_abort_time =
  1821. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1822. } else {
  1823. ha->link_down_timeout = nv->link_down_timeout;
  1824. ha->loop_down_abort_time =
  1825. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1826. }
  1827. /*
  1828. * Need enough time to try and get the port back.
  1829. */
  1830. ha->port_down_retry_count = nv->port_down_retry_count;
  1831. if (qlport_down_retry)
  1832. ha->port_down_retry_count = qlport_down_retry;
  1833. /* Set login_retry_count */
  1834. ha->login_retry_count = nv->retry_count;
  1835. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1836. ha->port_down_retry_count > 3)
  1837. ha->login_retry_count = ha->port_down_retry_count;
  1838. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1839. ha->login_retry_count = ha->port_down_retry_count;
  1840. if (ql2xloginretrycount)
  1841. ha->login_retry_count = ql2xloginretrycount;
  1842. icb->lun_enables = __constant_cpu_to_le16(0);
  1843. icb->command_resource_count = 0;
  1844. icb->immediate_notify_resource_count = 0;
  1845. icb->timeout = __constant_cpu_to_le16(0);
  1846. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1847. /* Enable RIO */
  1848. icb->firmware_options[0] &= ~BIT_3;
  1849. icb->add_firmware_options[0] &=
  1850. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1851. icb->add_firmware_options[0] |= BIT_2;
  1852. icb->response_accumulation_timer = 3;
  1853. icb->interrupt_delay_timer = 5;
  1854. vha->flags.process_response_queue = 1;
  1855. } else {
  1856. /* Enable ZIO. */
  1857. if (!vha->flags.init_done) {
  1858. ha->zio_mode = icb->add_firmware_options[0] &
  1859. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1860. ha->zio_timer = icb->interrupt_delay_timer ?
  1861. icb->interrupt_delay_timer: 2;
  1862. }
  1863. icb->add_firmware_options[0] &=
  1864. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1865. vha->flags.process_response_queue = 0;
  1866. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1867. ha->zio_mode = QLA_ZIO_MODE_6;
  1868. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1869. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1870. ha->zio_timer * 100));
  1871. qla_printk(KERN_INFO, ha,
  1872. "ZIO mode %d enabled; timer delay (%d us).\n",
  1873. ha->zio_mode, ha->zio_timer * 100);
  1874. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1875. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1876. vha->flags.process_response_queue = 1;
  1877. }
  1878. }
  1879. if (rval) {
  1880. DEBUG2_3(printk(KERN_WARNING
  1881. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1882. }
  1883. return (rval);
  1884. }
  1885. static void
  1886. qla2x00_rport_del(void *data)
  1887. {
  1888. fc_port_t *fcport = data;
  1889. struct fc_rport *rport;
  1890. spin_lock_irq(fcport->vha->host->host_lock);
  1891. rport = fcport->drport ? fcport->drport: fcport->rport;
  1892. fcport->drport = NULL;
  1893. spin_unlock_irq(fcport->vha->host->host_lock);
  1894. if (rport)
  1895. fc_remote_port_delete(rport);
  1896. }
  1897. /**
  1898. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1899. * @ha: HA context
  1900. * @flags: allocation flags
  1901. *
  1902. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1903. */
  1904. fc_port_t *
  1905. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1906. {
  1907. fc_port_t *fcport;
  1908. fcport = kzalloc(sizeof(fc_port_t), flags);
  1909. if (!fcport)
  1910. return NULL;
  1911. /* Setup fcport template structure. */
  1912. fcport->vha = vha;
  1913. fcport->vp_idx = vha->vp_idx;
  1914. fcport->port_type = FCT_UNKNOWN;
  1915. fcport->loop_id = FC_NO_LOOP_ID;
  1916. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1917. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1918. return fcport;
  1919. }
  1920. /*
  1921. * qla2x00_configure_loop
  1922. * Updates Fibre Channel Device Database with what is actually on loop.
  1923. *
  1924. * Input:
  1925. * ha = adapter block pointer.
  1926. *
  1927. * Returns:
  1928. * 0 = success.
  1929. * 1 = error.
  1930. * 2 = database was full and device was not configured.
  1931. */
  1932. static int
  1933. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1934. {
  1935. int rval;
  1936. unsigned long flags, save_flags;
  1937. struct qla_hw_data *ha = vha->hw;
  1938. rval = QLA_SUCCESS;
  1939. /* Get Initiator ID */
  1940. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1941. rval = qla2x00_configure_hba(vha);
  1942. if (rval != QLA_SUCCESS) {
  1943. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1944. vha->host_no));
  1945. return (rval);
  1946. }
  1947. }
  1948. save_flags = flags = vha->dpc_flags;
  1949. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1950. vha->host_no, flags));
  1951. /*
  1952. * If we have both an RSCN and PORT UPDATE pending then handle them
  1953. * both at the same time.
  1954. */
  1955. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1956. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1957. qla2x00_get_data_rate(vha);
  1958. /* Determine what we need to do */
  1959. if (ha->current_topology == ISP_CFG_FL &&
  1960. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1961. vha->flags.rscn_queue_overflow = 1;
  1962. set_bit(RSCN_UPDATE, &flags);
  1963. } else if (ha->current_topology == ISP_CFG_F &&
  1964. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1965. vha->flags.rscn_queue_overflow = 1;
  1966. set_bit(RSCN_UPDATE, &flags);
  1967. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1968. } else if (ha->current_topology == ISP_CFG_N) {
  1969. clear_bit(RSCN_UPDATE, &flags);
  1970. } else if (!vha->flags.online ||
  1971. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1972. vha->flags.rscn_queue_overflow = 1;
  1973. set_bit(RSCN_UPDATE, &flags);
  1974. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1975. }
  1976. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1977. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1978. rval = QLA_FUNCTION_FAILED;
  1979. else
  1980. rval = qla2x00_configure_local_loop(vha);
  1981. }
  1982. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1983. if (LOOP_TRANSITION(vha))
  1984. rval = QLA_FUNCTION_FAILED;
  1985. else
  1986. rval = qla2x00_configure_fabric(vha);
  1987. }
  1988. if (rval == QLA_SUCCESS) {
  1989. if (atomic_read(&vha->loop_down_timer) ||
  1990. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1991. rval = QLA_FUNCTION_FAILED;
  1992. } else {
  1993. atomic_set(&vha->loop_state, LOOP_READY);
  1994. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1995. }
  1996. }
  1997. if (rval) {
  1998. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1999. __func__, vha->host_no));
  2000. } else {
  2001. DEBUG3(printk("%s: exiting normally\n", __func__));
  2002. }
  2003. /* Restore state if a resync event occurred during processing */
  2004. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2005. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2006. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2007. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2008. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2009. vha->flags.rscn_queue_overflow = 1;
  2010. }
  2011. }
  2012. return (rval);
  2013. }
  2014. /*
  2015. * qla2x00_configure_local_loop
  2016. * Updates Fibre Channel Device Database with local loop devices.
  2017. *
  2018. * Input:
  2019. * ha = adapter block pointer.
  2020. *
  2021. * Returns:
  2022. * 0 = success.
  2023. */
  2024. static int
  2025. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2026. {
  2027. int rval, rval2;
  2028. int found_devs;
  2029. int found;
  2030. fc_port_t *fcport, *new_fcport;
  2031. uint16_t index;
  2032. uint16_t entries;
  2033. char *id_iter;
  2034. uint16_t loop_id;
  2035. uint8_t domain, area, al_pa;
  2036. struct qla_hw_data *ha = vha->hw;
  2037. found_devs = 0;
  2038. new_fcport = NULL;
  2039. entries = MAX_FIBRE_DEVICES;
  2040. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2041. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2042. /* Get list of logged in devices. */
  2043. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2044. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2045. &entries);
  2046. if (rval != QLA_SUCCESS)
  2047. goto cleanup_allocation;
  2048. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2049. vha->host_no, entries));
  2050. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2051. entries * sizeof(struct gid_list_info)));
  2052. /* Allocate temporary fcport for any new fcports discovered. */
  2053. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2054. if (new_fcport == NULL) {
  2055. rval = QLA_MEMORY_ALLOC_FAILED;
  2056. goto cleanup_allocation;
  2057. }
  2058. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2059. /*
  2060. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2061. */
  2062. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2063. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2064. fcport->port_type != FCT_BROADCAST &&
  2065. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2066. DEBUG(printk("scsi(%ld): Marking port lost, "
  2067. "loop_id=0x%04x\n",
  2068. vha->host_no, fcport->loop_id));
  2069. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2070. }
  2071. }
  2072. /* Add devices to port list. */
  2073. id_iter = (char *)ha->gid_list;
  2074. for (index = 0; index < entries; index++) {
  2075. domain = ((struct gid_list_info *)id_iter)->domain;
  2076. area = ((struct gid_list_info *)id_iter)->area;
  2077. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2078. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2079. loop_id = (uint16_t)
  2080. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2081. else
  2082. loop_id = le16_to_cpu(
  2083. ((struct gid_list_info *)id_iter)->loop_id);
  2084. id_iter += ha->gid_list_info_size;
  2085. /* Bypass reserved domain fields. */
  2086. if ((domain & 0xf0) == 0xf0)
  2087. continue;
  2088. /* Bypass if not same domain and area of adapter. */
  2089. if (area && domain &&
  2090. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2091. continue;
  2092. /* Bypass invalid local loop ID. */
  2093. if (loop_id > LAST_LOCAL_LOOP_ID)
  2094. continue;
  2095. /* Fill in member data. */
  2096. new_fcport->d_id.b.domain = domain;
  2097. new_fcport->d_id.b.area = area;
  2098. new_fcport->d_id.b.al_pa = al_pa;
  2099. new_fcport->loop_id = loop_id;
  2100. new_fcport->vp_idx = vha->vp_idx;
  2101. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2102. if (rval2 != QLA_SUCCESS) {
  2103. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2104. "information -- get_port_database=%x, "
  2105. "loop_id=0x%04x\n",
  2106. vha->host_no, rval2, new_fcport->loop_id));
  2107. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2108. vha->host_no));
  2109. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2110. continue;
  2111. }
  2112. /* Check for matching device in port list. */
  2113. found = 0;
  2114. fcport = NULL;
  2115. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2116. if (memcmp(new_fcport->port_name, fcport->port_name,
  2117. WWN_SIZE))
  2118. continue;
  2119. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2120. fcport->loop_id = new_fcport->loop_id;
  2121. fcport->port_type = new_fcport->port_type;
  2122. fcport->d_id.b24 = new_fcport->d_id.b24;
  2123. memcpy(fcport->node_name, new_fcport->node_name,
  2124. WWN_SIZE);
  2125. found++;
  2126. break;
  2127. }
  2128. if (!found) {
  2129. /* New device, add to fcports list. */
  2130. if (vha->vp_idx) {
  2131. new_fcport->vha = vha;
  2132. new_fcport->vp_idx = vha->vp_idx;
  2133. }
  2134. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2135. /* Allocate a new replacement fcport. */
  2136. fcport = new_fcport;
  2137. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2138. if (new_fcport == NULL) {
  2139. rval = QLA_MEMORY_ALLOC_FAILED;
  2140. goto cleanup_allocation;
  2141. }
  2142. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2143. }
  2144. /* Base iIDMA settings on HBA port speed. */
  2145. fcport->fp_speed = ha->link_data_rate;
  2146. qla2x00_update_fcport(vha, fcport);
  2147. found_devs++;
  2148. }
  2149. cleanup_allocation:
  2150. kfree(new_fcport);
  2151. if (rval != QLA_SUCCESS) {
  2152. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2153. "rval=%x\n", vha->host_no, rval));
  2154. }
  2155. return (rval);
  2156. }
  2157. static void
  2158. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2159. {
  2160. #define LS_UNKNOWN 2
  2161. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2162. char *link_speed;
  2163. int rval;
  2164. uint16_t mb[4];
  2165. struct qla_hw_data *ha = vha->hw;
  2166. if (!IS_IIDMA_CAPABLE(ha))
  2167. return;
  2168. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2169. fcport->fp_speed > ha->link_data_rate)
  2170. return;
  2171. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2172. mb);
  2173. if (rval != QLA_SUCCESS) {
  2174. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2175. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2176. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2177. fcport->port_name[2], fcport->port_name[3],
  2178. fcport->port_name[4], fcport->port_name[5],
  2179. fcport->port_name[6], fcport->port_name[7], rval,
  2180. fcport->fp_speed, mb[0], mb[1]));
  2181. } else {
  2182. link_speed = link_speeds[LS_UNKNOWN];
  2183. if (fcport->fp_speed < 5)
  2184. link_speed = link_speeds[fcport->fp_speed];
  2185. else if (fcport->fp_speed == 0x13)
  2186. link_speed = link_speeds[5];
  2187. DEBUG2(qla_printk(KERN_INFO, ha,
  2188. "iIDMA adjusted to %s GB/s on "
  2189. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2190. link_speed, fcport->port_name[0],
  2191. fcport->port_name[1], fcport->port_name[2],
  2192. fcport->port_name[3], fcport->port_name[4],
  2193. fcport->port_name[5], fcport->port_name[6],
  2194. fcport->port_name[7]));
  2195. }
  2196. }
  2197. static void
  2198. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2199. {
  2200. struct fc_rport_identifiers rport_ids;
  2201. struct fc_rport *rport;
  2202. struct qla_hw_data *ha = vha->hw;
  2203. qla2x00_rport_del(fcport);
  2204. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2205. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2206. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2207. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2208. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2209. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2210. if (!rport) {
  2211. qla_printk(KERN_WARNING, ha,
  2212. "Unable to allocate fc remote port!\n");
  2213. return;
  2214. }
  2215. spin_lock_irq(fcport->vha->host->host_lock);
  2216. *((fc_port_t **)rport->dd_data) = fcport;
  2217. spin_unlock_irq(fcport->vha->host->host_lock);
  2218. rport->supported_classes = fcport->supported_classes;
  2219. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2220. if (fcport->port_type == FCT_INITIATOR)
  2221. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2222. if (fcport->port_type == FCT_TARGET)
  2223. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2224. fc_remote_port_rolechg(rport, rport_ids.roles);
  2225. }
  2226. /*
  2227. * qla2x00_update_fcport
  2228. * Updates device on list.
  2229. *
  2230. * Input:
  2231. * ha = adapter block pointer.
  2232. * fcport = port structure pointer.
  2233. *
  2234. * Return:
  2235. * 0 - Success
  2236. * BIT_0 - error
  2237. *
  2238. * Context:
  2239. * Kernel context.
  2240. */
  2241. void
  2242. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2243. {
  2244. struct qla_hw_data *ha = vha->hw;
  2245. fcport->vha = vha;
  2246. fcport->login_retry = 0;
  2247. fcport->port_login_retry_count = ha->port_down_retry_count *
  2248. PORT_RETRY_TIME;
  2249. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2250. PORT_RETRY_TIME);
  2251. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2252. qla2x00_iidma_fcport(vha, fcport);
  2253. atomic_set(&fcport->state, FCS_ONLINE);
  2254. qla2x00_reg_remote_port(vha, fcport);
  2255. }
  2256. /*
  2257. * qla2x00_configure_fabric
  2258. * Setup SNS devices with loop ID's.
  2259. *
  2260. * Input:
  2261. * ha = adapter block pointer.
  2262. *
  2263. * Returns:
  2264. * 0 = success.
  2265. * BIT_0 = error
  2266. */
  2267. static int
  2268. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2269. {
  2270. int rval, rval2;
  2271. fc_port_t *fcport, *fcptemp;
  2272. uint16_t next_loopid;
  2273. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2274. uint16_t loop_id;
  2275. LIST_HEAD(new_fcports);
  2276. struct qla_hw_data *ha = vha->hw;
  2277. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2278. /* If FL port exists, then SNS is present */
  2279. if (IS_FWI2_CAPABLE(ha))
  2280. loop_id = NPH_F_PORT;
  2281. else
  2282. loop_id = SNS_FL_PORT;
  2283. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2284. if (rval != QLA_SUCCESS) {
  2285. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2286. "Port\n", vha->host_no));
  2287. vha->device_flags &= ~SWITCH_FOUND;
  2288. return (QLA_SUCCESS);
  2289. }
  2290. vha->device_flags |= SWITCH_FOUND;
  2291. /* Mark devices that need re-synchronization. */
  2292. rval2 = qla2x00_device_resync(vha);
  2293. if (rval2 == QLA_RSCNS_HANDLED) {
  2294. /* No point doing the scan, just continue. */
  2295. return (QLA_SUCCESS);
  2296. }
  2297. do {
  2298. /* FDMI support. */
  2299. if (ql2xfdmienable &&
  2300. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2301. qla2x00_fdmi_register(vha);
  2302. /* Ensure we are logged into the SNS. */
  2303. if (IS_FWI2_CAPABLE(ha))
  2304. loop_id = NPH_SNS;
  2305. else
  2306. loop_id = SIMPLE_NAME_SERVER;
  2307. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2308. 0xfc, mb, BIT_1 | BIT_0);
  2309. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2310. DEBUG2(qla_printk(KERN_INFO, ha,
  2311. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2312. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2313. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2314. return (QLA_SUCCESS);
  2315. }
  2316. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2317. if (qla2x00_rft_id(vha)) {
  2318. /* EMPTY */
  2319. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2320. "TYPE failed.\n", vha->host_no));
  2321. }
  2322. if (qla2x00_rff_id(vha)) {
  2323. /* EMPTY */
  2324. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2325. "Features failed.\n", vha->host_no));
  2326. }
  2327. if (qla2x00_rnn_id(vha)) {
  2328. /* EMPTY */
  2329. DEBUG2(printk("scsi(%ld): Register Node Name "
  2330. "failed.\n", vha->host_no));
  2331. } else if (qla2x00_rsnn_nn(vha)) {
  2332. /* EMPTY */
  2333. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2334. "Node Name failed.\n", vha->host_no));
  2335. }
  2336. }
  2337. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2338. if (rval != QLA_SUCCESS)
  2339. break;
  2340. /*
  2341. * Logout all previous fabric devices marked lost, except
  2342. * FCP2 devices.
  2343. */
  2344. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2345. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2346. break;
  2347. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2348. continue;
  2349. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2350. qla2x00_mark_device_lost(vha, fcport,
  2351. ql2xplogiabsentdevice, 0);
  2352. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2353. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2354. fcport->port_type != FCT_INITIATOR &&
  2355. fcport->port_type != FCT_BROADCAST) {
  2356. ha->isp_ops->fabric_logout(vha,
  2357. fcport->loop_id,
  2358. fcport->d_id.b.domain,
  2359. fcport->d_id.b.area,
  2360. fcport->d_id.b.al_pa);
  2361. fcport->loop_id = FC_NO_LOOP_ID;
  2362. }
  2363. }
  2364. }
  2365. /* Starting free loop ID. */
  2366. next_loopid = ha->min_external_loopid;
  2367. /*
  2368. * Scan through our port list and login entries that need to be
  2369. * logged in.
  2370. */
  2371. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2372. if (atomic_read(&vha->loop_down_timer) ||
  2373. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2374. break;
  2375. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2376. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2377. continue;
  2378. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2379. fcport->loop_id = next_loopid;
  2380. rval = qla2x00_find_new_loop_id(
  2381. base_vha, fcport);
  2382. if (rval != QLA_SUCCESS) {
  2383. /* Ran out of IDs to use */
  2384. break;
  2385. }
  2386. }
  2387. /* Login and update database */
  2388. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2389. }
  2390. /* Exit if out of loop IDs. */
  2391. if (rval != QLA_SUCCESS) {
  2392. break;
  2393. }
  2394. /*
  2395. * Login and add the new devices to our port list.
  2396. */
  2397. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2398. if (atomic_read(&vha->loop_down_timer) ||
  2399. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2400. break;
  2401. /* Find a new loop ID to use. */
  2402. fcport->loop_id = next_loopid;
  2403. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2404. if (rval != QLA_SUCCESS) {
  2405. /* Ran out of IDs to use */
  2406. break;
  2407. }
  2408. /* Login and update database */
  2409. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2410. if (vha->vp_idx) {
  2411. fcport->vha = vha;
  2412. fcport->vp_idx = vha->vp_idx;
  2413. }
  2414. list_move_tail(&fcport->list, &vha->vp_fcports);
  2415. }
  2416. } while (0);
  2417. /* Free all new device structures not processed. */
  2418. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2419. list_del(&fcport->list);
  2420. kfree(fcport);
  2421. }
  2422. if (rval) {
  2423. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2424. "rval=%d\n", vha->host_no, rval));
  2425. }
  2426. return (rval);
  2427. }
  2428. /*
  2429. * qla2x00_find_all_fabric_devs
  2430. *
  2431. * Input:
  2432. * ha = adapter block pointer.
  2433. * dev = database device entry pointer.
  2434. *
  2435. * Returns:
  2436. * 0 = success.
  2437. *
  2438. * Context:
  2439. * Kernel context.
  2440. */
  2441. static int
  2442. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2443. struct list_head *new_fcports)
  2444. {
  2445. int rval;
  2446. uint16_t loop_id;
  2447. fc_port_t *fcport, *new_fcport, *fcptemp;
  2448. int found;
  2449. sw_info_t *swl;
  2450. int swl_idx;
  2451. int first_dev, last_dev;
  2452. port_id_t wrap, nxt_d_id;
  2453. struct qla_hw_data *ha = vha->hw;
  2454. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2455. struct scsi_qla_host *tvp;
  2456. rval = QLA_SUCCESS;
  2457. /* Try GID_PT to get device list, else GAN. */
  2458. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2459. if (!swl) {
  2460. /*EMPTY*/
  2461. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2462. "on GA_NXT\n", vha->host_no));
  2463. } else {
  2464. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2465. kfree(swl);
  2466. swl = NULL;
  2467. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2468. kfree(swl);
  2469. swl = NULL;
  2470. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2471. kfree(swl);
  2472. swl = NULL;
  2473. } else if (ql2xiidmaenable &&
  2474. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2475. qla2x00_gpsc(vha, swl);
  2476. }
  2477. }
  2478. swl_idx = 0;
  2479. /* Allocate temporary fcport for any new fcports discovered. */
  2480. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2481. if (new_fcport == NULL) {
  2482. kfree(swl);
  2483. return (QLA_MEMORY_ALLOC_FAILED);
  2484. }
  2485. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2486. /* Set start port ID scan at adapter ID. */
  2487. first_dev = 1;
  2488. last_dev = 0;
  2489. /* Starting free loop ID. */
  2490. loop_id = ha->min_external_loopid;
  2491. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2492. if (qla2x00_is_reserved_id(vha, loop_id))
  2493. continue;
  2494. if (atomic_read(&vha->loop_down_timer) ||
  2495. LOOP_TRANSITION(vha)) {
  2496. atomic_set(&vha->loop_down_timer, 0);
  2497. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2498. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2499. break;
  2500. }
  2501. if (swl != NULL) {
  2502. if (last_dev) {
  2503. wrap.b24 = new_fcport->d_id.b24;
  2504. } else {
  2505. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2506. memcpy(new_fcport->node_name,
  2507. swl[swl_idx].node_name, WWN_SIZE);
  2508. memcpy(new_fcport->port_name,
  2509. swl[swl_idx].port_name, WWN_SIZE);
  2510. memcpy(new_fcport->fabric_port_name,
  2511. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2512. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2513. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2514. last_dev = 1;
  2515. }
  2516. swl_idx++;
  2517. }
  2518. } else {
  2519. /* Send GA_NXT to the switch */
  2520. rval = qla2x00_ga_nxt(vha, new_fcport);
  2521. if (rval != QLA_SUCCESS) {
  2522. qla_printk(KERN_WARNING, ha,
  2523. "SNS scan failed -- assuming zero-entry "
  2524. "result...\n");
  2525. list_for_each_entry_safe(fcport, fcptemp,
  2526. new_fcports, list) {
  2527. list_del(&fcport->list);
  2528. kfree(fcport);
  2529. }
  2530. rval = QLA_SUCCESS;
  2531. break;
  2532. }
  2533. }
  2534. /* If wrap on switch device list, exit. */
  2535. if (first_dev) {
  2536. wrap.b24 = new_fcport->d_id.b24;
  2537. first_dev = 0;
  2538. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2539. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2540. vha->host_no, new_fcport->d_id.b.domain,
  2541. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2542. break;
  2543. }
  2544. /* Bypass if same physical adapter. */
  2545. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2546. continue;
  2547. /* Bypass virtual ports of the same host. */
  2548. found = 0;
  2549. if (ha->num_vhosts) {
  2550. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2551. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2552. found = 1;
  2553. break;
  2554. }
  2555. }
  2556. if (found)
  2557. continue;
  2558. }
  2559. /* Bypass if same domain and area of adapter. */
  2560. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2561. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2562. ISP_CFG_FL)
  2563. continue;
  2564. /* Bypass reserved domain fields. */
  2565. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2566. continue;
  2567. /* Locate matching device in database. */
  2568. found = 0;
  2569. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2570. if (memcmp(new_fcport->port_name, fcport->port_name,
  2571. WWN_SIZE))
  2572. continue;
  2573. found++;
  2574. /* Update port state. */
  2575. memcpy(fcport->fabric_port_name,
  2576. new_fcport->fabric_port_name, WWN_SIZE);
  2577. fcport->fp_speed = new_fcport->fp_speed;
  2578. /*
  2579. * If address the same and state FCS_ONLINE, nothing
  2580. * changed.
  2581. */
  2582. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2583. atomic_read(&fcport->state) == FCS_ONLINE) {
  2584. break;
  2585. }
  2586. /*
  2587. * If device was not a fabric device before.
  2588. */
  2589. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2590. fcport->d_id.b24 = new_fcport->d_id.b24;
  2591. fcport->loop_id = FC_NO_LOOP_ID;
  2592. fcport->flags |= (FCF_FABRIC_DEVICE |
  2593. FCF_LOGIN_NEEDED);
  2594. break;
  2595. }
  2596. /*
  2597. * Port ID changed or device was marked to be updated;
  2598. * Log it out if still logged in and mark it for
  2599. * relogin later.
  2600. */
  2601. fcport->d_id.b24 = new_fcport->d_id.b24;
  2602. fcport->flags |= FCF_LOGIN_NEEDED;
  2603. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2604. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2605. fcport->port_type != FCT_INITIATOR &&
  2606. fcport->port_type != FCT_BROADCAST) {
  2607. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2608. fcport->d_id.b.domain, fcport->d_id.b.area,
  2609. fcport->d_id.b.al_pa);
  2610. fcport->loop_id = FC_NO_LOOP_ID;
  2611. }
  2612. break;
  2613. }
  2614. if (found)
  2615. continue;
  2616. /* If device was not in our fcports list, then add it. */
  2617. list_add_tail(&new_fcport->list, new_fcports);
  2618. /* Allocate a new replacement fcport. */
  2619. nxt_d_id.b24 = new_fcport->d_id.b24;
  2620. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2621. if (new_fcport == NULL) {
  2622. kfree(swl);
  2623. return (QLA_MEMORY_ALLOC_FAILED);
  2624. }
  2625. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2626. new_fcport->d_id.b24 = nxt_d_id.b24;
  2627. }
  2628. kfree(swl);
  2629. kfree(new_fcport);
  2630. return (rval);
  2631. }
  2632. /*
  2633. * qla2x00_find_new_loop_id
  2634. * Scan through our port list and find a new usable loop ID.
  2635. *
  2636. * Input:
  2637. * ha: adapter state pointer.
  2638. * dev: port structure pointer.
  2639. *
  2640. * Returns:
  2641. * qla2x00 local function return status code.
  2642. *
  2643. * Context:
  2644. * Kernel context.
  2645. */
  2646. static int
  2647. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2648. {
  2649. int rval;
  2650. int found;
  2651. fc_port_t *fcport;
  2652. uint16_t first_loop_id;
  2653. struct qla_hw_data *ha = vha->hw;
  2654. struct scsi_qla_host *vp;
  2655. struct scsi_qla_host *tvp;
  2656. rval = QLA_SUCCESS;
  2657. /* Save starting loop ID. */
  2658. first_loop_id = dev->loop_id;
  2659. for (;;) {
  2660. /* Skip loop ID if already used by adapter. */
  2661. if (dev->loop_id == vha->loop_id)
  2662. dev->loop_id++;
  2663. /* Skip reserved loop IDs. */
  2664. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2665. dev->loop_id++;
  2666. /* Reset loop ID if passed the end. */
  2667. if (dev->loop_id > ha->max_loop_id) {
  2668. /* first loop ID. */
  2669. dev->loop_id = ha->min_external_loopid;
  2670. }
  2671. /* Check for loop ID being already in use. */
  2672. found = 0;
  2673. fcport = NULL;
  2674. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2675. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2676. if (fcport->loop_id == dev->loop_id &&
  2677. fcport != dev) {
  2678. /* ID possibly in use */
  2679. found++;
  2680. break;
  2681. }
  2682. }
  2683. if (found)
  2684. break;
  2685. }
  2686. /* If not in use then it is free to use. */
  2687. if (!found) {
  2688. break;
  2689. }
  2690. /* ID in use. Try next value. */
  2691. dev->loop_id++;
  2692. /* If wrap around. No free ID to use. */
  2693. if (dev->loop_id == first_loop_id) {
  2694. dev->loop_id = FC_NO_LOOP_ID;
  2695. rval = QLA_FUNCTION_FAILED;
  2696. break;
  2697. }
  2698. }
  2699. return (rval);
  2700. }
  2701. /*
  2702. * qla2x00_device_resync
  2703. * Marks devices in the database that needs resynchronization.
  2704. *
  2705. * Input:
  2706. * ha = adapter block pointer.
  2707. *
  2708. * Context:
  2709. * Kernel context.
  2710. */
  2711. static int
  2712. qla2x00_device_resync(scsi_qla_host_t *vha)
  2713. {
  2714. int rval;
  2715. uint32_t mask;
  2716. fc_port_t *fcport;
  2717. uint32_t rscn_entry;
  2718. uint8_t rscn_out_iter;
  2719. uint8_t format;
  2720. port_id_t d_id;
  2721. rval = QLA_RSCNS_HANDLED;
  2722. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2723. vha->flags.rscn_queue_overflow) {
  2724. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2725. format = MSB(MSW(rscn_entry));
  2726. d_id.b.domain = LSB(MSW(rscn_entry));
  2727. d_id.b.area = MSB(LSW(rscn_entry));
  2728. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2729. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2730. "[%02x/%02x%02x%02x].\n",
  2731. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2732. d_id.b.area, d_id.b.al_pa));
  2733. vha->rscn_out_ptr++;
  2734. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2735. vha->rscn_out_ptr = 0;
  2736. /* Skip duplicate entries. */
  2737. for (rscn_out_iter = vha->rscn_out_ptr;
  2738. !vha->flags.rscn_queue_overflow &&
  2739. rscn_out_iter != vha->rscn_in_ptr;
  2740. rscn_out_iter = (rscn_out_iter ==
  2741. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2742. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2743. break;
  2744. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2745. "entry found at [%d].\n", vha->host_no,
  2746. rscn_out_iter));
  2747. vha->rscn_out_ptr = rscn_out_iter;
  2748. }
  2749. /* Queue overflow, set switch default case. */
  2750. if (vha->flags.rscn_queue_overflow) {
  2751. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2752. "overflow.\n", vha->host_no));
  2753. format = 3;
  2754. vha->flags.rscn_queue_overflow = 0;
  2755. }
  2756. switch (format) {
  2757. case 0:
  2758. mask = 0xffffff;
  2759. break;
  2760. case 1:
  2761. mask = 0xffff00;
  2762. break;
  2763. case 2:
  2764. mask = 0xff0000;
  2765. break;
  2766. default:
  2767. mask = 0x0;
  2768. d_id.b24 = 0;
  2769. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2770. break;
  2771. }
  2772. rval = QLA_SUCCESS;
  2773. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2774. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2775. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2776. fcport->port_type == FCT_BROADCAST)
  2777. continue;
  2778. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2779. if (format != 3 ||
  2780. fcport->port_type != FCT_INITIATOR) {
  2781. qla2x00_mark_device_lost(vha, fcport,
  2782. 0, 0);
  2783. }
  2784. }
  2785. }
  2786. }
  2787. return (rval);
  2788. }
  2789. /*
  2790. * qla2x00_fabric_dev_login
  2791. * Login fabric target device and update FC port database.
  2792. *
  2793. * Input:
  2794. * ha: adapter state pointer.
  2795. * fcport: port structure list pointer.
  2796. * next_loopid: contains value of a new loop ID that can be used
  2797. * by the next login attempt.
  2798. *
  2799. * Returns:
  2800. * qla2x00 local function return status code.
  2801. *
  2802. * Context:
  2803. * Kernel context.
  2804. */
  2805. static int
  2806. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2807. uint16_t *next_loopid)
  2808. {
  2809. int rval;
  2810. int retry;
  2811. uint8_t opts;
  2812. struct qla_hw_data *ha = vha->hw;
  2813. rval = QLA_SUCCESS;
  2814. retry = 0;
  2815. if (IS_ALOGIO_CAPABLE(ha)) {
  2816. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  2817. if (!rval)
  2818. return rval;
  2819. }
  2820. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2821. if (rval == QLA_SUCCESS) {
  2822. /* Send an ADISC to FCP2 devices.*/
  2823. opts = 0;
  2824. if (fcport->flags & FCF_FCP2_DEVICE)
  2825. opts |= BIT_1;
  2826. rval = qla2x00_get_port_database(vha, fcport, opts);
  2827. if (rval != QLA_SUCCESS) {
  2828. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2829. fcport->d_id.b.domain, fcport->d_id.b.area,
  2830. fcport->d_id.b.al_pa);
  2831. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2832. } else {
  2833. qla2x00_update_fcport(vha, fcport);
  2834. }
  2835. }
  2836. return (rval);
  2837. }
  2838. /*
  2839. * qla2x00_fabric_login
  2840. * Issue fabric login command.
  2841. *
  2842. * Input:
  2843. * ha = adapter block pointer.
  2844. * device = pointer to FC device type structure.
  2845. *
  2846. * Returns:
  2847. * 0 - Login successfully
  2848. * 1 - Login failed
  2849. * 2 - Initiator device
  2850. * 3 - Fatal error
  2851. */
  2852. int
  2853. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2854. uint16_t *next_loopid)
  2855. {
  2856. int rval;
  2857. int retry;
  2858. uint16_t tmp_loopid;
  2859. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2860. struct qla_hw_data *ha = vha->hw;
  2861. retry = 0;
  2862. tmp_loopid = 0;
  2863. for (;;) {
  2864. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2865. "for port %02x%02x%02x.\n",
  2866. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2867. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2868. /* Login fcport on switch. */
  2869. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2870. fcport->d_id.b.domain, fcport->d_id.b.area,
  2871. fcport->d_id.b.al_pa, mb, BIT_0);
  2872. if (mb[0] == MBS_PORT_ID_USED) {
  2873. /*
  2874. * Device has another loop ID. The firmware team
  2875. * recommends the driver perform an implicit login with
  2876. * the specified ID again. The ID we just used is save
  2877. * here so we return with an ID that can be tried by
  2878. * the next login.
  2879. */
  2880. retry++;
  2881. tmp_loopid = fcport->loop_id;
  2882. fcport->loop_id = mb[1];
  2883. DEBUG(printk("Fabric Login: port in use - next "
  2884. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2885. fcport->loop_id, fcport->d_id.b.domain,
  2886. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2887. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2888. /*
  2889. * Login succeeded.
  2890. */
  2891. if (retry) {
  2892. /* A retry occurred before. */
  2893. *next_loopid = tmp_loopid;
  2894. } else {
  2895. /*
  2896. * No retry occurred before. Just increment the
  2897. * ID value for next login.
  2898. */
  2899. *next_loopid = (fcport->loop_id + 1);
  2900. }
  2901. if (mb[1] & BIT_0) {
  2902. fcport->port_type = FCT_INITIATOR;
  2903. } else {
  2904. fcport->port_type = FCT_TARGET;
  2905. if (mb[1] & BIT_1) {
  2906. fcport->flags |= FCF_FCP2_DEVICE;
  2907. }
  2908. }
  2909. if (mb[10] & BIT_0)
  2910. fcport->supported_classes |= FC_COS_CLASS2;
  2911. if (mb[10] & BIT_1)
  2912. fcport->supported_classes |= FC_COS_CLASS3;
  2913. rval = QLA_SUCCESS;
  2914. break;
  2915. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2916. /*
  2917. * Loop ID already used, try next loop ID.
  2918. */
  2919. fcport->loop_id++;
  2920. rval = qla2x00_find_new_loop_id(vha, fcport);
  2921. if (rval != QLA_SUCCESS) {
  2922. /* Ran out of loop IDs to use */
  2923. break;
  2924. }
  2925. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2926. /*
  2927. * Firmware possibly timed out during login. If NO
  2928. * retries are left to do then the device is declared
  2929. * dead.
  2930. */
  2931. *next_loopid = fcport->loop_id;
  2932. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2933. fcport->d_id.b.domain, fcport->d_id.b.area,
  2934. fcport->d_id.b.al_pa);
  2935. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2936. rval = 1;
  2937. break;
  2938. } else {
  2939. /*
  2940. * unrecoverable / not handled error
  2941. */
  2942. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2943. "loop_id=%x jiffies=%lx.\n",
  2944. __func__, vha->host_no, mb[0],
  2945. fcport->d_id.b.domain, fcport->d_id.b.area,
  2946. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2947. *next_loopid = fcport->loop_id;
  2948. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2949. fcport->d_id.b.domain, fcport->d_id.b.area,
  2950. fcport->d_id.b.al_pa);
  2951. fcport->loop_id = FC_NO_LOOP_ID;
  2952. fcport->login_retry = 0;
  2953. rval = 3;
  2954. break;
  2955. }
  2956. }
  2957. return (rval);
  2958. }
  2959. /*
  2960. * qla2x00_local_device_login
  2961. * Issue local device login command.
  2962. *
  2963. * Input:
  2964. * ha = adapter block pointer.
  2965. * loop_id = loop id of device to login to.
  2966. *
  2967. * Returns (Where's the #define!!!!):
  2968. * 0 - Login successfully
  2969. * 1 - Login failed
  2970. * 3 - Fatal error
  2971. */
  2972. int
  2973. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2974. {
  2975. int rval;
  2976. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2977. memset(mb, 0, sizeof(mb));
  2978. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2979. if (rval == QLA_SUCCESS) {
  2980. /* Interrogate mailbox registers for any errors */
  2981. if (mb[0] == MBS_COMMAND_ERROR)
  2982. rval = 1;
  2983. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2984. /* device not in PCB table */
  2985. rval = 3;
  2986. }
  2987. return (rval);
  2988. }
  2989. /*
  2990. * qla2x00_loop_resync
  2991. * Resync with fibre channel devices.
  2992. *
  2993. * Input:
  2994. * ha = adapter block pointer.
  2995. *
  2996. * Returns:
  2997. * 0 = success
  2998. */
  2999. int
  3000. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3001. {
  3002. int rval = QLA_SUCCESS;
  3003. uint32_t wait_time;
  3004. struct req_que *req;
  3005. struct rsp_que *rsp;
  3006. if (vha->hw->flags.cpu_affinity_enabled)
  3007. req = vha->hw->req_q_map[0];
  3008. else
  3009. req = vha->req;
  3010. rsp = req->rsp;
  3011. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3012. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3013. if (vha->flags.online) {
  3014. if (!(rval = qla2x00_fw_ready(vha))) {
  3015. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3016. wait_time = 256;
  3017. do {
  3018. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3019. /* Issue a marker after FW becomes ready. */
  3020. qla2x00_marker(vha, req, rsp, 0, 0,
  3021. MK_SYNC_ALL);
  3022. vha->marker_needed = 0;
  3023. /* Remap devices on Loop. */
  3024. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3025. qla2x00_configure_loop(vha);
  3026. wait_time--;
  3027. } while (!atomic_read(&vha->loop_down_timer) &&
  3028. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3029. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3030. &vha->dpc_flags)));
  3031. }
  3032. }
  3033. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3034. return (QLA_FUNCTION_FAILED);
  3035. if (rval)
  3036. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3037. return (rval);
  3038. }
  3039. void
  3040. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3041. {
  3042. fc_port_t *fcport;
  3043. struct scsi_qla_host *tvp, *vha;
  3044. /* Go with deferred removal of rport references. */
  3045. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3046. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3047. if (fcport && fcport->drport &&
  3048. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3049. qla2x00_rport_del(fcport);
  3050. }
  3051. /*
  3052. * qla2x00_abort_isp
  3053. * Resets ISP and aborts all outstanding commands.
  3054. *
  3055. * Input:
  3056. * ha = adapter block pointer.
  3057. *
  3058. * Returns:
  3059. * 0 = success
  3060. */
  3061. int
  3062. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3063. {
  3064. int rval;
  3065. uint8_t status = 0;
  3066. struct qla_hw_data *ha = vha->hw;
  3067. struct scsi_qla_host *vp;
  3068. struct scsi_qla_host *tvp;
  3069. struct req_que *req = ha->req_q_map[0];
  3070. if (vha->flags.online) {
  3071. vha->flags.online = 0;
  3072. ha->flags.chip_reset_done = 0;
  3073. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3074. ha->qla_stats.total_isp_aborts++;
  3075. qla_printk(KERN_INFO, ha,
  3076. "Performing ISP error recovery - ha= %p.\n", ha);
  3077. ha->isp_ops->reset_chip(vha);
  3078. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3079. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3080. atomic_set(&vha->loop_state, LOOP_DOWN);
  3081. qla2x00_mark_all_devices_lost(vha, 0);
  3082. } else {
  3083. if (!atomic_read(&vha->loop_down_timer))
  3084. atomic_set(&vha->loop_down_timer,
  3085. LOOP_DOWN_TIME);
  3086. }
  3087. /* Requeue all commands in outstanding command list. */
  3088. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3089. if (unlikely(pci_channel_offline(ha->pdev) &&
  3090. ha->flags.pci_channel_io_perm_failure)) {
  3091. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3092. status = 0;
  3093. return status;
  3094. }
  3095. ha->isp_ops->get_flash_version(vha, req->ring);
  3096. ha->isp_ops->nvram_config(vha);
  3097. if (!qla2x00_restart_isp(vha)) {
  3098. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3099. if (!atomic_read(&vha->loop_down_timer)) {
  3100. /*
  3101. * Issue marker command only when we are going
  3102. * to start the I/O .
  3103. */
  3104. vha->marker_needed = 1;
  3105. }
  3106. vha->flags.online = 1;
  3107. ha->isp_ops->enable_intrs(ha);
  3108. ha->isp_abort_cnt = 0;
  3109. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3110. if (IS_QLA81XX(ha))
  3111. qla2x00_get_fw_version(vha,
  3112. &ha->fw_major_version,
  3113. &ha->fw_minor_version,
  3114. &ha->fw_subminor_version,
  3115. &ha->fw_attributes, &ha->fw_memory_size,
  3116. ha->mpi_version, &ha->mpi_capabilities,
  3117. ha->phy_version);
  3118. if (ha->fce) {
  3119. ha->flags.fce_enabled = 1;
  3120. memset(ha->fce, 0,
  3121. fce_calc_size(ha->fce_bufs));
  3122. rval = qla2x00_enable_fce_trace(vha,
  3123. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3124. &ha->fce_bufs);
  3125. if (rval) {
  3126. qla_printk(KERN_WARNING, ha,
  3127. "Unable to reinitialize FCE "
  3128. "(%d).\n", rval);
  3129. ha->flags.fce_enabled = 0;
  3130. }
  3131. }
  3132. if (ha->eft) {
  3133. memset(ha->eft, 0, EFT_SIZE);
  3134. rval = qla2x00_enable_eft_trace(vha,
  3135. ha->eft_dma, EFT_NUM_BUFFERS);
  3136. if (rval) {
  3137. qla_printk(KERN_WARNING, ha,
  3138. "Unable to reinitialize EFT "
  3139. "(%d).\n", rval);
  3140. }
  3141. }
  3142. } else { /* failed the ISP abort */
  3143. vha->flags.online = 1;
  3144. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3145. if (ha->isp_abort_cnt == 0) {
  3146. qla_printk(KERN_WARNING, ha,
  3147. "ISP error recovery failed - "
  3148. "board disabled\n");
  3149. /*
  3150. * The next call disables the board
  3151. * completely.
  3152. */
  3153. ha->isp_ops->reset_adapter(vha);
  3154. vha->flags.online = 0;
  3155. clear_bit(ISP_ABORT_RETRY,
  3156. &vha->dpc_flags);
  3157. status = 0;
  3158. } else { /* schedule another ISP abort */
  3159. ha->isp_abort_cnt--;
  3160. DEBUG(printk("qla%ld: ISP abort - "
  3161. "retry remaining %d\n",
  3162. vha->host_no, ha->isp_abort_cnt));
  3163. status = 1;
  3164. }
  3165. } else {
  3166. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3167. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3168. "- retrying (%d) more times\n",
  3169. vha->host_no, ha->isp_abort_cnt));
  3170. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3171. status = 1;
  3172. }
  3173. }
  3174. }
  3175. if (!status) {
  3176. DEBUG(printk(KERN_INFO
  3177. "qla2x00_abort_isp(%ld): succeeded.\n",
  3178. vha->host_no));
  3179. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3180. if (vp->vp_idx)
  3181. qla2x00_vp_abort_isp(vp);
  3182. }
  3183. } else {
  3184. qla_printk(KERN_INFO, ha,
  3185. "qla2x00_abort_isp: **** FAILED ****\n");
  3186. }
  3187. return(status);
  3188. }
  3189. /*
  3190. * qla2x00_restart_isp
  3191. * restarts the ISP after a reset
  3192. *
  3193. * Input:
  3194. * ha = adapter block pointer.
  3195. *
  3196. * Returns:
  3197. * 0 = success
  3198. */
  3199. static int
  3200. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3201. {
  3202. int status = 0;
  3203. uint32_t wait_time;
  3204. struct qla_hw_data *ha = vha->hw;
  3205. struct req_que *req = ha->req_q_map[0];
  3206. struct rsp_que *rsp = ha->rsp_q_map[0];
  3207. /* If firmware needs to be loaded */
  3208. if (qla2x00_isp_firmware(vha)) {
  3209. vha->flags.online = 0;
  3210. status = ha->isp_ops->chip_diag(vha);
  3211. if (!status)
  3212. status = qla2x00_setup_chip(vha);
  3213. }
  3214. if (!status && !(status = qla2x00_init_rings(vha))) {
  3215. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3216. ha->flags.chip_reset_done = 1;
  3217. /* Initialize the queues in use */
  3218. qla25xx_init_queues(ha);
  3219. status = qla2x00_fw_ready(vha);
  3220. if (!status) {
  3221. DEBUG(printk("%s(): Start configure loop, "
  3222. "status = %d\n", __func__, status));
  3223. /* Issue a marker after FW becomes ready. */
  3224. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3225. vha->flags.online = 1;
  3226. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3227. wait_time = 256;
  3228. do {
  3229. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3230. qla2x00_configure_loop(vha);
  3231. wait_time--;
  3232. } while (!atomic_read(&vha->loop_down_timer) &&
  3233. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3234. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3235. &vha->dpc_flags)));
  3236. }
  3237. /* if no cable then assume it's good */
  3238. if ((vha->device_flags & DFLG_NO_CABLE))
  3239. status = 0;
  3240. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3241. __func__,
  3242. status));
  3243. }
  3244. return (status);
  3245. }
  3246. static int
  3247. qla25xx_init_queues(struct qla_hw_data *ha)
  3248. {
  3249. struct rsp_que *rsp = NULL;
  3250. struct req_que *req = NULL;
  3251. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3252. int ret = -1;
  3253. int i;
  3254. for (i = 1; i < ha->max_rsp_queues; i++) {
  3255. rsp = ha->rsp_q_map[i];
  3256. if (rsp) {
  3257. rsp->options &= ~BIT_0;
  3258. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3259. if (ret != QLA_SUCCESS)
  3260. DEBUG2_17(printk(KERN_WARNING
  3261. "%s Rsp que:%d init failed\n", __func__,
  3262. rsp->id));
  3263. else
  3264. DEBUG2_17(printk(KERN_INFO
  3265. "%s Rsp que:%d inited\n", __func__,
  3266. rsp->id));
  3267. }
  3268. }
  3269. for (i = 1; i < ha->max_req_queues; i++) {
  3270. req = ha->req_q_map[i];
  3271. if (req) {
  3272. /* Clear outstanding commands array. */
  3273. req->options &= ~BIT_0;
  3274. ret = qla25xx_init_req_que(base_vha, req);
  3275. if (ret != QLA_SUCCESS)
  3276. DEBUG2_17(printk(KERN_WARNING
  3277. "%s Req que:%d init failed\n", __func__,
  3278. req->id));
  3279. else
  3280. DEBUG2_17(printk(KERN_WARNING
  3281. "%s Req que:%d inited\n", __func__,
  3282. req->id));
  3283. }
  3284. }
  3285. return ret;
  3286. }
  3287. /*
  3288. * qla2x00_reset_adapter
  3289. * Reset adapter.
  3290. *
  3291. * Input:
  3292. * ha = adapter block pointer.
  3293. */
  3294. void
  3295. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3296. {
  3297. unsigned long flags = 0;
  3298. struct qla_hw_data *ha = vha->hw;
  3299. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3300. vha->flags.online = 0;
  3301. ha->isp_ops->disable_intrs(ha);
  3302. spin_lock_irqsave(&ha->hardware_lock, flags);
  3303. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3304. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3305. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3306. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3307. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3308. }
  3309. void
  3310. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3311. {
  3312. unsigned long flags = 0;
  3313. struct qla_hw_data *ha = vha->hw;
  3314. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3315. vha->flags.online = 0;
  3316. ha->isp_ops->disable_intrs(ha);
  3317. spin_lock_irqsave(&ha->hardware_lock, flags);
  3318. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3319. RD_REG_DWORD(&reg->hccr);
  3320. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3321. RD_REG_DWORD(&reg->hccr);
  3322. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3323. if (IS_NOPOLLING_TYPE(ha))
  3324. ha->isp_ops->enable_intrs(ha);
  3325. }
  3326. /* On sparc systems, obtain port and node WWN from firmware
  3327. * properties.
  3328. */
  3329. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3330. struct nvram_24xx *nv)
  3331. {
  3332. #ifdef CONFIG_SPARC
  3333. struct qla_hw_data *ha = vha->hw;
  3334. struct pci_dev *pdev = ha->pdev;
  3335. struct device_node *dp = pci_device_to_OF_node(pdev);
  3336. const u8 *val;
  3337. int len;
  3338. val = of_get_property(dp, "port-wwn", &len);
  3339. if (val && len >= WWN_SIZE)
  3340. memcpy(nv->port_name, val, WWN_SIZE);
  3341. val = of_get_property(dp, "node-wwn", &len);
  3342. if (val && len >= WWN_SIZE)
  3343. memcpy(nv->node_name, val, WWN_SIZE);
  3344. #endif
  3345. }
  3346. int
  3347. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3348. {
  3349. int rval;
  3350. struct init_cb_24xx *icb;
  3351. struct nvram_24xx *nv;
  3352. uint32_t *dptr;
  3353. uint8_t *dptr1, *dptr2;
  3354. uint32_t chksum;
  3355. uint16_t cnt;
  3356. struct qla_hw_data *ha = vha->hw;
  3357. rval = QLA_SUCCESS;
  3358. icb = (struct init_cb_24xx *)ha->init_cb;
  3359. nv = ha->nvram;
  3360. /* Determine NVRAM starting address. */
  3361. if (ha->flags.port0) {
  3362. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3363. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3364. } else {
  3365. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3366. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3367. }
  3368. ha->nvram_size = sizeof(struct nvram_24xx);
  3369. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3370. /* Get VPD data into cache */
  3371. ha->vpd = ha->nvram + VPD_OFFSET;
  3372. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3373. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3374. /* Get NVRAM data into cache and calculate checksum. */
  3375. dptr = (uint32_t *)nv;
  3376. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3377. ha->nvram_size);
  3378. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3379. chksum += le32_to_cpu(*dptr++);
  3380. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3381. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3382. /* Bad NVRAM data, set defaults parameters. */
  3383. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3384. || nv->id[3] != ' ' ||
  3385. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3386. /* Reset NVRAM data. */
  3387. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3388. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3389. le16_to_cpu(nv->nvram_version));
  3390. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3391. "invalid -- WWPN) defaults.\n");
  3392. /*
  3393. * Set default initialization control block.
  3394. */
  3395. memset(nv, 0, ha->nvram_size);
  3396. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3397. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3398. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3399. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3400. nv->exchange_count = __constant_cpu_to_le16(0);
  3401. nv->hard_address = __constant_cpu_to_le16(124);
  3402. nv->port_name[0] = 0x21;
  3403. nv->port_name[1] = 0x00 + ha->port_no;
  3404. nv->port_name[2] = 0x00;
  3405. nv->port_name[3] = 0xe0;
  3406. nv->port_name[4] = 0x8b;
  3407. nv->port_name[5] = 0x1c;
  3408. nv->port_name[6] = 0x55;
  3409. nv->port_name[7] = 0x86;
  3410. nv->node_name[0] = 0x20;
  3411. nv->node_name[1] = 0x00;
  3412. nv->node_name[2] = 0x00;
  3413. nv->node_name[3] = 0xe0;
  3414. nv->node_name[4] = 0x8b;
  3415. nv->node_name[5] = 0x1c;
  3416. nv->node_name[6] = 0x55;
  3417. nv->node_name[7] = 0x86;
  3418. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3419. nv->login_retry_count = __constant_cpu_to_le16(8);
  3420. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3421. nv->login_timeout = __constant_cpu_to_le16(0);
  3422. nv->firmware_options_1 =
  3423. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3424. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3425. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3426. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3427. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3428. nv->efi_parameters = __constant_cpu_to_le32(0);
  3429. nv->reset_delay = 5;
  3430. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3431. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3432. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3433. rval = 1;
  3434. }
  3435. /* Reset Initialization control block */
  3436. memset(icb, 0, ha->init_cb_size);
  3437. /* Copy 1st segment. */
  3438. dptr1 = (uint8_t *)icb;
  3439. dptr2 = (uint8_t *)&nv->version;
  3440. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3441. while (cnt--)
  3442. *dptr1++ = *dptr2++;
  3443. icb->login_retry_count = nv->login_retry_count;
  3444. icb->link_down_on_nos = nv->link_down_on_nos;
  3445. /* Copy 2nd segment. */
  3446. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3447. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3448. cnt = (uint8_t *)&icb->reserved_3 -
  3449. (uint8_t *)&icb->interrupt_delay_timer;
  3450. while (cnt--)
  3451. *dptr1++ = *dptr2++;
  3452. /*
  3453. * Setup driver NVRAM options.
  3454. */
  3455. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3456. "QLA2462");
  3457. /* Use alternate WWN? */
  3458. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3459. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3460. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3461. }
  3462. /* Prepare nodename */
  3463. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3464. /*
  3465. * Firmware will apply the following mask if the nodename was
  3466. * not provided.
  3467. */
  3468. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3469. icb->node_name[0] &= 0xF0;
  3470. }
  3471. /* Set host adapter parameters. */
  3472. ha->flags.disable_risc_code_load = 0;
  3473. ha->flags.enable_lip_reset = 0;
  3474. ha->flags.enable_lip_full_login =
  3475. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3476. ha->flags.enable_target_reset =
  3477. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3478. ha->flags.enable_led_scheme = 0;
  3479. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3480. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3481. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3482. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3483. sizeof(ha->fw_seriallink_options24));
  3484. /* save HBA serial number */
  3485. ha->serial0 = icb->port_name[5];
  3486. ha->serial1 = icb->port_name[6];
  3487. ha->serial2 = icb->port_name[7];
  3488. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3489. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3490. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3491. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3492. /* Set minimum login_timeout to 4 seconds. */
  3493. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3494. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3495. if (le16_to_cpu(nv->login_timeout) < 4)
  3496. nv->login_timeout = __constant_cpu_to_le16(4);
  3497. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3498. icb->login_timeout = nv->login_timeout;
  3499. /* Set minimum RATOV to 100 tenths of a second. */
  3500. ha->r_a_tov = 100;
  3501. ha->loop_reset_delay = nv->reset_delay;
  3502. /* Link Down Timeout = 0:
  3503. *
  3504. * When Port Down timer expires we will start returning
  3505. * I/O's to OS with "DID_NO_CONNECT".
  3506. *
  3507. * Link Down Timeout != 0:
  3508. *
  3509. * The driver waits for the link to come up after link down
  3510. * before returning I/Os to OS with "DID_NO_CONNECT".
  3511. */
  3512. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3513. ha->loop_down_abort_time =
  3514. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3515. } else {
  3516. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3517. ha->loop_down_abort_time =
  3518. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3519. }
  3520. /* Need enough time to try and get the port back. */
  3521. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3522. if (qlport_down_retry)
  3523. ha->port_down_retry_count = qlport_down_retry;
  3524. /* Set login_retry_count */
  3525. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3526. if (ha->port_down_retry_count ==
  3527. le16_to_cpu(nv->port_down_retry_count) &&
  3528. ha->port_down_retry_count > 3)
  3529. ha->login_retry_count = ha->port_down_retry_count;
  3530. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3531. ha->login_retry_count = ha->port_down_retry_count;
  3532. if (ql2xloginretrycount)
  3533. ha->login_retry_count = ql2xloginretrycount;
  3534. /* Enable ZIO. */
  3535. if (!vha->flags.init_done) {
  3536. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3537. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3538. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3539. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3540. }
  3541. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3542. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3543. vha->flags.process_response_queue = 0;
  3544. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3545. ha->zio_mode = QLA_ZIO_MODE_6;
  3546. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3547. "(%d us).\n", vha->host_no, ha->zio_mode,
  3548. ha->zio_timer * 100));
  3549. qla_printk(KERN_INFO, ha,
  3550. "ZIO mode %d enabled; timer delay (%d us).\n",
  3551. ha->zio_mode, ha->zio_timer * 100);
  3552. icb->firmware_options_2 |= cpu_to_le32(
  3553. (uint32_t)ha->zio_mode);
  3554. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3555. vha->flags.process_response_queue = 1;
  3556. }
  3557. if (rval) {
  3558. DEBUG2_3(printk(KERN_WARNING
  3559. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3560. }
  3561. return (rval);
  3562. }
  3563. static int
  3564. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3565. uint32_t faddr)
  3566. {
  3567. int rval = QLA_SUCCESS;
  3568. int segments, fragment;
  3569. uint32_t *dcode, dlen;
  3570. uint32_t risc_addr;
  3571. uint32_t risc_size;
  3572. uint32_t i;
  3573. struct qla_hw_data *ha = vha->hw;
  3574. struct req_que *req = ha->req_q_map[0];
  3575. qla_printk(KERN_INFO, ha,
  3576. "FW: Loading from flash (%x)...\n", faddr);
  3577. rval = QLA_SUCCESS;
  3578. segments = FA_RISC_CODE_SEGMENTS;
  3579. dcode = (uint32_t *)req->ring;
  3580. *srisc_addr = 0;
  3581. /* Validate firmware image by checking version. */
  3582. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3583. for (i = 0; i < 4; i++)
  3584. dcode[i] = be32_to_cpu(dcode[i]);
  3585. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3586. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3587. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3588. dcode[3] == 0)) {
  3589. qla_printk(KERN_WARNING, ha,
  3590. "Unable to verify integrity of flash firmware image!\n");
  3591. qla_printk(KERN_WARNING, ha,
  3592. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3593. dcode[1], dcode[2], dcode[3]);
  3594. return QLA_FUNCTION_FAILED;
  3595. }
  3596. while (segments && rval == QLA_SUCCESS) {
  3597. /* Read segment's load information. */
  3598. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3599. risc_addr = be32_to_cpu(dcode[2]);
  3600. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3601. risc_size = be32_to_cpu(dcode[3]);
  3602. fragment = 0;
  3603. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3604. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3605. if (dlen > risc_size)
  3606. dlen = risc_size;
  3607. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3608. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3609. vha->host_no, risc_addr, dlen, faddr));
  3610. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3611. for (i = 0; i < dlen; i++)
  3612. dcode[i] = swab32(dcode[i]);
  3613. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3614. dlen);
  3615. if (rval) {
  3616. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3617. "segment %d of firmware\n", vha->host_no,
  3618. fragment));
  3619. qla_printk(KERN_WARNING, ha,
  3620. "[ERROR] Failed to load segment %d of "
  3621. "firmware\n", fragment);
  3622. break;
  3623. }
  3624. faddr += dlen;
  3625. risc_addr += dlen;
  3626. risc_size -= dlen;
  3627. fragment++;
  3628. }
  3629. /* Next segment. */
  3630. segments--;
  3631. }
  3632. return rval;
  3633. }
  3634. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3635. int
  3636. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3637. {
  3638. int rval;
  3639. int i, fragment;
  3640. uint16_t *wcode, *fwcode;
  3641. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3642. struct fw_blob *blob;
  3643. struct qla_hw_data *ha = vha->hw;
  3644. struct req_que *req = ha->req_q_map[0];
  3645. /* Load firmware blob. */
  3646. blob = qla2x00_request_firmware(vha);
  3647. if (!blob) {
  3648. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3649. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3650. "from: " QLA_FW_URL ".\n");
  3651. return QLA_FUNCTION_FAILED;
  3652. }
  3653. rval = QLA_SUCCESS;
  3654. wcode = (uint16_t *)req->ring;
  3655. *srisc_addr = 0;
  3656. fwcode = (uint16_t *)blob->fw->data;
  3657. fwclen = 0;
  3658. /* Validate firmware image by checking version. */
  3659. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3660. qla_printk(KERN_WARNING, ha,
  3661. "Unable to verify integrity of firmware image (%Zd)!\n",
  3662. blob->fw->size);
  3663. goto fail_fw_integrity;
  3664. }
  3665. for (i = 0; i < 4; i++)
  3666. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3667. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3668. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3669. wcode[2] == 0 && wcode[3] == 0)) {
  3670. qla_printk(KERN_WARNING, ha,
  3671. "Unable to verify integrity of firmware image!\n");
  3672. qla_printk(KERN_WARNING, ha,
  3673. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3674. wcode[1], wcode[2], wcode[3]);
  3675. goto fail_fw_integrity;
  3676. }
  3677. seg = blob->segs;
  3678. while (*seg && rval == QLA_SUCCESS) {
  3679. risc_addr = *seg;
  3680. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3681. risc_size = be16_to_cpu(fwcode[3]);
  3682. /* Validate firmware image size. */
  3683. fwclen += risc_size * sizeof(uint16_t);
  3684. if (blob->fw->size < fwclen) {
  3685. qla_printk(KERN_WARNING, ha,
  3686. "Unable to verify integrity of firmware image "
  3687. "(%Zd)!\n", blob->fw->size);
  3688. goto fail_fw_integrity;
  3689. }
  3690. fragment = 0;
  3691. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3692. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3693. if (wlen > risc_size)
  3694. wlen = risc_size;
  3695. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3696. "addr %x, number of words 0x%x.\n", vha->host_no,
  3697. risc_addr, wlen));
  3698. for (i = 0; i < wlen; i++)
  3699. wcode[i] = swab16(fwcode[i]);
  3700. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3701. wlen);
  3702. if (rval) {
  3703. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3704. "segment %d of firmware\n", vha->host_no,
  3705. fragment));
  3706. qla_printk(KERN_WARNING, ha,
  3707. "[ERROR] Failed to load segment %d of "
  3708. "firmware\n", fragment);
  3709. break;
  3710. }
  3711. fwcode += wlen;
  3712. risc_addr += wlen;
  3713. risc_size -= wlen;
  3714. fragment++;
  3715. }
  3716. /* Next segment. */
  3717. seg++;
  3718. }
  3719. return rval;
  3720. fail_fw_integrity:
  3721. return QLA_FUNCTION_FAILED;
  3722. }
  3723. static int
  3724. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3725. {
  3726. int rval;
  3727. int segments, fragment;
  3728. uint32_t *dcode, dlen;
  3729. uint32_t risc_addr;
  3730. uint32_t risc_size;
  3731. uint32_t i;
  3732. struct fw_blob *blob;
  3733. uint32_t *fwcode, fwclen;
  3734. struct qla_hw_data *ha = vha->hw;
  3735. struct req_que *req = ha->req_q_map[0];
  3736. /* Load firmware blob. */
  3737. blob = qla2x00_request_firmware(vha);
  3738. if (!blob) {
  3739. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3740. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3741. "from: " QLA_FW_URL ".\n");
  3742. return QLA_FUNCTION_FAILED;
  3743. }
  3744. qla_printk(KERN_INFO, ha,
  3745. "FW: Loading via request-firmware...\n");
  3746. rval = QLA_SUCCESS;
  3747. segments = FA_RISC_CODE_SEGMENTS;
  3748. dcode = (uint32_t *)req->ring;
  3749. *srisc_addr = 0;
  3750. fwcode = (uint32_t *)blob->fw->data;
  3751. fwclen = 0;
  3752. /* Validate firmware image by checking version. */
  3753. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3754. qla_printk(KERN_WARNING, ha,
  3755. "Unable to verify integrity of firmware image (%Zd)!\n",
  3756. blob->fw->size);
  3757. goto fail_fw_integrity;
  3758. }
  3759. for (i = 0; i < 4; i++)
  3760. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3761. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3762. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3763. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3764. dcode[3] == 0)) {
  3765. qla_printk(KERN_WARNING, ha,
  3766. "Unable to verify integrity of firmware image!\n");
  3767. qla_printk(KERN_WARNING, ha,
  3768. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3769. dcode[1], dcode[2], dcode[3]);
  3770. goto fail_fw_integrity;
  3771. }
  3772. while (segments && rval == QLA_SUCCESS) {
  3773. risc_addr = be32_to_cpu(fwcode[2]);
  3774. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3775. risc_size = be32_to_cpu(fwcode[3]);
  3776. /* Validate firmware image size. */
  3777. fwclen += risc_size * sizeof(uint32_t);
  3778. if (blob->fw->size < fwclen) {
  3779. qla_printk(KERN_WARNING, ha,
  3780. "Unable to verify integrity of firmware image "
  3781. "(%Zd)!\n", blob->fw->size);
  3782. goto fail_fw_integrity;
  3783. }
  3784. fragment = 0;
  3785. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3786. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3787. if (dlen > risc_size)
  3788. dlen = risc_size;
  3789. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3790. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3791. risc_addr, dlen));
  3792. for (i = 0; i < dlen; i++)
  3793. dcode[i] = swab32(fwcode[i]);
  3794. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3795. dlen);
  3796. if (rval) {
  3797. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3798. "segment %d of firmware\n", vha->host_no,
  3799. fragment));
  3800. qla_printk(KERN_WARNING, ha,
  3801. "[ERROR] Failed to load segment %d of "
  3802. "firmware\n", fragment);
  3803. break;
  3804. }
  3805. fwcode += dlen;
  3806. risc_addr += dlen;
  3807. risc_size -= dlen;
  3808. fragment++;
  3809. }
  3810. /* Next segment. */
  3811. segments--;
  3812. }
  3813. return rval;
  3814. fail_fw_integrity:
  3815. return QLA_FUNCTION_FAILED;
  3816. }
  3817. int
  3818. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3819. {
  3820. int rval;
  3821. if (ql2xfwloadbin == 1)
  3822. return qla81xx_load_risc(vha, srisc_addr);
  3823. /*
  3824. * FW Load priority:
  3825. * 1) Firmware via request-firmware interface (.bin file).
  3826. * 2) Firmware residing in flash.
  3827. */
  3828. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3829. if (rval == QLA_SUCCESS)
  3830. return rval;
  3831. return qla24xx_load_risc_flash(vha, srisc_addr,
  3832. vha->hw->flt_region_fw);
  3833. }
  3834. int
  3835. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3836. {
  3837. int rval;
  3838. struct qla_hw_data *ha = vha->hw;
  3839. if (ql2xfwloadbin == 2)
  3840. goto try_blob_fw;
  3841. /*
  3842. * FW Load priority:
  3843. * 1) Firmware residing in flash.
  3844. * 2) Firmware via request-firmware interface (.bin file).
  3845. * 3) Golden-Firmware residing in flash -- limited operation.
  3846. */
  3847. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3848. if (rval == QLA_SUCCESS)
  3849. return rval;
  3850. try_blob_fw:
  3851. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3852. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3853. return rval;
  3854. qla_printk(KERN_ERR, ha,
  3855. "FW: Attempting to fallback to golden firmware...\n");
  3856. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3857. if (rval != QLA_SUCCESS)
  3858. return rval;
  3859. qla_printk(KERN_ERR, ha,
  3860. "FW: Please update operational firmware...\n");
  3861. ha->flags.running_gold_fw = 1;
  3862. return rval;
  3863. }
  3864. void
  3865. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3866. {
  3867. int ret, retries;
  3868. struct qla_hw_data *ha = vha->hw;
  3869. if (ha->flags.pci_channel_io_perm_failure)
  3870. return;
  3871. if (!IS_FWI2_CAPABLE(ha))
  3872. return;
  3873. if (!ha->fw_major_version)
  3874. return;
  3875. ret = qla2x00_stop_firmware(vha);
  3876. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3877. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3878. ha->isp_ops->reset_chip(vha);
  3879. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3880. continue;
  3881. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3882. continue;
  3883. qla_printk(KERN_INFO, ha,
  3884. "Attempting retry of stop-firmware command...\n");
  3885. ret = qla2x00_stop_firmware(vha);
  3886. }
  3887. }
  3888. int
  3889. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3890. {
  3891. int rval = QLA_SUCCESS;
  3892. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3893. struct qla_hw_data *ha = vha->hw;
  3894. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3895. struct req_que *req;
  3896. struct rsp_que *rsp;
  3897. if (!vha->vp_idx)
  3898. return -EINVAL;
  3899. rval = qla2x00_fw_ready(base_vha);
  3900. if (ha->flags.cpu_affinity_enabled)
  3901. req = ha->req_q_map[0];
  3902. else
  3903. req = vha->req;
  3904. rsp = req->rsp;
  3905. if (rval == QLA_SUCCESS) {
  3906. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3907. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3908. }
  3909. vha->flags.management_server_logged_in = 0;
  3910. /* Login to SNS first */
  3911. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3912. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3913. DEBUG15(qla_printk(KERN_INFO, ha,
  3914. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3915. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3916. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3917. return (QLA_FUNCTION_FAILED);
  3918. }
  3919. atomic_set(&vha->loop_down_timer, 0);
  3920. atomic_set(&vha->loop_state, LOOP_UP);
  3921. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3922. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3923. rval = qla2x00_loop_resync(base_vha);
  3924. return rval;
  3925. }
  3926. /* 84XX Support **************************************************************/
  3927. static LIST_HEAD(qla_cs84xx_list);
  3928. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3929. static struct qla_chip_state_84xx *
  3930. qla84xx_get_chip(struct scsi_qla_host *vha)
  3931. {
  3932. struct qla_chip_state_84xx *cs84xx;
  3933. struct qla_hw_data *ha = vha->hw;
  3934. mutex_lock(&qla_cs84xx_mutex);
  3935. /* Find any shared 84xx chip. */
  3936. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3937. if (cs84xx->bus == ha->pdev->bus) {
  3938. kref_get(&cs84xx->kref);
  3939. goto done;
  3940. }
  3941. }
  3942. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3943. if (!cs84xx)
  3944. goto done;
  3945. kref_init(&cs84xx->kref);
  3946. spin_lock_init(&cs84xx->access_lock);
  3947. mutex_init(&cs84xx->fw_update_mutex);
  3948. cs84xx->bus = ha->pdev->bus;
  3949. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3950. done:
  3951. mutex_unlock(&qla_cs84xx_mutex);
  3952. return cs84xx;
  3953. }
  3954. static void
  3955. __qla84xx_chip_release(struct kref *kref)
  3956. {
  3957. struct qla_chip_state_84xx *cs84xx =
  3958. container_of(kref, struct qla_chip_state_84xx, kref);
  3959. mutex_lock(&qla_cs84xx_mutex);
  3960. list_del(&cs84xx->list);
  3961. mutex_unlock(&qla_cs84xx_mutex);
  3962. kfree(cs84xx);
  3963. }
  3964. void
  3965. qla84xx_put_chip(struct scsi_qla_host *vha)
  3966. {
  3967. struct qla_hw_data *ha = vha->hw;
  3968. if (ha->cs84xx)
  3969. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3970. }
  3971. static int
  3972. qla84xx_init_chip(scsi_qla_host_t *vha)
  3973. {
  3974. int rval;
  3975. uint16_t status[2];
  3976. struct qla_hw_data *ha = vha->hw;
  3977. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3978. rval = qla84xx_verify_chip(vha, status);
  3979. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3980. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3981. QLA_SUCCESS;
  3982. }
  3983. /* 81XX Support **************************************************************/
  3984. int
  3985. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3986. {
  3987. int rval;
  3988. struct init_cb_81xx *icb;
  3989. struct nvram_81xx *nv;
  3990. uint32_t *dptr;
  3991. uint8_t *dptr1, *dptr2;
  3992. uint32_t chksum;
  3993. uint16_t cnt;
  3994. struct qla_hw_data *ha = vha->hw;
  3995. rval = QLA_SUCCESS;
  3996. icb = (struct init_cb_81xx *)ha->init_cb;
  3997. nv = ha->nvram;
  3998. /* Determine NVRAM starting address. */
  3999. ha->nvram_size = sizeof(struct nvram_81xx);
  4000. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4001. /* Get VPD data into cache */
  4002. ha->vpd = ha->nvram + VPD_OFFSET;
  4003. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4004. ha->vpd_size);
  4005. /* Get NVRAM data into cache and calculate checksum. */
  4006. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4007. ha->nvram_size);
  4008. dptr = (uint32_t *)nv;
  4009. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4010. chksum += le32_to_cpu(*dptr++);
  4011. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4012. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4013. /* Bad NVRAM data, set defaults parameters. */
  4014. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4015. || nv->id[3] != ' ' ||
  4016. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4017. /* Reset NVRAM data. */
  4018. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4019. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4020. le16_to_cpu(nv->nvram_version));
  4021. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4022. "invalid -- WWPN) defaults.\n");
  4023. /*
  4024. * Set default initialization control block.
  4025. */
  4026. memset(nv, 0, ha->nvram_size);
  4027. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4028. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4029. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4030. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4031. nv->exchange_count = __constant_cpu_to_le16(0);
  4032. nv->port_name[0] = 0x21;
  4033. nv->port_name[1] = 0x00 + ha->port_no;
  4034. nv->port_name[2] = 0x00;
  4035. nv->port_name[3] = 0xe0;
  4036. nv->port_name[4] = 0x8b;
  4037. nv->port_name[5] = 0x1c;
  4038. nv->port_name[6] = 0x55;
  4039. nv->port_name[7] = 0x86;
  4040. nv->node_name[0] = 0x20;
  4041. nv->node_name[1] = 0x00;
  4042. nv->node_name[2] = 0x00;
  4043. nv->node_name[3] = 0xe0;
  4044. nv->node_name[4] = 0x8b;
  4045. nv->node_name[5] = 0x1c;
  4046. nv->node_name[6] = 0x55;
  4047. nv->node_name[7] = 0x86;
  4048. nv->login_retry_count = __constant_cpu_to_le16(8);
  4049. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4050. nv->login_timeout = __constant_cpu_to_le16(0);
  4051. nv->firmware_options_1 =
  4052. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4053. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4054. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4055. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4056. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4057. nv->efi_parameters = __constant_cpu_to_le32(0);
  4058. nv->reset_delay = 5;
  4059. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4060. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4061. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4062. nv->enode_mac[0] = 0x00;
  4063. nv->enode_mac[1] = 0x02;
  4064. nv->enode_mac[2] = 0x03;
  4065. nv->enode_mac[3] = 0x04;
  4066. nv->enode_mac[4] = 0x05;
  4067. nv->enode_mac[5] = 0x06 + ha->port_no;
  4068. rval = 1;
  4069. }
  4070. /* Reset Initialization control block */
  4071. memset(icb, 0, sizeof(struct init_cb_81xx));
  4072. /* Copy 1st segment. */
  4073. dptr1 = (uint8_t *)icb;
  4074. dptr2 = (uint8_t *)&nv->version;
  4075. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4076. while (cnt--)
  4077. *dptr1++ = *dptr2++;
  4078. icb->login_retry_count = nv->login_retry_count;
  4079. /* Copy 2nd segment. */
  4080. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4081. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4082. cnt = (uint8_t *)&icb->reserved_5 -
  4083. (uint8_t *)&icb->interrupt_delay_timer;
  4084. while (cnt--)
  4085. *dptr1++ = *dptr2++;
  4086. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4087. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4088. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4089. icb->enode_mac[0] = 0x01;
  4090. icb->enode_mac[1] = 0x02;
  4091. icb->enode_mac[2] = 0x03;
  4092. icb->enode_mac[3] = 0x04;
  4093. icb->enode_mac[4] = 0x05;
  4094. icb->enode_mac[5] = 0x06 + ha->port_no;
  4095. }
  4096. /* Use extended-initialization control block. */
  4097. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4098. /*
  4099. * Setup driver NVRAM options.
  4100. */
  4101. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4102. "QLE81XX");
  4103. /* Use alternate WWN? */
  4104. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4105. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4106. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4107. }
  4108. /* Prepare nodename */
  4109. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4110. /*
  4111. * Firmware will apply the following mask if the nodename was
  4112. * not provided.
  4113. */
  4114. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4115. icb->node_name[0] &= 0xF0;
  4116. }
  4117. /* Set host adapter parameters. */
  4118. ha->flags.disable_risc_code_load = 0;
  4119. ha->flags.enable_lip_reset = 0;
  4120. ha->flags.enable_lip_full_login =
  4121. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4122. ha->flags.enable_target_reset =
  4123. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4124. ha->flags.enable_led_scheme = 0;
  4125. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4126. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4127. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4128. /* save HBA serial number */
  4129. ha->serial0 = icb->port_name[5];
  4130. ha->serial1 = icb->port_name[6];
  4131. ha->serial2 = icb->port_name[7];
  4132. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4133. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4134. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4135. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4136. /* Set minimum login_timeout to 4 seconds. */
  4137. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4138. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4139. if (le16_to_cpu(nv->login_timeout) < 4)
  4140. nv->login_timeout = __constant_cpu_to_le16(4);
  4141. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4142. icb->login_timeout = nv->login_timeout;
  4143. /* Set minimum RATOV to 100 tenths of a second. */
  4144. ha->r_a_tov = 100;
  4145. ha->loop_reset_delay = nv->reset_delay;
  4146. /* Link Down Timeout = 0:
  4147. *
  4148. * When Port Down timer expires we will start returning
  4149. * I/O's to OS with "DID_NO_CONNECT".
  4150. *
  4151. * Link Down Timeout != 0:
  4152. *
  4153. * The driver waits for the link to come up after link down
  4154. * before returning I/Os to OS with "DID_NO_CONNECT".
  4155. */
  4156. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4157. ha->loop_down_abort_time =
  4158. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4159. } else {
  4160. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4161. ha->loop_down_abort_time =
  4162. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4163. }
  4164. /* Need enough time to try and get the port back. */
  4165. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4166. if (qlport_down_retry)
  4167. ha->port_down_retry_count = qlport_down_retry;
  4168. /* Set login_retry_count */
  4169. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4170. if (ha->port_down_retry_count ==
  4171. le16_to_cpu(nv->port_down_retry_count) &&
  4172. ha->port_down_retry_count > 3)
  4173. ha->login_retry_count = ha->port_down_retry_count;
  4174. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4175. ha->login_retry_count = ha->port_down_retry_count;
  4176. if (ql2xloginretrycount)
  4177. ha->login_retry_count = ql2xloginretrycount;
  4178. /* Enable ZIO. */
  4179. if (!vha->flags.init_done) {
  4180. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4181. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4182. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4183. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4184. }
  4185. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4186. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4187. vha->flags.process_response_queue = 0;
  4188. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4189. ha->zio_mode = QLA_ZIO_MODE_6;
  4190. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4191. "(%d us).\n", vha->host_no, ha->zio_mode,
  4192. ha->zio_timer * 100));
  4193. qla_printk(KERN_INFO, ha,
  4194. "ZIO mode %d enabled; timer delay (%d us).\n",
  4195. ha->zio_mode, ha->zio_timer * 100);
  4196. icb->firmware_options_2 |= cpu_to_le32(
  4197. (uint32_t)ha->zio_mode);
  4198. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4199. vha->flags.process_response_queue = 1;
  4200. }
  4201. if (rval) {
  4202. DEBUG2_3(printk(KERN_WARNING
  4203. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4204. }
  4205. return (rval);
  4206. }
  4207. void
  4208. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4209. {
  4210. struct qla_hw_data *ha = vha->hw;
  4211. if (!ql2xetsenable)
  4212. return;
  4213. /* Enable ETS Burst. */
  4214. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4215. ha->fw_options[2] |= BIT_9;
  4216. qla2x00_set_fw_options(vha, ha->fw_options);
  4217. }