be_mgmt.c 11 KB

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  1. /**
  2. * Copyright (C) 2005 - 2010 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Written by: Jayamohan Kallickal (jayamohank@serverengines.com)
  11. *
  12. * Contact Information:
  13. * linux-drivers@serverengines.com
  14. *
  15. * ServerEngines
  16. * 209 N. Fair Oaks Ave
  17. * Sunnyvale, CA 94085
  18. *
  19. */
  20. #include "be_mgmt.h"
  21. #include "be_iscsi.h"
  22. unsigned char mgmt_get_fw_config(struct be_ctrl_info *ctrl,
  23. struct beiscsi_hba *phba)
  24. {
  25. struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
  26. struct be_fw_cfg *req = embedded_payload(wrb);
  27. int status = 0;
  28. spin_lock(&ctrl->mbox_lock);
  29. memset(wrb, 0, sizeof(*wrb));
  30. be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
  31. be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
  32. OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req));
  33. status = be_mbox_notify(ctrl);
  34. if (!status) {
  35. struct be_fw_cfg *pfw_cfg;
  36. pfw_cfg = req;
  37. phba->fw_config.phys_port = pfw_cfg->phys_port;
  38. phba->fw_config.iscsi_icd_start =
  39. pfw_cfg->ulp[0].icd_base;
  40. phba->fw_config.iscsi_icd_count =
  41. pfw_cfg->ulp[0].icd_count;
  42. phba->fw_config.iscsi_cid_start =
  43. pfw_cfg->ulp[0].sq_base;
  44. phba->fw_config.iscsi_cid_count =
  45. pfw_cfg->ulp[0].sq_count;
  46. if (phba->fw_config.iscsi_cid_count > (BE2_MAX_SESSIONS / 2)) {
  47. SE_DEBUG(DBG_LVL_8,
  48. "FW reported MAX CXNS as %d \t"
  49. "Max Supported = %d.\n",
  50. phba->fw_config.iscsi_cid_count,
  51. BE2_MAX_SESSIONS);
  52. phba->fw_config.iscsi_cid_count = BE2_MAX_SESSIONS / 2;
  53. }
  54. } else {
  55. shost_printk(KERN_WARNING, phba->shost,
  56. "Failed in mgmt_get_fw_config \n");
  57. }
  58. spin_unlock(&ctrl->mbox_lock);
  59. return status;
  60. }
  61. unsigned char mgmt_check_supported_fw(struct be_ctrl_info *ctrl,
  62. struct beiscsi_hba *phba)
  63. {
  64. struct be_dma_mem nonemb_cmd;
  65. struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
  66. struct be_mgmt_controller_attributes *req;
  67. struct be_sge *sge = nonembedded_sgl(wrb);
  68. int status = 0;
  69. nonemb_cmd.va = pci_alloc_consistent(ctrl->pdev,
  70. sizeof(struct be_mgmt_controller_attributes),
  71. &nonemb_cmd.dma);
  72. if (nonemb_cmd.va == NULL) {
  73. SE_DEBUG(DBG_LVL_1,
  74. "Failed to allocate memory for mgmt_check_supported_fw"
  75. "\n");
  76. return -1;
  77. }
  78. nonemb_cmd.size = sizeof(struct be_mgmt_controller_attributes);
  79. req = nonemb_cmd.va;
  80. memset(req, 0, sizeof(*req));
  81. spin_lock(&ctrl->mbox_lock);
  82. memset(wrb, 0, sizeof(*wrb));
  83. be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
  84. be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
  85. OPCODE_COMMON_GET_CNTL_ATTRIBUTES, sizeof(*req));
  86. sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd.dma));
  87. sge->pa_lo = cpu_to_le32(nonemb_cmd.dma & 0xFFFFFFFF);
  88. sge->len = cpu_to_le32(nonemb_cmd.size);
  89. status = be_mbox_notify(ctrl);
  90. if (!status) {
  91. struct be_mgmt_controller_attributes_resp *resp = nonemb_cmd.va;
  92. SE_DEBUG(DBG_LVL_8, "Firmware version of CMD: %s\n",
  93. resp->params.hba_attribs.flashrom_version_string);
  94. SE_DEBUG(DBG_LVL_8, "Firmware version is : %s\n",
  95. resp->params.hba_attribs.firmware_version_string);
  96. SE_DEBUG(DBG_LVL_8,
  97. "Developer Build, not performing version check...\n");
  98. phba->fw_config.iscsi_features =
  99. resp->params.hba_attribs.iscsi_features;
  100. SE_DEBUG(DBG_LVL_8, " phba->fw_config.iscsi_features = %d\n",
  101. phba->fw_config.iscsi_features);
  102. } else
  103. SE_DEBUG(DBG_LVL_1, " Failed in mgmt_check_supported_fw\n");
  104. spin_unlock(&ctrl->mbox_lock);
  105. if (nonemb_cmd.va)
  106. pci_free_consistent(ctrl->pdev, nonemb_cmd.size,
  107. nonemb_cmd.va, nonemb_cmd.dma);
  108. return status;
  109. }
  110. unsigned char mgmt_epfw_cleanup(struct beiscsi_hba *phba, unsigned short chute)
  111. {
  112. struct be_ctrl_info *ctrl = &phba->ctrl;
  113. struct be_mcc_wrb *wrb = wrb_from_mccq(phba);
  114. struct iscsi_cleanup_req *req = embedded_payload(wrb);
  115. int status = 0;
  116. spin_lock(&ctrl->mbox_lock);
  117. memset(wrb, 0, sizeof(*wrb));
  118. be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
  119. be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
  120. OPCODE_COMMON_ISCSI_CLEANUP, sizeof(*req));
  121. req->chute = chute;
  122. req->hdr_ring_id = 0;
  123. req->data_ring_id = 0;
  124. status = be_mcc_notify_wait(phba);
  125. if (status)
  126. shost_printk(KERN_WARNING, phba->shost,
  127. " mgmt_epfw_cleanup , FAILED\n");
  128. spin_unlock(&ctrl->mbox_lock);
  129. return status;
  130. }
  131. unsigned char mgmt_invalidate_icds(struct beiscsi_hba *phba,
  132. unsigned int icd, unsigned int cid)
  133. {
  134. struct be_dma_mem nonemb_cmd;
  135. struct be_ctrl_info *ctrl = &phba->ctrl;
  136. struct be_mcc_wrb *wrb;
  137. struct be_sge *sge;
  138. struct invalidate_commands_params_in *req;
  139. unsigned int tag = 0;
  140. spin_lock(&ctrl->mbox_lock);
  141. tag = alloc_mcc_tag(phba);
  142. if (!tag) {
  143. spin_unlock(&ctrl->mbox_lock);
  144. return tag;
  145. }
  146. nonemb_cmd.va = pci_alloc_consistent(ctrl->pdev,
  147. sizeof(struct invalidate_commands_params_in),
  148. &nonemb_cmd.dma);
  149. if (nonemb_cmd.va == NULL) {
  150. SE_DEBUG(DBG_LVL_1,
  151. "Failed to allocate memory for"
  152. "mgmt_invalidate_icds \n");
  153. return -1;
  154. }
  155. nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
  156. req = nonemb_cmd.va;
  157. memset(req, 0, sizeof(*req));
  158. wrb = wrb_from_mccq(phba);
  159. sge = nonembedded_sgl(wrb);
  160. wrb->tag0 |= tag;
  161. be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
  162. be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
  163. OPCODE_COMMON_ISCSI_ERROR_RECOVERY_INVALIDATE_COMMANDS,
  164. sizeof(*req));
  165. req->ref_handle = 0;
  166. req->cleanup_type = CMD_ISCSI_COMMAND_INVALIDATE;
  167. req->icd_count = 0;
  168. req->table[req->icd_count].icd = icd;
  169. req->table[req->icd_count].cid = cid;
  170. sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd.dma));
  171. sge->pa_lo = cpu_to_le32(nonemb_cmd.dma & 0xFFFFFFFF);
  172. sge->len = cpu_to_le32(nonemb_cmd.size);
  173. be_mcc_notify(phba);
  174. spin_unlock(&ctrl->mbox_lock);
  175. if (nonemb_cmd.va)
  176. pci_free_consistent(ctrl->pdev, nonemb_cmd.size,
  177. nonemb_cmd.va, nonemb_cmd.dma);
  178. return tag;
  179. }
  180. unsigned char mgmt_invalidate_connection(struct beiscsi_hba *phba,
  181. struct beiscsi_endpoint *beiscsi_ep,
  182. unsigned short cid,
  183. unsigned short issue_reset,
  184. unsigned short savecfg_flag)
  185. {
  186. struct be_ctrl_info *ctrl = &phba->ctrl;
  187. struct be_mcc_wrb *wrb;
  188. struct iscsi_invalidate_connection_params_in *req;
  189. unsigned int tag = 0;
  190. spin_lock(&ctrl->mbox_lock);
  191. tag = alloc_mcc_tag(phba);
  192. if (!tag) {
  193. spin_unlock(&ctrl->mbox_lock);
  194. return tag;
  195. }
  196. wrb = wrb_from_mccq(phba);
  197. wrb->tag0 |= tag;
  198. req = embedded_payload(wrb);
  199. be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
  200. be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI_INI,
  201. OPCODE_ISCSI_INI_DRIVER_INVALIDATE_CONNECTION,
  202. sizeof(*req));
  203. req->session_handle = beiscsi_ep->fw_handle;
  204. req->cid = cid;
  205. if (issue_reset)
  206. req->cleanup_type = CMD_ISCSI_CONNECTION_ISSUE_TCP_RST;
  207. else
  208. req->cleanup_type = CMD_ISCSI_CONNECTION_INVALIDATE;
  209. req->save_cfg = savecfg_flag;
  210. be_mcc_notify(phba);
  211. spin_unlock(&ctrl->mbox_lock);
  212. return tag;
  213. }
  214. unsigned char mgmt_upload_connection(struct beiscsi_hba *phba,
  215. unsigned short cid, unsigned int upload_flag)
  216. {
  217. struct be_ctrl_info *ctrl = &phba->ctrl;
  218. struct be_mcc_wrb *wrb;
  219. struct tcp_upload_params_in *req;
  220. unsigned int tag = 0;
  221. spin_lock(&ctrl->mbox_lock);
  222. tag = alloc_mcc_tag(phba);
  223. if (!tag) {
  224. spin_unlock(&ctrl->mbox_lock);
  225. return tag;
  226. }
  227. wrb = wrb_from_mccq(phba);
  228. req = embedded_payload(wrb);
  229. wrb->tag0 |= tag;
  230. be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
  231. be_cmd_hdr_prepare(&req->hdr, CMD_COMMON_TCP_UPLOAD,
  232. OPCODE_COMMON_TCP_UPLOAD, sizeof(*req));
  233. req->id = (unsigned short)cid;
  234. req->upload_type = (unsigned char)upload_flag;
  235. be_mcc_notify(phba);
  236. spin_unlock(&ctrl->mbox_lock);
  237. return tag;
  238. }
  239. int mgmt_open_connection(struct beiscsi_hba *phba,
  240. struct sockaddr *dst_addr,
  241. struct beiscsi_endpoint *beiscsi_ep)
  242. {
  243. struct hwi_controller *phwi_ctrlr;
  244. struct hwi_context_memory *phwi_context;
  245. struct sockaddr_in *daddr_in = (struct sockaddr_in *)dst_addr;
  246. struct sockaddr_in6 *daddr_in6 = (struct sockaddr_in6 *)dst_addr;
  247. struct be_ctrl_info *ctrl = &phba->ctrl;
  248. struct be_mcc_wrb *wrb;
  249. struct tcp_connect_and_offload_in *req;
  250. unsigned short def_hdr_id;
  251. unsigned short def_data_id;
  252. struct phys_addr template_address = { 0, 0 };
  253. struct phys_addr *ptemplate_address;
  254. unsigned int tag = 0;
  255. unsigned int i;
  256. unsigned short cid = beiscsi_ep->ep_cid;
  257. phwi_ctrlr = phba->phwi_ctrlr;
  258. phwi_context = phwi_ctrlr->phwi_ctxt;
  259. def_hdr_id = (unsigned short)HWI_GET_DEF_HDRQ_ID(phba);
  260. def_data_id = (unsigned short)HWI_GET_DEF_BUFQ_ID(phba);
  261. ptemplate_address = &template_address;
  262. ISCSI_GET_PDU_TEMPLATE_ADDRESS(phba, ptemplate_address);
  263. spin_lock(&ctrl->mbox_lock);
  264. tag = alloc_mcc_tag(phba);
  265. if (!tag) {
  266. spin_unlock(&ctrl->mbox_lock);
  267. return tag;
  268. }
  269. wrb = wrb_from_mccq(phba);
  270. req = embedded_payload(wrb);
  271. wrb->tag0 |= tag;
  272. be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
  273. be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
  274. OPCODE_COMMON_ISCSI_TCP_CONNECT_AND_OFFLOAD,
  275. sizeof(*req));
  276. if (dst_addr->sa_family == PF_INET) {
  277. __be32 s_addr = daddr_in->sin_addr.s_addr;
  278. req->ip_address.ip_type = BE2_IPV4;
  279. req->ip_address.ip_address[0] = s_addr & 0x000000ff;
  280. req->ip_address.ip_address[1] = (s_addr & 0x0000ff00) >> 8;
  281. req->ip_address.ip_address[2] = (s_addr & 0x00ff0000) >> 16;
  282. req->ip_address.ip_address[3] = (s_addr & 0xff000000) >> 24;
  283. req->tcp_port = ntohs(daddr_in->sin_port);
  284. beiscsi_ep->dst_addr = daddr_in->sin_addr.s_addr;
  285. beiscsi_ep->dst_tcpport = ntohs(daddr_in->sin_port);
  286. beiscsi_ep->ip_type = BE2_IPV4;
  287. } else if (dst_addr->sa_family == PF_INET6) {
  288. req->ip_address.ip_type = BE2_IPV6;
  289. memcpy(&req->ip_address.ip_address,
  290. &daddr_in6->sin6_addr.in6_u.u6_addr8, 16);
  291. req->tcp_port = ntohs(daddr_in6->sin6_port);
  292. beiscsi_ep->dst_tcpport = ntohs(daddr_in6->sin6_port);
  293. memcpy(&beiscsi_ep->dst6_addr,
  294. &daddr_in6->sin6_addr.in6_u.u6_addr8, 16);
  295. beiscsi_ep->ip_type = BE2_IPV6;
  296. } else{
  297. shost_printk(KERN_ERR, phba->shost, "unknown addr family %d\n",
  298. dst_addr->sa_family);
  299. spin_unlock(&ctrl->mbox_lock);
  300. return -EINVAL;
  301. }
  302. req->cid = cid;
  303. i = phba->nxt_cqid++;
  304. if (phba->nxt_cqid == phba->num_cpus)
  305. phba->nxt_cqid = 0;
  306. req->cq_id = phwi_context->be_cq[i].id;
  307. SE_DEBUG(DBG_LVL_8, "i=%d cq_id=%d \n", i, req->cq_id);
  308. req->defq_id = def_hdr_id;
  309. req->hdr_ring_id = def_hdr_id;
  310. req->data_ring_id = def_data_id;
  311. req->do_offload = 1;
  312. req->dataout_template_pa.lo = ptemplate_address->lo;
  313. req->dataout_template_pa.hi = ptemplate_address->hi;
  314. be_mcc_notify(phba);
  315. spin_unlock(&ctrl->mbox_lock);
  316. return tag;
  317. }
  318. unsigned int be_cmd_get_mac_addr(struct beiscsi_hba *phba)
  319. {
  320. struct be_ctrl_info *ctrl = &phba->ctrl;
  321. struct be_mcc_wrb *wrb;
  322. struct be_cmd_req_get_mac_addr *req;
  323. unsigned int tag = 0;
  324. SE_DEBUG(DBG_LVL_8, "In be_cmd_get_mac_addr\n");
  325. spin_lock(&ctrl->mbox_lock);
  326. tag = alloc_mcc_tag(phba);
  327. if (!tag) {
  328. spin_unlock(&ctrl->mbox_lock);
  329. return tag;
  330. }
  331. wrb = wrb_from_mccq(phba);
  332. req = embedded_payload(wrb);
  333. wrb->tag0 |= tag;
  334. be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
  335. be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
  336. OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG,
  337. sizeof(*req));
  338. be_mcc_notify(phba);
  339. spin_unlock(&ctrl->mbox_lock);
  340. return tag;
  341. }