omap_cf.c 9.0 KB

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  1. /*
  2. * omap_cf.c -- OMAP 16xx CompactFlash controller driver
  3. *
  4. * Copyright (c) 2005 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/errno.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <pcmcia/ss.h>
  19. #include <mach/hardware.h>
  20. #include <asm/io.h>
  21. #include <asm/sizes.h>
  22. #include <plat/mux.h>
  23. #include <plat/tc.h>
  24. /* NOTE: don't expect this to support many I/O cards. The 16xx chips have
  25. * hard-wired timings to support Compact Flash memory cards; they won't work
  26. * with various other devices (like WLAN adapters) without some external
  27. * logic to help out.
  28. *
  29. * NOTE: CF controller docs disagree with address space docs as to where
  30. * CF_BASE really lives; this is a doc erratum.
  31. */
  32. #define CF_BASE 0xfffe2800
  33. /* status; read after IRQ */
  34. #define CF_STATUS (CF_BASE + 0x00)
  35. # define CF_STATUS_BAD_READ (1 << 2)
  36. # define CF_STATUS_BAD_WRITE (1 << 1)
  37. # define CF_STATUS_CARD_DETECT (1 << 0)
  38. /* which chipselect (CS0..CS3) is used for CF (active low) */
  39. #define CF_CFG (CF_BASE + 0x02)
  40. /* card reset */
  41. #define CF_CONTROL (CF_BASE + 0x04)
  42. # define CF_CONTROL_RESET (1 << 0)
  43. #define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))
  44. /*--------------------------------------------------------------------------*/
  45. static const char driver_name[] = "omap_cf";
  46. struct omap_cf_socket {
  47. struct pcmcia_socket socket;
  48. struct timer_list timer;
  49. unsigned present:1;
  50. unsigned active:1;
  51. struct platform_device *pdev;
  52. unsigned long phys_cf;
  53. u_int irq;
  54. struct resource iomem;
  55. };
  56. #define POLL_INTERVAL (2 * HZ)
  57. /*--------------------------------------------------------------------------*/
  58. static int omap_cf_ss_init(struct pcmcia_socket *s)
  59. {
  60. return 0;
  61. }
  62. /* the timer is primarily to kick this socket's pccardd */
  63. static void omap_cf_timer(unsigned long _cf)
  64. {
  65. struct omap_cf_socket *cf = (void *) _cf;
  66. unsigned present = omap_cf_present();
  67. if (present != cf->present) {
  68. cf->present = present;
  69. pr_debug("%s: card %s\n", driver_name,
  70. present ? "present" : "gone");
  71. pcmcia_parse_events(&cf->socket, SS_DETECT);
  72. }
  73. if (cf->active)
  74. mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
  75. }
  76. /* This irq handler prevents "irqNNN: nobody cared" messages as drivers
  77. * claim the card's IRQ. It may also detect some card insertions, but
  78. * not removals; it can't always eliminate timer irqs.
  79. */
  80. static irqreturn_t omap_cf_irq(int irq, void *_cf)
  81. {
  82. omap_cf_timer((unsigned long)_cf);
  83. return IRQ_HANDLED;
  84. }
  85. static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
  86. {
  87. if (!sp)
  88. return -EINVAL;
  89. /* NOTE CF is always 3VCARD */
  90. if (omap_cf_present()) {
  91. struct omap_cf_socket *cf;
  92. *sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
  93. cf = container_of(s, struct omap_cf_socket, socket);
  94. s->irq.AssignedIRQ = 0;
  95. s->pci_irq = cf->irq;
  96. } else
  97. *sp = 0;
  98. return 0;
  99. }
  100. static int
  101. omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
  102. {
  103. u16 control;
  104. /* REVISIT some non-OSK boards may support power switching */
  105. switch (s->Vcc) {
  106. case 0:
  107. case 33:
  108. break;
  109. default:
  110. return -EINVAL;
  111. }
  112. control = omap_readw(CF_CONTROL);
  113. if (s->flags & SS_RESET)
  114. omap_writew(CF_CONTROL_RESET, CF_CONTROL);
  115. else
  116. omap_writew(0, CF_CONTROL);
  117. pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
  118. driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
  119. return 0;
  120. }
  121. static int omap_cf_ss_suspend(struct pcmcia_socket *s)
  122. {
  123. pr_debug("%s: %s\n", driver_name, __func__);
  124. return omap_cf_set_socket(s, &dead_socket);
  125. }
  126. /* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
  127. static int
  128. omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
  129. {
  130. struct omap_cf_socket *cf;
  131. cf = container_of(s, struct omap_cf_socket, socket);
  132. io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
  133. io->start = cf->phys_cf + SZ_4K;
  134. io->stop = io->start + SZ_2K - 1;
  135. return 0;
  136. }
  137. static int
  138. omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
  139. {
  140. struct omap_cf_socket *cf;
  141. if (map->card_start)
  142. return -EINVAL;
  143. cf = container_of(s, struct omap_cf_socket, socket);
  144. map->static_start = cf->phys_cf;
  145. map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
  146. if (map->flags & MAP_ATTRIB)
  147. map->static_start += SZ_2K;
  148. return 0;
  149. }
  150. static struct pccard_operations omap_cf_ops = {
  151. .init = omap_cf_ss_init,
  152. .suspend = omap_cf_ss_suspend,
  153. .get_status = omap_cf_get_status,
  154. .set_socket = omap_cf_set_socket,
  155. .set_io_map = omap_cf_set_io_map,
  156. .set_mem_map = omap_cf_set_mem_map,
  157. };
  158. /*--------------------------------------------------------------------------*/
  159. /*
  160. * NOTE: right now the only board-specific platform_data is
  161. * "what chipselect is used". Boards could want more.
  162. */
  163. static int __init omap_cf_probe(struct platform_device *pdev)
  164. {
  165. unsigned seg;
  166. struct omap_cf_socket *cf;
  167. int irq;
  168. int status;
  169. seg = (int) pdev->dev.platform_data;
  170. if (seg == 0 || seg > 3)
  171. return -ENODEV;
  172. /* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
  173. irq = platform_get_irq(pdev, 0);
  174. if (irq < 0)
  175. return -EINVAL;
  176. cf = kzalloc(sizeof *cf, GFP_KERNEL);
  177. if (!cf)
  178. return -ENOMEM;
  179. init_timer(&cf->timer);
  180. cf->timer.function = omap_cf_timer;
  181. cf->timer.data = (unsigned long) cf;
  182. cf->pdev = pdev;
  183. platform_set_drvdata(pdev, cf);
  184. /* this primarily just shuts up irq handling noise */
  185. status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
  186. driver_name, cf);
  187. if (status < 0)
  188. goto fail0;
  189. cf->irq = irq;
  190. cf->socket.pci_irq = irq;
  191. switch (seg) {
  192. /* NOTE: CS0 could be configured too ... */
  193. case 1:
  194. cf->phys_cf = OMAP_CS1_PHYS;
  195. break;
  196. case 2:
  197. cf->phys_cf = OMAP_CS2_PHYS;
  198. break;
  199. case 3:
  200. cf->phys_cf = omap_cs3_phys();
  201. break;
  202. default:
  203. goto fail1;
  204. }
  205. cf->iomem.start = cf->phys_cf;
  206. cf->iomem.end = cf->iomem.end + SZ_8K - 1;
  207. cf->iomem.flags = IORESOURCE_MEM;
  208. /* pcmcia layer only remaps "real" memory */
  209. cf->socket.io_offset = (unsigned long)
  210. ioremap(cf->phys_cf + SZ_4K, SZ_2K);
  211. if (!cf->socket.io_offset)
  212. goto fail1;
  213. if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
  214. goto fail1;
  215. /* NOTE: CF conflicts with MMC1 */
  216. omap_cfg_reg(W11_1610_CF_CD1);
  217. omap_cfg_reg(P11_1610_CF_CD2);
  218. omap_cfg_reg(R11_1610_CF_IOIS16);
  219. omap_cfg_reg(V10_1610_CF_IREQ);
  220. omap_cfg_reg(W10_1610_CF_RESET);
  221. omap_writew(~(1 << seg), CF_CFG);
  222. pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
  223. /* NOTE: better EMIFS setup might support more cards; but the
  224. * TRM only shows how to affect regular flash signals, not their
  225. * CF/PCMCIA variants...
  226. */
  227. pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
  228. seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
  229. omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
  230. omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
  231. /* CF uses armxor_ck, which is "always" available */
  232. pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
  233. omap_readw(CF_STATUS), omap_readw(CF_CFG),
  234. omap_readw(CF_CONTROL),
  235. omap_cf_present() ? "present" : "(not present)");
  236. cf->socket.owner = THIS_MODULE;
  237. cf->socket.dev.parent = &pdev->dev;
  238. cf->socket.ops = &omap_cf_ops;
  239. cf->socket.resource_ops = &pccard_static_ops;
  240. cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
  241. | SS_CAP_MEM_ALIGN;
  242. cf->socket.map_size = SZ_2K;
  243. cf->socket.io[0].res = &cf->iomem;
  244. status = pcmcia_register_socket(&cf->socket);
  245. if (status < 0)
  246. goto fail2;
  247. cf->active = 1;
  248. mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
  249. return 0;
  250. fail2:
  251. release_mem_region(cf->phys_cf, SZ_8K);
  252. fail1:
  253. if (cf->socket.io_offset)
  254. iounmap((void __iomem *) cf->socket.io_offset);
  255. free_irq(irq, cf);
  256. fail0:
  257. kfree(cf);
  258. return status;
  259. }
  260. static int __exit omap_cf_remove(struct platform_device *pdev)
  261. {
  262. struct omap_cf_socket *cf = platform_get_drvdata(pdev);
  263. cf->active = 0;
  264. pcmcia_unregister_socket(&cf->socket);
  265. del_timer_sync(&cf->timer);
  266. iounmap((void __iomem *) cf->socket.io_offset);
  267. release_mem_region(cf->phys_cf, SZ_8K);
  268. free_irq(cf->irq, cf);
  269. kfree(cf);
  270. return 0;
  271. }
  272. static int omap_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
  273. {
  274. return pcmcia_socket_dev_suspend(&pdev->dev);
  275. }
  276. static int omap_cf_resume(struct platform_device *pdev)
  277. {
  278. return pcmcia_socket_dev_resume(&pdev->dev);
  279. }
  280. static struct platform_driver omap_cf_driver = {
  281. .driver = {
  282. .name = (char *) driver_name,
  283. .owner = THIS_MODULE,
  284. },
  285. .remove = __exit_p(omap_cf_remove),
  286. .suspend = omap_cf_suspend,
  287. .resume = omap_cf_resume,
  288. };
  289. static int __init omap_cf_init(void)
  290. {
  291. if (cpu_is_omap16xx())
  292. return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
  293. return -ENODEV;
  294. }
  295. static void __exit omap_cf_exit(void)
  296. {
  297. if (cpu_is_omap16xx())
  298. platform_driver_unregister(&omap_cf_driver);
  299. }
  300. module_init(omap_cf_init);
  301. module_exit(omap_cf_exit);
  302. MODULE_DESCRIPTION("OMAP CF Driver");
  303. MODULE_LICENSE("GPL");
  304. MODULE_ALIAS("platform:omap_cf");