pcie_pme.c 13 KB

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  1. /*
  2. * PCIe Native PME support
  3. *
  4. * Copyright (C) 2007 - 2009 Intel Corp
  5. * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
  6. * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License V2. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/init.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/device.h>
  19. #include <linux/pcieport_if.h>
  20. #include <linux/acpi.h>
  21. #include <linux/pci-acpi.h>
  22. #include <linux/pm_runtime.h>
  23. #include "../../pci.h"
  24. #include "pcie_pme.h"
  25. #define PCI_EXP_RTSTA_PME 0x10000 /* PME status */
  26. #define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */
  27. /*
  28. * If set, this switch will prevent the PCIe root port PME service driver from
  29. * being registered. Consequently, the interrupt-based PCIe PME signaling will
  30. * not be used by any PCIe root ports in that case.
  31. */
  32. static bool pcie_pme_disabled;
  33. /*
  34. * The PCI Express Base Specification 2.0, Section 6.1.8, states the following:
  35. * "In order to maintain compatibility with non-PCI Express-aware system
  36. * software, system power management logic must be configured by firmware to use
  37. * the legacy mechanism of signaling PME by default. PCI Express-aware system
  38. * software must notify the firmware prior to enabling native, interrupt-based
  39. * PME signaling." However, if the platform doesn't provide us with a suitable
  40. * notification mechanism or the notification fails, it is not clear whether or
  41. * not we are supposed to use the interrupt-based PCIe PME signaling. The
  42. * switch below can be used to indicate the desired behaviour. When set, it
  43. * will make the kernel use the interrupt-based PCIe PME signaling regardless of
  44. * the platform notification status, although the kernel will attempt to notify
  45. * the platform anyway. When unset, it will prevent the kernel from using the
  46. * the interrupt-based PCIe PME signaling if the platform notification fails,
  47. * which is the default.
  48. */
  49. static bool pcie_pme_force_enable;
  50. /*
  51. * If this switch is set, MSI will not be used for PCIe PME signaling. This
  52. * causes the PCIe port driver to use INTx interrupts only, but it turns out
  53. * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
  54. * wake-up from system sleep states.
  55. */
  56. bool pcie_pme_msi_disabled;
  57. static int __init pcie_pme_setup(char *str)
  58. {
  59. if (!strcmp(str, "off"))
  60. pcie_pme_disabled = true;
  61. else if (!strcmp(str, "force"))
  62. pcie_pme_force_enable = true;
  63. else if (!strcmp(str, "nomsi"))
  64. pcie_pme_msi_disabled = true;
  65. return 1;
  66. }
  67. __setup("pcie_pme=", pcie_pme_setup);
  68. /**
  69. * pcie_pme_platform_setup - Ensure that the kernel controls the PCIe PME.
  70. * @srv: PCIe PME root port service to use for carrying out the check.
  71. *
  72. * Notify the platform that the native PCIe PME is going to be used and return
  73. * 'true' if the control of the PCIe PME registers has been acquired from the
  74. * platform.
  75. */
  76. static bool pcie_pme_platform_setup(struct pcie_device *srv)
  77. {
  78. if (!pcie_pme_platform_notify(srv))
  79. return true;
  80. return pcie_pme_force_enable;
  81. }
  82. struct pcie_pme_service_data {
  83. spinlock_t lock;
  84. struct pcie_device *srv;
  85. struct work_struct work;
  86. bool noirq; /* Don't enable the PME interrupt used by this service. */
  87. };
  88. /**
  89. * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
  90. * @dev: PCIe root port or event collector.
  91. * @enable: Enable or disable the interrupt.
  92. */
  93. static void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
  94. {
  95. int rtctl_pos;
  96. u16 rtctl;
  97. rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL;
  98. pci_read_config_word(dev, rtctl_pos, &rtctl);
  99. if (enable)
  100. rtctl |= PCI_EXP_RTCTL_PMEIE;
  101. else
  102. rtctl &= ~PCI_EXP_RTCTL_PMEIE;
  103. pci_write_config_word(dev, rtctl_pos, rtctl);
  104. }
  105. /**
  106. * pcie_pme_clear_status - Clear root port PME interrupt status.
  107. * @dev: PCIe root port or event collector.
  108. */
  109. static void pcie_pme_clear_status(struct pci_dev *dev)
  110. {
  111. int rtsta_pos;
  112. u32 rtsta;
  113. rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
  114. pci_read_config_dword(dev, rtsta_pos, &rtsta);
  115. rtsta |= PCI_EXP_RTSTA_PME;
  116. pci_write_config_dword(dev, rtsta_pos, rtsta);
  117. }
  118. /**
  119. * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
  120. * @bus: PCI bus to scan.
  121. *
  122. * Scan given PCI bus and all buses under it for devices asserting PME#.
  123. */
  124. static bool pcie_pme_walk_bus(struct pci_bus *bus)
  125. {
  126. struct pci_dev *dev;
  127. bool ret = false;
  128. list_for_each_entry(dev, &bus->devices, bus_list) {
  129. /* Skip PCIe devices in case we started from a root port. */
  130. if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
  131. pm_request_resume(&dev->dev);
  132. ret = true;
  133. }
  134. if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
  135. ret = true;
  136. }
  137. return ret;
  138. }
  139. /**
  140. * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
  141. * @bus: Secondary bus of the bridge.
  142. * @devfn: Device/function number to check.
  143. *
  144. * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
  145. * PCIe PME message. In such that case the bridge should use the Requester ID
  146. * of device/function number 0 on its secondary bus.
  147. */
  148. static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
  149. {
  150. struct pci_dev *dev;
  151. bool found = false;
  152. if (devfn)
  153. return false;
  154. dev = pci_dev_get(bus->self);
  155. if (!dev)
  156. return false;
  157. if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
  158. down_read(&pci_bus_sem);
  159. if (pcie_pme_walk_bus(bus))
  160. found = true;
  161. up_read(&pci_bus_sem);
  162. }
  163. pci_dev_put(dev);
  164. return found;
  165. }
  166. /**
  167. * pcie_pme_handle_request - Find device that generated PME and handle it.
  168. * @port: Root port or event collector that generated the PME interrupt.
  169. * @req_id: PCIe Requester ID of the device that generated the PME.
  170. */
  171. static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
  172. {
  173. u8 busnr = req_id >> 8, devfn = req_id & 0xff;
  174. struct pci_bus *bus;
  175. struct pci_dev *dev;
  176. bool found = false;
  177. /* First, check if the PME is from the root port itself. */
  178. if (port->devfn == devfn && port->bus->number == busnr) {
  179. if (pci_check_pme_status(port)) {
  180. pm_request_resume(&port->dev);
  181. found = true;
  182. } else {
  183. /*
  184. * Apparently, the root port generated the PME on behalf
  185. * of a non-PCIe device downstream. If this is done by
  186. * a root port, the Requester ID field in its status
  187. * register may contain either the root port's, or the
  188. * source device's information (PCI Express Base
  189. * Specification, Rev. 2.0, Section 6.1.9).
  190. */
  191. down_read(&pci_bus_sem);
  192. found = pcie_pme_walk_bus(port->subordinate);
  193. up_read(&pci_bus_sem);
  194. }
  195. goto out;
  196. }
  197. /* Second, find the bus the source device is on. */
  198. bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
  199. if (!bus)
  200. goto out;
  201. /* Next, check if the PME is from a PCIe-PCI bridge. */
  202. found = pcie_pme_from_pci_bridge(bus, devfn);
  203. if (found)
  204. goto out;
  205. /* Finally, try to find the PME source on the bus. */
  206. down_read(&pci_bus_sem);
  207. list_for_each_entry(dev, &bus->devices, bus_list) {
  208. pci_dev_get(dev);
  209. if (dev->devfn == devfn) {
  210. found = true;
  211. break;
  212. }
  213. pci_dev_put(dev);
  214. }
  215. up_read(&pci_bus_sem);
  216. if (found) {
  217. /* The device is there, but we have to check its PME status. */
  218. found = pci_check_pme_status(dev);
  219. if (found)
  220. pm_request_resume(&dev->dev);
  221. pci_dev_put(dev);
  222. } else if (devfn) {
  223. /*
  224. * The device is not there, but we can still try to recover by
  225. * assuming that the PME was reported by a PCIe-PCI bridge that
  226. * used devfn different from zero.
  227. */
  228. dev_dbg(&port->dev, "PME interrupt generated for "
  229. "non-existent device %02x:%02x.%d\n",
  230. busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
  231. found = pcie_pme_from_pci_bridge(bus, 0);
  232. }
  233. out:
  234. if (!found)
  235. dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
  236. }
  237. /**
  238. * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
  239. * @work: Work structure giving access to service data.
  240. */
  241. static void pcie_pme_work_fn(struct work_struct *work)
  242. {
  243. struct pcie_pme_service_data *data =
  244. container_of(work, struct pcie_pme_service_data, work);
  245. struct pci_dev *port = data->srv->port;
  246. int rtsta_pos;
  247. u32 rtsta;
  248. rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
  249. spin_lock_irq(&data->lock);
  250. for (;;) {
  251. if (data->noirq)
  252. break;
  253. pci_read_config_dword(port, rtsta_pos, &rtsta);
  254. if (rtsta & PCI_EXP_RTSTA_PME) {
  255. /*
  256. * Clear PME status of the port. If there are other
  257. * pending PMEs, the status will be set again.
  258. */
  259. pcie_pme_clear_status(port);
  260. spin_unlock_irq(&data->lock);
  261. pcie_pme_handle_request(port, rtsta & 0xffff);
  262. spin_lock_irq(&data->lock);
  263. continue;
  264. }
  265. /* No need to loop if there are no more PMEs pending. */
  266. if (!(rtsta & PCI_EXP_RTSTA_PENDING))
  267. break;
  268. spin_unlock_irq(&data->lock);
  269. cpu_relax();
  270. spin_lock_irq(&data->lock);
  271. }
  272. if (!data->noirq)
  273. pcie_pme_interrupt_enable(port, true);
  274. spin_unlock_irq(&data->lock);
  275. }
  276. /**
  277. * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
  278. * @irq: Interrupt vector.
  279. * @context: Interrupt context pointer.
  280. */
  281. static irqreturn_t pcie_pme_irq(int irq, void *context)
  282. {
  283. struct pci_dev *port;
  284. struct pcie_pme_service_data *data;
  285. int rtsta_pos;
  286. u32 rtsta;
  287. unsigned long flags;
  288. port = ((struct pcie_device *)context)->port;
  289. data = get_service_data((struct pcie_device *)context);
  290. rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
  291. spin_lock_irqsave(&data->lock, flags);
  292. pci_read_config_dword(port, rtsta_pos, &rtsta);
  293. if (!(rtsta & PCI_EXP_RTSTA_PME)) {
  294. spin_unlock_irqrestore(&data->lock, flags);
  295. return IRQ_NONE;
  296. }
  297. pcie_pme_interrupt_enable(port, false);
  298. spin_unlock_irqrestore(&data->lock, flags);
  299. /* We don't use pm_wq, because it's freezable. */
  300. schedule_work(&data->work);
  301. return IRQ_HANDLED;
  302. }
  303. /**
  304. * pcie_pme_set_native - Set the PME interrupt flag for given device.
  305. * @dev: PCI device to handle.
  306. * @ign: Ignored.
  307. */
  308. static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
  309. {
  310. dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
  311. device_set_run_wake(&dev->dev, true);
  312. dev->pme_interrupt = true;
  313. return 0;
  314. }
  315. /**
  316. * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
  317. * @port: PCIe root port or event collector to handle.
  318. *
  319. * For each device below given root port, including the port itself (or for each
  320. * root complex integrated endpoint if @port is a root complex event collector)
  321. * set the flag indicating that it can signal run-time wake-up events via PCIe
  322. * PME interrupts.
  323. */
  324. static void pcie_pme_mark_devices(struct pci_dev *port)
  325. {
  326. pcie_pme_set_native(port, NULL);
  327. if (port->subordinate) {
  328. pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
  329. } else {
  330. struct pci_bus *bus = port->bus;
  331. struct pci_dev *dev;
  332. /* Check if this is a root port event collector. */
  333. if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus)
  334. return;
  335. down_read(&pci_bus_sem);
  336. list_for_each_entry(dev, &bus->devices, bus_list)
  337. if (pci_is_pcie(dev)
  338. && dev->pcie_type == PCI_EXP_TYPE_RC_END)
  339. pcie_pme_set_native(dev, NULL);
  340. up_read(&pci_bus_sem);
  341. }
  342. }
  343. /**
  344. * pcie_pme_probe - Initialize PCIe PME service for given root port.
  345. * @srv: PCIe service to initialize.
  346. */
  347. static int pcie_pme_probe(struct pcie_device *srv)
  348. {
  349. struct pci_dev *port;
  350. struct pcie_pme_service_data *data;
  351. int ret;
  352. if (!pcie_pme_platform_setup(srv))
  353. return -EACCES;
  354. data = kzalloc(sizeof(*data), GFP_KERNEL);
  355. if (!data)
  356. return -ENOMEM;
  357. spin_lock_init(&data->lock);
  358. INIT_WORK(&data->work, pcie_pme_work_fn);
  359. data->srv = srv;
  360. set_service_data(srv, data);
  361. port = srv->port;
  362. pcie_pme_interrupt_enable(port, false);
  363. pcie_pme_clear_status(port);
  364. ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
  365. if (ret) {
  366. kfree(data);
  367. } else {
  368. pcie_pme_mark_devices(port);
  369. pcie_pme_interrupt_enable(port, true);
  370. }
  371. return ret;
  372. }
  373. /**
  374. * pcie_pme_suspend - Suspend PCIe PME service device.
  375. * @srv: PCIe service device to suspend.
  376. */
  377. static int pcie_pme_suspend(struct pcie_device *srv)
  378. {
  379. struct pcie_pme_service_data *data = get_service_data(srv);
  380. struct pci_dev *port = srv->port;
  381. spin_lock_irq(&data->lock);
  382. pcie_pme_interrupt_enable(port, false);
  383. pcie_pme_clear_status(port);
  384. data->noirq = true;
  385. spin_unlock_irq(&data->lock);
  386. synchronize_irq(srv->irq);
  387. return 0;
  388. }
  389. /**
  390. * pcie_pme_resume - Resume PCIe PME service device.
  391. * @srv - PCIe service device to resume.
  392. */
  393. static int pcie_pme_resume(struct pcie_device *srv)
  394. {
  395. struct pcie_pme_service_data *data = get_service_data(srv);
  396. struct pci_dev *port = srv->port;
  397. spin_lock_irq(&data->lock);
  398. data->noirq = false;
  399. pcie_pme_clear_status(port);
  400. pcie_pme_interrupt_enable(port, true);
  401. spin_unlock_irq(&data->lock);
  402. return 0;
  403. }
  404. /**
  405. * pcie_pme_remove - Prepare PCIe PME service device for removal.
  406. * @srv - PCIe service device to resume.
  407. */
  408. static void pcie_pme_remove(struct pcie_device *srv)
  409. {
  410. pcie_pme_suspend(srv);
  411. free_irq(srv->irq, srv);
  412. kfree(get_service_data(srv));
  413. }
  414. static struct pcie_port_service_driver pcie_pme_driver = {
  415. .name = "pcie_pme",
  416. .port_type = PCI_EXP_TYPE_ROOT_PORT,
  417. .service = PCIE_PORT_SERVICE_PME,
  418. .probe = pcie_pme_probe,
  419. .suspend = pcie_pme_suspend,
  420. .resume = pcie_pme_resume,
  421. .remove = pcie_pme_remove,
  422. };
  423. /**
  424. * pcie_pme_service_init - Register the PCIe PME service driver.
  425. */
  426. static int __init pcie_pme_service_init(void)
  427. {
  428. return pcie_pme_disabled ?
  429. -ENODEV : pcie_port_service_register(&pcie_pme_driver);
  430. }
  431. module_init(pcie_pme_service_init);