pci-sysfs.c 29 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include "pci.h"
  25. static int sysfs_initialized; /* = 0 */
  26. /* show configuration fields */
  27. #define pci_config_attr(field, format_string) \
  28. static ssize_t \
  29. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  30. { \
  31. struct pci_dev *pdev; \
  32. \
  33. pdev = to_pci_dev (dev); \
  34. return sprintf (buf, format_string, pdev->field); \
  35. }
  36. pci_config_attr(vendor, "0x%04x\n");
  37. pci_config_attr(device, "0x%04x\n");
  38. pci_config_attr(subsystem_vendor, "0x%04x\n");
  39. pci_config_attr(subsystem_device, "0x%04x\n");
  40. pci_config_attr(class, "0x%06x\n");
  41. pci_config_attr(irq, "%u\n");
  42. static ssize_t broken_parity_status_show(struct device *dev,
  43. struct device_attribute *attr,
  44. char *buf)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(dev);
  47. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  48. }
  49. static ssize_t broken_parity_status_store(struct device *dev,
  50. struct device_attribute *attr,
  51. const char *buf, size_t count)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. unsigned long val;
  55. if (strict_strtoul(buf, 0, &val) < 0)
  56. return -EINVAL;
  57. pdev->broken_parity_status = !!val;
  58. return count;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. const struct cpumask *mask;
  64. int len;
  65. #ifdef CONFIG_NUMA
  66. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  67. cpumask_of_node(dev_to_node(dev));
  68. #else
  69. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  70. #endif
  71. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  72. buf[len++] = '\n';
  73. buf[len] = '\0';
  74. return len;
  75. }
  76. static ssize_t local_cpulist_show(struct device *dev,
  77. struct device_attribute *attr, char *buf)
  78. {
  79. const struct cpumask *mask;
  80. int len;
  81. #ifdef CONFIG_NUMA
  82. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  83. cpumask_of_node(dev_to_node(dev));
  84. #else
  85. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  86. #endif
  87. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  88. buf[len++] = '\n';
  89. buf[len] = '\0';
  90. return len;
  91. }
  92. /* show resources */
  93. static ssize_t
  94. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  95. {
  96. struct pci_dev * pci_dev = to_pci_dev(dev);
  97. char * str = buf;
  98. int i;
  99. int max;
  100. resource_size_t start, end;
  101. if (pci_dev->subordinate)
  102. max = DEVICE_COUNT_RESOURCE;
  103. else
  104. max = PCI_BRIDGE_RESOURCES;
  105. for (i = 0; i < max; i++) {
  106. struct resource *res = &pci_dev->resource[i];
  107. pci_resource_to_user(pci_dev, i, res, &start, &end);
  108. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  109. (unsigned long long)start,
  110. (unsigned long long)end,
  111. (unsigned long long)res->flags);
  112. }
  113. return (str - buf);
  114. }
  115. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  116. {
  117. struct pci_dev *pci_dev = to_pci_dev(dev);
  118. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  119. pci_dev->vendor, pci_dev->device,
  120. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  121. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  122. (u8)(pci_dev->class));
  123. }
  124. static ssize_t is_enabled_store(struct device *dev,
  125. struct device_attribute *attr, const char *buf,
  126. size_t count)
  127. {
  128. struct pci_dev *pdev = to_pci_dev(dev);
  129. unsigned long val;
  130. ssize_t result = strict_strtoul(buf, 0, &val);
  131. if (result < 0)
  132. return result;
  133. /* this can crash the machine when done on the "wrong" device */
  134. if (!capable(CAP_SYS_ADMIN))
  135. return -EPERM;
  136. if (!val) {
  137. if (pci_is_enabled(pdev))
  138. pci_disable_device(pdev);
  139. else
  140. result = -EIO;
  141. } else
  142. result = pci_enable_device(pdev);
  143. return result < 0 ? result : count;
  144. }
  145. static ssize_t is_enabled_show(struct device *dev,
  146. struct device_attribute *attr, char *buf)
  147. {
  148. struct pci_dev *pdev;
  149. pdev = to_pci_dev (dev);
  150. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  151. }
  152. #ifdef CONFIG_NUMA
  153. static ssize_t
  154. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  155. {
  156. return sprintf (buf, "%d\n", dev->numa_node);
  157. }
  158. #endif
  159. static ssize_t
  160. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  161. {
  162. struct pci_dev *pdev = to_pci_dev(dev);
  163. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  164. }
  165. static ssize_t
  166. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  167. char *buf)
  168. {
  169. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  170. }
  171. static ssize_t
  172. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  173. {
  174. struct pci_dev *pdev = to_pci_dev(dev);
  175. if (!pdev->subordinate)
  176. return 0;
  177. return sprintf (buf, "%u\n",
  178. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  179. }
  180. static ssize_t
  181. msi_bus_store(struct device *dev, struct device_attribute *attr,
  182. const char *buf, size_t count)
  183. {
  184. struct pci_dev *pdev = to_pci_dev(dev);
  185. unsigned long val;
  186. if (strict_strtoul(buf, 0, &val) < 0)
  187. return -EINVAL;
  188. /* bad things may happen if the no_msi flag is changed
  189. * while some drivers are loaded */
  190. if (!capable(CAP_SYS_ADMIN))
  191. return -EPERM;
  192. /* Maybe pci devices without subordinate busses shouldn't even have this
  193. * attribute in the first place? */
  194. if (!pdev->subordinate)
  195. return count;
  196. /* Is the flag going to change, or keep the value it already had? */
  197. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  198. !!val) {
  199. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  200. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  201. " bad things could happen\n", val ? "" : " not");
  202. }
  203. return count;
  204. }
  205. #ifdef CONFIG_HOTPLUG
  206. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  207. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  208. size_t count)
  209. {
  210. unsigned long val;
  211. struct pci_bus *b = NULL;
  212. if (strict_strtoul(buf, 0, &val) < 0)
  213. return -EINVAL;
  214. if (val) {
  215. mutex_lock(&pci_remove_rescan_mutex);
  216. while ((b = pci_find_next_bus(b)) != NULL)
  217. pci_rescan_bus(b);
  218. mutex_unlock(&pci_remove_rescan_mutex);
  219. }
  220. return count;
  221. }
  222. struct bus_attribute pci_bus_attrs[] = {
  223. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  224. __ATTR_NULL
  225. };
  226. static ssize_t
  227. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  228. const char *buf, size_t count)
  229. {
  230. unsigned long val;
  231. struct pci_dev *pdev = to_pci_dev(dev);
  232. if (strict_strtoul(buf, 0, &val) < 0)
  233. return -EINVAL;
  234. if (val) {
  235. mutex_lock(&pci_remove_rescan_mutex);
  236. pci_rescan_bus(pdev->bus);
  237. mutex_unlock(&pci_remove_rescan_mutex);
  238. }
  239. return count;
  240. }
  241. static void remove_callback(struct device *dev)
  242. {
  243. struct pci_dev *pdev = to_pci_dev(dev);
  244. mutex_lock(&pci_remove_rescan_mutex);
  245. pci_remove_bus_device(pdev);
  246. mutex_unlock(&pci_remove_rescan_mutex);
  247. }
  248. static ssize_t
  249. remove_store(struct device *dev, struct device_attribute *dummy,
  250. const char *buf, size_t count)
  251. {
  252. int ret = 0;
  253. unsigned long val;
  254. if (strict_strtoul(buf, 0, &val) < 0)
  255. return -EINVAL;
  256. /* An attribute cannot be unregistered by one of its own methods,
  257. * so we have to use this roundabout approach.
  258. */
  259. if (val)
  260. ret = device_schedule_callback(dev, remove_callback);
  261. if (ret)
  262. count = ret;
  263. return count;
  264. }
  265. #endif
  266. struct device_attribute pci_dev_attrs[] = {
  267. __ATTR_RO(resource),
  268. __ATTR_RO(vendor),
  269. __ATTR_RO(device),
  270. __ATTR_RO(subsystem_vendor),
  271. __ATTR_RO(subsystem_device),
  272. __ATTR_RO(class),
  273. __ATTR_RO(irq),
  274. __ATTR_RO(local_cpus),
  275. __ATTR_RO(local_cpulist),
  276. __ATTR_RO(modalias),
  277. #ifdef CONFIG_NUMA
  278. __ATTR_RO(numa_node),
  279. #endif
  280. __ATTR_RO(dma_mask_bits),
  281. __ATTR_RO(consistent_dma_mask_bits),
  282. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  283. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  284. broken_parity_status_show,broken_parity_status_store),
  285. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  286. #ifdef CONFIG_HOTPLUG
  287. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  288. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  289. #endif
  290. __ATTR_NULL,
  291. };
  292. static ssize_t
  293. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  294. {
  295. struct pci_dev *pdev = to_pci_dev(dev);
  296. return sprintf(buf, "%u\n",
  297. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  298. IORESOURCE_ROM_SHADOW));
  299. }
  300. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  301. static ssize_t
  302. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  303. char *buf, loff_t off, size_t count)
  304. {
  305. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  306. unsigned int size = 64;
  307. loff_t init_off = off;
  308. u8 *data = (u8*) buf;
  309. /* Several chips lock up trying to read undefined config space */
  310. if (capable(CAP_SYS_ADMIN)) {
  311. size = dev->cfg_size;
  312. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  313. size = 128;
  314. }
  315. if (off > size)
  316. return 0;
  317. if (off + count > size) {
  318. size -= off;
  319. count = size;
  320. } else {
  321. size = count;
  322. }
  323. if ((off & 1) && size) {
  324. u8 val;
  325. pci_user_read_config_byte(dev, off, &val);
  326. data[off - init_off] = val;
  327. off++;
  328. size--;
  329. }
  330. if ((off & 3) && size > 2) {
  331. u16 val;
  332. pci_user_read_config_word(dev, off, &val);
  333. data[off - init_off] = val & 0xff;
  334. data[off - init_off + 1] = (val >> 8) & 0xff;
  335. off += 2;
  336. size -= 2;
  337. }
  338. while (size > 3) {
  339. u32 val;
  340. pci_user_read_config_dword(dev, off, &val);
  341. data[off - init_off] = val & 0xff;
  342. data[off - init_off + 1] = (val >> 8) & 0xff;
  343. data[off - init_off + 2] = (val >> 16) & 0xff;
  344. data[off - init_off + 3] = (val >> 24) & 0xff;
  345. off += 4;
  346. size -= 4;
  347. }
  348. if (size >= 2) {
  349. u16 val;
  350. pci_user_read_config_word(dev, off, &val);
  351. data[off - init_off] = val & 0xff;
  352. data[off - init_off + 1] = (val >> 8) & 0xff;
  353. off += 2;
  354. size -= 2;
  355. }
  356. if (size > 0) {
  357. u8 val;
  358. pci_user_read_config_byte(dev, off, &val);
  359. data[off - init_off] = val;
  360. off++;
  361. --size;
  362. }
  363. return count;
  364. }
  365. static ssize_t
  366. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  367. char *buf, loff_t off, size_t count)
  368. {
  369. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  370. unsigned int size = count;
  371. loff_t init_off = off;
  372. u8 *data = (u8*) buf;
  373. if (off > dev->cfg_size)
  374. return 0;
  375. if (off + count > dev->cfg_size) {
  376. size = dev->cfg_size - off;
  377. count = size;
  378. }
  379. if ((off & 1) && size) {
  380. pci_user_write_config_byte(dev, off, data[off - init_off]);
  381. off++;
  382. size--;
  383. }
  384. if ((off & 3) && size > 2) {
  385. u16 val = data[off - init_off];
  386. val |= (u16) data[off - init_off + 1] << 8;
  387. pci_user_write_config_word(dev, off, val);
  388. off += 2;
  389. size -= 2;
  390. }
  391. while (size > 3) {
  392. u32 val = data[off - init_off];
  393. val |= (u32) data[off - init_off + 1] << 8;
  394. val |= (u32) data[off - init_off + 2] << 16;
  395. val |= (u32) data[off - init_off + 3] << 24;
  396. pci_user_write_config_dword(dev, off, val);
  397. off += 4;
  398. size -= 4;
  399. }
  400. if (size >= 2) {
  401. u16 val = data[off - init_off];
  402. val |= (u16) data[off - init_off + 1] << 8;
  403. pci_user_write_config_word(dev, off, val);
  404. off += 2;
  405. size -= 2;
  406. }
  407. if (size) {
  408. pci_user_write_config_byte(dev, off, data[off - init_off]);
  409. off++;
  410. --size;
  411. }
  412. return count;
  413. }
  414. static ssize_t
  415. read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  416. char *buf, loff_t off, size_t count)
  417. {
  418. struct pci_dev *dev =
  419. to_pci_dev(container_of(kobj, struct device, kobj));
  420. if (off > bin_attr->size)
  421. count = 0;
  422. else if (count > bin_attr->size - off)
  423. count = bin_attr->size - off;
  424. return pci_read_vpd(dev, off, count, buf);
  425. }
  426. static ssize_t
  427. write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  428. char *buf, loff_t off, size_t count)
  429. {
  430. struct pci_dev *dev =
  431. to_pci_dev(container_of(kobj, struct device, kobj));
  432. if (off > bin_attr->size)
  433. count = 0;
  434. else if (count > bin_attr->size - off)
  435. count = bin_attr->size - off;
  436. return pci_write_vpd(dev, off, count, buf);
  437. }
  438. #ifdef HAVE_PCI_LEGACY
  439. /**
  440. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  441. * @kobj: kobject corresponding to file to read from
  442. * @bin_attr: struct bin_attribute for this file
  443. * @buf: buffer to store results
  444. * @off: offset into legacy I/O port space
  445. * @count: number of bytes to read
  446. *
  447. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  448. * callback routine (pci_legacy_read).
  449. */
  450. static ssize_t
  451. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  452. char *buf, loff_t off, size_t count)
  453. {
  454. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  455. struct device,
  456. kobj));
  457. /* Only support 1, 2 or 4 byte accesses */
  458. if (count != 1 && count != 2 && count != 4)
  459. return -EINVAL;
  460. return pci_legacy_read(bus, off, (u32 *)buf, count);
  461. }
  462. /**
  463. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  464. * @kobj: kobject corresponding to file to read from
  465. * @bin_attr: struct bin_attribute for this file
  466. * @buf: buffer containing value to be written
  467. * @off: offset into legacy I/O port space
  468. * @count: number of bytes to write
  469. *
  470. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  471. * callback routine (pci_legacy_write).
  472. */
  473. static ssize_t
  474. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  475. char *buf, loff_t off, size_t count)
  476. {
  477. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  478. struct device,
  479. kobj));
  480. /* Only support 1, 2 or 4 byte accesses */
  481. if (count != 1 && count != 2 && count != 4)
  482. return -EINVAL;
  483. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  484. }
  485. /**
  486. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  487. * @kobj: kobject corresponding to device to be mapped
  488. * @attr: struct bin_attribute for this file
  489. * @vma: struct vm_area_struct passed to mmap
  490. *
  491. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  492. * legacy memory space (first meg of bus space) into application virtual
  493. * memory space.
  494. */
  495. static int
  496. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  497. struct vm_area_struct *vma)
  498. {
  499. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  500. struct device,
  501. kobj));
  502. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  503. }
  504. /**
  505. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  506. * @kobj: kobject corresponding to device to be mapped
  507. * @attr: struct bin_attribute for this file
  508. * @vma: struct vm_area_struct passed to mmap
  509. *
  510. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  511. * legacy IO space (first meg of bus space) into application virtual
  512. * memory space. Returns -ENOSYS if the operation isn't supported
  513. */
  514. static int
  515. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  516. struct vm_area_struct *vma)
  517. {
  518. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  519. struct device,
  520. kobj));
  521. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  522. }
  523. /**
  524. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  525. * @b: bus to create files under
  526. * @mmap_type: I/O port or memory
  527. *
  528. * Stub implementation. Can be overridden by arch if necessary.
  529. */
  530. void __weak
  531. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  532. {
  533. return;
  534. }
  535. /**
  536. * pci_create_legacy_files - create legacy I/O port and memory files
  537. * @b: bus to create files under
  538. *
  539. * Some platforms allow access to legacy I/O port and ISA memory space on
  540. * a per-bus basis. This routine creates the files and ties them into
  541. * their associated read, write and mmap files from pci-sysfs.c
  542. *
  543. * On error unwind, but don't propogate the error to the caller
  544. * as it is ok to set up the PCI bus without these files.
  545. */
  546. void pci_create_legacy_files(struct pci_bus *b)
  547. {
  548. int error;
  549. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  550. GFP_ATOMIC);
  551. if (!b->legacy_io)
  552. goto kzalloc_err;
  553. sysfs_bin_attr_init(b->legacy_io);
  554. b->legacy_io->attr.name = "legacy_io";
  555. b->legacy_io->size = 0xffff;
  556. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  557. b->legacy_io->read = pci_read_legacy_io;
  558. b->legacy_io->write = pci_write_legacy_io;
  559. b->legacy_io->mmap = pci_mmap_legacy_io;
  560. pci_adjust_legacy_attr(b, pci_mmap_io);
  561. error = device_create_bin_file(&b->dev, b->legacy_io);
  562. if (error)
  563. goto legacy_io_err;
  564. /* Allocated above after the legacy_io struct */
  565. sysfs_bin_attr_init(b->legacy_mem);
  566. b->legacy_mem = b->legacy_io + 1;
  567. b->legacy_mem->attr.name = "legacy_mem";
  568. b->legacy_mem->size = 1024*1024;
  569. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  570. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  571. pci_adjust_legacy_attr(b, pci_mmap_mem);
  572. error = device_create_bin_file(&b->dev, b->legacy_mem);
  573. if (error)
  574. goto legacy_mem_err;
  575. return;
  576. legacy_mem_err:
  577. device_remove_bin_file(&b->dev, b->legacy_io);
  578. legacy_io_err:
  579. kfree(b->legacy_io);
  580. b->legacy_io = NULL;
  581. kzalloc_err:
  582. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  583. "and ISA memory resources to sysfs\n");
  584. return;
  585. }
  586. void pci_remove_legacy_files(struct pci_bus *b)
  587. {
  588. if (b->legacy_io) {
  589. device_remove_bin_file(&b->dev, b->legacy_io);
  590. device_remove_bin_file(&b->dev, b->legacy_mem);
  591. kfree(b->legacy_io); /* both are allocated here */
  592. }
  593. }
  594. #endif /* HAVE_PCI_LEGACY */
  595. #ifdef HAVE_PCI_MMAP
  596. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  597. {
  598. unsigned long nr, start, size;
  599. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  600. start = vma->vm_pgoff;
  601. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  602. if (start < size && size - start >= nr)
  603. return 1;
  604. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  605. current->comm, start, start+nr, pci_name(pdev), resno, size);
  606. return 0;
  607. }
  608. /**
  609. * pci_mmap_resource - map a PCI resource into user memory space
  610. * @kobj: kobject for mapping
  611. * @attr: struct bin_attribute for the file being mapped
  612. * @vma: struct vm_area_struct passed into the mmap
  613. * @write_combine: 1 for write_combine mapping
  614. *
  615. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  616. */
  617. static int
  618. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  619. struct vm_area_struct *vma, int write_combine)
  620. {
  621. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  622. struct device, kobj));
  623. struct resource *res = (struct resource *)attr->private;
  624. enum pci_mmap_state mmap_type;
  625. resource_size_t start, end;
  626. int i;
  627. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  628. if (res == &pdev->resource[i])
  629. break;
  630. if (i >= PCI_ROM_RESOURCE)
  631. return -ENODEV;
  632. if (!pci_mmap_fits(pdev, i, vma))
  633. return -EINVAL;
  634. /* pci_mmap_page_range() expects the same kind of entry as coming
  635. * from /proc/bus/pci/ which is a "user visible" value. If this is
  636. * different from the resource itself, arch will do necessary fixup.
  637. */
  638. pci_resource_to_user(pdev, i, res, &start, &end);
  639. vma->vm_pgoff += start >> PAGE_SHIFT;
  640. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  641. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  642. return -EINVAL;
  643. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  644. }
  645. static int
  646. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  647. struct vm_area_struct *vma)
  648. {
  649. return pci_mmap_resource(kobj, attr, vma, 0);
  650. }
  651. static int
  652. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  653. struct vm_area_struct *vma)
  654. {
  655. return pci_mmap_resource(kobj, attr, vma, 1);
  656. }
  657. /**
  658. * pci_remove_resource_files - cleanup resource files
  659. * @pdev: dev to cleanup
  660. *
  661. * If we created resource files for @pdev, remove them from sysfs and
  662. * free their resources.
  663. */
  664. static void
  665. pci_remove_resource_files(struct pci_dev *pdev)
  666. {
  667. int i;
  668. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  669. struct bin_attribute *res_attr;
  670. res_attr = pdev->res_attr[i];
  671. if (res_attr) {
  672. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  673. kfree(res_attr);
  674. }
  675. res_attr = pdev->res_attr_wc[i];
  676. if (res_attr) {
  677. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  678. kfree(res_attr);
  679. }
  680. }
  681. }
  682. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  683. {
  684. /* allocate attribute structure, piggyback attribute name */
  685. int name_len = write_combine ? 13 : 10;
  686. struct bin_attribute *res_attr;
  687. int retval;
  688. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  689. if (res_attr) {
  690. char *res_attr_name = (char *)(res_attr + 1);
  691. sysfs_bin_attr_init(res_attr);
  692. if (write_combine) {
  693. pdev->res_attr_wc[num] = res_attr;
  694. sprintf(res_attr_name, "resource%d_wc", num);
  695. res_attr->mmap = pci_mmap_resource_wc;
  696. } else {
  697. pdev->res_attr[num] = res_attr;
  698. sprintf(res_attr_name, "resource%d", num);
  699. res_attr->mmap = pci_mmap_resource_uc;
  700. }
  701. res_attr->attr.name = res_attr_name;
  702. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  703. res_attr->size = pci_resource_len(pdev, num);
  704. res_attr->private = &pdev->resource[num];
  705. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  706. } else
  707. retval = -ENOMEM;
  708. return retval;
  709. }
  710. /**
  711. * pci_create_resource_files - create resource files in sysfs for @dev
  712. * @pdev: dev in question
  713. *
  714. * Walk the resources in @pdev creating files for each resource available.
  715. */
  716. static int pci_create_resource_files(struct pci_dev *pdev)
  717. {
  718. int i;
  719. int retval;
  720. /* Expose the PCI resources from this device as files */
  721. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  722. /* skip empty resources */
  723. if (!pci_resource_len(pdev, i))
  724. continue;
  725. retval = pci_create_attr(pdev, i, 0);
  726. /* for prefetchable resources, create a WC mappable file */
  727. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  728. retval = pci_create_attr(pdev, i, 1);
  729. if (retval) {
  730. pci_remove_resource_files(pdev);
  731. return retval;
  732. }
  733. }
  734. return 0;
  735. }
  736. #else /* !HAVE_PCI_MMAP */
  737. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  738. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  739. #endif /* HAVE_PCI_MMAP */
  740. /**
  741. * pci_write_rom - used to enable access to the PCI ROM display
  742. * @kobj: kernel object handle
  743. * @bin_attr: struct bin_attribute for this file
  744. * @buf: user input
  745. * @off: file offset
  746. * @count: number of byte in input
  747. *
  748. * writing anything except 0 enables it
  749. */
  750. static ssize_t
  751. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  752. char *buf, loff_t off, size_t count)
  753. {
  754. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  755. if ((off == 0) && (*buf == '0') && (count == 2))
  756. pdev->rom_attr_enabled = 0;
  757. else
  758. pdev->rom_attr_enabled = 1;
  759. return count;
  760. }
  761. /**
  762. * pci_read_rom - read a PCI ROM
  763. * @kobj: kernel object handle
  764. * @bin_attr: struct bin_attribute for this file
  765. * @buf: where to put the data we read from the ROM
  766. * @off: file offset
  767. * @count: number of bytes to read
  768. *
  769. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  770. * device corresponding to @kobj.
  771. */
  772. static ssize_t
  773. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  774. char *buf, loff_t off, size_t count)
  775. {
  776. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  777. void __iomem *rom;
  778. size_t size;
  779. if (!pdev->rom_attr_enabled)
  780. return -EINVAL;
  781. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  782. if (!rom || !size)
  783. return -EIO;
  784. if (off >= size)
  785. count = 0;
  786. else {
  787. if (off + count > size)
  788. count = size - off;
  789. memcpy_fromio(buf, rom + off, count);
  790. }
  791. pci_unmap_rom(pdev, rom);
  792. return count;
  793. }
  794. static struct bin_attribute pci_config_attr = {
  795. .attr = {
  796. .name = "config",
  797. .mode = S_IRUGO | S_IWUSR,
  798. },
  799. .size = PCI_CFG_SPACE_SIZE,
  800. .read = pci_read_config,
  801. .write = pci_write_config,
  802. };
  803. static struct bin_attribute pcie_config_attr = {
  804. .attr = {
  805. .name = "config",
  806. .mode = S_IRUGO | S_IWUSR,
  807. },
  808. .size = PCI_CFG_SPACE_EXP_SIZE,
  809. .read = pci_read_config,
  810. .write = pci_write_config,
  811. };
  812. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  813. {
  814. return 0;
  815. }
  816. static ssize_t reset_store(struct device *dev,
  817. struct device_attribute *attr, const char *buf,
  818. size_t count)
  819. {
  820. struct pci_dev *pdev = to_pci_dev(dev);
  821. unsigned long val;
  822. ssize_t result = strict_strtoul(buf, 0, &val);
  823. if (result < 0)
  824. return result;
  825. if (val != 1)
  826. return -EINVAL;
  827. return pci_reset_function(pdev);
  828. }
  829. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  830. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  831. {
  832. int retval;
  833. struct bin_attribute *attr;
  834. /* If the device has VPD, try to expose it in sysfs. */
  835. if (dev->vpd) {
  836. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  837. if (!attr)
  838. return -ENOMEM;
  839. sysfs_bin_attr_init(attr);
  840. attr->size = dev->vpd->len;
  841. attr->attr.name = "vpd";
  842. attr->attr.mode = S_IRUSR | S_IWUSR;
  843. attr->read = read_vpd_attr;
  844. attr->write = write_vpd_attr;
  845. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  846. if (retval) {
  847. kfree(dev->vpd->attr);
  848. return retval;
  849. }
  850. dev->vpd->attr = attr;
  851. }
  852. /* Active State Power Management */
  853. pcie_aspm_create_sysfs_dev_files(dev);
  854. if (!pci_probe_reset_function(dev)) {
  855. retval = device_create_file(&dev->dev, &reset_attr);
  856. if (retval)
  857. goto error;
  858. dev->reset_fn = 1;
  859. }
  860. return 0;
  861. error:
  862. pcie_aspm_remove_sysfs_dev_files(dev);
  863. if (dev->vpd && dev->vpd->attr) {
  864. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  865. kfree(dev->vpd->attr);
  866. }
  867. return retval;
  868. }
  869. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  870. {
  871. int retval;
  872. int rom_size = 0;
  873. struct bin_attribute *attr;
  874. if (!sysfs_initialized)
  875. return -EACCES;
  876. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  877. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  878. else
  879. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  880. if (retval)
  881. goto err;
  882. retval = pci_create_resource_files(pdev);
  883. if (retval)
  884. goto err_config_file;
  885. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  886. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  887. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  888. rom_size = 0x20000;
  889. /* If the device has a ROM, try to expose it in sysfs. */
  890. if (rom_size) {
  891. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  892. if (!attr) {
  893. retval = -ENOMEM;
  894. goto err_resource_files;
  895. }
  896. sysfs_bin_attr_init(attr);
  897. attr->size = rom_size;
  898. attr->attr.name = "rom";
  899. attr->attr.mode = S_IRUSR;
  900. attr->read = pci_read_rom;
  901. attr->write = pci_write_rom;
  902. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  903. if (retval) {
  904. kfree(attr);
  905. goto err_resource_files;
  906. }
  907. pdev->rom_attr = attr;
  908. }
  909. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  910. retval = device_create_file(&pdev->dev, &vga_attr);
  911. if (retval)
  912. goto err_rom_file;
  913. }
  914. /* add platform-specific attributes */
  915. retval = pcibios_add_platform_entries(pdev);
  916. if (retval)
  917. goto err_vga_file;
  918. /* add sysfs entries for various capabilities */
  919. retval = pci_create_capabilities_sysfs(pdev);
  920. if (retval)
  921. goto err_vga_file;
  922. return 0;
  923. err_vga_file:
  924. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  925. device_remove_file(&pdev->dev, &vga_attr);
  926. err_rom_file:
  927. if (rom_size) {
  928. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  929. kfree(pdev->rom_attr);
  930. pdev->rom_attr = NULL;
  931. }
  932. err_resource_files:
  933. pci_remove_resource_files(pdev);
  934. err_config_file:
  935. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  936. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  937. else
  938. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  939. err:
  940. return retval;
  941. }
  942. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  943. {
  944. if (dev->vpd && dev->vpd->attr) {
  945. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  946. kfree(dev->vpd->attr);
  947. }
  948. pcie_aspm_remove_sysfs_dev_files(dev);
  949. if (dev->reset_fn) {
  950. device_remove_file(&dev->dev, &reset_attr);
  951. dev->reset_fn = 0;
  952. }
  953. }
  954. /**
  955. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  956. * @pdev: device whose entries we should free
  957. *
  958. * Cleanup when @pdev is removed from sysfs.
  959. */
  960. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  961. {
  962. int rom_size = 0;
  963. if (!sysfs_initialized)
  964. return;
  965. pci_remove_capabilities_sysfs(pdev);
  966. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  967. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  968. else
  969. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  970. pci_remove_resource_files(pdev);
  971. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  972. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  973. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  974. rom_size = 0x20000;
  975. if (rom_size && pdev->rom_attr) {
  976. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  977. kfree(pdev->rom_attr);
  978. }
  979. }
  980. static int __init pci_sysfs_init(void)
  981. {
  982. struct pci_dev *pdev = NULL;
  983. int retval;
  984. sysfs_initialized = 1;
  985. for_each_pci_dev(pdev) {
  986. retval = pci_create_sysfs_dev_files(pdev);
  987. if (retval) {
  988. pci_dev_put(pdev);
  989. return retval;
  990. }
  991. }
  992. return 0;
  993. }
  994. late_initcall(pci_sysfs_init);