rt2x00queue.c 24 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  4. <http://rt2x00.serialmonkey.com>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the
  15. Free Software Foundation, Inc.,
  16. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. /*
  19. Module: rt2x00lib
  20. Abstract: rt2x00 queue specific routines.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/dma-mapping.h>
  25. #include "rt2x00.h"
  26. #include "rt2x00lib.h"
  27. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  28. struct queue_entry *entry)
  29. {
  30. struct sk_buff *skb;
  31. struct skb_frame_desc *skbdesc;
  32. unsigned int frame_size;
  33. unsigned int head_size = 0;
  34. unsigned int tail_size = 0;
  35. /*
  36. * The frame size includes descriptor size, because the
  37. * hardware directly receive the frame into the skbuffer.
  38. */
  39. frame_size = entry->queue->data_size + entry->queue->desc_size;
  40. /*
  41. * The payload should be aligned to a 4-byte boundary,
  42. * this means we need at least 3 bytes for moving the frame
  43. * into the correct offset.
  44. */
  45. head_size = 4;
  46. /*
  47. * For IV/EIV/ICV assembly we must make sure there is
  48. * at least 8 bytes bytes available in headroom for IV/EIV
  49. * and 8 bytes for ICV data as tailroon.
  50. */
  51. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  52. head_size += 8;
  53. tail_size += 8;
  54. }
  55. /*
  56. * Allocate skbuffer.
  57. */
  58. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  59. if (!skb)
  60. return NULL;
  61. /*
  62. * Make sure we not have a frame with the requested bytes
  63. * available in the head and tail.
  64. */
  65. skb_reserve(skb, head_size);
  66. skb_put(skb, frame_size);
  67. /*
  68. * Populate skbdesc.
  69. */
  70. skbdesc = get_skb_frame_desc(skb);
  71. memset(skbdesc, 0, sizeof(*skbdesc));
  72. skbdesc->entry = entry;
  73. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  74. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  75. skb->data,
  76. skb->len,
  77. DMA_FROM_DEVICE);
  78. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  79. }
  80. return skb;
  81. }
  82. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  83. {
  84. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  85. /*
  86. * If device has requested headroom, we should make sure that
  87. * is also mapped to the DMA so it can be used for transfering
  88. * additional descriptor information to the hardware.
  89. */
  90. skb_push(skb, rt2x00dev->ops->extra_tx_headroom);
  91. skbdesc->skb_dma =
  92. dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
  93. /*
  94. * Restore data pointer to original location again.
  95. */
  96. skb_pull(skb, rt2x00dev->ops->extra_tx_headroom);
  97. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  98. }
  99. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  100. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  101. {
  102. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  103. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  104. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  105. DMA_FROM_DEVICE);
  106. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  107. }
  108. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  109. /*
  110. * Add headroom to the skb length, it has been removed
  111. * by the driver, but it was actually mapped to DMA.
  112. */
  113. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
  114. skb->len + rt2x00dev->ops->extra_tx_headroom,
  115. DMA_TO_DEVICE);
  116. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  117. }
  118. }
  119. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  120. {
  121. if (!skb)
  122. return;
  123. rt2x00queue_unmap_skb(rt2x00dev, skb);
  124. dev_kfree_skb_any(skb);
  125. }
  126. void rt2x00queue_align_frame(struct sk_buff *skb)
  127. {
  128. unsigned int frame_length = skb->len;
  129. unsigned int align = ALIGN_SIZE(skb, 0);
  130. if (!align)
  131. return;
  132. skb_push(skb, align);
  133. memmove(skb->data, skb->data + align, frame_length);
  134. skb_trim(skb, frame_length);
  135. }
  136. void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
  137. {
  138. unsigned int frame_length = skb->len;
  139. unsigned int align = ALIGN_SIZE(skb, header_length);
  140. if (!align)
  141. return;
  142. skb_push(skb, align);
  143. memmove(skb->data, skb->data + align, frame_length);
  144. skb_trim(skb, frame_length);
  145. }
  146. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  147. {
  148. unsigned int payload_length = skb->len - header_length;
  149. unsigned int header_align = ALIGN_SIZE(skb, 0);
  150. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  151. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  152. /*
  153. * Adjust the header alignment if the payload needs to be moved more
  154. * than the header.
  155. */
  156. if (payload_align > header_align)
  157. header_align += 4;
  158. /* There is nothing to do if no alignment is needed */
  159. if (!header_align)
  160. return;
  161. /* Reserve the amount of space needed in front of the frame */
  162. skb_push(skb, header_align);
  163. /*
  164. * Move the header.
  165. */
  166. memmove(skb->data, skb->data + header_align, header_length);
  167. /* Move the payload, if present and if required */
  168. if (payload_length && payload_align)
  169. memmove(skb->data + header_length + l2pad,
  170. skb->data + header_length + l2pad + payload_align,
  171. payload_length);
  172. /* Trim the skb to the correct size */
  173. skb_trim(skb, header_length + l2pad + payload_length);
  174. }
  175. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  176. {
  177. unsigned int l2pad = L2PAD_SIZE(header_length);
  178. if (!l2pad)
  179. return;
  180. memmove(skb->data + l2pad, skb->data, header_length);
  181. skb_pull(skb, l2pad);
  182. }
  183. static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
  184. struct txentry_desc *txdesc)
  185. {
  186. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  187. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  188. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  189. unsigned long irqflags;
  190. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
  191. unlikely(!tx_info->control.vif))
  192. return;
  193. /*
  194. * Hardware should insert sequence counter.
  195. * FIXME: We insert a software sequence counter first for
  196. * hardware that doesn't support hardware sequence counting.
  197. *
  198. * This is wrong because beacons are not getting sequence
  199. * numbers assigned properly.
  200. *
  201. * A secondary problem exists for drivers that cannot toggle
  202. * sequence counting per-frame, since those will override the
  203. * sequence counter given by mac80211.
  204. */
  205. spin_lock_irqsave(&intf->seqlock, irqflags);
  206. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  207. intf->seqno += 0x10;
  208. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  209. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  210. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  211. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  212. }
  213. static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
  214. struct txentry_desc *txdesc,
  215. const struct rt2x00_rate *hwrate)
  216. {
  217. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  218. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  219. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  220. unsigned int data_length;
  221. unsigned int duration;
  222. unsigned int residual;
  223. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  224. data_length = entry->skb->len + 4;
  225. data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
  226. /*
  227. * PLCP setup
  228. * Length calculation depends on OFDM/CCK rate.
  229. */
  230. txdesc->signal = hwrate->plcp;
  231. txdesc->service = 0x04;
  232. if (hwrate->flags & DEV_RATE_OFDM) {
  233. txdesc->length_high = (data_length >> 6) & 0x3f;
  234. txdesc->length_low = data_length & 0x3f;
  235. } else {
  236. /*
  237. * Convert length to microseconds.
  238. */
  239. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  240. duration = GET_DURATION(data_length, hwrate->bitrate);
  241. if (residual != 0) {
  242. duration++;
  243. /*
  244. * Check if we need to set the Length Extension
  245. */
  246. if (hwrate->bitrate == 110 && residual <= 30)
  247. txdesc->service |= 0x80;
  248. }
  249. txdesc->length_high = (duration >> 8) & 0xff;
  250. txdesc->length_low = duration & 0xff;
  251. /*
  252. * When preamble is enabled we should set the
  253. * preamble bit for the signal.
  254. */
  255. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  256. txdesc->signal |= 0x08;
  257. }
  258. }
  259. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  260. struct txentry_desc *txdesc)
  261. {
  262. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  263. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  264. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  265. struct ieee80211_rate *rate =
  266. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  267. const struct rt2x00_rate *hwrate;
  268. memset(txdesc, 0, sizeof(*txdesc));
  269. /*
  270. * Initialize information from queue
  271. */
  272. txdesc->queue = entry->queue->qid;
  273. txdesc->cw_min = entry->queue->cw_min;
  274. txdesc->cw_max = entry->queue->cw_max;
  275. txdesc->aifs = entry->queue->aifs;
  276. /*
  277. * Header and alignment information.
  278. */
  279. txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
  280. if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags) &&
  281. (entry->skb->len > txdesc->header_length))
  282. txdesc->l2pad = L2PAD_SIZE(txdesc->header_length);
  283. /*
  284. * Check whether this frame is to be acked.
  285. */
  286. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  287. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  288. /*
  289. * Check if this is a RTS/CTS frame
  290. */
  291. if (ieee80211_is_rts(hdr->frame_control) ||
  292. ieee80211_is_cts(hdr->frame_control)) {
  293. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  294. if (ieee80211_is_rts(hdr->frame_control))
  295. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  296. else
  297. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  298. if (tx_info->control.rts_cts_rate_idx >= 0)
  299. rate =
  300. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  301. }
  302. /*
  303. * Determine retry information.
  304. */
  305. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  306. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  307. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  308. /*
  309. * Check if more fragments are pending
  310. */
  311. if (ieee80211_has_morefrags(hdr->frame_control) ||
  312. (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)) {
  313. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  314. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  315. }
  316. /*
  317. * Beacons and probe responses require the tsf timestamp
  318. * to be inserted into the frame, except for a frame that has been injected
  319. * through a monitor interface. This latter is needed for testing a
  320. * monitor interface.
  321. */
  322. if ((ieee80211_is_beacon(hdr->frame_control) ||
  323. ieee80211_is_probe_resp(hdr->frame_control)) &&
  324. (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
  325. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  326. /*
  327. * Determine with what IFS priority this frame should be send.
  328. * Set ifs to IFS_SIFS when the this is not the first fragment,
  329. * or this fragment came after RTS/CTS.
  330. */
  331. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  332. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  333. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  334. txdesc->ifs = IFS_BACKOFF;
  335. } else
  336. txdesc->ifs = IFS_SIFS;
  337. /*
  338. * Determine rate modulation.
  339. */
  340. hwrate = rt2x00_get_rate(rate->hw_value);
  341. txdesc->rate_mode = RATE_MODE_CCK;
  342. if (hwrate->flags & DEV_RATE_OFDM)
  343. txdesc->rate_mode = RATE_MODE_OFDM;
  344. /*
  345. * Apply TX descriptor handling by components
  346. */
  347. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  348. rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
  349. rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
  350. rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
  351. }
  352. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  353. struct txentry_desc *txdesc)
  354. {
  355. struct data_queue *queue = entry->queue;
  356. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  357. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  358. /*
  359. * All processing on the frame has been completed, this means
  360. * it is now ready to be dumped to userspace through debugfs.
  361. */
  362. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
  363. /*
  364. * Check if we need to kick the queue, there are however a few rules
  365. * 1) Don't kick beacon queue
  366. * 2) Don't kick unless this is the last in frame in a burst.
  367. * When the burst flag is set, this frame is always followed
  368. * by another frame which in some way are related to eachother.
  369. * This is true for fragments, RTS or CTS-to-self frames.
  370. * 3) Rule 2 can be broken when the available entries
  371. * in the queue are less then a certain threshold.
  372. */
  373. if (entry->queue->qid == QID_BEACON)
  374. return;
  375. if (rt2x00queue_threshold(queue) ||
  376. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  377. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  378. }
  379. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  380. bool local)
  381. {
  382. struct ieee80211_tx_info *tx_info;
  383. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  384. struct txentry_desc txdesc;
  385. struct skb_frame_desc *skbdesc;
  386. u8 rate_idx, rate_flags;
  387. if (unlikely(rt2x00queue_full(queue)))
  388. return -ENOBUFS;
  389. if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  390. ERROR(queue->rt2x00dev,
  391. "Arrived at non-free entry in the non-full queue %d.\n"
  392. "Please file bug report to %s.\n",
  393. queue->qid, DRV_PROJECT);
  394. return -EINVAL;
  395. }
  396. /*
  397. * Copy all TX descriptor information into txdesc,
  398. * after that we are free to use the skb->cb array
  399. * for our information.
  400. */
  401. entry->skb = skb;
  402. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  403. /*
  404. * All information is retrieved from the skb->cb array,
  405. * now we should claim ownership of the driver part of that
  406. * array, preserving the bitrate index and flags.
  407. */
  408. tx_info = IEEE80211_SKB_CB(skb);
  409. rate_idx = tx_info->control.rates[0].idx;
  410. rate_flags = tx_info->control.rates[0].flags;
  411. skbdesc = get_skb_frame_desc(skb);
  412. memset(skbdesc, 0, sizeof(*skbdesc));
  413. skbdesc->entry = entry;
  414. skbdesc->tx_rate_idx = rate_idx;
  415. skbdesc->tx_rate_flags = rate_flags;
  416. if (local)
  417. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  418. /*
  419. * When hardware encryption is supported, and this frame
  420. * is to be encrypted, we should strip the IV/EIV data from
  421. * the frame so we can provide it to the driver seperately.
  422. */
  423. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  424. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  425. if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
  426. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  427. else
  428. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  429. }
  430. /*
  431. * When DMA allocation is required we should guarentee to the
  432. * driver that the DMA is aligned to a 4-byte boundary.
  433. * However some drivers require L2 padding to pad the payload
  434. * rather then the header. This could be a requirement for
  435. * PCI and USB devices, while header alignment only is valid
  436. * for PCI devices.
  437. */
  438. if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
  439. rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
  440. else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  441. rt2x00queue_align_frame(entry->skb);
  442. /*
  443. * It could be possible that the queue was corrupted and this
  444. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  445. * this frame will simply be dropped.
  446. */
  447. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
  448. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  449. entry->skb = NULL;
  450. return -EIO;
  451. }
  452. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  453. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  454. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  455. rt2x00queue_index_inc(queue, Q_INDEX);
  456. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  457. return 0;
  458. }
  459. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  460. struct ieee80211_vif *vif,
  461. const bool enable_beacon)
  462. {
  463. struct rt2x00_intf *intf = vif_to_intf(vif);
  464. struct skb_frame_desc *skbdesc;
  465. struct txentry_desc txdesc;
  466. __le32 desc[16];
  467. if (unlikely(!intf->beacon))
  468. return -ENOBUFS;
  469. mutex_lock(&intf->beacon_skb_mutex);
  470. /*
  471. * Clean up the beacon skb.
  472. */
  473. rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
  474. intf->beacon->skb = NULL;
  475. if (!enable_beacon) {
  476. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
  477. mutex_unlock(&intf->beacon_skb_mutex);
  478. return 0;
  479. }
  480. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  481. if (!intf->beacon->skb) {
  482. mutex_unlock(&intf->beacon_skb_mutex);
  483. return -ENOMEM;
  484. }
  485. /*
  486. * Copy all TX descriptor information into txdesc,
  487. * after that we are free to use the skb->cb array
  488. * for our information.
  489. */
  490. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  491. /*
  492. * For the descriptor we use a local array from where the
  493. * driver can move it to the correct location required for
  494. * the hardware.
  495. */
  496. memset(desc, 0, sizeof(desc));
  497. /*
  498. * Fill in skb descriptor
  499. */
  500. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  501. memset(skbdesc, 0, sizeof(*skbdesc));
  502. skbdesc->desc = desc;
  503. skbdesc->desc_len = intf->beacon->queue->desc_size;
  504. skbdesc->entry = intf->beacon;
  505. /*
  506. * Write TX descriptor into reserved room in front of the beacon.
  507. */
  508. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  509. /*
  510. * Send beacon to hardware.
  511. * Also enable beacon generation, which might have been disabled
  512. * by the driver during the config_beacon() callback function.
  513. */
  514. rt2x00dev->ops->lib->write_beacon(intf->beacon);
  515. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
  516. mutex_unlock(&intf->beacon_skb_mutex);
  517. return 0;
  518. }
  519. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  520. const enum data_queue_qid queue)
  521. {
  522. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  523. if (queue == QID_RX)
  524. return rt2x00dev->rx;
  525. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  526. return &rt2x00dev->tx[queue];
  527. if (!rt2x00dev->bcn)
  528. return NULL;
  529. if (queue == QID_BEACON)
  530. return &rt2x00dev->bcn[0];
  531. else if (queue == QID_ATIM && atim)
  532. return &rt2x00dev->bcn[1];
  533. return NULL;
  534. }
  535. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  536. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  537. enum queue_index index)
  538. {
  539. struct queue_entry *entry;
  540. unsigned long irqflags;
  541. if (unlikely(index >= Q_INDEX_MAX)) {
  542. ERROR(queue->rt2x00dev,
  543. "Entry requested from invalid index type (%d)\n", index);
  544. return NULL;
  545. }
  546. spin_lock_irqsave(&queue->lock, irqflags);
  547. entry = &queue->entries[queue->index[index]];
  548. spin_unlock_irqrestore(&queue->lock, irqflags);
  549. return entry;
  550. }
  551. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  552. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  553. {
  554. unsigned long irqflags;
  555. if (unlikely(index >= Q_INDEX_MAX)) {
  556. ERROR(queue->rt2x00dev,
  557. "Index change on invalid index type (%d)\n", index);
  558. return;
  559. }
  560. spin_lock_irqsave(&queue->lock, irqflags);
  561. queue->index[index]++;
  562. if (queue->index[index] >= queue->limit)
  563. queue->index[index] = 0;
  564. if (index == Q_INDEX) {
  565. queue->length++;
  566. } else if (index == Q_INDEX_DONE) {
  567. queue->length--;
  568. queue->count++;
  569. }
  570. spin_unlock_irqrestore(&queue->lock, irqflags);
  571. }
  572. static void rt2x00queue_reset(struct data_queue *queue)
  573. {
  574. unsigned long irqflags;
  575. spin_lock_irqsave(&queue->lock, irqflags);
  576. queue->count = 0;
  577. queue->length = 0;
  578. memset(queue->index, 0, sizeof(queue->index));
  579. spin_unlock_irqrestore(&queue->lock, irqflags);
  580. }
  581. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  582. {
  583. struct data_queue *queue;
  584. txall_queue_for_each(rt2x00dev, queue)
  585. rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
  586. }
  587. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  588. {
  589. struct data_queue *queue;
  590. unsigned int i;
  591. queue_for_each(rt2x00dev, queue) {
  592. rt2x00queue_reset(queue);
  593. for (i = 0; i < queue->limit; i++) {
  594. queue->entries[i].flags = 0;
  595. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  596. }
  597. }
  598. }
  599. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  600. const struct data_queue_desc *qdesc)
  601. {
  602. struct queue_entry *entries;
  603. unsigned int entry_size;
  604. unsigned int i;
  605. rt2x00queue_reset(queue);
  606. queue->limit = qdesc->entry_num;
  607. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  608. queue->data_size = qdesc->data_size;
  609. queue->desc_size = qdesc->desc_size;
  610. /*
  611. * Allocate all queue entries.
  612. */
  613. entry_size = sizeof(*entries) + qdesc->priv_size;
  614. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  615. if (!entries)
  616. return -ENOMEM;
  617. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  618. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  619. ((__index) * (__psize)) )
  620. for (i = 0; i < queue->limit; i++) {
  621. entries[i].flags = 0;
  622. entries[i].queue = queue;
  623. entries[i].skb = NULL;
  624. entries[i].entry_idx = i;
  625. entries[i].priv_data =
  626. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  627. sizeof(*entries), qdesc->priv_size);
  628. }
  629. #undef QUEUE_ENTRY_PRIV_OFFSET
  630. queue->entries = entries;
  631. return 0;
  632. }
  633. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  634. struct data_queue *queue)
  635. {
  636. unsigned int i;
  637. if (!queue->entries)
  638. return;
  639. for (i = 0; i < queue->limit; i++) {
  640. if (queue->entries[i].skb)
  641. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  642. }
  643. }
  644. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  645. struct data_queue *queue)
  646. {
  647. unsigned int i;
  648. struct sk_buff *skb;
  649. for (i = 0; i < queue->limit; i++) {
  650. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  651. if (!skb)
  652. return -ENOMEM;
  653. queue->entries[i].skb = skb;
  654. }
  655. return 0;
  656. }
  657. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  658. {
  659. struct data_queue *queue;
  660. int status;
  661. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  662. if (status)
  663. goto exit;
  664. tx_queue_for_each(rt2x00dev, queue) {
  665. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  666. if (status)
  667. goto exit;
  668. }
  669. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  670. if (status)
  671. goto exit;
  672. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  673. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  674. rt2x00dev->ops->atim);
  675. if (status)
  676. goto exit;
  677. }
  678. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  679. if (status)
  680. goto exit;
  681. return 0;
  682. exit:
  683. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  684. rt2x00queue_uninitialize(rt2x00dev);
  685. return status;
  686. }
  687. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  688. {
  689. struct data_queue *queue;
  690. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  691. queue_for_each(rt2x00dev, queue) {
  692. kfree(queue->entries);
  693. queue->entries = NULL;
  694. }
  695. }
  696. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  697. struct data_queue *queue, enum data_queue_qid qid)
  698. {
  699. spin_lock_init(&queue->lock);
  700. queue->rt2x00dev = rt2x00dev;
  701. queue->qid = qid;
  702. queue->txop = 0;
  703. queue->aifs = 2;
  704. queue->cw_min = 5;
  705. queue->cw_max = 10;
  706. }
  707. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  708. {
  709. struct data_queue *queue;
  710. enum data_queue_qid qid;
  711. unsigned int req_atim =
  712. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  713. /*
  714. * We need the following queues:
  715. * RX: 1
  716. * TX: ops->tx_queues
  717. * Beacon: 1
  718. * Atim: 1 (if required)
  719. */
  720. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  721. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  722. if (!queue) {
  723. ERROR(rt2x00dev, "Queue allocation failed.\n");
  724. return -ENOMEM;
  725. }
  726. /*
  727. * Initialize pointers
  728. */
  729. rt2x00dev->rx = queue;
  730. rt2x00dev->tx = &queue[1];
  731. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  732. /*
  733. * Initialize queue parameters.
  734. * RX: qid = QID_RX
  735. * TX: qid = QID_AC_BE + index
  736. * TX: cw_min: 2^5 = 32.
  737. * TX: cw_max: 2^10 = 1024.
  738. * BCN: qid = QID_BEACON
  739. * ATIM: qid = QID_ATIM
  740. */
  741. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  742. qid = QID_AC_BE;
  743. tx_queue_for_each(rt2x00dev, queue)
  744. rt2x00queue_init(rt2x00dev, queue, qid++);
  745. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  746. if (req_atim)
  747. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  748. return 0;
  749. }
  750. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  751. {
  752. kfree(rt2x00dev->rx);
  753. rt2x00dev->rx = NULL;
  754. rt2x00dev->tx = NULL;
  755. rt2x00dev->bcn = NULL;
  756. }