tmio_mmc.c 16 KB

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  1. /*
  2. * linux/drivers/mmc/tmio_mmc.c
  3. *
  4. * Copyright (C) 2004 Ian Molton
  5. * Copyright (C) 2007 Ian Molton
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Driver for the MMC / SD / SDIO cell found in:
  12. *
  13. * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
  14. *
  15. * This driver draws mainly on scattered spec sheets, Reverse engineering
  16. * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
  17. * support). (Further 4 bit support from a later datasheet).
  18. *
  19. * TODO:
  20. * Investigate using a workqueue for PIO transfers
  21. * Eliminate FIXMEs
  22. * SDIO support
  23. * Better Power management
  24. * Handle MMC errors better
  25. * double buffer support
  26. *
  27. */
  28. #include <linux/module.h>
  29. #include <linux/irq.h>
  30. #include <linux/device.h>
  31. #include <linux/delay.h>
  32. #include <linux/mmc/host.h>
  33. #include <linux/mfd/core.h>
  34. #include <linux/mfd/tmio.h>
  35. #include "tmio_mmc.h"
  36. static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
  37. {
  38. u32 clk = 0, clock;
  39. if (new_clock) {
  40. for (clock = host->mmc->f_min, clk = 0x80000080;
  41. new_clock >= (clock<<1); clk >>= 1)
  42. clock <<= 1;
  43. clk |= 0x100;
  44. }
  45. if (host->set_clk_div)
  46. host->set_clk_div(host->pdev, (clk>>22) & 1);
  47. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
  48. }
  49. static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
  50. {
  51. sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
  52. msleep(10);
  53. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
  54. sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
  55. msleep(10);
  56. }
  57. static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
  58. {
  59. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
  60. sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
  61. msleep(10);
  62. sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
  63. msleep(10);
  64. }
  65. static void reset(struct tmio_mmc_host *host)
  66. {
  67. /* FIXME - should we set stop clock reg here */
  68. sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
  69. sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
  70. msleep(10);
  71. sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
  72. sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
  73. msleep(10);
  74. }
  75. static void
  76. tmio_mmc_finish_request(struct tmio_mmc_host *host)
  77. {
  78. struct mmc_request *mrq = host->mrq;
  79. host->mrq = NULL;
  80. host->cmd = NULL;
  81. host->data = NULL;
  82. mmc_request_done(host->mmc, mrq);
  83. }
  84. /* These are the bitmasks the tmio chip requires to implement the MMC response
  85. * types. Note that R1 and R6 are the same in this scheme. */
  86. #define APP_CMD 0x0040
  87. #define RESP_NONE 0x0300
  88. #define RESP_R1 0x0400
  89. #define RESP_R1B 0x0500
  90. #define RESP_R2 0x0600
  91. #define RESP_R3 0x0700
  92. #define DATA_PRESENT 0x0800
  93. #define TRANSFER_READ 0x1000
  94. #define TRANSFER_MULTI 0x2000
  95. #define SECURITY_CMD 0x4000
  96. static int
  97. tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
  98. {
  99. struct mmc_data *data = host->data;
  100. int c = cmd->opcode;
  101. /* Command 12 is handled by hardware */
  102. if (cmd->opcode == 12 && !cmd->arg) {
  103. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
  104. return 0;
  105. }
  106. switch (mmc_resp_type(cmd)) {
  107. case MMC_RSP_NONE: c |= RESP_NONE; break;
  108. case MMC_RSP_R1: c |= RESP_R1; break;
  109. case MMC_RSP_R1B: c |= RESP_R1B; break;
  110. case MMC_RSP_R2: c |= RESP_R2; break;
  111. case MMC_RSP_R3: c |= RESP_R3; break;
  112. default:
  113. pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
  114. return -EINVAL;
  115. }
  116. host->cmd = cmd;
  117. /* FIXME - this seems to be ok comented out but the spec suggest this bit should
  118. * be set when issuing app commands.
  119. * if(cmd->flags & MMC_FLAG_ACMD)
  120. * c |= APP_CMD;
  121. */
  122. if (data) {
  123. c |= DATA_PRESENT;
  124. if (data->blocks > 1) {
  125. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
  126. c |= TRANSFER_MULTI;
  127. }
  128. if (data->flags & MMC_DATA_READ)
  129. c |= TRANSFER_READ;
  130. }
  131. enable_mmc_irqs(host, TMIO_MASK_CMD);
  132. /* Fire off the command */
  133. sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
  134. sd_ctrl_write16(host, CTL_SD_CMD, c);
  135. return 0;
  136. }
  137. /* This chip always returns (at least?) as much data as you ask for.
  138. * I'm unsure what happens if you ask for less than a block. This should be
  139. * looked into to ensure that a funny length read doesnt hose the controller.
  140. *
  141. */
  142. static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
  143. {
  144. struct mmc_data *data = host->data;
  145. unsigned short *buf;
  146. unsigned int count;
  147. unsigned long flags;
  148. if (!data) {
  149. pr_debug("Spurious PIO IRQ\n");
  150. return;
  151. }
  152. buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
  153. host->sg_off);
  154. count = host->sg_ptr->length - host->sg_off;
  155. if (count > data->blksz)
  156. count = data->blksz;
  157. pr_debug("count: %08x offset: %08x flags %08x\n",
  158. count, host->sg_off, data->flags);
  159. /* Transfer the data */
  160. if (data->flags & MMC_DATA_READ)
  161. sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
  162. else
  163. sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
  164. host->sg_off += count;
  165. tmio_mmc_kunmap_atomic(host, &flags);
  166. if (host->sg_off == host->sg_ptr->length)
  167. tmio_mmc_next_sg(host);
  168. return;
  169. }
  170. static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
  171. {
  172. struct mmc_data *data = host->data;
  173. struct mmc_command *stop;
  174. host->data = NULL;
  175. if (!data) {
  176. pr_debug("Spurious data end IRQ\n");
  177. return;
  178. }
  179. stop = data->stop;
  180. /* FIXME - return correct transfer count on errors */
  181. if (!data->error)
  182. data->bytes_xfered = data->blocks * data->blksz;
  183. else
  184. data->bytes_xfered = 0;
  185. pr_debug("Completed data request\n");
  186. /*FIXME - other drivers allow an optional stop command of any given type
  187. * which we dont do, as the chip can auto generate them.
  188. * Perhaps we can be smarter about when to use auto CMD12 and
  189. * only issue the auto request when we know this is the desired
  190. * stop command, allowing fallback to the stop command the
  191. * upper layers expect. For now, we do what works.
  192. */
  193. if (data->flags & MMC_DATA_READ)
  194. disable_mmc_irqs(host, TMIO_MASK_READOP);
  195. else
  196. disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
  197. if (stop) {
  198. if (stop->opcode == 12 && !stop->arg)
  199. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
  200. else
  201. BUG();
  202. }
  203. tmio_mmc_finish_request(host);
  204. }
  205. static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
  206. unsigned int stat)
  207. {
  208. struct mmc_command *cmd = host->cmd;
  209. int i, addr;
  210. if (!host->cmd) {
  211. pr_debug("Spurious CMD irq\n");
  212. return;
  213. }
  214. host->cmd = NULL;
  215. /* This controller is sicker than the PXA one. Not only do we need to
  216. * drop the top 8 bits of the first response word, we also need to
  217. * modify the order of the response for short response command types.
  218. */
  219. for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
  220. cmd->resp[i] = sd_ctrl_read32(host, addr);
  221. if (cmd->flags & MMC_RSP_136) {
  222. cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
  223. cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
  224. cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
  225. cmd->resp[3] <<= 8;
  226. } else if (cmd->flags & MMC_RSP_R3) {
  227. cmd->resp[0] = cmd->resp[3];
  228. }
  229. if (stat & TMIO_STAT_CMDTIMEOUT)
  230. cmd->error = -ETIMEDOUT;
  231. else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
  232. cmd->error = -EILSEQ;
  233. /* If there is data to handle we enable data IRQs here, and
  234. * we will ultimatley finish the request in the data_end handler.
  235. * If theres no data or we encountered an error, finish now.
  236. */
  237. if (host->data && !cmd->error) {
  238. if (host->data->flags & MMC_DATA_READ)
  239. enable_mmc_irqs(host, TMIO_MASK_READOP);
  240. else
  241. enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
  242. } else {
  243. tmio_mmc_finish_request(host);
  244. }
  245. return;
  246. }
  247. static irqreturn_t tmio_mmc_irq(int irq, void *devid)
  248. {
  249. struct tmio_mmc_host *host = devid;
  250. unsigned int ireg, irq_mask, status;
  251. pr_debug("MMC IRQ begin\n");
  252. status = sd_ctrl_read32(host, CTL_STATUS);
  253. irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
  254. ireg = status & TMIO_MASK_IRQ & ~irq_mask;
  255. pr_debug_status(status);
  256. pr_debug_status(ireg);
  257. if (!ireg) {
  258. disable_mmc_irqs(host, status & ~irq_mask);
  259. pr_debug("tmio_mmc: Spurious irq, disabling! "
  260. "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
  261. pr_debug_status(status);
  262. goto out;
  263. }
  264. while (ireg) {
  265. /* Card insert / remove attempts */
  266. if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
  267. ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
  268. TMIO_STAT_CARD_REMOVE);
  269. mmc_detect_change(host->mmc, msecs_to_jiffies(100));
  270. }
  271. /* CRC and other errors */
  272. /* if (ireg & TMIO_STAT_ERR_IRQ)
  273. * handled |= tmio_error_irq(host, irq, stat);
  274. */
  275. /* Command completion */
  276. if (ireg & TMIO_MASK_CMD) {
  277. ack_mmc_irqs(host, TMIO_MASK_CMD);
  278. tmio_mmc_cmd_irq(host, status);
  279. }
  280. /* Data transfer */
  281. if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
  282. ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
  283. tmio_mmc_pio_irq(host);
  284. }
  285. /* Data transfer completion */
  286. if (ireg & TMIO_STAT_DATAEND) {
  287. ack_mmc_irqs(host, TMIO_STAT_DATAEND);
  288. tmio_mmc_data_irq(host);
  289. }
  290. /* Check status - keep going until we've handled it all */
  291. status = sd_ctrl_read32(host, CTL_STATUS);
  292. irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
  293. ireg = status & TMIO_MASK_IRQ & ~irq_mask;
  294. pr_debug("Status at end of loop: %08x\n", status);
  295. pr_debug_status(status);
  296. }
  297. pr_debug("MMC IRQ end\n");
  298. out:
  299. return IRQ_HANDLED;
  300. }
  301. static int tmio_mmc_start_data(struct tmio_mmc_host *host,
  302. struct mmc_data *data)
  303. {
  304. pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
  305. data->blksz, data->blocks);
  306. /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
  307. if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
  308. printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
  309. mmc_hostname(host->mmc), data->blksz);
  310. return -EINVAL;
  311. }
  312. tmio_mmc_init_sg(host, data);
  313. host->data = data;
  314. /* Set transfer length / blocksize */
  315. sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
  316. sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
  317. return 0;
  318. }
  319. /* Process requests from the MMC layer */
  320. static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
  321. {
  322. struct tmio_mmc_host *host = mmc_priv(mmc);
  323. int ret;
  324. if (host->mrq)
  325. pr_debug("request not null\n");
  326. host->mrq = mrq;
  327. if (mrq->data) {
  328. ret = tmio_mmc_start_data(host, mrq->data);
  329. if (ret)
  330. goto fail;
  331. }
  332. ret = tmio_mmc_start_command(host, mrq->cmd);
  333. if (!ret)
  334. return;
  335. fail:
  336. mrq->cmd->error = ret;
  337. mmc_request_done(mmc, mrq);
  338. }
  339. /* Set MMC clock / power.
  340. * Note: This controller uses a simple divider scheme therefore it cannot
  341. * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
  342. * MMC wont run that fast, it has to be clocked at 12MHz which is the next
  343. * slowest setting.
  344. */
  345. static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  346. {
  347. struct tmio_mmc_host *host = mmc_priv(mmc);
  348. if (ios->clock)
  349. tmio_mmc_set_clock(host, ios->clock);
  350. /* Power sequence - OFF -> ON -> UP */
  351. switch (ios->power_mode) {
  352. case MMC_POWER_OFF: /* power down SD bus */
  353. if (host->set_pwr)
  354. host->set_pwr(host->pdev, 0);
  355. tmio_mmc_clk_stop(host);
  356. break;
  357. case MMC_POWER_ON: /* power up SD bus */
  358. if (host->set_pwr)
  359. host->set_pwr(host->pdev, 1);
  360. break;
  361. case MMC_POWER_UP: /* start bus clock */
  362. tmio_mmc_clk_start(host);
  363. break;
  364. }
  365. switch (ios->bus_width) {
  366. case MMC_BUS_WIDTH_1:
  367. sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
  368. break;
  369. case MMC_BUS_WIDTH_4:
  370. sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
  371. break;
  372. }
  373. /* Let things settle. delay taken from winCE driver */
  374. udelay(140);
  375. }
  376. static int tmio_mmc_get_ro(struct mmc_host *mmc)
  377. {
  378. struct tmio_mmc_host *host = mmc_priv(mmc);
  379. return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
  380. }
  381. static struct mmc_host_ops tmio_mmc_ops = {
  382. .request = tmio_mmc_request,
  383. .set_ios = tmio_mmc_set_ios,
  384. .get_ro = tmio_mmc_get_ro,
  385. };
  386. #ifdef CONFIG_PM
  387. static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
  388. {
  389. struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
  390. struct mmc_host *mmc = platform_get_drvdata(dev);
  391. int ret;
  392. ret = mmc_suspend_host(mmc, state);
  393. /* Tell MFD core it can disable us now.*/
  394. if (!ret && cell->disable)
  395. cell->disable(dev);
  396. return ret;
  397. }
  398. static int tmio_mmc_resume(struct platform_device *dev)
  399. {
  400. struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
  401. struct mmc_host *mmc = platform_get_drvdata(dev);
  402. int ret = 0;
  403. /* Tell the MFD core we are ready to be enabled */
  404. if (cell->resume) {
  405. ret = cell->resume(dev);
  406. if (ret)
  407. goto out;
  408. }
  409. mmc_resume_host(mmc);
  410. out:
  411. return ret;
  412. }
  413. #else
  414. #define tmio_mmc_suspend NULL
  415. #define tmio_mmc_resume NULL
  416. #endif
  417. static int __devinit tmio_mmc_probe(struct platform_device *dev)
  418. {
  419. struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
  420. struct tmio_mmc_data *pdata;
  421. struct resource *res_ctl;
  422. struct tmio_mmc_host *host;
  423. struct mmc_host *mmc;
  424. int ret = -EINVAL;
  425. if (dev->num_resources != 2)
  426. goto out;
  427. res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
  428. if (!res_ctl)
  429. goto out;
  430. pdata = cell->driver_data;
  431. if (!pdata || !pdata->hclk)
  432. goto out;
  433. ret = -ENOMEM;
  434. mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
  435. if (!mmc)
  436. goto out;
  437. host = mmc_priv(mmc);
  438. host->mmc = mmc;
  439. host->pdev = dev;
  440. platform_set_drvdata(dev, mmc);
  441. host->set_pwr = pdata->set_pwr;
  442. host->set_clk_div = pdata->set_clk_div;
  443. /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
  444. host->bus_shift = resource_size(res_ctl) >> 10;
  445. host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
  446. if (!host->ctl)
  447. goto host_free;
  448. mmc->ops = &tmio_mmc_ops;
  449. mmc->caps = MMC_CAP_4_BIT_DATA;
  450. mmc->caps |= pdata->capabilities;
  451. mmc->f_max = pdata->hclk;
  452. mmc->f_min = mmc->f_max / 512;
  453. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
  454. /* Tell the MFD core we are ready to be enabled */
  455. if (cell->enable) {
  456. ret = cell->enable(dev);
  457. if (ret)
  458. goto unmap_ctl;
  459. }
  460. tmio_mmc_clk_stop(host);
  461. reset(host);
  462. ret = platform_get_irq(dev, 0);
  463. if (ret >= 0)
  464. host->irq = ret;
  465. else
  466. goto cell_disable;
  467. disable_mmc_irqs(host, TMIO_MASK_ALL);
  468. ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
  469. IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host);
  470. if (ret)
  471. goto cell_disable;
  472. mmc_add_host(mmc);
  473. printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
  474. (unsigned long)host->ctl, host->irq);
  475. /* Unmask the IRQs we want to know about */
  476. enable_mmc_irqs(host, TMIO_MASK_IRQ);
  477. return 0;
  478. cell_disable:
  479. if (cell->disable)
  480. cell->disable(dev);
  481. unmap_ctl:
  482. iounmap(host->ctl);
  483. host_free:
  484. mmc_free_host(mmc);
  485. out:
  486. return ret;
  487. }
  488. static int __devexit tmio_mmc_remove(struct platform_device *dev)
  489. {
  490. struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
  491. struct mmc_host *mmc = platform_get_drvdata(dev);
  492. platform_set_drvdata(dev, NULL);
  493. if (mmc) {
  494. struct tmio_mmc_host *host = mmc_priv(mmc);
  495. mmc_remove_host(mmc);
  496. free_irq(host->irq, host);
  497. if (cell->disable)
  498. cell->disable(dev);
  499. iounmap(host->ctl);
  500. mmc_free_host(mmc);
  501. }
  502. return 0;
  503. }
  504. /* ------------------- device registration ----------------------- */
  505. static struct platform_driver tmio_mmc_driver = {
  506. .driver = {
  507. .name = "tmio-mmc",
  508. .owner = THIS_MODULE,
  509. },
  510. .probe = tmio_mmc_probe,
  511. .remove = __devexit_p(tmio_mmc_remove),
  512. .suspend = tmio_mmc_suspend,
  513. .resume = tmio_mmc_resume,
  514. };
  515. static int __init tmio_mmc_init(void)
  516. {
  517. return platform_driver_register(&tmio_mmc_driver);
  518. }
  519. static void __exit tmio_mmc_exit(void)
  520. {
  521. platform_driver_unregister(&tmio_mmc_driver);
  522. }
  523. module_init(tmio_mmc_init);
  524. module_exit(tmio_mmc_exit);
  525. MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
  526. MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
  527. MODULE_LICENSE("GPL v2");
  528. MODULE_ALIAS("platform:tmio-mmc");