dm1105.c 24 KB

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  1. /*
  2. * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
  3. *
  4. * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/i2c.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/proc_fs.h>
  26. #include <linux/pci.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/input.h>
  29. #include <media/ir-common.h>
  30. #include "demux.h"
  31. #include "dmxdev.h"
  32. #include "dvb_demux.h"
  33. #include "dvb_frontend.h"
  34. #include "dvb_net.h"
  35. #include "dvbdev.h"
  36. #include "dvb-pll.h"
  37. #include "stv0299.h"
  38. #include "stv0288.h"
  39. #include "stb6000.h"
  40. #include "si21xx.h"
  41. #include "cx24116.h"
  42. #include "z0194a.h"
  43. #include "ds3000.h"
  44. #define UNSET (-1U)
  45. #define DM1105_BOARD_NOAUTO UNSET
  46. #define DM1105_BOARD_UNKNOWN 0
  47. #define DM1105_BOARD_DVBWORLD_2002 1
  48. #define DM1105_BOARD_DVBWORLD_2004 2
  49. #define DM1105_BOARD_AXESS_DM05 3
  50. /* ----------------------------------------------- */
  51. /*
  52. * PCI ID's
  53. */
  54. #ifndef PCI_VENDOR_ID_TRIGEM
  55. #define PCI_VENDOR_ID_TRIGEM 0x109f
  56. #endif
  57. #ifndef PCI_VENDOR_ID_AXESS
  58. #define PCI_VENDOR_ID_AXESS 0x195d
  59. #endif
  60. #ifndef PCI_DEVICE_ID_DM1105
  61. #define PCI_DEVICE_ID_DM1105 0x036f
  62. #endif
  63. #ifndef PCI_DEVICE_ID_DW2002
  64. #define PCI_DEVICE_ID_DW2002 0x2002
  65. #endif
  66. #ifndef PCI_DEVICE_ID_DW2004
  67. #define PCI_DEVICE_ID_DW2004 0x2004
  68. #endif
  69. #ifndef PCI_DEVICE_ID_DM05
  70. #define PCI_DEVICE_ID_DM05 0x1105
  71. #endif
  72. /* ----------------------------------------------- */
  73. /* sdmc dm1105 registers */
  74. /* TS Control */
  75. #define DM1105_TSCTR 0x00
  76. #define DM1105_DTALENTH 0x04
  77. /* GPIO Interface */
  78. #define DM1105_GPIOVAL 0x08
  79. #define DM1105_GPIOCTR 0x0c
  80. /* PID serial number */
  81. #define DM1105_PIDN 0x10
  82. /* Odd-even secret key select */
  83. #define DM1105_CWSEL 0x14
  84. /* Host Command Interface */
  85. #define DM1105_HOST_CTR 0x18
  86. #define DM1105_HOST_AD 0x1c
  87. /* PCI Interface */
  88. #define DM1105_CR 0x30
  89. #define DM1105_RST 0x34
  90. #define DM1105_STADR 0x38
  91. #define DM1105_RLEN 0x3c
  92. #define DM1105_WRP 0x40
  93. #define DM1105_INTCNT 0x44
  94. #define DM1105_INTMAK 0x48
  95. #define DM1105_INTSTS 0x4c
  96. /* CW Value */
  97. #define DM1105_ODD 0x50
  98. #define DM1105_EVEN 0x58
  99. /* PID Value */
  100. #define DM1105_PID 0x60
  101. /* IR Control */
  102. #define DM1105_IRCTR 0x64
  103. #define DM1105_IRMODE 0x68
  104. #define DM1105_SYSTEMCODE 0x6c
  105. #define DM1105_IRCODE 0x70
  106. /* Unknown Values */
  107. #define DM1105_ENCRYPT 0x74
  108. #define DM1105_VER 0x7c
  109. /* I2C Interface */
  110. #define DM1105_I2CCTR 0x80
  111. #define DM1105_I2CSTS 0x81
  112. #define DM1105_I2CDAT 0x82
  113. #define DM1105_I2C_RA 0x83
  114. /* ----------------------------------------------- */
  115. /* Interrupt Mask Bits */
  116. #define INTMAK_TSIRQM 0x01
  117. #define INTMAK_HIRQM 0x04
  118. #define INTMAK_IRM 0x08
  119. #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
  120. INTMAK_HIRQM | \
  121. INTMAK_IRM)
  122. #define INTMAK_NONEMASK 0x00
  123. /* Interrupt Status Bits */
  124. #define INTSTS_TSIRQ 0x01
  125. #define INTSTS_HIRQ 0x04
  126. #define INTSTS_IR 0x08
  127. /* IR Control Bits */
  128. #define DM1105_IR_EN 0x01
  129. #define DM1105_SYS_CHK 0x02
  130. #define DM1105_REP_FLG 0x08
  131. /* EEPROM addr */
  132. #define IIC_24C01_addr 0xa0
  133. /* Max board count */
  134. #define DM1105_MAX 0x04
  135. #define DRIVER_NAME "dm1105"
  136. #define DM1105_DMA_PACKETS 47
  137. #define DM1105_DMA_PACKET_LENGTH (128*4)
  138. #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
  139. /* GPIO's for LNB power control */
  140. #define DM1105_LNB_MASK 0x00000000
  141. #define DM1105_LNB_OFF 0x00020000
  142. #define DM1105_LNB_13V 0x00010100
  143. #define DM1105_LNB_18V 0x00000100
  144. /* GPIO's for LNB power control for Axess DM05 */
  145. #define DM05_LNB_MASK 0x00000000
  146. #define DM05_LNB_OFF 0x00020000/* actually 13v */
  147. #define DM05_LNB_13V 0x00020000
  148. #define DM05_LNB_18V 0x00030000
  149. static unsigned int card[] = {[0 ... 3] = UNSET };
  150. module_param_array(card, int, NULL, 0444);
  151. MODULE_PARM_DESC(card, "card type");
  152. static int ir_debug;
  153. module_param(ir_debug, int, 0644);
  154. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  155. static unsigned int dm1105_devcount;
  156. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  157. struct dm1105_board {
  158. char *name;
  159. };
  160. struct dm1105_subid {
  161. u16 subvendor;
  162. u16 subdevice;
  163. u32 card;
  164. };
  165. static const struct dm1105_board dm1105_boards[] = {
  166. [DM1105_BOARD_UNKNOWN] = {
  167. .name = "UNKNOWN/GENERIC",
  168. },
  169. [DM1105_BOARD_DVBWORLD_2002] = {
  170. .name = "DVBWorld PCI 2002",
  171. },
  172. [DM1105_BOARD_DVBWORLD_2004] = {
  173. .name = "DVBWorld PCI 2004",
  174. },
  175. [DM1105_BOARD_AXESS_DM05] = {
  176. .name = "Axess/EasyTv DM05",
  177. },
  178. };
  179. static const struct dm1105_subid dm1105_subids[] = {
  180. {
  181. .subvendor = 0x0000,
  182. .subdevice = 0x2002,
  183. .card = DM1105_BOARD_DVBWORLD_2002,
  184. }, {
  185. .subvendor = 0x0001,
  186. .subdevice = 0x2002,
  187. .card = DM1105_BOARD_DVBWORLD_2002,
  188. }, {
  189. .subvendor = 0x0000,
  190. .subdevice = 0x2004,
  191. .card = DM1105_BOARD_DVBWORLD_2004,
  192. }, {
  193. .subvendor = 0x0001,
  194. .subdevice = 0x2004,
  195. .card = DM1105_BOARD_DVBWORLD_2004,
  196. }, {
  197. .subvendor = 0x195d,
  198. .subdevice = 0x1105,
  199. .card = DM1105_BOARD_AXESS_DM05,
  200. },
  201. };
  202. static void dm1105_card_list(struct pci_dev *pci)
  203. {
  204. int i;
  205. if (0 == pci->subsystem_vendor &&
  206. 0 == pci->subsystem_device) {
  207. printk(KERN_ERR
  208. "dm1105: Your board has no valid PCI Subsystem ID\n"
  209. "dm1105: and thus can't be autodetected\n"
  210. "dm1105: Please pass card=<n> insmod option to\n"
  211. "dm1105: workaround that. Redirect complaints to\n"
  212. "dm1105: the vendor of the TV card. Best regards,\n"
  213. "dm1105: -- tux\n");
  214. } else {
  215. printk(KERN_ERR
  216. "dm1105: Your board isn't known (yet) to the driver.\n"
  217. "dm1105: You can try to pick one of the existing\n"
  218. "dm1105: card configs via card=<n> insmod option.\n"
  219. "dm1105: Updating to the latest version might help\n"
  220. "dm1105: as well.\n");
  221. }
  222. printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
  223. "insmod option:\n");
  224. for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
  225. printk(KERN_ERR "dm1105: card=%d -> %s\n",
  226. i, dm1105_boards[i].name);
  227. }
  228. /* infrared remote control */
  229. struct infrared {
  230. struct input_dev *input_dev;
  231. struct ir_input_state ir;
  232. char input_phys[32];
  233. struct work_struct work;
  234. u32 ir_command;
  235. };
  236. struct dm1105_dev {
  237. /* pci */
  238. struct pci_dev *pdev;
  239. u8 __iomem *io_mem;
  240. /* ir */
  241. struct infrared ir;
  242. /* dvb */
  243. struct dmx_frontend hw_frontend;
  244. struct dmx_frontend mem_frontend;
  245. struct dmxdev dmxdev;
  246. struct dvb_adapter dvb_adapter;
  247. struct dvb_demux demux;
  248. struct dvb_frontend *fe;
  249. struct dvb_net dvbnet;
  250. unsigned int full_ts_users;
  251. unsigned int boardnr;
  252. int nr;
  253. /* i2c */
  254. struct i2c_adapter i2c_adap;
  255. /* irq */
  256. struct work_struct work;
  257. struct workqueue_struct *wq;
  258. char wqn[16];
  259. /* dma */
  260. dma_addr_t dma_addr;
  261. unsigned char *ts_buf;
  262. u32 wrp;
  263. u32 nextwrp;
  264. u32 buffer_size;
  265. unsigned int PacketErrorCount;
  266. unsigned int dmarst;
  267. spinlock_t lock;
  268. };
  269. #define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
  270. #define dm_readb(reg) inb(dm_io_mem(reg))
  271. #define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
  272. #define dm_readw(reg) inw(dm_io_mem(reg))
  273. #define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
  274. #define dm_readl(reg) inl(dm_io_mem(reg))
  275. #define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
  276. #define dm_andorl(reg, mask, value) \
  277. outl((inl(dm_io_mem(reg)) & ~(mask)) |\
  278. ((value) & (mask)), (dm_io_mem(reg)))
  279. #define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
  280. #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
  281. static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
  282. struct i2c_msg *msgs, int num)
  283. {
  284. struct dm1105_dev *dev ;
  285. int addr, rc, i, j, k, len, byte, data;
  286. u8 status;
  287. dev = i2c_adap->algo_data;
  288. for (i = 0; i < num; i++) {
  289. dm_writeb(DM1105_I2CCTR, 0x00);
  290. if (msgs[i].flags & I2C_M_RD) {
  291. /* read bytes */
  292. addr = msgs[i].addr << 1;
  293. addr |= 1;
  294. dm_writeb(DM1105_I2CDAT, addr);
  295. for (byte = 0; byte < msgs[i].len; byte++)
  296. dm_writeb(DM1105_I2CDAT + byte + 1, 0);
  297. dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
  298. for (j = 0; j < 55; j++) {
  299. mdelay(10);
  300. status = dm_readb(DM1105_I2CSTS);
  301. if ((status & 0xc0) == 0x40)
  302. break;
  303. }
  304. if (j >= 55)
  305. return -1;
  306. for (byte = 0; byte < msgs[i].len; byte++) {
  307. rc = dm_readb(DM1105_I2CDAT + byte + 1);
  308. if (rc < 0)
  309. goto err;
  310. msgs[i].buf[byte] = rc;
  311. }
  312. } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
  313. /* prepaired for cx24116 firmware */
  314. /* Write in small blocks */
  315. len = msgs[i].len - 1;
  316. k = 1;
  317. do {
  318. dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
  319. dm_writeb(DM1105_I2CDAT + 1, 0xf7);
  320. for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
  321. data = msgs[i].buf[k + byte];
  322. dm_writeb(DM1105_I2CDAT + byte + 2, data);
  323. }
  324. dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
  325. for (j = 0; j < 25; j++) {
  326. mdelay(10);
  327. status = dm_readb(DM1105_I2CSTS);
  328. if ((status & 0xc0) == 0x40)
  329. break;
  330. }
  331. if (j >= 25)
  332. return -1;
  333. k += 48;
  334. len -= 48;
  335. } while (len > 0);
  336. } else {
  337. /* write bytes */
  338. dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
  339. for (byte = 0; byte < msgs[i].len; byte++) {
  340. data = msgs[i].buf[byte];
  341. dm_writeb(DM1105_I2CDAT + byte + 1, data);
  342. }
  343. dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
  344. for (j = 0; j < 25; j++) {
  345. mdelay(10);
  346. status = dm_readb(DM1105_I2CSTS);
  347. if ((status & 0xc0) == 0x40)
  348. break;
  349. }
  350. if (j >= 25)
  351. return -1;
  352. }
  353. }
  354. return num;
  355. err:
  356. return rc;
  357. }
  358. static u32 functionality(struct i2c_adapter *adap)
  359. {
  360. return I2C_FUNC_I2C;
  361. }
  362. static struct i2c_algorithm dm1105_algo = {
  363. .master_xfer = dm1105_i2c_xfer,
  364. .functionality = functionality,
  365. };
  366. static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
  367. {
  368. return container_of(feed->demux, struct dm1105_dev, demux);
  369. }
  370. static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
  371. {
  372. return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
  373. }
  374. static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  375. {
  376. struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
  377. u32 lnb_mask, lnb_13v, lnb_18v, lnb_off;
  378. switch (dev->boardnr) {
  379. case DM1105_BOARD_AXESS_DM05:
  380. lnb_mask = DM05_LNB_MASK;
  381. lnb_off = DM05_LNB_OFF;
  382. lnb_13v = DM05_LNB_13V;
  383. lnb_18v = DM05_LNB_18V;
  384. break;
  385. case DM1105_BOARD_DVBWORLD_2002:
  386. case DM1105_BOARD_DVBWORLD_2004:
  387. default:
  388. lnb_mask = DM1105_LNB_MASK;
  389. lnb_off = DM1105_LNB_OFF;
  390. lnb_13v = DM1105_LNB_13V;
  391. lnb_18v = DM1105_LNB_18V;
  392. }
  393. dm_writel(DM1105_GPIOCTR, lnb_mask);
  394. if (voltage == SEC_VOLTAGE_18)
  395. dm_writel(DM1105_GPIOVAL, lnb_18v);
  396. else if (voltage == SEC_VOLTAGE_13)
  397. dm_writel(DM1105_GPIOVAL, lnb_13v);
  398. else
  399. dm_writel(DM1105_GPIOVAL, lnb_off);
  400. return 0;
  401. }
  402. static void dm1105_set_dma_addr(struct dm1105_dev *dev)
  403. {
  404. dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
  405. }
  406. static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
  407. {
  408. dev->ts_buf = pci_alloc_consistent(dev->pdev,
  409. 6 * DM1105_DMA_BYTES,
  410. &dev->dma_addr);
  411. return !dev->ts_buf;
  412. }
  413. static void dm1105_dma_unmap(struct dm1105_dev *dev)
  414. {
  415. pci_free_consistent(dev->pdev,
  416. 6 * DM1105_DMA_BYTES,
  417. dev->ts_buf,
  418. dev->dma_addr);
  419. }
  420. static void dm1105_enable_irqs(struct dm1105_dev *dev)
  421. {
  422. dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
  423. dm_writeb(DM1105_CR, 1);
  424. }
  425. static void dm1105_disable_irqs(struct dm1105_dev *dev)
  426. {
  427. dm_writeb(DM1105_INTMAK, INTMAK_IRM);
  428. dm_writeb(DM1105_CR, 0);
  429. }
  430. static int dm1105_start_feed(struct dvb_demux_feed *f)
  431. {
  432. struct dm1105_dev *dev = feed_to_dm1105_dev(f);
  433. if (dev->full_ts_users++ == 0)
  434. dm1105_enable_irqs(dev);
  435. return 0;
  436. }
  437. static int dm1105_stop_feed(struct dvb_demux_feed *f)
  438. {
  439. struct dm1105_dev *dev = feed_to_dm1105_dev(f);
  440. if (--dev->full_ts_users == 0)
  441. dm1105_disable_irqs(dev);
  442. return 0;
  443. }
  444. /* ir work handler */
  445. static void dm1105_emit_key(struct work_struct *work)
  446. {
  447. struct infrared *ir = container_of(work, struct infrared, work);
  448. u32 ircom = ir->ir_command;
  449. u8 data;
  450. if (ir_debug)
  451. printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
  452. data = (ircom >> 8) & 0x7f;
  453. ir_input_keydown(ir->input_dev, &ir->ir, data);
  454. ir_input_nokey(ir->input_dev, &ir->ir);
  455. }
  456. /* work handler */
  457. static void dm1105_dmx_buffer(struct work_struct *work)
  458. {
  459. struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
  460. unsigned int nbpackets;
  461. u32 oldwrp = dev->wrp;
  462. u32 nextwrp = dev->nextwrp;
  463. if (!((dev->ts_buf[oldwrp] == 0x47) &&
  464. (dev->ts_buf[oldwrp + 188] == 0x47) &&
  465. (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
  466. dev->PacketErrorCount++;
  467. /* bad packet found */
  468. if ((dev->PacketErrorCount >= 2) &&
  469. (dev->dmarst == 0)) {
  470. dm_writeb(DM1105_RST, 1);
  471. dev->wrp = 0;
  472. dev->PacketErrorCount = 0;
  473. dev->dmarst = 0;
  474. return;
  475. }
  476. }
  477. if (nextwrp < oldwrp) {
  478. memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
  479. nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
  480. } else
  481. nbpackets = (nextwrp - oldwrp) / 188;
  482. dev->wrp = nextwrp;
  483. dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
  484. }
  485. static irqreturn_t dm1105_irq(int irq, void *dev_id)
  486. {
  487. struct dm1105_dev *dev = dev_id;
  488. /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
  489. unsigned int intsts = dm_readb(DM1105_INTSTS);
  490. dm_writeb(DM1105_INTSTS, intsts);
  491. switch (intsts) {
  492. case INTSTS_TSIRQ:
  493. case (INTSTS_TSIRQ | INTSTS_IR):
  494. dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
  495. queue_work(dev->wq, &dev->work);
  496. break;
  497. case INTSTS_IR:
  498. dev->ir.ir_command = dm_readl(DM1105_IRCODE);
  499. schedule_work(&dev->ir.work);
  500. break;
  501. }
  502. return IRQ_HANDLED;
  503. }
  504. int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
  505. {
  506. struct input_dev *input_dev;
  507. struct ir_scancode_table *ir_codes = &ir_codes_dm1105_nec_table;
  508. u64 ir_type = IR_TYPE_OTHER;
  509. int err = -ENOMEM;
  510. input_dev = input_allocate_device();
  511. if (!input_dev)
  512. return -ENOMEM;
  513. dm1105->ir.input_dev = input_dev;
  514. snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
  515. "pci-%s/ir0", pci_name(dm1105->pdev));
  516. err = ir_input_init(input_dev, &dm1105->ir.ir, ir_type);
  517. if (err < 0) {
  518. input_free_device(input_dev);
  519. return err;
  520. }
  521. input_dev->name = "DVB on-card IR receiver";
  522. input_dev->phys = dm1105->ir.input_phys;
  523. input_dev->id.bustype = BUS_PCI;
  524. input_dev->id.version = 1;
  525. if (dm1105->pdev->subsystem_vendor) {
  526. input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
  527. input_dev->id.product = dm1105->pdev->subsystem_device;
  528. } else {
  529. input_dev->id.vendor = dm1105->pdev->vendor;
  530. input_dev->id.product = dm1105->pdev->device;
  531. }
  532. input_dev->dev.parent = &dm1105->pdev->dev;
  533. INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
  534. err = ir_input_register(input_dev, ir_codes, NULL);
  535. return err;
  536. }
  537. void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
  538. {
  539. ir_input_unregister(dm1105->ir.input_dev);
  540. }
  541. static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
  542. {
  543. dm1105_disable_irqs(dev);
  544. dm_writeb(DM1105_HOST_CTR, 0);
  545. /*DATALEN 188,*/
  546. dm_writeb(DM1105_DTALENTH, 188);
  547. /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
  548. dm_writew(DM1105_TSCTR, 0xc10a);
  549. /* map DMA and set address */
  550. dm1105_dma_map(dev);
  551. dm1105_set_dma_addr(dev);
  552. /* big buffer */
  553. dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
  554. dm_writeb(DM1105_INTCNT, 47);
  555. /* IR NEC mode enable */
  556. dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
  557. dm_writeb(DM1105_IRMODE, 0);
  558. dm_writew(DM1105_SYSTEMCODE, 0);
  559. return 0;
  560. }
  561. static void dm1105_hw_exit(struct dm1105_dev *dev)
  562. {
  563. dm1105_disable_irqs(dev);
  564. /* IR disable */
  565. dm_writeb(DM1105_IRCTR, 0);
  566. dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
  567. dm1105_dma_unmap(dev);
  568. }
  569. static struct stv0299_config sharp_z0194a_config = {
  570. .demod_address = 0x68,
  571. .inittab = sharp_z0194a_inittab,
  572. .mclk = 88000000UL,
  573. .invert = 1,
  574. .skip_reinit = 0,
  575. .lock_output = STV0299_LOCKOUTPUT_1,
  576. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  577. .min_delay_ms = 100,
  578. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  579. };
  580. static struct stv0288_config earda_config = {
  581. .demod_address = 0x68,
  582. .min_delay_ms = 100,
  583. };
  584. static struct si21xx_config serit_config = {
  585. .demod_address = 0x68,
  586. .min_delay_ms = 100,
  587. };
  588. static struct cx24116_config serit_sp2633_config = {
  589. .demod_address = 0x55,
  590. };
  591. static struct ds3000_config dvbworld_ds3000_config = {
  592. .demod_address = 0x68,
  593. };
  594. static int __devinit frontend_init(struct dm1105_dev *dev)
  595. {
  596. int ret;
  597. switch (dev->boardnr) {
  598. case DM1105_BOARD_DVBWORLD_2004:
  599. dev->fe = dvb_attach(
  600. cx24116_attach, &serit_sp2633_config,
  601. &dev->i2c_adap);
  602. if (dev->fe) {
  603. dev->fe->ops.set_voltage = dm1105_set_voltage;
  604. break;
  605. }
  606. dev->fe = dvb_attach(
  607. ds3000_attach, &dvbworld_ds3000_config,
  608. &dev->i2c_adap);
  609. if (dev->fe)
  610. dev->fe->ops.set_voltage = dm1105_set_voltage;
  611. break;
  612. case DM1105_BOARD_DVBWORLD_2002:
  613. case DM1105_BOARD_AXESS_DM05:
  614. default:
  615. dev->fe = dvb_attach(
  616. stv0299_attach, &sharp_z0194a_config,
  617. &dev->i2c_adap);
  618. if (dev->fe) {
  619. dev->fe->ops.set_voltage = dm1105_set_voltage;
  620. dvb_attach(dvb_pll_attach, dev->fe, 0x60,
  621. &dev->i2c_adap, DVB_PLL_OPERA1);
  622. break;
  623. }
  624. dev->fe = dvb_attach(
  625. stv0288_attach, &earda_config,
  626. &dev->i2c_adap);
  627. if (dev->fe) {
  628. dev->fe->ops.set_voltage = dm1105_set_voltage;
  629. dvb_attach(stb6000_attach, dev->fe, 0x61,
  630. &dev->i2c_adap);
  631. break;
  632. }
  633. dev->fe = dvb_attach(
  634. si21xx_attach, &serit_config,
  635. &dev->i2c_adap);
  636. if (dev->fe)
  637. dev->fe->ops.set_voltage = dm1105_set_voltage;
  638. }
  639. if (!dev->fe) {
  640. dev_err(&dev->pdev->dev, "could not attach frontend\n");
  641. return -ENODEV;
  642. }
  643. ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
  644. if (ret < 0) {
  645. if (dev->fe->ops.release)
  646. dev->fe->ops.release(dev->fe);
  647. dev->fe = NULL;
  648. return ret;
  649. }
  650. return 0;
  651. }
  652. static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
  653. {
  654. static u8 command[1] = { 0x28 };
  655. struct i2c_msg msg[] = {
  656. {
  657. .addr = IIC_24C01_addr >> 1,
  658. .flags = 0,
  659. .buf = command,
  660. .len = 1
  661. }, {
  662. .addr = IIC_24C01_addr >> 1,
  663. .flags = I2C_M_RD,
  664. .buf = mac,
  665. .len = 6
  666. },
  667. };
  668. dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
  669. dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
  670. }
  671. static int __devinit dm1105_probe(struct pci_dev *pdev,
  672. const struct pci_device_id *ent)
  673. {
  674. struct dm1105_dev *dev;
  675. struct dvb_adapter *dvb_adapter;
  676. struct dvb_demux *dvbdemux;
  677. struct dmx_demux *dmx;
  678. int ret = -ENOMEM;
  679. int i;
  680. dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
  681. if (!dev)
  682. return -ENOMEM;
  683. /* board config */
  684. dev->nr = dm1105_devcount;
  685. dev->boardnr = UNSET;
  686. if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
  687. dev->boardnr = card[dev->nr];
  688. for (i = 0; UNSET == dev->boardnr &&
  689. i < ARRAY_SIZE(dm1105_subids); i++)
  690. if (pdev->subsystem_vendor ==
  691. dm1105_subids[i].subvendor &&
  692. pdev->subsystem_device ==
  693. dm1105_subids[i].subdevice)
  694. dev->boardnr = dm1105_subids[i].card;
  695. if (UNSET == dev->boardnr) {
  696. dev->boardnr = DM1105_BOARD_UNKNOWN;
  697. dm1105_card_list(pdev);
  698. }
  699. dm1105_devcount++;
  700. dev->pdev = pdev;
  701. dev->buffer_size = 5 * DM1105_DMA_BYTES;
  702. dev->PacketErrorCount = 0;
  703. dev->dmarst = 0;
  704. ret = pci_enable_device(pdev);
  705. if (ret < 0)
  706. goto err_kfree;
  707. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  708. if (ret < 0)
  709. goto err_pci_disable_device;
  710. pci_set_master(pdev);
  711. ret = pci_request_regions(pdev, DRIVER_NAME);
  712. if (ret < 0)
  713. goto err_pci_disable_device;
  714. dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
  715. if (!dev->io_mem) {
  716. ret = -EIO;
  717. goto err_pci_release_regions;
  718. }
  719. spin_lock_init(&dev->lock);
  720. pci_set_drvdata(pdev, dev);
  721. ret = dm1105_hw_init(dev);
  722. if (ret < 0)
  723. goto err_pci_iounmap;
  724. /* i2c */
  725. i2c_set_adapdata(&dev->i2c_adap, dev);
  726. strcpy(dev->i2c_adap.name, DRIVER_NAME);
  727. dev->i2c_adap.owner = THIS_MODULE;
  728. dev->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  729. dev->i2c_adap.dev.parent = &pdev->dev;
  730. dev->i2c_adap.algo = &dm1105_algo;
  731. dev->i2c_adap.algo_data = dev;
  732. ret = i2c_add_adapter(&dev->i2c_adap);
  733. if (ret < 0)
  734. goto err_dm1105_hw_exit;
  735. /* dvb */
  736. ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
  737. THIS_MODULE, &pdev->dev, adapter_nr);
  738. if (ret < 0)
  739. goto err_i2c_del_adapter;
  740. dvb_adapter = &dev->dvb_adapter;
  741. dm1105_read_mac(dev, dvb_adapter->proposed_mac);
  742. dvbdemux = &dev->demux;
  743. dvbdemux->filternum = 256;
  744. dvbdemux->feednum = 256;
  745. dvbdemux->start_feed = dm1105_start_feed;
  746. dvbdemux->stop_feed = dm1105_stop_feed;
  747. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  748. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  749. ret = dvb_dmx_init(dvbdemux);
  750. if (ret < 0)
  751. goto err_dvb_unregister_adapter;
  752. dmx = &dvbdemux->dmx;
  753. dev->dmxdev.filternum = 256;
  754. dev->dmxdev.demux = dmx;
  755. dev->dmxdev.capabilities = 0;
  756. ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
  757. if (ret < 0)
  758. goto err_dvb_dmx_release;
  759. dev->hw_frontend.source = DMX_FRONTEND_0;
  760. ret = dmx->add_frontend(dmx, &dev->hw_frontend);
  761. if (ret < 0)
  762. goto err_dvb_dmxdev_release;
  763. dev->mem_frontend.source = DMX_MEMORY_FE;
  764. ret = dmx->add_frontend(dmx, &dev->mem_frontend);
  765. if (ret < 0)
  766. goto err_remove_hw_frontend;
  767. ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
  768. if (ret < 0)
  769. goto err_remove_mem_frontend;
  770. ret = frontend_init(dev);
  771. if (ret < 0)
  772. goto err_disconnect_frontend;
  773. dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
  774. dm1105_ir_init(dev);
  775. INIT_WORK(&dev->work, dm1105_dmx_buffer);
  776. sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
  777. dev->wq = create_singlethread_workqueue(dev->wqn);
  778. if (!dev->wq)
  779. goto err_dvb_net;
  780. ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
  781. DRIVER_NAME, dev);
  782. if (ret < 0)
  783. goto err_workqueue;
  784. return 0;
  785. err_workqueue:
  786. destroy_workqueue(dev->wq);
  787. err_dvb_net:
  788. dvb_net_release(&dev->dvbnet);
  789. err_disconnect_frontend:
  790. dmx->disconnect_frontend(dmx);
  791. err_remove_mem_frontend:
  792. dmx->remove_frontend(dmx, &dev->mem_frontend);
  793. err_remove_hw_frontend:
  794. dmx->remove_frontend(dmx, &dev->hw_frontend);
  795. err_dvb_dmxdev_release:
  796. dvb_dmxdev_release(&dev->dmxdev);
  797. err_dvb_dmx_release:
  798. dvb_dmx_release(dvbdemux);
  799. err_dvb_unregister_adapter:
  800. dvb_unregister_adapter(dvb_adapter);
  801. err_i2c_del_adapter:
  802. i2c_del_adapter(&dev->i2c_adap);
  803. err_dm1105_hw_exit:
  804. dm1105_hw_exit(dev);
  805. err_pci_iounmap:
  806. pci_iounmap(pdev, dev->io_mem);
  807. err_pci_release_regions:
  808. pci_release_regions(pdev);
  809. err_pci_disable_device:
  810. pci_disable_device(pdev);
  811. err_kfree:
  812. pci_set_drvdata(pdev, NULL);
  813. kfree(dev);
  814. return ret;
  815. }
  816. static void __devexit dm1105_remove(struct pci_dev *pdev)
  817. {
  818. struct dm1105_dev *dev = pci_get_drvdata(pdev);
  819. struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
  820. struct dvb_demux *dvbdemux = &dev->demux;
  821. struct dmx_demux *dmx = &dvbdemux->dmx;
  822. dm1105_ir_exit(dev);
  823. dmx->close(dmx);
  824. dvb_net_release(&dev->dvbnet);
  825. if (dev->fe)
  826. dvb_unregister_frontend(dev->fe);
  827. dmx->disconnect_frontend(dmx);
  828. dmx->remove_frontend(dmx, &dev->mem_frontend);
  829. dmx->remove_frontend(dmx, &dev->hw_frontend);
  830. dvb_dmxdev_release(&dev->dmxdev);
  831. dvb_dmx_release(dvbdemux);
  832. dvb_unregister_adapter(dvb_adapter);
  833. if (&dev->i2c_adap)
  834. i2c_del_adapter(&dev->i2c_adap);
  835. dm1105_hw_exit(dev);
  836. synchronize_irq(pdev->irq);
  837. free_irq(pdev->irq, dev);
  838. pci_iounmap(pdev, dev->io_mem);
  839. pci_release_regions(pdev);
  840. pci_disable_device(pdev);
  841. pci_set_drvdata(pdev, NULL);
  842. dm1105_devcount--;
  843. kfree(dev);
  844. }
  845. static struct pci_device_id dm1105_id_table[] __devinitdata = {
  846. {
  847. .vendor = PCI_VENDOR_ID_TRIGEM,
  848. .device = PCI_DEVICE_ID_DM1105,
  849. .subvendor = PCI_ANY_ID,
  850. .subdevice = PCI_ANY_ID,
  851. }, {
  852. .vendor = PCI_VENDOR_ID_AXESS,
  853. .device = PCI_DEVICE_ID_DM05,
  854. .subvendor = PCI_ANY_ID,
  855. .subdevice = PCI_ANY_ID,
  856. }, {
  857. /* empty */
  858. },
  859. };
  860. MODULE_DEVICE_TABLE(pci, dm1105_id_table);
  861. static struct pci_driver dm1105_driver = {
  862. .name = DRIVER_NAME,
  863. .id_table = dm1105_id_table,
  864. .probe = dm1105_probe,
  865. .remove = __devexit_p(dm1105_remove),
  866. };
  867. static int __init dm1105_init(void)
  868. {
  869. return pci_register_driver(&dm1105_driver);
  870. }
  871. static void __exit dm1105_exit(void)
  872. {
  873. pci_unregister_driver(&dm1105_driver);
  874. }
  875. module_init(dm1105_init);
  876. module_exit(dm1105_exit);
  877. MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
  878. MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
  879. MODULE_LICENSE("GPL");