w6692.c 36 KB

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  1. /*
  2. * w6692.c mISDN driver for Winbond w6692 based cards
  3. *
  4. * Author Karsten Keil <kkeil@suse.de>
  5. * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
  6. *
  7. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <linux/delay.h>
  26. #include <linux/mISDNhw.h>
  27. #include "w6692.h"
  28. #define W6692_REV "2.0"
  29. #define DBUSY_TIMER_VALUE 80
  30. enum {
  31. W6692_ASUS,
  32. W6692_WINBOND,
  33. W6692_USR
  34. };
  35. /* private data in the PCI devices list */
  36. struct w6692map {
  37. u_int subtype;
  38. char *name;
  39. };
  40. static const struct w6692map w6692_map[] =
  41. {
  42. {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
  43. {W6692_WINBOND, "Winbond W6692"},
  44. {W6692_USR, "USR W6692"}
  45. };
  46. #ifndef PCI_VENDOR_ID_USR
  47. #define PCI_VENDOR_ID_USR 0x16ec
  48. #define PCI_DEVICE_ID_USR_6692 0x3409
  49. #endif
  50. struct w6692_ch {
  51. struct bchannel bch;
  52. u32 addr;
  53. struct timer_list timer;
  54. u8 b_mode;
  55. };
  56. struct w6692_hw {
  57. struct list_head list;
  58. struct pci_dev *pdev;
  59. char name[MISDN_MAX_IDLEN];
  60. u32 irq;
  61. u32 irqcnt;
  62. u32 addr;
  63. u32 fmask; /* feature mask - bit set per card nr */
  64. int subtype;
  65. spinlock_t lock; /* hw lock */
  66. u8 imask;
  67. u8 pctl;
  68. u8 xaddr;
  69. u8 xdata;
  70. u8 state;
  71. struct w6692_ch bc[2];
  72. struct dchannel dch;
  73. char log[64];
  74. };
  75. static LIST_HEAD(Cards);
  76. static DEFINE_RWLOCK(card_lock); /* protect Cards */
  77. static int w6692_cnt;
  78. static int debug;
  79. static u32 led;
  80. static u32 pots;
  81. static void
  82. _set_debug(struct w6692_hw *card)
  83. {
  84. card->dch.debug = debug;
  85. card->bc[0].bch.debug = debug;
  86. card->bc[1].bch.debug = debug;
  87. }
  88. static int
  89. set_debug(const char *val, struct kernel_param *kp)
  90. {
  91. int ret;
  92. struct w6692_hw *card;
  93. ret = param_set_uint(val, kp);
  94. if (!ret) {
  95. read_lock(&card_lock);
  96. list_for_each_entry(card, &Cards, list)
  97. _set_debug(card);
  98. read_unlock(&card_lock);
  99. }
  100. return ret;
  101. }
  102. MODULE_AUTHOR("Karsten Keil");
  103. MODULE_LICENSE("GPL v2");
  104. MODULE_VERSION(W6692_REV);
  105. module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
  106. MODULE_PARM_DESC(debug, "W6692 debug mask");
  107. module_param(led, uint, S_IRUGO | S_IWUSR);
  108. MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
  109. module_param(pots, uint, S_IRUGO | S_IWUSR);
  110. MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
  111. static inline u8
  112. ReadW6692(struct w6692_hw *card, u8 offset)
  113. {
  114. return inb(card->addr + offset);
  115. }
  116. static inline void
  117. WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
  118. {
  119. outb(value, card->addr + offset);
  120. }
  121. static inline u8
  122. ReadW6692B(struct w6692_ch *bc, u8 offset)
  123. {
  124. return inb(bc->addr + offset);
  125. }
  126. static inline void
  127. WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
  128. {
  129. outb(value, bc->addr + offset);
  130. }
  131. static void
  132. enable_hwirq(struct w6692_hw *card)
  133. {
  134. WriteW6692(card, W_IMASK, card->imask);
  135. }
  136. static void
  137. disable_hwirq(struct w6692_hw *card)
  138. {
  139. WriteW6692(card, W_IMASK, 0xff);
  140. }
  141. static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
  142. static void
  143. W6692Version(struct w6692_hw *card)
  144. {
  145. int val;
  146. val = ReadW6692(card, W_D_RBCH);
  147. pr_notice("%s: Winbond W6692 version: %s\n", card->name,
  148. W6692Ver[(val >> 6) & 3]);
  149. }
  150. static void
  151. w6692_led_handler(struct w6692_hw *card, int on)
  152. {
  153. if ((!(card->fmask & led)) || card->subtype == W6692_USR)
  154. return;
  155. if (on) {
  156. card->xdata &= 0xfb; /* LED ON */
  157. WriteW6692(card, W_XDATA, card->xdata);
  158. } else {
  159. card->xdata |= 0x04; /* LED OFF */
  160. WriteW6692(card, W_XDATA, card->xdata);
  161. }
  162. }
  163. static void
  164. ph_command(struct w6692_hw *card, u8 cmd)
  165. {
  166. pr_debug("%s: ph_command %x\n", card->name, cmd);
  167. WriteW6692(card, W_CIX, cmd);
  168. }
  169. static void
  170. W6692_new_ph(struct w6692_hw *card)
  171. {
  172. if (card->state == W_L1CMD_RST)
  173. ph_command(card, W_L1CMD_DRC);
  174. schedule_event(&card->dch, FLG_PHCHANGE);
  175. }
  176. static void
  177. W6692_ph_bh(struct dchannel *dch)
  178. {
  179. struct w6692_hw *card = dch->hw;
  180. switch (card->state) {
  181. case W_L1CMD_RST:
  182. dch->state = 0;
  183. l1_event(dch->l1, HW_RESET_IND);
  184. break;
  185. case W_L1IND_CD:
  186. dch->state = 3;
  187. l1_event(dch->l1, HW_DEACT_CNF);
  188. break;
  189. case W_L1IND_DRD:
  190. dch->state = 3;
  191. l1_event(dch->l1, HW_DEACT_IND);
  192. break;
  193. case W_L1IND_CE:
  194. dch->state = 4;
  195. l1_event(dch->l1, HW_POWERUP_IND);
  196. break;
  197. case W_L1IND_LD:
  198. if (dch->state <= 5) {
  199. dch->state = 5;
  200. l1_event(dch->l1, ANYSIGNAL);
  201. } else {
  202. dch->state = 8;
  203. l1_event(dch->l1, LOSTFRAMING);
  204. }
  205. break;
  206. case W_L1IND_ARD:
  207. dch->state = 6;
  208. l1_event(dch->l1, INFO2);
  209. break;
  210. case W_L1IND_AI8:
  211. dch->state = 7;
  212. l1_event(dch->l1, INFO4_P8);
  213. break;
  214. case W_L1IND_AI10:
  215. dch->state = 7;
  216. l1_event(dch->l1, INFO4_P10);
  217. break;
  218. default:
  219. pr_debug("%s: TE unknown state %02x dch state %02x\n",
  220. card->name, card->state, dch->state);
  221. break;
  222. }
  223. pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
  224. }
  225. static void
  226. W6692_empty_Dfifo(struct w6692_hw *card, int count)
  227. {
  228. struct dchannel *dch = &card->dch;
  229. u8 *ptr;
  230. pr_debug("%s: empty_Dfifo %d\n", card->name, count);
  231. if (!dch->rx_skb) {
  232. dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
  233. if (!dch->rx_skb) {
  234. pr_info("%s: D receive out of memory\n", card->name);
  235. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  236. return;
  237. }
  238. }
  239. if ((dch->rx_skb->len + count) >= dch->maxlen) {
  240. pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
  241. dch->rx_skb->len + count);
  242. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  243. return;
  244. }
  245. ptr = skb_put(dch->rx_skb, count);
  246. insb(card->addr + W_D_RFIFO, ptr, count);
  247. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  248. if (debug & DEBUG_HW_DFIFO) {
  249. snprintf(card->log, 63, "D-recv %s %d ",
  250. card->name, count);
  251. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  252. }
  253. }
  254. static void
  255. W6692_fill_Dfifo(struct w6692_hw *card)
  256. {
  257. struct dchannel *dch = &card->dch;
  258. int count;
  259. u8 *ptr;
  260. u8 cmd = W_D_CMDR_XMS;
  261. pr_debug("%s: fill_Dfifo\n", card->name);
  262. if (!dch->tx_skb)
  263. return;
  264. count = dch->tx_skb->len - dch->tx_idx;
  265. if (count <= 0)
  266. return;
  267. if (count > W_D_FIFO_THRESH)
  268. count = W_D_FIFO_THRESH;
  269. else
  270. cmd |= W_D_CMDR_XME;
  271. ptr = dch->tx_skb->data + dch->tx_idx;
  272. dch->tx_idx += count;
  273. outsb(card->addr + W_D_XFIFO, ptr, count);
  274. WriteW6692(card, W_D_CMDR, cmd);
  275. if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  276. pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
  277. del_timer(&dch->timer);
  278. }
  279. init_timer(&dch->timer);
  280. dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
  281. add_timer(&dch->timer);
  282. if (debug & DEBUG_HW_DFIFO) {
  283. snprintf(card->log, 63, "D-send %s %d ",
  284. card->name, count);
  285. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  286. }
  287. }
  288. static void
  289. d_retransmit(struct w6692_hw *card)
  290. {
  291. struct dchannel *dch = &card->dch;
  292. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  293. del_timer(&dch->timer);
  294. #ifdef FIXME
  295. if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
  296. dchannel_sched_event(dch, D_CLEARBUSY);
  297. #endif
  298. if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
  299. /* Restart frame */
  300. dch->tx_idx = 0;
  301. W6692_fill_Dfifo(card);
  302. } else if (dch->tx_skb) { /* should not happen */
  303. pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
  304. test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
  305. dch->tx_idx = 0;
  306. W6692_fill_Dfifo(card);
  307. } else {
  308. pr_info("%s: XDU no TX_BUSY\n", card->name);
  309. if (get_next_dframe(dch))
  310. W6692_fill_Dfifo(card);
  311. }
  312. }
  313. static void
  314. handle_rxD(struct w6692_hw *card) {
  315. u8 stat;
  316. int count;
  317. stat = ReadW6692(card, W_D_RSTA);
  318. if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
  319. if (stat & W_D_RSTA_RDOV) {
  320. pr_debug("%s: D-channel RDOV\n", card->name);
  321. #ifdef ERROR_STATISTIC
  322. card->dch.err_rx++;
  323. #endif
  324. }
  325. if (stat & W_D_RSTA_CRCE) {
  326. pr_debug("%s: D-channel CRC error\n", card->name);
  327. #ifdef ERROR_STATISTIC
  328. card->dch.err_crc++;
  329. #endif
  330. }
  331. if (stat & W_D_RSTA_RMB) {
  332. pr_debug("%s: D-channel ABORT\n", card->name);
  333. #ifdef ERROR_STATISTIC
  334. card->dch.err_rx++;
  335. #endif
  336. }
  337. if (card->dch.rx_skb)
  338. dev_kfree_skb(card->dch.rx_skb);
  339. card->dch.rx_skb = NULL;
  340. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
  341. } else {
  342. count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
  343. if (count == 0)
  344. count = W_D_FIFO_THRESH;
  345. W6692_empty_Dfifo(card, count);
  346. recv_Dchannel(&card->dch);
  347. }
  348. }
  349. static void
  350. handle_txD(struct w6692_hw *card) {
  351. if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
  352. del_timer(&card->dch.timer);
  353. if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
  354. W6692_fill_Dfifo(card);
  355. } else {
  356. if (card->dch.tx_skb)
  357. dev_kfree_skb(card->dch.tx_skb);
  358. if (get_next_dframe(&card->dch))
  359. W6692_fill_Dfifo(card);
  360. }
  361. }
  362. static void
  363. handle_statusD(struct w6692_hw *card)
  364. {
  365. struct dchannel *dch = &card->dch;
  366. u8 exval, v1, cir;
  367. exval = ReadW6692(card, W_D_EXIR);
  368. pr_debug("%s: D_EXIR %02x\n", card->name, exval);
  369. if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
  370. /* Transmit underrun/collision */
  371. pr_debug("%s: D-channel underrun/collision\n", card->name);
  372. #ifdef ERROR_STATISTIC
  373. dch->err_tx++;
  374. #endif
  375. d_retransmit(card);
  376. }
  377. if (exval & W_D_EXI_RDOV) { /* RDOV */
  378. pr_debug("%s: D-channel RDOV\n", card->name);
  379. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
  380. }
  381. if (exval & W_D_EXI_TIN2) /* TIN2 - never */
  382. pr_debug("%s: spurious TIN2 interrupt\n", card->name);
  383. if (exval & W_D_EXI_MOC) { /* MOC - not supported */
  384. v1 = ReadW6692(card, W_MOSR);
  385. pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
  386. card->name, v1);
  387. }
  388. if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
  389. cir = ReadW6692(card, W_CIR);
  390. pr_debug("%s: ISC CIR %02X\n", card->name, cir);
  391. if (cir & W_CIR_ICC) {
  392. v1 = cir & W_CIR_COD_MASK;
  393. pr_debug("%s: ph_state_change %x -> %x\n", card->name,
  394. dch->state, v1);
  395. card->state = v1;
  396. if (card->fmask & led) {
  397. switch (v1) {
  398. case W_L1IND_AI8:
  399. case W_L1IND_AI10:
  400. w6692_led_handler(card, 1);
  401. break;
  402. default:
  403. w6692_led_handler(card, 0);
  404. break;
  405. }
  406. }
  407. W6692_new_ph(card);
  408. }
  409. if (cir & W_CIR_SCC) {
  410. v1 = ReadW6692(card, W_SQR);
  411. pr_debug("%s: SCC SQR %02X\n", card->name, v1);
  412. }
  413. }
  414. if (exval & W_D_EXI_WEXP)
  415. pr_debug("%s: spurious WEXP interrupt!\n", card->name);
  416. if (exval & W_D_EXI_TEXP)
  417. pr_debug("%s: spurious TEXP interrupt!\n", card->name);
  418. }
  419. static void
  420. W6692_empty_Bfifo(struct w6692_ch *wch, int count)
  421. {
  422. struct w6692_hw *card = wch->bch.hw;
  423. u8 *ptr;
  424. pr_debug("%s: empty_Bfifo %d\n", card->name, count);
  425. if (unlikely(wch->bch.state == ISDN_P_NONE)) {
  426. pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
  427. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  428. if (wch->bch.rx_skb)
  429. skb_trim(wch->bch.rx_skb, 0);
  430. return;
  431. }
  432. if (!wch->bch.rx_skb) {
  433. wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC);
  434. if (unlikely(!wch->bch.rx_skb)) {
  435. pr_info("%s: B receive out of memory\n", card->name);
  436. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  437. W_B_CMDR_RACT);
  438. return;
  439. }
  440. }
  441. if (wch->bch.rx_skb->len + count > wch->bch.maxlen) {
  442. pr_debug("%s: empty_Bfifo incoming packet too large\n",
  443. card->name);
  444. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  445. skb_trim(wch->bch.rx_skb, 0);
  446. return;
  447. }
  448. ptr = skb_put(wch->bch.rx_skb, count);
  449. insb(wch->addr + W_B_RFIFO, ptr, count);
  450. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  451. if (debug & DEBUG_HW_DFIFO) {
  452. snprintf(card->log, 63, "B%1d-recv %s %d ",
  453. wch->bch.nr, card->name, count);
  454. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  455. }
  456. }
  457. static void
  458. W6692_fill_Bfifo(struct w6692_ch *wch)
  459. {
  460. struct w6692_hw *card = wch->bch.hw;
  461. int count;
  462. u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
  463. pr_debug("%s: fill Bfifo\n", card->name);
  464. if (!wch->bch.tx_skb)
  465. return;
  466. count = wch->bch.tx_skb->len - wch->bch.tx_idx;
  467. if (count <= 0)
  468. return;
  469. ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
  470. if (count > W_B_FIFO_THRESH)
  471. count = W_B_FIFO_THRESH;
  472. else if (test_bit(FLG_HDLC, &wch->bch.Flags))
  473. cmd |= W_B_CMDR_XME;
  474. pr_debug("%s: fill Bfifo%d/%d\n", card->name,
  475. count, wch->bch.tx_idx);
  476. wch->bch.tx_idx += count;
  477. outsb(wch->addr + W_B_XFIFO, ptr, count);
  478. WriteW6692B(wch, W_B_CMDR, cmd);
  479. if (debug & DEBUG_HW_DFIFO) {
  480. snprintf(card->log, 63, "B%1d-send %s %d ",
  481. wch->bch.nr, card->name, count);
  482. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  483. }
  484. }
  485. #if 0
  486. static int
  487. setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
  488. {
  489. struct w6692_hw *card = wch->bch.hw;
  490. u16 *vol = (u16 *)skb->data;
  491. u8 val;
  492. if ((!(card->fmask & pots)) ||
  493. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  494. return -ENODEV;
  495. if (skb->len < 2)
  496. return -EINVAL;
  497. if (*vol > 7)
  498. return -EINVAL;
  499. val = *vol & 7;
  500. val = 7 - val;
  501. if (mic) {
  502. val <<= 3;
  503. card->xaddr &= 0xc7;
  504. } else {
  505. card->xaddr &= 0xf8;
  506. }
  507. card->xaddr |= val;
  508. WriteW6692(card, W_XADDR, card->xaddr);
  509. return 0;
  510. }
  511. static int
  512. enable_pots(struct w6692_ch *wch)
  513. {
  514. struct w6692_hw *card = wch->bch.hw;
  515. if ((!(card->fmask & pots)) ||
  516. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  517. return -ENODEV;
  518. wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
  519. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  520. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  521. card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
  522. WriteW6692(card, W_PCTL, card->pctl);
  523. return 0;
  524. }
  525. #endif
  526. static int
  527. disable_pots(struct w6692_ch *wch)
  528. {
  529. struct w6692_hw *card = wch->bch.hw;
  530. if (!(card->fmask & pots))
  531. return -ENODEV;
  532. wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
  533. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  534. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  535. W_B_CMDR_XRST);
  536. return 0;
  537. }
  538. static int
  539. w6692_mode(struct w6692_ch *wch, u32 pr)
  540. {
  541. struct w6692_hw *card;
  542. card = wch->bch.hw;
  543. pr_debug("%s: B%d protocol %x-->%x\n", card->name,
  544. wch->bch.nr, wch->bch.state, pr);
  545. switch (pr) {
  546. case ISDN_P_NONE:
  547. if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
  548. disable_pots(wch);
  549. wch->b_mode = 0;
  550. mISDN_clear_bchannel(&wch->bch);
  551. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  552. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  553. test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
  554. test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  555. break;
  556. case ISDN_P_B_RAW:
  557. wch->b_mode = W_B_MODE_MMS;
  558. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  559. WriteW6692B(wch, W_B_EXIM, 0);
  560. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  561. W_B_CMDR_XRST);
  562. test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  563. break;
  564. case ISDN_P_B_HDLC:
  565. wch->b_mode = W_B_MODE_ITF;
  566. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  567. WriteW6692B(wch, W_B_ADM1, 0xff);
  568. WriteW6692B(wch, W_B_ADM2, 0xff);
  569. WriteW6692B(wch, W_B_EXIM, 0);
  570. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  571. W_B_CMDR_XRST);
  572. test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
  573. break;
  574. default:
  575. pr_info("%s: protocol %x not known\n", card->name, pr);
  576. return -ENOPROTOOPT;
  577. }
  578. wch->bch.state = pr;
  579. return 0;
  580. }
  581. static void
  582. send_next(struct w6692_ch *wch)
  583. {
  584. if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len)
  585. W6692_fill_Bfifo(wch);
  586. else {
  587. if (wch->bch.tx_skb) {
  588. /* send confirm, on trans, free on hdlc. */
  589. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  590. confirm_Bsend(&wch->bch);
  591. dev_kfree_skb(wch->bch.tx_skb);
  592. }
  593. if (get_next_bframe(&wch->bch))
  594. W6692_fill_Bfifo(wch);
  595. }
  596. }
  597. static void
  598. W6692B_interrupt(struct w6692_hw *card, int ch)
  599. {
  600. struct w6692_ch *wch = &card->bc[ch];
  601. int count;
  602. u8 stat, star = 0;
  603. stat = ReadW6692B(wch, W_B_EXIR);
  604. pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
  605. if (stat & W_B_EXI_RME) {
  606. star = ReadW6692B(wch, W_B_STAR);
  607. if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
  608. if ((star & W_B_STAR_RDOV) &&
  609. test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
  610. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  611. wch->bch.nr, wch->bch.state);
  612. #ifdef ERROR_STATISTIC
  613. wch->bch.err_rdo++;
  614. #endif
  615. }
  616. if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
  617. if (star & W_B_STAR_CRCE) {
  618. pr_debug("%s: B%d CRC error\n",
  619. card->name, wch->bch.nr);
  620. #ifdef ERROR_STATISTIC
  621. wch->bch.err_crc++;
  622. #endif
  623. }
  624. if (star & W_B_STAR_RMB) {
  625. pr_debug("%s: B%d message abort\n",
  626. card->name, wch->bch.nr);
  627. #ifdef ERROR_STATISTIC
  628. wch->bch.err_inv++;
  629. #endif
  630. }
  631. }
  632. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  633. W_B_CMDR_RRST | W_B_CMDR_RACT);
  634. if (wch->bch.rx_skb)
  635. skb_trim(wch->bch.rx_skb, 0);
  636. } else {
  637. count = ReadW6692B(wch, W_B_RBCL) &
  638. (W_B_FIFO_THRESH - 1);
  639. if (count == 0)
  640. count = W_B_FIFO_THRESH;
  641. W6692_empty_Bfifo(wch, count);
  642. recv_Bchannel(&wch->bch, 0);
  643. }
  644. }
  645. if (stat & W_B_EXI_RMR) {
  646. if (!(stat & W_B_EXI_RME))
  647. star = ReadW6692B(wch, W_B_STAR);
  648. if (star & W_B_STAR_RDOV) {
  649. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  650. wch->bch.nr, wch->bch.state);
  651. #ifdef ERROR_STATISTIC
  652. wch->bch.err_rdo++;
  653. #endif
  654. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  655. W_B_CMDR_RRST | W_B_CMDR_RACT);
  656. } else {
  657. W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
  658. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) &&
  659. wch->bch.rx_skb && (wch->bch.rx_skb->len > 0))
  660. recv_Bchannel(&wch->bch, 0);
  661. }
  662. }
  663. if (stat & W_B_EXI_RDOV) {
  664. /* only if it is not handled yet */
  665. if (!(star & W_B_STAR_RDOV)) {
  666. pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
  667. wch->bch.nr, wch->bch.state);
  668. #ifdef ERROR_STATISTIC
  669. wch->bch.err_rdo++;
  670. #endif
  671. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  672. W_B_CMDR_RRST | W_B_CMDR_RACT);
  673. }
  674. }
  675. if (stat & W_B_EXI_XFR) {
  676. if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
  677. star = ReadW6692B(wch, W_B_STAR);
  678. pr_debug("%s: B%d star %02x\n", card->name,
  679. wch->bch.nr, star);
  680. }
  681. if (star & W_B_STAR_XDOW) {
  682. pr_debug("%s: B%d XDOW proto=%x\n", card->name,
  683. wch->bch.nr, wch->bch.state);
  684. #ifdef ERROR_STATISTIC
  685. wch->bch.err_xdu++;
  686. #endif
  687. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
  688. W_B_CMDR_RACT);
  689. /* resend */
  690. if (wch->bch.tx_skb) {
  691. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  692. wch->bch.tx_idx = 0;
  693. }
  694. }
  695. send_next(wch);
  696. if (stat & W_B_EXI_XDUN)
  697. return; /* handle XDOW only once */
  698. }
  699. if (stat & W_B_EXI_XDUN) {
  700. pr_debug("%s: B%d XDUN proto=%x\n", card->name,
  701. wch->bch.nr, wch->bch.state);
  702. #ifdef ERROR_STATISTIC
  703. wch->bch.err_xdu++;
  704. #endif
  705. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
  706. /* resend */
  707. if (wch->bch.tx_skb) {
  708. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  709. wch->bch.tx_idx = 0;
  710. }
  711. send_next(wch);
  712. }
  713. }
  714. static irqreturn_t
  715. w6692_irq(int intno, void *dev_id)
  716. {
  717. struct w6692_hw *card = dev_id;
  718. u8 ista;
  719. spin_lock(&card->lock);
  720. ista = ReadW6692(card, W_ISTA);
  721. if ((ista | card->imask) == card->imask) {
  722. /* possible a shared IRQ reqest */
  723. spin_unlock(&card->lock);
  724. return IRQ_NONE;
  725. }
  726. card->irqcnt++;
  727. pr_debug("%s: ista %02x\n", card->name, ista);
  728. ista &= ~card->imask;
  729. if (ista & W_INT_B1_EXI)
  730. W6692B_interrupt(card, 0);
  731. if (ista & W_INT_B2_EXI)
  732. W6692B_interrupt(card, 1);
  733. if (ista & W_INT_D_RME)
  734. handle_rxD(card);
  735. if (ista & W_INT_D_RMR)
  736. W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
  737. if (ista & W_INT_D_XFR)
  738. handle_txD(card);
  739. if (ista & W_INT_D_EXI)
  740. handle_statusD(card);
  741. if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
  742. pr_debug("%s: W6692 spurious XINT!\n", card->name);
  743. /* End IRQ Handler */
  744. spin_unlock(&card->lock);
  745. return IRQ_HANDLED;
  746. }
  747. static void
  748. dbusy_timer_handler(struct dchannel *dch)
  749. {
  750. struct w6692_hw *card = dch->hw;
  751. int rbch, star;
  752. u_long flags;
  753. if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  754. spin_lock_irqsave(&card->lock, flags);
  755. rbch = ReadW6692(card, W_D_RBCH);
  756. star = ReadW6692(card, W_D_STAR);
  757. pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
  758. card->name, rbch, star);
  759. if (star & W_D_STAR_XBZ) /* D-Channel Busy */
  760. test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
  761. else {
  762. /* discard frame; reset transceiver */
  763. test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
  764. if (dch->tx_idx)
  765. dch->tx_idx = 0;
  766. else
  767. pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
  768. card->name);
  769. /* Transmitter reset */
  770. WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
  771. }
  772. spin_unlock_irqrestore(&card->lock, flags);
  773. }
  774. }
  775. void initW6692(struct w6692_hw *card)
  776. {
  777. u8 val;
  778. card->dch.timer.function = (void *)dbusy_timer_handler;
  779. card->dch.timer.data = (u_long)&card->dch;
  780. init_timer(&card->dch.timer);
  781. w6692_mode(&card->bc[0], ISDN_P_NONE);
  782. w6692_mode(&card->bc[1], ISDN_P_NONE);
  783. WriteW6692(card, W_D_CTL, 0x00);
  784. disable_hwirq(card);
  785. WriteW6692(card, W_D_SAM, 0xff);
  786. WriteW6692(card, W_D_TAM, 0xff);
  787. WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
  788. card->state = W_L1CMD_RST;
  789. ph_command(card, W_L1CMD_RST);
  790. ph_command(card, W_L1CMD_ECK);
  791. /* enable all IRQ but extern */
  792. card->imask = 0x18;
  793. WriteW6692(card, W_D_EXIM, 0x00);
  794. WriteW6692B(&card->bc[0], W_B_EXIM, 0);
  795. WriteW6692B(&card->bc[1], W_B_EXIM, 0);
  796. /* Reset D-chan receiver and transmitter */
  797. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
  798. /* Reset B-chan receiver and transmitter */
  799. WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  800. WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  801. /* enable peripheral */
  802. if (card->subtype == W6692_USR) {
  803. /* seems that USR implemented some power control features
  804. * Pin 79 is connected to the oscilator circuit so we
  805. * have to handle it here
  806. */
  807. card->pctl = 0x80;
  808. card->xdata = 0;
  809. WriteW6692(card, W_PCTL, card->pctl);
  810. WriteW6692(card, W_XDATA, card->xdata);
  811. } else {
  812. card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
  813. W_PCTL_OE1 | W_PCTL_OE0;
  814. card->xaddr = 0x00;/* all sw off */
  815. if (card->fmask & pots)
  816. card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
  817. if (card->fmask & led)
  818. card->xdata |= 0x04; /* LED OFF */
  819. if ((card->fmask & pots) || (card->fmask & led)) {
  820. WriteW6692(card, W_PCTL, card->pctl);
  821. WriteW6692(card, W_XADDR, card->xaddr);
  822. WriteW6692(card, W_XDATA, card->xdata);
  823. val = ReadW6692(card, W_XADDR);
  824. if (debug & DEBUG_HW)
  825. pr_notice("%s: W_XADDR=%02x\n",
  826. card->name, val);
  827. }
  828. }
  829. }
  830. static void
  831. reset_w6692(struct w6692_hw *card)
  832. {
  833. WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
  834. mdelay(10);
  835. WriteW6692(card, W_D_CTL, 0);
  836. }
  837. static int
  838. init_card(struct w6692_hw *card)
  839. {
  840. int cnt = 3;
  841. u_long flags;
  842. spin_lock_irqsave(&card->lock, flags);
  843. disable_hwirq(card);
  844. spin_unlock_irqrestore(&card->lock, flags);
  845. if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
  846. pr_info("%s: couldn't get interrupt %d\n", card->name,
  847. card->irq);
  848. return -EIO;
  849. }
  850. while (cnt--) {
  851. spin_lock_irqsave(&card->lock, flags);
  852. initW6692(card);
  853. enable_hwirq(card);
  854. spin_unlock_irqrestore(&card->lock, flags);
  855. /* Timeout 10ms */
  856. msleep_interruptible(10);
  857. if (debug & DEBUG_HW)
  858. pr_notice("%s: IRQ %d count %d\n", card->name,
  859. card->irq, card->irqcnt);
  860. if (!card->irqcnt) {
  861. pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
  862. card->name, card->irq, 3 - cnt);
  863. reset_w6692(card);
  864. } else
  865. return 0;
  866. }
  867. free_irq(card->irq, card);
  868. return -EIO;
  869. }
  870. static int
  871. w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
  872. {
  873. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  874. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  875. struct w6692_hw *card = bch->hw;
  876. int ret = -EINVAL;
  877. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  878. u32 id;
  879. u_long flags;
  880. switch (hh->prim) {
  881. case PH_DATA_REQ:
  882. spin_lock_irqsave(&card->lock, flags);
  883. ret = bchannel_senddata(bch, skb);
  884. if (ret > 0) { /* direct TX */
  885. id = hh->id; /* skb can be freed */
  886. ret = 0;
  887. W6692_fill_Bfifo(bc);
  888. spin_unlock_irqrestore(&card->lock, flags);
  889. if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
  890. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  891. } else
  892. spin_unlock_irqrestore(&card->lock, flags);
  893. return ret;
  894. case PH_ACTIVATE_REQ:
  895. spin_lock_irqsave(&card->lock, flags);
  896. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  897. ret = w6692_mode(bc, ch->protocol);
  898. else
  899. ret = 0;
  900. spin_unlock_irqrestore(&card->lock, flags);
  901. if (!ret)
  902. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  903. NULL, GFP_KERNEL);
  904. break;
  905. case PH_DEACTIVATE_REQ:
  906. spin_lock_irqsave(&card->lock, flags);
  907. mISDN_clear_bchannel(bch);
  908. w6692_mode(bc, ISDN_P_NONE);
  909. spin_unlock_irqrestore(&card->lock, flags);
  910. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  911. NULL, GFP_KERNEL);
  912. ret = 0;
  913. break;
  914. default:
  915. pr_info("%s: %s unknown prim(%x,%x)\n",
  916. card->name, __func__, hh->prim, hh->id);
  917. ret = -EINVAL;
  918. }
  919. if (!ret)
  920. dev_kfree_skb(skb);
  921. return ret;
  922. }
  923. static int
  924. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  925. {
  926. int ret = 0;
  927. switch (cq->op) {
  928. case MISDN_CTRL_GETOP:
  929. cq->op = 0;
  930. break;
  931. /* Nothing implemented yet */
  932. case MISDN_CTRL_FILL_EMPTY:
  933. default:
  934. pr_info("%s: unknown Op %x\n", __func__, cq->op);
  935. ret = -EINVAL;
  936. break;
  937. }
  938. return ret;
  939. }
  940. static int
  941. open_bchannel(struct w6692_hw *card, struct channel_req *rq)
  942. {
  943. struct bchannel *bch;
  944. if (rq->adr.channel > 2)
  945. return -EINVAL;
  946. if (rq->protocol == ISDN_P_NONE)
  947. return -EINVAL;
  948. bch = &card->bc[rq->adr.channel - 1].bch;
  949. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  950. return -EBUSY; /* b-channel can be only open once */
  951. test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
  952. bch->ch.protocol = rq->protocol;
  953. rq->ch = &bch->ch;
  954. return 0;
  955. }
  956. static int
  957. channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
  958. {
  959. int ret = 0;
  960. switch (cq->op) {
  961. case MISDN_CTRL_GETOP:
  962. cq->op = 0;
  963. break;
  964. default:
  965. pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
  966. ret = -EINVAL;
  967. break;
  968. }
  969. return ret;
  970. }
  971. static int
  972. w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  973. {
  974. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  975. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  976. struct w6692_hw *card = bch->hw;
  977. int ret = -EINVAL;
  978. u_long flags;
  979. pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
  980. switch (cmd) {
  981. case CLOSE_CHANNEL:
  982. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  983. if (test_bit(FLG_ACTIVE, &bch->Flags)) {
  984. spin_lock_irqsave(&card->lock, flags);
  985. mISDN_freebchannel(bch);
  986. w6692_mode(bc, ISDN_P_NONE);
  987. spin_unlock_irqrestore(&card->lock, flags);
  988. } else {
  989. skb_queue_purge(&bch->rqueue);
  990. bch->rcount = 0;
  991. }
  992. ch->protocol = ISDN_P_NONE;
  993. ch->peer = NULL;
  994. module_put(THIS_MODULE);
  995. ret = 0;
  996. break;
  997. case CONTROL_CHANNEL:
  998. ret = channel_bctrl(bch, arg);
  999. break;
  1000. default:
  1001. pr_info("%s: %s unknown prim(%x)\n",
  1002. card->name, __func__, cmd);
  1003. }
  1004. return ret;
  1005. }
  1006. static int
  1007. w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
  1008. {
  1009. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1010. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1011. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1012. int ret = -EINVAL;
  1013. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  1014. u32 id;
  1015. u_long flags;
  1016. switch (hh->prim) {
  1017. case PH_DATA_REQ:
  1018. spin_lock_irqsave(&card->lock, flags);
  1019. ret = dchannel_senddata(dch, skb);
  1020. if (ret > 0) { /* direct TX */
  1021. id = hh->id; /* skb can be freed */
  1022. W6692_fill_Dfifo(card);
  1023. ret = 0;
  1024. spin_unlock_irqrestore(&card->lock, flags);
  1025. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  1026. } else
  1027. spin_unlock_irqrestore(&card->lock, flags);
  1028. return ret;
  1029. case PH_ACTIVATE_REQ:
  1030. ret = l1_event(dch->l1, hh->prim);
  1031. break;
  1032. case PH_DEACTIVATE_REQ:
  1033. test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
  1034. ret = l1_event(dch->l1, hh->prim);
  1035. break;
  1036. }
  1037. if (!ret)
  1038. dev_kfree_skb(skb);
  1039. return ret;
  1040. }
  1041. static int
  1042. w6692_l1callback(struct dchannel *dch, u32 cmd)
  1043. {
  1044. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1045. u_long flags;
  1046. pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
  1047. switch (cmd) {
  1048. case INFO3_P8:
  1049. spin_lock_irqsave(&card->lock, flags);
  1050. ph_command(card, W_L1CMD_AR8);
  1051. spin_unlock_irqrestore(&card->lock, flags);
  1052. break;
  1053. case INFO3_P10:
  1054. spin_lock_irqsave(&card->lock, flags);
  1055. ph_command(card, W_L1CMD_AR10);
  1056. spin_unlock_irqrestore(&card->lock, flags);
  1057. break;
  1058. case HW_RESET_REQ:
  1059. spin_lock_irqsave(&card->lock, flags);
  1060. if (card->state != W_L1IND_DRD)
  1061. ph_command(card, W_L1CMD_RST);
  1062. ph_command(card, W_L1CMD_ECK);
  1063. spin_unlock_irqrestore(&card->lock, flags);
  1064. break;
  1065. case HW_DEACT_REQ:
  1066. skb_queue_purge(&dch->squeue);
  1067. if (dch->tx_skb) {
  1068. dev_kfree_skb(dch->tx_skb);
  1069. dch->tx_skb = NULL;
  1070. }
  1071. dch->tx_idx = 0;
  1072. if (dch->rx_skb) {
  1073. dev_kfree_skb(dch->rx_skb);
  1074. dch->rx_skb = NULL;
  1075. }
  1076. test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
  1077. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  1078. del_timer(&dch->timer);
  1079. break;
  1080. case HW_POWERUP_REQ:
  1081. spin_lock_irqsave(&card->lock, flags);
  1082. ph_command(card, W_L1CMD_ECK);
  1083. spin_unlock_irqrestore(&card->lock, flags);
  1084. break;
  1085. case PH_ACTIVATE_IND:
  1086. test_and_set_bit(FLG_ACTIVE, &dch->Flags);
  1087. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1088. GFP_ATOMIC);
  1089. break;
  1090. case PH_DEACTIVATE_IND:
  1091. test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
  1092. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1093. GFP_ATOMIC);
  1094. break;
  1095. default:
  1096. pr_debug("%s: %s unknown command %x\n", card->name,
  1097. __func__, cmd);
  1098. return -1;
  1099. }
  1100. return 0;
  1101. }
  1102. static int
  1103. open_dchannel(struct w6692_hw *card, struct channel_req *rq)
  1104. {
  1105. pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
  1106. card->dch.dev.id, __builtin_return_address(1));
  1107. if (rq->protocol != ISDN_P_TE_S0)
  1108. return -EINVAL;
  1109. if (rq->adr.channel == 1)
  1110. /* E-Channel not supported */
  1111. return -EINVAL;
  1112. rq->ch = &card->dch.dev.D;
  1113. rq->ch->protocol = rq->protocol;
  1114. if (card->dch.state == 7)
  1115. _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
  1116. 0, NULL, GFP_KERNEL);
  1117. return 0;
  1118. }
  1119. static int
  1120. w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1121. {
  1122. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1123. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1124. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1125. struct channel_req *rq;
  1126. int err = 0;
  1127. pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
  1128. switch (cmd) {
  1129. case OPEN_CHANNEL:
  1130. rq = arg;
  1131. if (rq->protocol == ISDN_P_TE_S0)
  1132. err = open_dchannel(card, rq);
  1133. else
  1134. err = open_bchannel(card, rq);
  1135. if (err)
  1136. break;
  1137. if (!try_module_get(THIS_MODULE))
  1138. pr_info("%s: cannot get module\n", card->name);
  1139. break;
  1140. case CLOSE_CHANNEL:
  1141. pr_debug("%s: dev(%d) close from %p\n", card->name,
  1142. dch->dev.id, __builtin_return_address(0));
  1143. module_put(THIS_MODULE);
  1144. break;
  1145. case CONTROL_CHANNEL:
  1146. err = channel_ctrl(card, arg);
  1147. break;
  1148. default:
  1149. pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
  1150. return -EINVAL;
  1151. }
  1152. return err;
  1153. }
  1154. static int
  1155. setup_w6692(struct w6692_hw *card)
  1156. {
  1157. u32 val;
  1158. if (!request_region(card->addr, 256, card->name)) {
  1159. pr_info("%s: config port %x-%x already in use\n", card->name,
  1160. card->addr, card->addr + 255);
  1161. return -EIO;
  1162. }
  1163. W6692Version(card);
  1164. card->bc[0].addr = card->addr;
  1165. card->bc[1].addr = card->addr + 0x40;
  1166. val = ReadW6692(card, W_ISTA);
  1167. if (debug & DEBUG_HW)
  1168. pr_notice("%s ISTA=%02x\n", card->name, val);
  1169. val = ReadW6692(card, W_IMASK);
  1170. if (debug & DEBUG_HW)
  1171. pr_notice("%s IMASK=%02x\n", card->name, val);
  1172. val = ReadW6692(card, W_D_EXIR);
  1173. if (debug & DEBUG_HW)
  1174. pr_notice("%s D_EXIR=%02x\n", card->name, val);
  1175. val = ReadW6692(card, W_D_EXIM);
  1176. if (debug & DEBUG_HW)
  1177. pr_notice("%s D_EXIM=%02x\n", card->name, val);
  1178. val = ReadW6692(card, W_D_RSTA);
  1179. if (debug & DEBUG_HW)
  1180. pr_notice("%s D_RSTA=%02x\n", card->name, val);
  1181. return 0;
  1182. }
  1183. static void
  1184. release_card(struct w6692_hw *card)
  1185. {
  1186. u_long flags;
  1187. spin_lock_irqsave(&card->lock, flags);
  1188. disable_hwirq(card);
  1189. w6692_mode(&card->bc[0], ISDN_P_NONE);
  1190. w6692_mode(&card->bc[1], ISDN_P_NONE);
  1191. if ((card->fmask & led) || card->subtype == W6692_USR) {
  1192. card->xdata |= 0x04; /* LED OFF */
  1193. WriteW6692(card, W_XDATA, card->xdata);
  1194. }
  1195. spin_unlock_irqrestore(&card->lock, flags);
  1196. free_irq(card->irq, card);
  1197. l1_event(card->dch.l1, CLOSE_CHANNEL);
  1198. mISDN_unregister_device(&card->dch.dev);
  1199. release_region(card->addr, 256);
  1200. mISDN_freebchannel(&card->bc[1].bch);
  1201. mISDN_freebchannel(&card->bc[0].bch);
  1202. mISDN_freedchannel(&card->dch);
  1203. write_lock_irqsave(&card_lock, flags);
  1204. list_del(&card->list);
  1205. write_unlock_irqrestore(&card_lock, flags);
  1206. pci_disable_device(card->pdev);
  1207. pci_set_drvdata(card->pdev, NULL);
  1208. kfree(card);
  1209. }
  1210. static int
  1211. setup_instance(struct w6692_hw *card)
  1212. {
  1213. int i, err;
  1214. u_long flags;
  1215. snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
  1216. write_lock_irqsave(&card_lock, flags);
  1217. list_add_tail(&card->list, &Cards);
  1218. write_unlock_irqrestore(&card_lock, flags);
  1219. card->fmask = (1 << w6692_cnt);
  1220. _set_debug(card);
  1221. spin_lock_init(&card->lock);
  1222. mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
  1223. card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
  1224. card->dch.dev.D.send = w6692_l2l1D;
  1225. card->dch.dev.D.ctrl = w6692_dctrl;
  1226. card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1227. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
  1228. card->dch.hw = card;
  1229. card->dch.dev.nrbchan = 2;
  1230. for (i = 0; i < 2; i++) {
  1231. mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM);
  1232. card->bc[i].bch.hw = card;
  1233. card->bc[i].bch.nr = i + 1;
  1234. card->bc[i].bch.ch.nr = i + 1;
  1235. card->bc[i].bch.ch.send = w6692_l2l1B;
  1236. card->bc[i].bch.ch.ctrl = w6692_bctrl;
  1237. set_channelmap(i + 1, card->dch.dev.channelmap);
  1238. list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
  1239. }
  1240. err = setup_w6692(card);
  1241. if (err)
  1242. goto error_setup;
  1243. err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
  1244. card->name);
  1245. if (err)
  1246. goto error_reg;
  1247. err = init_card(card);
  1248. if (err)
  1249. goto error_init;
  1250. err = create_l1(&card->dch, w6692_l1callback);
  1251. if (!err) {
  1252. w6692_cnt++;
  1253. pr_notice("W6692 %d cards installed\n", w6692_cnt);
  1254. return 0;
  1255. }
  1256. free_irq(card->irq, card);
  1257. error_init:
  1258. mISDN_unregister_device(&card->dch.dev);
  1259. error_reg:
  1260. release_region(card->addr, 256);
  1261. error_setup:
  1262. mISDN_freebchannel(&card->bc[1].bch);
  1263. mISDN_freebchannel(&card->bc[0].bch);
  1264. mISDN_freedchannel(&card->dch);
  1265. write_lock_irqsave(&card_lock, flags);
  1266. list_del(&card->list);
  1267. write_unlock_irqrestore(&card_lock, flags);
  1268. kfree(card);
  1269. return err;
  1270. }
  1271. static int __devinit
  1272. w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1273. {
  1274. int err = -ENOMEM;
  1275. struct w6692_hw *card;
  1276. struct w6692map *m = (struct w6692map *)ent->driver_data;
  1277. card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
  1278. if (!card) {
  1279. pr_info("No kmem for w6692 card\n");
  1280. return err;
  1281. }
  1282. card->pdev = pdev;
  1283. card->subtype = m->subtype;
  1284. err = pci_enable_device(pdev);
  1285. if (err) {
  1286. kfree(card);
  1287. return err;
  1288. }
  1289. printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
  1290. m->name, pci_name(pdev));
  1291. card->addr = pci_resource_start(pdev, 1);
  1292. card->irq = pdev->irq;
  1293. pci_set_drvdata(pdev, card);
  1294. err = setup_instance(card);
  1295. if (err)
  1296. pci_set_drvdata(pdev, NULL);
  1297. return err;
  1298. }
  1299. static void __devexit
  1300. w6692_remove_pci(struct pci_dev *pdev)
  1301. {
  1302. struct w6692_hw *card = pci_get_drvdata(pdev);
  1303. if (card)
  1304. release_card(card);
  1305. else
  1306. if (debug)
  1307. pr_notice("%s: drvdata allready removed\n", __func__);
  1308. }
  1309. static struct pci_device_id w6692_ids[] = {
  1310. { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
  1311. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
  1312. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1313. PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
  1314. (ulong)&w6692_map[2]},
  1315. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1316. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
  1317. { }
  1318. };
  1319. MODULE_DEVICE_TABLE(pci, w6692_ids);
  1320. static struct pci_driver w6692_driver = {
  1321. .name = "w6692",
  1322. .probe = w6692_probe,
  1323. .remove = __devexit_p(w6692_remove_pci),
  1324. .id_table = w6692_ids,
  1325. };
  1326. static int __init w6692_init(void)
  1327. {
  1328. int err;
  1329. pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
  1330. err = pci_register_driver(&w6692_driver);
  1331. return err;
  1332. }
  1333. static void __exit w6692_cleanup(void)
  1334. {
  1335. pci_unregister_driver(&w6692_driver);
  1336. }
  1337. module_init(w6692_init);
  1338. module_exit(w6692_cleanup);