winbond-cir.c 41 KB

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  1. /*
  2. * winbond-cir.c - Driver for the Consumer IR functionality of Winbond
  3. * SuperI/O chips.
  4. *
  5. * Currently supports the Winbond WPCD376i chip (PNP id WEC1022), but
  6. * could probably support others (Winbond WEC102X, NatSemi, etc)
  7. * with minor modifications.
  8. *
  9. * Original Author: David Härdeman <david@hardeman.nu>
  10. * Copyright (C) 2009 David Härdeman <david@hardeman.nu>
  11. *
  12. * Dedicated to Matilda, my newborn daughter, without whose loving attention
  13. * this driver would have been finished in half the time and with a fraction
  14. * of the bugs.
  15. *
  16. * Written using:
  17. * o Winbond WPCD376I datasheet helpfully provided by Jesse Barnes at Intel
  18. * o NatSemi PC87338/PC97338 datasheet (for the serial port stuff)
  19. * o DSDT dumps
  20. *
  21. * Supported features:
  22. * o RC6
  23. * o Wake-On-CIR functionality
  24. *
  25. * To do:
  26. * o Test NEC and RC5
  27. *
  28. * Left as an exercise for the reader:
  29. * o Learning (I have neither the hardware, nor the need)
  30. * o IR Transmit (ibid)
  31. *
  32. * This program is free software; you can redistribute it and/or modify
  33. * it under the terms of the GNU General Public License as published by
  34. * the Free Software Foundation; either version 2 of the License, or
  35. * (at your option) any later version.
  36. *
  37. * This program is distributed in the hope that it will be useful,
  38. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  39. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  40. * GNU General Public License for more details.
  41. *
  42. * You should have received a copy of the GNU General Public License
  43. * along with this program; if not, write to the Free Software
  44. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  45. */
  46. #include <linux/module.h>
  47. #include <linux/pnp.h>
  48. #include <linux/interrupt.h>
  49. #include <linux/timer.h>
  50. #include <linux/input.h>
  51. #include <linux/leds.h>
  52. #include <linux/list.h>
  53. #include <linux/spinlock.h>
  54. #include <linux/pci_ids.h>
  55. #include <linux/io.h>
  56. #include <linux/bitrev.h>
  57. #include <linux/bitops.h>
  58. #define DRVNAME "winbond-cir"
  59. /* CEIR Wake-Up Registers, relative to data->wbase */
  60. #define WBCIR_REG_WCEIR_CTL 0x03 /* CEIR Receiver Control */
  61. #define WBCIR_REG_WCEIR_STS 0x04 /* CEIR Receiver Status */
  62. #define WBCIR_REG_WCEIR_EV_EN 0x05 /* CEIR Receiver Event Enable */
  63. #define WBCIR_REG_WCEIR_CNTL 0x06 /* CEIR Receiver Counter Low */
  64. #define WBCIR_REG_WCEIR_CNTH 0x07 /* CEIR Receiver Counter High */
  65. #define WBCIR_REG_WCEIR_INDEX 0x08 /* CEIR Receiver Index */
  66. #define WBCIR_REG_WCEIR_DATA 0x09 /* CEIR Receiver Data */
  67. #define WBCIR_REG_WCEIR_CSL 0x0A /* CEIR Re. Compare Strlen */
  68. #define WBCIR_REG_WCEIR_CFG1 0x0B /* CEIR Re. Configuration 1 */
  69. #define WBCIR_REG_WCEIR_CFG2 0x0C /* CEIR Re. Configuration 2 */
  70. /* CEIR Enhanced Functionality Registers, relative to data->ebase */
  71. #define WBCIR_REG_ECEIR_CTS 0x00 /* Enhanced IR Control Status */
  72. #define WBCIR_REG_ECEIR_CCTL 0x01 /* Infrared Counter Control */
  73. #define WBCIR_REG_ECEIR_CNT_LO 0x02 /* Infrared Counter LSB */
  74. #define WBCIR_REG_ECEIR_CNT_HI 0x03 /* Infrared Counter MSB */
  75. #define WBCIR_REG_ECEIR_IREM 0x04 /* Infrared Emitter Status */
  76. /* SP3 Banked Registers, relative to data->sbase */
  77. #define WBCIR_REG_SP3_BSR 0x03 /* Bank Select, all banks */
  78. /* Bank 0 */
  79. #define WBCIR_REG_SP3_RXDATA 0x00 /* FIFO RX data (r) */
  80. #define WBCIR_REG_SP3_TXDATA 0x00 /* FIFO TX data (w) */
  81. #define WBCIR_REG_SP3_IER 0x01 /* Interrupt Enable */
  82. #define WBCIR_REG_SP3_EIR 0x02 /* Event Identification (r) */
  83. #define WBCIR_REG_SP3_FCR 0x02 /* FIFO Control (w) */
  84. #define WBCIR_REG_SP3_MCR 0x04 /* Mode Control */
  85. #define WBCIR_REG_SP3_LSR 0x05 /* Link Status */
  86. #define WBCIR_REG_SP3_MSR 0x06 /* Modem Status */
  87. #define WBCIR_REG_SP3_ASCR 0x07 /* Aux Status and Control */
  88. /* Bank 2 */
  89. #define WBCIR_REG_SP3_BGDL 0x00 /* Baud Divisor LSB */
  90. #define WBCIR_REG_SP3_BGDH 0x01 /* Baud Divisor MSB */
  91. #define WBCIR_REG_SP3_EXCR1 0x02 /* Extended Control 1 */
  92. #define WBCIR_REG_SP3_EXCR2 0x04 /* Extended Control 2 */
  93. #define WBCIR_REG_SP3_TXFLV 0x06 /* TX FIFO Level */
  94. #define WBCIR_REG_SP3_RXFLV 0x07 /* RX FIFO Level */
  95. /* Bank 3 */
  96. #define WBCIR_REG_SP3_MRID 0x00 /* Module Identification */
  97. #define WBCIR_REG_SP3_SH_LCR 0x01 /* LCR Shadow */
  98. #define WBCIR_REG_SP3_SH_FCR 0x02 /* FCR Shadow */
  99. /* Bank 4 */
  100. #define WBCIR_REG_SP3_IRCR1 0x02 /* Infrared Control 1 */
  101. /* Bank 5 */
  102. #define WBCIR_REG_SP3_IRCR2 0x04 /* Infrared Control 2 */
  103. /* Bank 6 */
  104. #define WBCIR_REG_SP3_IRCR3 0x00 /* Infrared Control 3 */
  105. #define WBCIR_REG_SP3_SIR_PW 0x02 /* SIR Pulse Width */
  106. /* Bank 7 */
  107. #define WBCIR_REG_SP3_IRRXDC 0x00 /* IR RX Demod Control */
  108. #define WBCIR_REG_SP3_IRTXMC 0x01 /* IR TX Mod Control */
  109. #define WBCIR_REG_SP3_RCCFG 0x02 /* CEIR Config */
  110. #define WBCIR_REG_SP3_IRCFG1 0x04 /* Infrared Config 1 */
  111. #define WBCIR_REG_SP3_IRCFG4 0x07 /* Infrared Config 4 */
  112. /*
  113. * Magic values follow
  114. */
  115. /* No interrupts for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */
  116. #define WBCIR_IRQ_NONE 0x00
  117. /* RX data bit for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */
  118. #define WBCIR_IRQ_RX 0x01
  119. /* Over/Under-flow bit for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */
  120. #define WBCIR_IRQ_ERR 0x04
  121. /* Led enable/disable bit for WBCIR_REG_ECEIR_CTS */
  122. #define WBCIR_LED_ENABLE 0x80
  123. /* RX data available bit for WBCIR_REG_SP3_LSR */
  124. #define WBCIR_RX_AVAIL 0x01
  125. /* RX disable bit for WBCIR_REG_SP3_ASCR */
  126. #define WBCIR_RX_DISABLE 0x20
  127. /* Extended mode enable bit for WBCIR_REG_SP3_EXCR1 */
  128. #define WBCIR_EXT_ENABLE 0x01
  129. /* Select compare register in WBCIR_REG_WCEIR_INDEX (bits 5 & 6) */
  130. #define WBCIR_REGSEL_COMPARE 0x10
  131. /* Select mask register in WBCIR_REG_WCEIR_INDEX (bits 5 & 6) */
  132. #define WBCIR_REGSEL_MASK 0x20
  133. /* Starting address of selected register in WBCIR_REG_WCEIR_INDEX */
  134. #define WBCIR_REG_ADDR0 0x00
  135. /* Valid banks for the SP3 UART */
  136. enum wbcir_bank {
  137. WBCIR_BANK_0 = 0x00,
  138. WBCIR_BANK_1 = 0x80,
  139. WBCIR_BANK_2 = 0xE0,
  140. WBCIR_BANK_3 = 0xE4,
  141. WBCIR_BANK_4 = 0xE8,
  142. WBCIR_BANK_5 = 0xEC,
  143. WBCIR_BANK_6 = 0xF0,
  144. WBCIR_BANK_7 = 0xF4,
  145. };
  146. /* Supported IR Protocols */
  147. enum wbcir_protocol {
  148. IR_PROTOCOL_RC5 = 0x0,
  149. IR_PROTOCOL_NEC = 0x1,
  150. IR_PROTOCOL_RC6 = 0x2,
  151. };
  152. /* Misc */
  153. #define WBCIR_NAME "Winbond CIR"
  154. #define WBCIR_ID_FAMILY 0xF1 /* Family ID for the WPCD376I */
  155. #define WBCIR_ID_CHIP 0x04 /* Chip ID for the WPCD376I */
  156. #define IR_KEYPRESS_TIMEOUT 250 /* FIXME: should be per-protocol? */
  157. #define INVALID_SCANCODE 0x7FFFFFFF /* Invalid with all protos */
  158. #define WAKEUP_IOMEM_LEN 0x10 /* Wake-Up I/O Reg Len */
  159. #define EHFUNC_IOMEM_LEN 0x10 /* Enhanced Func I/O Reg Len */
  160. #define SP_IOMEM_LEN 0x08 /* Serial Port 3 (IR) Reg Len */
  161. #define WBCIR_MAX_IDLE_BYTES 10
  162. static DEFINE_SPINLOCK(wbcir_lock);
  163. static DEFINE_RWLOCK(keytable_lock);
  164. struct wbcir_key {
  165. u32 scancode;
  166. unsigned int keycode;
  167. };
  168. struct wbcir_keyentry {
  169. struct wbcir_key key;
  170. struct list_head list;
  171. };
  172. static struct wbcir_key rc6_def_keymap[] = {
  173. { 0x800F0400, KEY_NUMERIC_0 },
  174. { 0x800F0401, KEY_NUMERIC_1 },
  175. { 0x800F0402, KEY_NUMERIC_2 },
  176. { 0x800F0403, KEY_NUMERIC_3 },
  177. { 0x800F0404, KEY_NUMERIC_4 },
  178. { 0x800F0405, KEY_NUMERIC_5 },
  179. { 0x800F0406, KEY_NUMERIC_6 },
  180. { 0x800F0407, KEY_NUMERIC_7 },
  181. { 0x800F0408, KEY_NUMERIC_8 },
  182. { 0x800F0409, KEY_NUMERIC_9 },
  183. { 0x800F041D, KEY_NUMERIC_STAR },
  184. { 0x800F041C, KEY_NUMERIC_POUND },
  185. { 0x800F0410, KEY_VOLUMEUP },
  186. { 0x800F0411, KEY_VOLUMEDOWN },
  187. { 0x800F0412, KEY_CHANNELUP },
  188. { 0x800F0413, KEY_CHANNELDOWN },
  189. { 0x800F040E, KEY_MUTE },
  190. { 0x800F040D, KEY_VENDOR }, /* Vista Logo Key */
  191. { 0x800F041E, KEY_UP },
  192. { 0x800F041F, KEY_DOWN },
  193. { 0x800F0420, KEY_LEFT },
  194. { 0x800F0421, KEY_RIGHT },
  195. { 0x800F0422, KEY_OK },
  196. { 0x800F0423, KEY_ESC },
  197. { 0x800F040F, KEY_INFO },
  198. { 0x800F040A, KEY_CLEAR },
  199. { 0x800F040B, KEY_ENTER },
  200. { 0x800F045B, KEY_RED },
  201. { 0x800F045C, KEY_GREEN },
  202. { 0x800F045D, KEY_YELLOW },
  203. { 0x800F045E, KEY_BLUE },
  204. { 0x800F045A, KEY_TEXT },
  205. { 0x800F0427, KEY_SWITCHVIDEOMODE },
  206. { 0x800F040C, KEY_POWER },
  207. { 0x800F0450, KEY_RADIO },
  208. { 0x800F0448, KEY_PVR },
  209. { 0x800F0447, KEY_AUDIO },
  210. { 0x800F0426, KEY_EPG },
  211. { 0x800F0449, KEY_CAMERA },
  212. { 0x800F0425, KEY_TV },
  213. { 0x800F044A, KEY_VIDEO },
  214. { 0x800F0424, KEY_DVD },
  215. { 0x800F0416, KEY_PLAY },
  216. { 0x800F0418, KEY_PAUSE },
  217. { 0x800F0419, KEY_STOP },
  218. { 0x800F0414, KEY_FASTFORWARD },
  219. { 0x800F041A, KEY_NEXT },
  220. { 0x800F041B, KEY_PREVIOUS },
  221. { 0x800F0415, KEY_REWIND },
  222. { 0x800F0417, KEY_RECORD },
  223. };
  224. /* Registers and other state is protected by wbcir_lock */
  225. struct wbcir_data {
  226. unsigned long wbase; /* Wake-Up Baseaddr */
  227. unsigned long ebase; /* Enhanced Func. Baseaddr */
  228. unsigned long sbase; /* Serial Port Baseaddr */
  229. unsigned int irq; /* Serial Port IRQ */
  230. struct input_dev *input_dev;
  231. struct timer_list timer_keyup;
  232. struct led_trigger *rxtrigger;
  233. struct led_trigger *txtrigger;
  234. struct led_classdev led;
  235. u32 last_scancode;
  236. unsigned int last_keycode;
  237. u8 last_toggle;
  238. u8 keypressed;
  239. unsigned long keyup_jiffies;
  240. unsigned int idle_count;
  241. /* RX irdata and parsing state */
  242. unsigned long irdata[30];
  243. unsigned int irdata_count;
  244. unsigned int irdata_idle;
  245. unsigned int irdata_off;
  246. unsigned int irdata_error;
  247. /* Protected by keytable_lock */
  248. struct list_head keytable;
  249. };
  250. static enum wbcir_protocol protocol = IR_PROTOCOL_RC6;
  251. module_param(protocol, uint, 0444);
  252. MODULE_PARM_DESC(protocol, "IR protocol to use "
  253. "(0 = RC5, 1 = NEC, 2 = RC6A, default)");
  254. static int invert; /* default = 0 */
  255. module_param(invert, bool, 0444);
  256. MODULE_PARM_DESC(invert, "Invert the signal from the IR receiver");
  257. static unsigned int wake_sc = 0x800F040C;
  258. module_param(wake_sc, uint, 0644);
  259. MODULE_PARM_DESC(wake_sc, "Scancode of the power-on IR command");
  260. static unsigned int wake_rc6mode = 6;
  261. module_param(wake_rc6mode, uint, 0644);
  262. MODULE_PARM_DESC(wake_rc6mode, "RC6 mode for the power-on command "
  263. "(0 = 0, 6 = 6A, default)");
  264. /*****************************************************************************
  265. *
  266. * UTILITY FUNCTIONS
  267. *
  268. *****************************************************************************/
  269. /* Caller needs to hold wbcir_lock */
  270. static void
  271. wbcir_set_bits(unsigned long addr, u8 bits, u8 mask)
  272. {
  273. u8 val;
  274. val = inb(addr);
  275. val = ((val & ~mask) | (bits & mask));
  276. outb(val, addr);
  277. }
  278. /* Selects the register bank for the serial port */
  279. static inline void
  280. wbcir_select_bank(struct wbcir_data *data, enum wbcir_bank bank)
  281. {
  282. outb(bank, data->sbase + WBCIR_REG_SP3_BSR);
  283. }
  284. static enum led_brightness
  285. wbcir_led_brightness_get(struct led_classdev *led_cdev)
  286. {
  287. struct wbcir_data *data = container_of(led_cdev,
  288. struct wbcir_data,
  289. led);
  290. if (inb(data->ebase + WBCIR_REG_ECEIR_CTS) & WBCIR_LED_ENABLE)
  291. return LED_FULL;
  292. else
  293. return LED_OFF;
  294. }
  295. static void
  296. wbcir_led_brightness_set(struct led_classdev *led_cdev,
  297. enum led_brightness brightness)
  298. {
  299. struct wbcir_data *data = container_of(led_cdev,
  300. struct wbcir_data,
  301. led);
  302. wbcir_set_bits(data->ebase + WBCIR_REG_ECEIR_CTS,
  303. brightness == LED_OFF ? 0x00 : WBCIR_LED_ENABLE,
  304. WBCIR_LED_ENABLE);
  305. }
  306. /* Manchester encodes bits to RC6 message cells (see wbcir_parse_rc6) */
  307. static u8
  308. wbcir_to_rc6cells(u8 val)
  309. {
  310. u8 coded = 0x00;
  311. int i;
  312. val &= 0x0F;
  313. for (i = 0; i < 4; i++) {
  314. if (val & 0x01)
  315. coded |= 0x02 << (i * 2);
  316. else
  317. coded |= 0x01 << (i * 2);
  318. val >>= 1;
  319. }
  320. return coded;
  321. }
  322. /*****************************************************************************
  323. *
  324. * INPUT FUNCTIONS
  325. *
  326. *****************************************************************************/
  327. static unsigned int
  328. wbcir_do_getkeycode(struct wbcir_data *data, u32 scancode)
  329. {
  330. struct wbcir_keyentry *keyentry;
  331. unsigned int keycode = KEY_RESERVED;
  332. unsigned long flags;
  333. read_lock_irqsave(&keytable_lock, flags);
  334. list_for_each_entry(keyentry, &data->keytable, list) {
  335. if (keyentry->key.scancode == scancode) {
  336. keycode = keyentry->key.keycode;
  337. break;
  338. }
  339. }
  340. read_unlock_irqrestore(&keytable_lock, flags);
  341. return keycode;
  342. }
  343. static int
  344. wbcir_getkeycode(struct input_dev *dev, int scancode, int *keycode)
  345. {
  346. struct wbcir_data *data = input_get_drvdata(dev);
  347. *keycode = (int)wbcir_do_getkeycode(data, (u32)scancode);
  348. return 0;
  349. }
  350. static int
  351. wbcir_setkeycode(struct input_dev *dev, int sscancode, int keycode)
  352. {
  353. struct wbcir_data *data = input_get_drvdata(dev);
  354. struct wbcir_keyentry *keyentry;
  355. struct wbcir_keyentry *new_keyentry;
  356. unsigned long flags;
  357. unsigned int old_keycode = KEY_RESERVED;
  358. u32 scancode = (u32)sscancode;
  359. if (keycode < 0 || keycode > KEY_MAX)
  360. return -EINVAL;
  361. new_keyentry = kmalloc(sizeof(*new_keyentry), GFP_KERNEL);
  362. if (!new_keyentry)
  363. return -ENOMEM;
  364. write_lock_irqsave(&keytable_lock, flags);
  365. list_for_each_entry(keyentry, &data->keytable, list) {
  366. if (keyentry->key.scancode != scancode)
  367. continue;
  368. old_keycode = keyentry->key.keycode;
  369. keyentry->key.keycode = keycode;
  370. if (keyentry->key.keycode == KEY_RESERVED) {
  371. list_del(&keyentry->list);
  372. kfree(keyentry);
  373. }
  374. break;
  375. }
  376. set_bit(keycode, dev->keybit);
  377. if (old_keycode == KEY_RESERVED) {
  378. new_keyentry->key.scancode = scancode;
  379. new_keyentry->key.keycode = keycode;
  380. list_add(&new_keyentry->list, &data->keytable);
  381. } else {
  382. kfree(new_keyentry);
  383. clear_bit(old_keycode, dev->keybit);
  384. list_for_each_entry(keyentry, &data->keytable, list) {
  385. if (keyentry->key.keycode == old_keycode) {
  386. set_bit(old_keycode, dev->keybit);
  387. break;
  388. }
  389. }
  390. }
  391. write_unlock_irqrestore(&keytable_lock, flags);
  392. return 0;
  393. }
  394. /*
  395. * Timer function to report keyup event some time after keydown is
  396. * reported by the ISR.
  397. */
  398. static void
  399. wbcir_keyup(unsigned long cookie)
  400. {
  401. struct wbcir_data *data = (struct wbcir_data *)cookie;
  402. unsigned long flags;
  403. /*
  404. * data->keyup_jiffies is used to prevent a race condition if a
  405. * hardware interrupt occurs at this point and the keyup timer
  406. * event is moved further into the future as a result.
  407. *
  408. * The timer will then be reactivated and this function called
  409. * again in the future. We need to exit gracefully in that case
  410. * to allow the input subsystem to do its auto-repeat magic or
  411. * a keyup event might follow immediately after the keydown.
  412. */
  413. spin_lock_irqsave(&wbcir_lock, flags);
  414. if (time_is_after_eq_jiffies(data->keyup_jiffies) && data->keypressed) {
  415. data->keypressed = 0;
  416. led_trigger_event(data->rxtrigger, LED_OFF);
  417. input_report_key(data->input_dev, data->last_keycode, 0);
  418. input_sync(data->input_dev);
  419. }
  420. spin_unlock_irqrestore(&wbcir_lock, flags);
  421. }
  422. static void
  423. wbcir_keydown(struct wbcir_data *data, u32 scancode, u8 toggle)
  424. {
  425. unsigned int keycode;
  426. /* Repeat? */
  427. if (data->last_scancode == scancode &&
  428. data->last_toggle == toggle &&
  429. data->keypressed)
  430. goto set_timer;
  431. data->last_scancode = scancode;
  432. /* Do we need to release an old keypress? */
  433. if (data->keypressed) {
  434. input_report_key(data->input_dev, data->last_keycode, 0);
  435. input_sync(data->input_dev);
  436. data->keypressed = 0;
  437. }
  438. /* Report scancode */
  439. input_event(data->input_dev, EV_MSC, MSC_SCAN, (int)scancode);
  440. /* Do we know this scancode? */
  441. keycode = wbcir_do_getkeycode(data, scancode);
  442. if (keycode == KEY_RESERVED)
  443. goto set_timer;
  444. /* Register a keypress */
  445. input_report_key(data->input_dev, keycode, 1);
  446. data->keypressed = 1;
  447. data->last_keycode = keycode;
  448. data->last_toggle = toggle;
  449. set_timer:
  450. input_sync(data->input_dev);
  451. led_trigger_event(data->rxtrigger,
  452. data->keypressed ? LED_FULL : LED_OFF);
  453. data->keyup_jiffies = jiffies + msecs_to_jiffies(IR_KEYPRESS_TIMEOUT);
  454. mod_timer(&data->timer_keyup, data->keyup_jiffies);
  455. }
  456. /*****************************************************************************
  457. *
  458. * IR PARSING FUNCTIONS
  459. *
  460. *****************************************************************************/
  461. /* Resets all irdata */
  462. static void
  463. wbcir_reset_irdata(struct wbcir_data *data)
  464. {
  465. memset(data->irdata, 0, sizeof(data->irdata));
  466. data->irdata_count = 0;
  467. data->irdata_off = 0;
  468. data->irdata_error = 0;
  469. data->idle_count = 0;
  470. }
  471. /* Adds one bit of irdata */
  472. static void
  473. add_irdata_bit(struct wbcir_data *data, int set)
  474. {
  475. if (data->irdata_count >= sizeof(data->irdata) * 8) {
  476. data->irdata_error = 1;
  477. return;
  478. }
  479. if (set)
  480. __set_bit(data->irdata_count, data->irdata);
  481. data->irdata_count++;
  482. }
  483. /* Gets count bits of irdata */
  484. static u16
  485. get_bits(struct wbcir_data *data, int count)
  486. {
  487. u16 val = 0x0;
  488. if (data->irdata_count - data->irdata_off < count) {
  489. data->irdata_error = 1;
  490. return 0x0;
  491. }
  492. while (count > 0) {
  493. val <<= 1;
  494. if (test_bit(data->irdata_off, data->irdata))
  495. val |= 0x1;
  496. count--;
  497. data->irdata_off++;
  498. }
  499. return val;
  500. }
  501. /* Reads 16 cells and converts them to a byte */
  502. static u8
  503. wbcir_rc6cells_to_byte(struct wbcir_data *data)
  504. {
  505. u16 raw = get_bits(data, 16);
  506. u8 val = 0x00;
  507. int bit;
  508. for (bit = 0; bit < 8; bit++) {
  509. switch (raw & 0x03) {
  510. case 0x01:
  511. break;
  512. case 0x02:
  513. val |= (0x01 << bit);
  514. break;
  515. default:
  516. data->irdata_error = 1;
  517. break;
  518. }
  519. raw >>= 2;
  520. }
  521. return val;
  522. }
  523. /* Decodes a number of bits from raw RC5 data */
  524. static u8
  525. wbcir_get_rc5bits(struct wbcir_data *data, unsigned int count)
  526. {
  527. u16 raw = get_bits(data, count * 2);
  528. u8 val = 0x00;
  529. int bit;
  530. for (bit = 0; bit < count; bit++) {
  531. switch (raw & 0x03) {
  532. case 0x01:
  533. val |= (0x01 << bit);
  534. break;
  535. case 0x02:
  536. break;
  537. default:
  538. data->irdata_error = 1;
  539. break;
  540. }
  541. raw >>= 2;
  542. }
  543. return val;
  544. }
  545. static void
  546. wbcir_parse_rc6(struct device *dev, struct wbcir_data *data)
  547. {
  548. /*
  549. * Normal bits are manchester coded as follows:
  550. * cell0 + cell1 = logic "0"
  551. * cell1 + cell0 = logic "1"
  552. *
  553. * The IR pulse has the following components:
  554. *
  555. * Leader - 6 * cell1 - discarded
  556. * Gap - 2 * cell0 - discarded
  557. * Start bit - Normal Coding - always "1"
  558. * Mode Bit 2 - 0 - Normal Coding
  559. * Toggle bit - Normal Coding with double bit time,
  560. * e.g. cell0 + cell0 + cell1 + cell1
  561. * means logic "0".
  562. *
  563. * The rest depends on the mode, the following modes are known:
  564. *
  565. * MODE 0:
  566. * Address Bit 7 - 0 - Normal Coding
  567. * Command Bit 7 - 0 - Normal Coding
  568. *
  569. * MODE 6:
  570. * The above Toggle Bit is used as a submode bit, 0 = A, 1 = B.
  571. * Submode B is for pointing devices, only remotes using submode A
  572. * are supported.
  573. *
  574. * Customer range bit - 0 => Customer = 7 bits, 0...127
  575. * 1 => Customer = 15 bits, 32768...65535
  576. * Customer Bits - Normal Coding
  577. *
  578. * Customer codes are allocated by Philips. The rest of the bits
  579. * are customer dependent. The following is commonly used (and the
  580. * only supported config):
  581. *
  582. * Toggle Bit - Normal Coding
  583. * Address Bit 6 - 0 - Normal Coding
  584. * Command Bit 7 - 0 - Normal Coding
  585. *
  586. * All modes are followed by at least 6 * cell0.
  587. *
  588. * MODE 0 msglen:
  589. * 1 * 2 (start bit) + 3 * 2 (mode) + 2 * 2 (toggle) +
  590. * 8 * 2 (address) + 8 * 2 (command) =
  591. * 44 cells
  592. *
  593. * MODE 6A msglen:
  594. * 1 * 2 (start bit) + 3 * 2 (mode) + 2 * 2 (submode) +
  595. * 1 * 2 (customer range bit) + 7/15 * 2 (customer bits) +
  596. * 1 * 2 (toggle bit) + 7 * 2 (address) + 8 * 2 (command) =
  597. * 60 - 76 cells
  598. */
  599. u8 mode;
  600. u8 toggle;
  601. u16 customer = 0x0;
  602. u8 address;
  603. u8 command;
  604. u32 scancode;
  605. /* Leader mark */
  606. while (get_bits(data, 1) && !data->irdata_error)
  607. /* Do nothing */;
  608. /* Leader space */
  609. if (get_bits(data, 1)) {
  610. dev_dbg(dev, "RC6 - Invalid leader space\n");
  611. return;
  612. }
  613. /* Start bit */
  614. if (get_bits(data, 2) != 0x02) {
  615. dev_dbg(dev, "RC6 - Invalid start bit\n");
  616. return;
  617. }
  618. /* Mode */
  619. mode = get_bits(data, 6);
  620. switch (mode) {
  621. case 0x15: /* 010101 = b000 */
  622. mode = 0;
  623. break;
  624. case 0x29: /* 101001 = b110 */
  625. mode = 6;
  626. break;
  627. default:
  628. dev_dbg(dev, "RC6 - Invalid mode\n");
  629. return;
  630. }
  631. /* Toggle bit / Submode bit */
  632. toggle = get_bits(data, 4);
  633. switch (toggle) {
  634. case 0x03:
  635. toggle = 0;
  636. break;
  637. case 0x0C:
  638. toggle = 1;
  639. break;
  640. default:
  641. dev_dbg(dev, "RC6 - Toggle bit error\n");
  642. break;
  643. }
  644. /* Customer */
  645. if (mode == 6) {
  646. if (toggle != 0) {
  647. dev_dbg(dev, "RC6B - Not Supported\n");
  648. return;
  649. }
  650. customer = wbcir_rc6cells_to_byte(data);
  651. if (customer & 0x80) {
  652. /* 15 bit customer value */
  653. customer <<= 8;
  654. customer |= wbcir_rc6cells_to_byte(data);
  655. }
  656. }
  657. /* Address */
  658. address = wbcir_rc6cells_to_byte(data);
  659. if (mode == 6) {
  660. toggle = address >> 7;
  661. address &= 0x7F;
  662. }
  663. /* Command */
  664. command = wbcir_rc6cells_to_byte(data);
  665. /* Create scancode */
  666. scancode = command;
  667. scancode |= address << 8;
  668. scancode |= customer << 16;
  669. /* Last sanity check */
  670. if (data->irdata_error) {
  671. dev_dbg(dev, "RC6 - Cell error(s)\n");
  672. return;
  673. }
  674. dev_dbg(dev, "IR-RC6 ad 0x%02X cm 0x%02X cu 0x%04X "
  675. "toggle %u mode %u scan 0x%08X\n",
  676. address,
  677. command,
  678. customer,
  679. (unsigned int)toggle,
  680. (unsigned int)mode,
  681. scancode);
  682. wbcir_keydown(data, scancode, toggle);
  683. }
  684. static void
  685. wbcir_parse_rc5(struct device *dev, struct wbcir_data *data)
  686. {
  687. /*
  688. * Bits are manchester coded as follows:
  689. * cell1 + cell0 = logic "0"
  690. * cell0 + cell1 = logic "1"
  691. * (i.e. the reverse of RC6)
  692. *
  693. * Start bit 1 - "1" - discarded
  694. * Start bit 2 - Must be inverted to get command bit 6
  695. * Toggle bit
  696. * Address Bit 4 - 0
  697. * Command Bit 5 - 0
  698. */
  699. u8 toggle;
  700. u8 address;
  701. u8 command;
  702. u32 scancode;
  703. /* Start bit 1 */
  704. if (!get_bits(data, 1)) {
  705. dev_dbg(dev, "RC5 - Invalid start bit\n");
  706. return;
  707. }
  708. /* Start bit 2 */
  709. if (!wbcir_get_rc5bits(data, 1))
  710. command = 0x40;
  711. else
  712. command = 0x00;
  713. toggle = wbcir_get_rc5bits(data, 1);
  714. address = wbcir_get_rc5bits(data, 5);
  715. command |= wbcir_get_rc5bits(data, 6);
  716. scancode = address << 7 | command;
  717. /* Last sanity check */
  718. if (data->irdata_error) {
  719. dev_dbg(dev, "RC5 - Invalid message\n");
  720. return;
  721. }
  722. dev_dbg(dev, "IR-RC5 ad %u cm %u t %u s %u\n",
  723. (unsigned int)address,
  724. (unsigned int)command,
  725. (unsigned int)toggle,
  726. (unsigned int)scancode);
  727. wbcir_keydown(data, scancode, toggle);
  728. }
  729. static void
  730. wbcir_parse_nec(struct device *dev, struct wbcir_data *data)
  731. {
  732. /*
  733. * Each bit represents 560 us.
  734. *
  735. * Leader - 9 ms burst
  736. * Gap - 4.5 ms silence
  737. * Address1 bit 0 - 7 - Address 1
  738. * Address2 bit 0 - 7 - Address 2
  739. * Command1 bit 0 - 7 - Command 1
  740. * Command2 bit 0 - 7 - Command 2
  741. *
  742. * Note the bit order!
  743. *
  744. * With the old NEC protocol, Address2 was the inverse of Address1
  745. * and Command2 was the inverse of Command1 and were used as
  746. * an error check.
  747. *
  748. * With NEC extended, Address1 is the LSB of the Address and
  749. * Address2 is the MSB, Command parsing remains unchanged.
  750. *
  751. * A repeat message is coded as:
  752. * Leader - 9 ms burst
  753. * Gap - 2.25 ms silence
  754. * Repeat - 560 us active
  755. */
  756. u8 address1;
  757. u8 address2;
  758. u8 command1;
  759. u8 command2;
  760. u16 address;
  761. u32 scancode;
  762. /* Leader mark */
  763. while (get_bits(data, 1) && !data->irdata_error)
  764. /* Do nothing */;
  765. /* Leader space */
  766. if (get_bits(data, 4)) {
  767. dev_dbg(dev, "NEC - Invalid leader space\n");
  768. return;
  769. }
  770. /* Repeat? */
  771. if (get_bits(data, 1)) {
  772. if (!data->keypressed) {
  773. dev_dbg(dev, "NEC - Stray repeat message\n");
  774. return;
  775. }
  776. dev_dbg(dev, "IR-NEC repeat s %u\n",
  777. (unsigned int)data->last_scancode);
  778. wbcir_keydown(data, data->last_scancode, data->last_toggle);
  779. return;
  780. }
  781. /* Remaining leader space */
  782. if (get_bits(data, 3)) {
  783. dev_dbg(dev, "NEC - Invalid leader space\n");
  784. return;
  785. }
  786. address1 = bitrev8(get_bits(data, 8));
  787. address2 = bitrev8(get_bits(data, 8));
  788. command1 = bitrev8(get_bits(data, 8));
  789. command2 = bitrev8(get_bits(data, 8));
  790. /* Sanity check */
  791. if (data->irdata_error) {
  792. dev_dbg(dev, "NEC - Invalid message\n");
  793. return;
  794. }
  795. /* Check command validity */
  796. if (command1 != ~command2) {
  797. dev_dbg(dev, "NEC - Command bytes mismatch\n");
  798. return;
  799. }
  800. /* Check for extended NEC protocol */
  801. address = address1;
  802. if (address1 != ~address2)
  803. address |= address2 << 8;
  804. scancode = address << 8 | command1;
  805. dev_dbg(dev, "IR-NEC ad %u cm %u s %u\n",
  806. (unsigned int)address,
  807. (unsigned int)command1,
  808. (unsigned int)scancode);
  809. wbcir_keydown(data, scancode, !data->last_toggle);
  810. }
  811. /*****************************************************************************
  812. *
  813. * INTERRUPT FUNCTIONS
  814. *
  815. *****************************************************************************/
  816. static irqreturn_t
  817. wbcir_irq_handler(int irqno, void *cookie)
  818. {
  819. struct pnp_dev *device = cookie;
  820. struct wbcir_data *data = pnp_get_drvdata(device);
  821. struct device *dev = &device->dev;
  822. u8 status;
  823. unsigned long flags;
  824. u8 irdata[8];
  825. int i;
  826. unsigned int hw;
  827. spin_lock_irqsave(&wbcir_lock, flags);
  828. wbcir_select_bank(data, WBCIR_BANK_0);
  829. status = inb(data->sbase + WBCIR_REG_SP3_EIR);
  830. if (!(status & (WBCIR_IRQ_RX | WBCIR_IRQ_ERR))) {
  831. spin_unlock_irqrestore(&wbcir_lock, flags);
  832. return IRQ_NONE;
  833. }
  834. if (status & WBCIR_IRQ_ERR)
  835. data->irdata_error = 1;
  836. if (!(status & WBCIR_IRQ_RX))
  837. goto out;
  838. /* Since RXHDLEV is set, at least 8 bytes are in the FIFO */
  839. insb(data->sbase + WBCIR_REG_SP3_RXDATA, &irdata[0], 8);
  840. for (i = 0; i < sizeof(irdata); i++) {
  841. hw = hweight8(irdata[i]);
  842. if (hw > 4)
  843. add_irdata_bit(data, 0);
  844. else
  845. add_irdata_bit(data, 1);
  846. if (hw == 8)
  847. data->idle_count++;
  848. else
  849. data->idle_count = 0;
  850. }
  851. if (data->idle_count > WBCIR_MAX_IDLE_BYTES) {
  852. /* Set RXINACTIVE... */
  853. outb(WBCIR_RX_DISABLE, data->sbase + WBCIR_REG_SP3_ASCR);
  854. /* ...and drain the FIFO */
  855. while (inb(data->sbase + WBCIR_REG_SP3_LSR) & WBCIR_RX_AVAIL)
  856. inb(data->sbase + WBCIR_REG_SP3_RXDATA);
  857. dev_dbg(dev, "IRDATA:\n");
  858. for (i = 0; i < data->irdata_count; i += BITS_PER_LONG)
  859. dev_dbg(dev, "0x%08lX\n", data->irdata[i/BITS_PER_LONG]);
  860. switch (protocol) {
  861. case IR_PROTOCOL_RC5:
  862. wbcir_parse_rc5(dev, data);
  863. break;
  864. case IR_PROTOCOL_RC6:
  865. wbcir_parse_rc6(dev, data);
  866. break;
  867. case IR_PROTOCOL_NEC:
  868. wbcir_parse_nec(dev, data);
  869. break;
  870. }
  871. wbcir_reset_irdata(data);
  872. }
  873. out:
  874. spin_unlock_irqrestore(&wbcir_lock, flags);
  875. return IRQ_HANDLED;
  876. }
  877. /*****************************************************************************
  878. *
  879. * SETUP/INIT/SUSPEND/RESUME FUNCTIONS
  880. *
  881. *****************************************************************************/
  882. static void
  883. wbcir_shutdown(struct pnp_dev *device)
  884. {
  885. struct device *dev = &device->dev;
  886. struct wbcir_data *data = pnp_get_drvdata(device);
  887. int do_wake = 1;
  888. u8 match[11];
  889. u8 mask[11];
  890. u8 rc6_csl = 0;
  891. int i;
  892. memset(match, 0, sizeof(match));
  893. memset(mask, 0, sizeof(mask));
  894. if (wake_sc == INVALID_SCANCODE || !device_may_wakeup(dev)) {
  895. do_wake = 0;
  896. goto finish;
  897. }
  898. switch (protocol) {
  899. case IR_PROTOCOL_RC5:
  900. if (wake_sc > 0xFFF) {
  901. do_wake = 0;
  902. dev_err(dev, "RC5 - Invalid wake scancode\n");
  903. break;
  904. }
  905. /* Mask = 13 bits, ex toggle */
  906. mask[0] = 0xFF;
  907. mask[1] = 0x17;
  908. match[0] = (wake_sc & 0x003F); /* 6 command bits */
  909. match[0] |= (wake_sc & 0x0180) >> 1; /* 2 address bits */
  910. match[1] = (wake_sc & 0x0E00) >> 9; /* 3 address bits */
  911. if (!(wake_sc & 0x0040)) /* 2nd start bit */
  912. match[1] |= 0x10;
  913. break;
  914. case IR_PROTOCOL_NEC:
  915. if (wake_sc > 0xFFFFFF) {
  916. do_wake = 0;
  917. dev_err(dev, "NEC - Invalid wake scancode\n");
  918. break;
  919. }
  920. mask[0] = mask[1] = mask[2] = mask[3] = 0xFF;
  921. match[1] = bitrev8((wake_sc & 0xFF));
  922. match[0] = ~match[1];
  923. match[3] = bitrev8((wake_sc & 0xFF00) >> 8);
  924. if (wake_sc > 0xFFFF)
  925. match[2] = bitrev8((wake_sc & 0xFF0000) >> 16);
  926. else
  927. match[2] = ~match[3];
  928. break;
  929. case IR_PROTOCOL_RC6:
  930. if (wake_rc6mode == 0) {
  931. if (wake_sc > 0xFFFF) {
  932. do_wake = 0;
  933. dev_err(dev, "RC6 - Invalid wake scancode\n");
  934. break;
  935. }
  936. /* Command */
  937. match[0] = wbcir_to_rc6cells(wake_sc >> 0);
  938. mask[0] = 0xFF;
  939. match[1] = wbcir_to_rc6cells(wake_sc >> 4);
  940. mask[1] = 0xFF;
  941. /* Address */
  942. match[2] = wbcir_to_rc6cells(wake_sc >> 8);
  943. mask[2] = 0xFF;
  944. match[3] = wbcir_to_rc6cells(wake_sc >> 12);
  945. mask[3] = 0xFF;
  946. /* Header */
  947. match[4] = 0x50; /* mode1 = mode0 = 0, ignore toggle */
  948. mask[4] = 0xF0;
  949. match[5] = 0x09; /* start bit = 1, mode2 = 0 */
  950. mask[5] = 0x0F;
  951. rc6_csl = 44;
  952. } else if (wake_rc6mode == 6) {
  953. i = 0;
  954. /* Command */
  955. match[i] = wbcir_to_rc6cells(wake_sc >> 0);
  956. mask[i++] = 0xFF;
  957. match[i] = wbcir_to_rc6cells(wake_sc >> 4);
  958. mask[i++] = 0xFF;
  959. /* Address + Toggle */
  960. match[i] = wbcir_to_rc6cells(wake_sc >> 8);
  961. mask[i++] = 0xFF;
  962. match[i] = wbcir_to_rc6cells(wake_sc >> 12);
  963. mask[i++] = 0x3F;
  964. /* Customer bits 7 - 0 */
  965. match[i] = wbcir_to_rc6cells(wake_sc >> 16);
  966. mask[i++] = 0xFF;
  967. match[i] = wbcir_to_rc6cells(wake_sc >> 20);
  968. mask[i++] = 0xFF;
  969. if (wake_sc & 0x80000000) {
  970. /* Customer range bit and bits 15 - 8 */
  971. match[i] = wbcir_to_rc6cells(wake_sc >> 24);
  972. mask[i++] = 0xFF;
  973. match[i] = wbcir_to_rc6cells(wake_sc >> 28);
  974. mask[i++] = 0xFF;
  975. rc6_csl = 76;
  976. } else if (wake_sc <= 0x007FFFFF) {
  977. rc6_csl = 60;
  978. } else {
  979. do_wake = 0;
  980. dev_err(dev, "RC6 - Invalid wake scancode\n");
  981. break;
  982. }
  983. /* Header */
  984. match[i] = 0x93; /* mode1 = mode0 = 1, submode = 0 */
  985. mask[i++] = 0xFF;
  986. match[i] = 0x0A; /* start bit = 1, mode2 = 1 */
  987. mask[i++] = 0x0F;
  988. } else {
  989. do_wake = 0;
  990. dev_err(dev, "RC6 - Invalid wake mode\n");
  991. }
  992. break;
  993. default:
  994. do_wake = 0;
  995. break;
  996. }
  997. finish:
  998. if (do_wake) {
  999. /* Set compare and compare mask */
  1000. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_INDEX,
  1001. WBCIR_REGSEL_COMPARE | WBCIR_REG_ADDR0,
  1002. 0x3F);
  1003. outsb(data->wbase + WBCIR_REG_WCEIR_DATA, match, 11);
  1004. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_INDEX,
  1005. WBCIR_REGSEL_MASK | WBCIR_REG_ADDR0,
  1006. 0x3F);
  1007. outsb(data->wbase + WBCIR_REG_WCEIR_DATA, mask, 11);
  1008. /* RC6 Compare String Len */
  1009. outb(rc6_csl, data->wbase + WBCIR_REG_WCEIR_CSL);
  1010. /* Clear status bits NEC_REP, BUFF, MSG_END, MATCH */
  1011. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_STS, 0x17, 0x17);
  1012. /* Clear BUFF_EN, Clear END_EN, Set MATCH_EN */
  1013. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x01, 0x07);
  1014. /* Set CEIR_EN */
  1015. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CTL, 0x01, 0x01);
  1016. } else {
  1017. /* Clear BUFF_EN, Clear END_EN, Clear MATCH_EN */
  1018. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x00, 0x07);
  1019. /* Clear CEIR_EN */
  1020. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CTL, 0x00, 0x01);
  1021. }
  1022. /* Disable interrupts */
  1023. wbcir_select_bank(data, WBCIR_BANK_0);
  1024. outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER);
  1025. /*
  1026. * ACPI will set the HW disable bit for SP3 which means that the
  1027. * output signals are left in an undefined state which may cause
  1028. * spurious interrupts which we need to ignore until the hardware
  1029. * is reinitialized.
  1030. */
  1031. disable_irq(data->irq);
  1032. }
  1033. static int
  1034. wbcir_suspend(struct pnp_dev *device, pm_message_t state)
  1035. {
  1036. wbcir_shutdown(device);
  1037. return 0;
  1038. }
  1039. static void
  1040. wbcir_init_hw(struct wbcir_data *data)
  1041. {
  1042. u8 tmp;
  1043. /* Disable interrupts */
  1044. wbcir_select_bank(data, WBCIR_BANK_0);
  1045. outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER);
  1046. /* Set PROT_SEL, RX_INV, Clear CEIR_EN (needed for the led) */
  1047. tmp = protocol << 4;
  1048. if (invert)
  1049. tmp |= 0x08;
  1050. outb(tmp, data->wbase + WBCIR_REG_WCEIR_CTL);
  1051. /* Clear status bits NEC_REP, BUFF, MSG_END, MATCH */
  1052. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_STS, 0x17, 0x17);
  1053. /* Clear BUFF_EN, Clear END_EN, Clear MATCH_EN */
  1054. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x00, 0x07);
  1055. /* Set RC5 cell time to correspond to 36 kHz */
  1056. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CFG1, 0x4A, 0x7F);
  1057. /* Set IRTX_INV */
  1058. if (invert)
  1059. outb(0x04, data->ebase + WBCIR_REG_ECEIR_CCTL);
  1060. else
  1061. outb(0x00, data->ebase + WBCIR_REG_ECEIR_CCTL);
  1062. /*
  1063. * Clear IR LED, set SP3 clock to 24Mhz
  1064. * set SP3_IRRX_SW to binary 01, helpfully not documented
  1065. */
  1066. outb(0x10, data->ebase + WBCIR_REG_ECEIR_CTS);
  1067. /* Enable extended mode */
  1068. wbcir_select_bank(data, WBCIR_BANK_2);
  1069. outb(WBCIR_EXT_ENABLE, data->sbase + WBCIR_REG_SP3_EXCR1);
  1070. /*
  1071. * Configure baud generator, IR data will be sampled at
  1072. * a bitrate of: (24Mhz * prescaler) / (divisor * 16).
  1073. *
  1074. * The ECIR registers include a flag to change the
  1075. * 24Mhz clock freq to 48Mhz.
  1076. *
  1077. * It's not documented in the specs, but fifo levels
  1078. * other than 16 seems to be unsupported.
  1079. */
  1080. /* prescaler 1.0, tx/rx fifo lvl 16 */
  1081. outb(0x30, data->sbase + WBCIR_REG_SP3_EXCR2);
  1082. /* Set baud divisor to generate one byte per bit/cell */
  1083. switch (protocol) {
  1084. case IR_PROTOCOL_RC5:
  1085. outb(0xA7, data->sbase + WBCIR_REG_SP3_BGDL);
  1086. break;
  1087. case IR_PROTOCOL_RC6:
  1088. outb(0x53, data->sbase + WBCIR_REG_SP3_BGDL);
  1089. break;
  1090. case IR_PROTOCOL_NEC:
  1091. outb(0x69, data->sbase + WBCIR_REG_SP3_BGDL);
  1092. break;
  1093. }
  1094. outb(0x00, data->sbase + WBCIR_REG_SP3_BGDH);
  1095. /* Set CEIR mode */
  1096. wbcir_select_bank(data, WBCIR_BANK_0);
  1097. outb(0xC0, data->sbase + WBCIR_REG_SP3_MCR);
  1098. inb(data->sbase + WBCIR_REG_SP3_LSR); /* Clear LSR */
  1099. inb(data->sbase + WBCIR_REG_SP3_MSR); /* Clear MSR */
  1100. /* Disable RX demod, run-length encoding/decoding, set freq span */
  1101. wbcir_select_bank(data, WBCIR_BANK_7);
  1102. outb(0x10, data->sbase + WBCIR_REG_SP3_RCCFG);
  1103. /* Disable timer */
  1104. wbcir_select_bank(data, WBCIR_BANK_4);
  1105. outb(0x00, data->sbase + WBCIR_REG_SP3_IRCR1);
  1106. /* Enable MSR interrupt, Clear AUX_IRX */
  1107. wbcir_select_bank(data, WBCIR_BANK_5);
  1108. outb(0x00, data->sbase + WBCIR_REG_SP3_IRCR2);
  1109. /* Disable CRC */
  1110. wbcir_select_bank(data, WBCIR_BANK_6);
  1111. outb(0x20, data->sbase + WBCIR_REG_SP3_IRCR3);
  1112. /* Set RX/TX (de)modulation freq, not really used */
  1113. wbcir_select_bank(data, WBCIR_BANK_7);
  1114. outb(0xF2, data->sbase + WBCIR_REG_SP3_IRRXDC);
  1115. outb(0x69, data->sbase + WBCIR_REG_SP3_IRTXMC);
  1116. /* Set invert and pin direction */
  1117. if (invert)
  1118. outb(0x10, data->sbase + WBCIR_REG_SP3_IRCFG4);
  1119. else
  1120. outb(0x00, data->sbase + WBCIR_REG_SP3_IRCFG4);
  1121. /* Set FIFO thresholds (RX = 8, TX = 3), reset RX/TX */
  1122. wbcir_select_bank(data, WBCIR_BANK_0);
  1123. outb(0x97, data->sbase + WBCIR_REG_SP3_FCR);
  1124. /* Clear AUX status bits */
  1125. outb(0xE0, data->sbase + WBCIR_REG_SP3_ASCR);
  1126. /* Enable interrupts */
  1127. wbcir_reset_irdata(data);
  1128. outb(WBCIR_IRQ_RX | WBCIR_IRQ_ERR, data->sbase + WBCIR_REG_SP3_IER);
  1129. }
  1130. static int
  1131. wbcir_resume(struct pnp_dev *device)
  1132. {
  1133. struct wbcir_data *data = pnp_get_drvdata(device);
  1134. wbcir_init_hw(data);
  1135. enable_irq(data->irq);
  1136. return 0;
  1137. }
  1138. static int __devinit
  1139. wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id)
  1140. {
  1141. struct device *dev = &device->dev;
  1142. struct wbcir_data *data;
  1143. int err;
  1144. if (!(pnp_port_len(device, 0) == EHFUNC_IOMEM_LEN &&
  1145. pnp_port_len(device, 1) == WAKEUP_IOMEM_LEN &&
  1146. pnp_port_len(device, 2) == SP_IOMEM_LEN)) {
  1147. dev_err(dev, "Invalid resources\n");
  1148. return -ENODEV;
  1149. }
  1150. data = kzalloc(sizeof(*data), GFP_KERNEL);
  1151. if (!data) {
  1152. err = -ENOMEM;
  1153. goto exit;
  1154. }
  1155. pnp_set_drvdata(device, data);
  1156. data->ebase = pnp_port_start(device, 0);
  1157. data->wbase = pnp_port_start(device, 1);
  1158. data->sbase = pnp_port_start(device, 2);
  1159. data->irq = pnp_irq(device, 0);
  1160. if (data->wbase == 0 || data->ebase == 0 ||
  1161. data->sbase == 0 || data->irq == 0) {
  1162. err = -ENODEV;
  1163. dev_err(dev, "Invalid resources\n");
  1164. goto exit_free_data;
  1165. }
  1166. dev_dbg(&device->dev, "Found device "
  1167. "(w: 0x%lX, e: 0x%lX, s: 0x%lX, i: %u)\n",
  1168. data->wbase, data->ebase, data->sbase, data->irq);
  1169. if (!request_region(data->wbase, WAKEUP_IOMEM_LEN, DRVNAME)) {
  1170. dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",
  1171. data->wbase, data->wbase + WAKEUP_IOMEM_LEN - 1);
  1172. err = -EBUSY;
  1173. goto exit_free_data;
  1174. }
  1175. if (!request_region(data->ebase, EHFUNC_IOMEM_LEN, DRVNAME)) {
  1176. dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",
  1177. data->ebase, data->ebase + EHFUNC_IOMEM_LEN - 1);
  1178. err = -EBUSY;
  1179. goto exit_release_wbase;
  1180. }
  1181. if (!request_region(data->sbase, SP_IOMEM_LEN, DRVNAME)) {
  1182. dev_err(dev, "Region 0x%lx-0x%lx already in use!\n",
  1183. data->sbase, data->sbase + SP_IOMEM_LEN - 1);
  1184. err = -EBUSY;
  1185. goto exit_release_ebase;
  1186. }
  1187. err = request_irq(data->irq, wbcir_irq_handler,
  1188. IRQF_DISABLED, DRVNAME, device);
  1189. if (err) {
  1190. dev_err(dev, "Failed to claim IRQ %u\n", data->irq);
  1191. err = -EBUSY;
  1192. goto exit_release_sbase;
  1193. }
  1194. led_trigger_register_simple("cir-tx", &data->txtrigger);
  1195. if (!data->txtrigger) {
  1196. err = -ENOMEM;
  1197. goto exit_free_irq;
  1198. }
  1199. led_trigger_register_simple("cir-rx", &data->rxtrigger);
  1200. if (!data->rxtrigger) {
  1201. err = -ENOMEM;
  1202. goto exit_unregister_txtrigger;
  1203. }
  1204. data->led.name = "cir::activity";
  1205. data->led.default_trigger = "cir-rx";
  1206. data->led.brightness_set = wbcir_led_brightness_set;
  1207. data->led.brightness_get = wbcir_led_brightness_get;
  1208. err = led_classdev_register(&device->dev, &data->led);
  1209. if (err)
  1210. goto exit_unregister_rxtrigger;
  1211. data->input_dev = input_allocate_device();
  1212. if (!data->input_dev) {
  1213. err = -ENOMEM;
  1214. goto exit_unregister_led;
  1215. }
  1216. data->input_dev->evbit[0] = BIT(EV_KEY);
  1217. data->input_dev->name = WBCIR_NAME;
  1218. data->input_dev->phys = "wbcir/cir0";
  1219. data->input_dev->id.bustype = BUS_HOST;
  1220. data->input_dev->id.vendor = PCI_VENDOR_ID_WINBOND;
  1221. data->input_dev->id.product = WBCIR_ID_FAMILY;
  1222. data->input_dev->id.version = WBCIR_ID_CHIP;
  1223. data->input_dev->getkeycode = wbcir_getkeycode;
  1224. data->input_dev->setkeycode = wbcir_setkeycode;
  1225. input_set_capability(data->input_dev, EV_MSC, MSC_SCAN);
  1226. input_set_drvdata(data->input_dev, data);
  1227. err = input_register_device(data->input_dev);
  1228. if (err)
  1229. goto exit_free_input;
  1230. data->last_scancode = INVALID_SCANCODE;
  1231. INIT_LIST_HEAD(&data->keytable);
  1232. setup_timer(&data->timer_keyup, wbcir_keyup, (unsigned long)data);
  1233. /* Load default keymaps */
  1234. if (protocol == IR_PROTOCOL_RC6) {
  1235. int i;
  1236. for (i = 0; i < ARRAY_SIZE(rc6_def_keymap); i++) {
  1237. err = wbcir_setkeycode(data->input_dev,
  1238. (int)rc6_def_keymap[i].scancode,
  1239. (int)rc6_def_keymap[i].keycode);
  1240. if (err)
  1241. goto exit_unregister_keys;
  1242. }
  1243. }
  1244. device_init_wakeup(&device->dev, 1);
  1245. wbcir_init_hw(data);
  1246. return 0;
  1247. exit_unregister_keys:
  1248. if (!list_empty(&data->keytable)) {
  1249. struct wbcir_keyentry *key;
  1250. struct wbcir_keyentry *keytmp;
  1251. list_for_each_entry_safe(key, keytmp, &data->keytable, list) {
  1252. list_del(&key->list);
  1253. kfree(key);
  1254. }
  1255. }
  1256. input_unregister_device(data->input_dev);
  1257. /* Can't call input_free_device on an unregistered device */
  1258. data->input_dev = NULL;
  1259. exit_free_input:
  1260. input_free_device(data->input_dev);
  1261. exit_unregister_led:
  1262. led_classdev_unregister(&data->led);
  1263. exit_unregister_rxtrigger:
  1264. led_trigger_unregister_simple(data->rxtrigger);
  1265. exit_unregister_txtrigger:
  1266. led_trigger_unregister_simple(data->txtrigger);
  1267. exit_free_irq:
  1268. free_irq(data->irq, device);
  1269. exit_release_sbase:
  1270. release_region(data->sbase, SP_IOMEM_LEN);
  1271. exit_release_ebase:
  1272. release_region(data->ebase, EHFUNC_IOMEM_LEN);
  1273. exit_release_wbase:
  1274. release_region(data->wbase, WAKEUP_IOMEM_LEN);
  1275. exit_free_data:
  1276. kfree(data);
  1277. pnp_set_drvdata(device, NULL);
  1278. exit:
  1279. return err;
  1280. }
  1281. static void __devexit
  1282. wbcir_remove(struct pnp_dev *device)
  1283. {
  1284. struct wbcir_data *data = pnp_get_drvdata(device);
  1285. struct wbcir_keyentry *key;
  1286. struct wbcir_keyentry *keytmp;
  1287. /* Disable interrupts */
  1288. wbcir_select_bank(data, WBCIR_BANK_0);
  1289. outb(WBCIR_IRQ_NONE, data->sbase + WBCIR_REG_SP3_IER);
  1290. del_timer_sync(&data->timer_keyup);
  1291. free_irq(data->irq, device);
  1292. /* Clear status bits NEC_REP, BUFF, MSG_END, MATCH */
  1293. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_STS, 0x17, 0x17);
  1294. /* Clear CEIR_EN */
  1295. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_CTL, 0x00, 0x01);
  1296. /* Clear BUFF_EN, END_EN, MATCH_EN */
  1297. wbcir_set_bits(data->wbase + WBCIR_REG_WCEIR_EV_EN, 0x00, 0x07);
  1298. /* This will generate a keyup event if necessary */
  1299. input_unregister_device(data->input_dev);
  1300. led_trigger_unregister_simple(data->rxtrigger);
  1301. led_trigger_unregister_simple(data->txtrigger);
  1302. led_classdev_unregister(&data->led);
  1303. /* This is ok since &data->led isn't actually used */
  1304. wbcir_led_brightness_set(&data->led, LED_OFF);
  1305. release_region(data->wbase, WAKEUP_IOMEM_LEN);
  1306. release_region(data->ebase, EHFUNC_IOMEM_LEN);
  1307. release_region(data->sbase, SP_IOMEM_LEN);
  1308. list_for_each_entry_safe(key, keytmp, &data->keytable, list) {
  1309. list_del(&key->list);
  1310. kfree(key);
  1311. }
  1312. kfree(data);
  1313. pnp_set_drvdata(device, NULL);
  1314. }
  1315. static const struct pnp_device_id wbcir_ids[] = {
  1316. { "WEC1022", 0 },
  1317. { "", 0 }
  1318. };
  1319. MODULE_DEVICE_TABLE(pnp, wbcir_ids);
  1320. static struct pnp_driver wbcir_driver = {
  1321. .name = WBCIR_NAME,
  1322. .id_table = wbcir_ids,
  1323. .probe = wbcir_probe,
  1324. .remove = __devexit_p(wbcir_remove),
  1325. .suspend = wbcir_suspend,
  1326. .resume = wbcir_resume,
  1327. .shutdown = wbcir_shutdown
  1328. };
  1329. static int __init
  1330. wbcir_init(void)
  1331. {
  1332. int ret;
  1333. switch (protocol) {
  1334. case IR_PROTOCOL_RC5:
  1335. case IR_PROTOCOL_NEC:
  1336. case IR_PROTOCOL_RC6:
  1337. break;
  1338. default:
  1339. printk(KERN_ERR DRVNAME ": Invalid protocol argument\n");
  1340. return -EINVAL;
  1341. }
  1342. ret = pnp_register_driver(&wbcir_driver);
  1343. if (ret)
  1344. printk(KERN_ERR DRVNAME ": Unable to register driver\n");
  1345. return ret;
  1346. }
  1347. static void __exit
  1348. wbcir_exit(void)
  1349. {
  1350. pnp_unregister_driver(&wbcir_driver);
  1351. }
  1352. MODULE_AUTHOR("David Härdeman <david@hardeman.nu>");
  1353. MODULE_DESCRIPTION("Winbond SuperI/O Consumer IR Driver");
  1354. MODULE_LICENSE("GPL");
  1355. module_init(wbcir_init);
  1356. module_exit(wbcir_exit);