i915_drv.c 16 KB

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  1. /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
  2. */
  3. /*
  4. *
  5. * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  6. * All Rights Reserved.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the
  10. * "Software"), to deal in the Software without restriction, including
  11. * without limitation the rights to use, copy, modify, merge, publish,
  12. * distribute, sub license, and/or sell copies of the Software, and to
  13. * permit persons to whom the Software is furnished to do so, subject to
  14. * the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the
  17. * next paragraph) shall be included in all copies or substantial portions
  18. * of the Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27. *
  28. */
  29. #include <linux/device.h>
  30. #include "drmP.h"
  31. #include "drm.h"
  32. #include "i915_drm.h"
  33. #include "i915_drv.h"
  34. #include <linux/console.h>
  35. #include "drm_crtc_helper.h"
  36. static int i915_modeset = -1;
  37. module_param_named(modeset, i915_modeset, int, 0400);
  38. unsigned int i915_fbpercrtc = 0;
  39. module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  40. unsigned int i915_powersave = 1;
  41. module_param_named(powersave, i915_powersave, int, 0400);
  42. unsigned int i915_lvds_downclock = 0;
  43. module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  44. static struct drm_driver driver;
  45. extern int intel_agp_enabled;
  46. #define INTEL_VGA_DEVICE(id, info) { \
  47. .class = PCI_CLASS_DISPLAY_VGA << 8, \
  48. .class_mask = 0xffff00, \
  49. .vendor = 0x8086, \
  50. .device = id, \
  51. .subvendor = PCI_ANY_ID, \
  52. .subdevice = PCI_ANY_ID, \
  53. .driver_data = (unsigned long) info }
  54. const static struct intel_device_info intel_i830_info = {
  55. .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  56. };
  57. const static struct intel_device_info intel_845g_info = {
  58. .is_i8xx = 1,
  59. };
  60. const static struct intel_device_info intel_i85x_info = {
  61. .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  62. };
  63. const static struct intel_device_info intel_i865g_info = {
  64. .is_i8xx = 1,
  65. };
  66. const static struct intel_device_info intel_i915g_info = {
  67. .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
  68. };
  69. const static struct intel_device_info intel_i915gm_info = {
  70. .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
  71. .cursor_needs_physical = 1,
  72. };
  73. const static struct intel_device_info intel_i945g_info = {
  74. .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
  75. };
  76. const static struct intel_device_info intel_i945gm_info = {
  77. .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
  78. .has_hotplug = 1, .cursor_needs_physical = 1,
  79. };
  80. const static struct intel_device_info intel_i965g_info = {
  81. .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
  82. };
  83. const static struct intel_device_info intel_i965gm_info = {
  84. .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
  85. .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
  86. .has_hotplug = 1,
  87. };
  88. const static struct intel_device_info intel_g33_info = {
  89. .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  90. .has_hotplug = 1,
  91. };
  92. const static struct intel_device_info intel_g45_info = {
  93. .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  94. .has_pipe_cxsr = 1,
  95. .has_hotplug = 1,
  96. };
  97. const static struct intel_device_info intel_gm45_info = {
  98. .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
  99. .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
  100. .has_pipe_cxsr = 1,
  101. .has_hotplug = 1,
  102. };
  103. const static struct intel_device_info intel_pineview_info = {
  104. .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
  105. .need_gfx_hws = 1,
  106. .has_hotplug = 1,
  107. };
  108. const static struct intel_device_info intel_ironlake_d_info = {
  109. .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  110. .has_pipe_cxsr = 1,
  111. .has_hotplug = 1,
  112. };
  113. const static struct intel_device_info intel_ironlake_m_info = {
  114. .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
  115. .need_gfx_hws = 1, .has_rc6 = 1,
  116. .has_hotplug = 1,
  117. };
  118. const static struct intel_device_info intel_sandybridge_d_info = {
  119. .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  120. .has_hotplug = 1,
  121. };
  122. const static struct intel_device_info intel_sandybridge_m_info = {
  123. .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
  124. .has_hotplug = 1,
  125. };
  126. const static struct pci_device_id pciidlist[] = {
  127. INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
  128. INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
  129. INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
  130. INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
  131. INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
  132. INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
  133. INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
  134. INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
  135. INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
  136. INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
  137. INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
  138. INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
  139. INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
  140. INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
  141. INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
  142. INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
  143. INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
  144. INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
  145. INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
  146. INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
  147. INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
  148. INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
  149. INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
  150. INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
  151. INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
  152. INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
  153. INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
  154. INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
  155. INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
  156. INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
  157. INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
  158. INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
  159. {0, 0, 0}
  160. };
  161. #if defined(CONFIG_DRM_I915_KMS)
  162. MODULE_DEVICE_TABLE(pci, pciidlist);
  163. #endif
  164. static int i915_drm_freeze(struct drm_device *dev)
  165. {
  166. struct drm_i915_private *dev_priv = dev->dev_private;
  167. pci_save_state(dev->pdev);
  168. /* If KMS is active, we do the leavevt stuff here */
  169. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  170. int error = i915_gem_idle(dev);
  171. if (error) {
  172. dev_err(&dev->pdev->dev,
  173. "GEM idle failed, resume might fail\n");
  174. return error;
  175. }
  176. drm_irq_uninstall(dev);
  177. }
  178. i915_save_state(dev);
  179. intel_opregion_free(dev, 1);
  180. /* Modeset on resume, not lid events */
  181. dev_priv->modeset_on_lid = 0;
  182. return 0;
  183. }
  184. int i915_suspend(struct drm_device *dev, pm_message_t state)
  185. {
  186. int error;
  187. if (!dev || !dev->dev_private) {
  188. DRM_ERROR("dev: %p\n", dev);
  189. DRM_ERROR("DRM not initialized, aborting suspend.\n");
  190. return -ENODEV;
  191. }
  192. if (state.event == PM_EVENT_PRETHAW)
  193. return 0;
  194. error = i915_drm_freeze(dev);
  195. if (error)
  196. return error;
  197. if (state.event == PM_EVENT_SUSPEND) {
  198. /* Shut down the device */
  199. pci_disable_device(dev->pdev);
  200. pci_set_power_state(dev->pdev, PCI_D3hot);
  201. }
  202. return 0;
  203. }
  204. static int i915_drm_thaw(struct drm_device *dev)
  205. {
  206. struct drm_i915_private *dev_priv = dev->dev_private;
  207. int error = 0;
  208. i915_restore_state(dev);
  209. intel_opregion_init(dev, 1);
  210. /* KMS EnterVT equivalent */
  211. if (drm_core_check_feature(dev, DRIVER_MODESET)) {
  212. mutex_lock(&dev->struct_mutex);
  213. dev_priv->mm.suspended = 0;
  214. error = i915_gem_init_ringbuffer(dev);
  215. mutex_unlock(&dev->struct_mutex);
  216. drm_irq_install(dev);
  217. /* Resume the modeset for every activated CRTC */
  218. drm_helper_resume_force_mode(dev);
  219. }
  220. dev_priv->modeset_on_lid = 0;
  221. return error;
  222. }
  223. int i915_resume(struct drm_device *dev)
  224. {
  225. if (pci_enable_device(dev->pdev))
  226. return -EIO;
  227. pci_set_master(dev->pdev);
  228. return i915_drm_thaw(dev);
  229. }
  230. /**
  231. * i965_reset - reset chip after a hang
  232. * @dev: drm device to reset
  233. * @flags: reset domains
  234. *
  235. * Reset the chip. Useful if a hang is detected. Returns zero on successful
  236. * reset or otherwise an error code.
  237. *
  238. * Procedure is fairly simple:
  239. * - reset the chip using the reset reg
  240. * - re-init context state
  241. * - re-init hardware status page
  242. * - re-init ring buffer
  243. * - re-init interrupt state
  244. * - re-init display
  245. */
  246. int i965_reset(struct drm_device *dev, u8 flags)
  247. {
  248. drm_i915_private_t *dev_priv = dev->dev_private;
  249. unsigned long timeout;
  250. u8 gdrst;
  251. /*
  252. * We really should only reset the display subsystem if we actually
  253. * need to
  254. */
  255. bool need_display = true;
  256. mutex_lock(&dev->struct_mutex);
  257. /*
  258. * Clear request list
  259. */
  260. i915_gem_retire_requests(dev);
  261. if (need_display)
  262. i915_save_display(dev);
  263. if (IS_I965G(dev) || IS_G4X(dev)) {
  264. /*
  265. * Set the domains we want to reset, then the reset bit (bit 0).
  266. * Clear the reset bit after a while and wait for hardware status
  267. * bit (bit 1) to be set
  268. */
  269. pci_read_config_byte(dev->pdev, GDRST, &gdrst);
  270. pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
  271. udelay(50);
  272. pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
  273. /* ...we don't want to loop forever though, 500ms should be plenty */
  274. timeout = jiffies + msecs_to_jiffies(500);
  275. do {
  276. udelay(100);
  277. pci_read_config_byte(dev->pdev, GDRST, &gdrst);
  278. } while ((gdrst & 0x1) && time_after(timeout, jiffies));
  279. if (gdrst & 0x1) {
  280. WARN(true, "i915: Failed to reset chip\n");
  281. mutex_unlock(&dev->struct_mutex);
  282. return -EIO;
  283. }
  284. } else {
  285. DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
  286. return -ENODEV;
  287. }
  288. /* Ok, now get things going again... */
  289. /*
  290. * Everything depends on having the GTT running, so we need to start
  291. * there. Fortunately we don't need to do this unless we reset the
  292. * chip at a PCI level.
  293. *
  294. * Next we need to restore the context, but we don't use those
  295. * yet either...
  296. *
  297. * Ring buffer needs to be re-initialized in the KMS case, or if X
  298. * was running at the time of the reset (i.e. we weren't VT
  299. * switched away).
  300. */
  301. if (drm_core_check_feature(dev, DRIVER_MODESET) ||
  302. !dev_priv->mm.suspended) {
  303. drm_i915_ring_buffer_t *ring = &dev_priv->ring;
  304. struct drm_gem_object *obj = ring->ring_obj;
  305. struct drm_i915_gem_object *obj_priv = obj->driver_private;
  306. dev_priv->mm.suspended = 0;
  307. /* Stop the ring if it's running. */
  308. I915_WRITE(PRB0_CTL, 0);
  309. I915_WRITE(PRB0_TAIL, 0);
  310. I915_WRITE(PRB0_HEAD, 0);
  311. /* Initialize the ring. */
  312. I915_WRITE(PRB0_START, obj_priv->gtt_offset);
  313. I915_WRITE(PRB0_CTL,
  314. ((obj->size - 4096) & RING_NR_PAGES) |
  315. RING_NO_REPORT |
  316. RING_VALID);
  317. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  318. i915_kernel_lost_context(dev);
  319. else {
  320. ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
  321. ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
  322. ring->space = ring->head - (ring->tail + 8);
  323. if (ring->space < 0)
  324. ring->space += ring->Size;
  325. }
  326. mutex_unlock(&dev->struct_mutex);
  327. drm_irq_uninstall(dev);
  328. drm_irq_install(dev);
  329. mutex_lock(&dev->struct_mutex);
  330. }
  331. /*
  332. * Display needs restore too...
  333. */
  334. if (need_display)
  335. i915_restore_display(dev);
  336. mutex_unlock(&dev->struct_mutex);
  337. return 0;
  338. }
  339. static int __devinit
  340. i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  341. {
  342. return drm_get_dev(pdev, ent, &driver);
  343. }
  344. static void
  345. i915_pci_remove(struct pci_dev *pdev)
  346. {
  347. struct drm_device *dev = pci_get_drvdata(pdev);
  348. drm_put_dev(dev);
  349. }
  350. static int i915_pm_suspend(struct device *dev)
  351. {
  352. struct pci_dev *pdev = to_pci_dev(dev);
  353. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  354. int error;
  355. if (!drm_dev || !drm_dev->dev_private) {
  356. dev_err(dev, "DRM not initialized, aborting suspend.\n");
  357. return -ENODEV;
  358. }
  359. error = i915_drm_freeze(drm_dev);
  360. if (error)
  361. return error;
  362. pci_disable_device(pdev);
  363. pci_set_power_state(pdev, PCI_D3hot);
  364. return 0;
  365. }
  366. static int i915_pm_resume(struct device *dev)
  367. {
  368. struct pci_dev *pdev = to_pci_dev(dev);
  369. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  370. return i915_resume(drm_dev);
  371. }
  372. static int i915_pm_freeze(struct device *dev)
  373. {
  374. struct pci_dev *pdev = to_pci_dev(dev);
  375. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  376. if (!drm_dev || !drm_dev->dev_private) {
  377. dev_err(dev, "DRM not initialized, aborting suspend.\n");
  378. return -ENODEV;
  379. }
  380. return i915_drm_freeze(drm_dev);
  381. }
  382. static int i915_pm_thaw(struct device *dev)
  383. {
  384. struct pci_dev *pdev = to_pci_dev(dev);
  385. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  386. return i915_drm_thaw(drm_dev);
  387. }
  388. static int i915_pm_poweroff(struct device *dev)
  389. {
  390. struct pci_dev *pdev = to_pci_dev(dev);
  391. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  392. return i915_drm_freeze(drm_dev);
  393. }
  394. const struct dev_pm_ops i915_pm_ops = {
  395. .suspend = i915_pm_suspend,
  396. .resume = i915_pm_resume,
  397. .freeze = i915_pm_freeze,
  398. .thaw = i915_pm_thaw,
  399. .poweroff = i915_pm_poweroff,
  400. .restore = i915_pm_resume,
  401. };
  402. static struct vm_operations_struct i915_gem_vm_ops = {
  403. .fault = i915_gem_fault,
  404. .open = drm_gem_vm_open,
  405. .close = drm_gem_vm_close,
  406. };
  407. static struct drm_driver driver = {
  408. /* don't use mtrr's here, the Xserver or user space app should
  409. * deal with them for intel hardware.
  410. */
  411. .driver_features =
  412. DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
  413. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
  414. .load = i915_driver_load,
  415. .unload = i915_driver_unload,
  416. .open = i915_driver_open,
  417. .lastclose = i915_driver_lastclose,
  418. .preclose = i915_driver_preclose,
  419. .postclose = i915_driver_postclose,
  420. /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
  421. .suspend = i915_suspend,
  422. .resume = i915_resume,
  423. .device_is_agp = i915_driver_device_is_agp,
  424. .enable_vblank = i915_enable_vblank,
  425. .disable_vblank = i915_disable_vblank,
  426. .irq_preinstall = i915_driver_irq_preinstall,
  427. .irq_postinstall = i915_driver_irq_postinstall,
  428. .irq_uninstall = i915_driver_irq_uninstall,
  429. .irq_handler = i915_driver_irq_handler,
  430. .reclaim_buffers = drm_core_reclaim_buffers,
  431. .get_map_ofs = drm_core_get_map_ofs,
  432. .get_reg_ofs = drm_core_get_reg_ofs,
  433. .master_create = i915_master_create,
  434. .master_destroy = i915_master_destroy,
  435. #if defined(CONFIG_DEBUG_FS)
  436. .debugfs_init = i915_debugfs_init,
  437. .debugfs_cleanup = i915_debugfs_cleanup,
  438. #endif
  439. .gem_init_object = i915_gem_init_object,
  440. .gem_free_object = i915_gem_free_object,
  441. .gem_vm_ops = &i915_gem_vm_ops,
  442. .ioctls = i915_ioctls,
  443. .fops = {
  444. .owner = THIS_MODULE,
  445. .open = drm_open,
  446. .release = drm_release,
  447. .unlocked_ioctl = drm_ioctl,
  448. .mmap = drm_gem_mmap,
  449. .poll = drm_poll,
  450. .fasync = drm_fasync,
  451. .read = drm_read,
  452. #ifdef CONFIG_COMPAT
  453. .compat_ioctl = i915_compat_ioctl,
  454. #endif
  455. },
  456. .pci_driver = {
  457. .name = DRIVER_NAME,
  458. .id_table = pciidlist,
  459. .probe = i915_pci_probe,
  460. .remove = i915_pci_remove,
  461. .driver.pm = &i915_pm_ops,
  462. },
  463. .name = DRIVER_NAME,
  464. .desc = DRIVER_DESC,
  465. .date = DRIVER_DATE,
  466. .major = DRIVER_MAJOR,
  467. .minor = DRIVER_MINOR,
  468. .patchlevel = DRIVER_PATCHLEVEL,
  469. };
  470. static int __init i915_init(void)
  471. {
  472. if (!intel_agp_enabled) {
  473. DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
  474. return -ENODEV;
  475. }
  476. driver.num_ioctls = i915_max_ioctl;
  477. i915_gem_shrinker_init();
  478. /*
  479. * If CONFIG_DRM_I915_KMS is set, default to KMS unless
  480. * explicitly disabled with the module pararmeter.
  481. *
  482. * Otherwise, just follow the parameter (defaulting to off).
  483. *
  484. * Allow optional vga_text_mode_force boot option to override
  485. * the default behavior.
  486. */
  487. #if defined(CONFIG_DRM_I915_KMS)
  488. if (i915_modeset != 0)
  489. driver.driver_features |= DRIVER_MODESET;
  490. #endif
  491. if (i915_modeset == 1)
  492. driver.driver_features |= DRIVER_MODESET;
  493. #ifdef CONFIG_VGA_CONSOLE
  494. if (vgacon_text_force() && i915_modeset == -1)
  495. driver.driver_features &= ~DRIVER_MODESET;
  496. #endif
  497. if (!(driver.driver_features & DRIVER_MODESET)) {
  498. driver.suspend = i915_suspend;
  499. driver.resume = i915_resume;
  500. }
  501. return drm_init(&driver);
  502. }
  503. static void __exit i915_exit(void)
  504. {
  505. i915_gem_shrinker_exit();
  506. drm_exit(&driver);
  507. }
  508. module_init(i915_init);
  509. module_exit(i915_exit);
  510. MODULE_AUTHOR(DRIVER_AUTHOR);
  511. MODULE_DESCRIPTION(DRIVER_DESC);
  512. MODULE_LICENSE("GPL and additional rights");