i915_debugfs.c 22 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. * Keith Packard <keithp@keithp.com>
  26. *
  27. */
  28. #include <linux/seq_file.h>
  29. #include <linux/debugfs.h>
  30. #include "drmP.h"
  31. #include "drm.h"
  32. #include "i915_drm.h"
  33. #include "i915_drv.h"
  34. #define DRM_I915_RING_DEBUG 1
  35. #if defined(CONFIG_DEBUG_FS)
  36. #define ACTIVE_LIST 1
  37. #define FLUSHING_LIST 2
  38. #define INACTIVE_LIST 3
  39. static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
  40. {
  41. if (obj_priv->user_pin_count > 0)
  42. return "P";
  43. else if (obj_priv->pin_count > 0)
  44. return "p";
  45. else
  46. return " ";
  47. }
  48. static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
  49. {
  50. switch (obj_priv->tiling_mode) {
  51. default:
  52. case I915_TILING_NONE: return " ";
  53. case I915_TILING_X: return "X";
  54. case I915_TILING_Y: return "Y";
  55. }
  56. }
  57. static int i915_gem_object_list_info(struct seq_file *m, void *data)
  58. {
  59. struct drm_info_node *node = (struct drm_info_node *) m->private;
  60. uintptr_t list = (uintptr_t) node->info_ent->data;
  61. struct list_head *head;
  62. struct drm_device *dev = node->minor->dev;
  63. drm_i915_private_t *dev_priv = dev->dev_private;
  64. struct drm_i915_gem_object *obj_priv;
  65. spinlock_t *lock = NULL;
  66. switch (list) {
  67. case ACTIVE_LIST:
  68. seq_printf(m, "Active:\n");
  69. lock = &dev_priv->mm.active_list_lock;
  70. head = &dev_priv->mm.active_list;
  71. break;
  72. case INACTIVE_LIST:
  73. seq_printf(m, "Inactive:\n");
  74. head = &dev_priv->mm.inactive_list;
  75. break;
  76. case FLUSHING_LIST:
  77. seq_printf(m, "Flushing:\n");
  78. head = &dev_priv->mm.flushing_list;
  79. break;
  80. default:
  81. DRM_INFO("Ooops, unexpected list\n");
  82. return 0;
  83. }
  84. if (lock)
  85. spin_lock(lock);
  86. list_for_each_entry(obj_priv, head, list)
  87. {
  88. struct drm_gem_object *obj = obj_priv->obj;
  89. seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
  90. obj,
  91. get_pin_flag(obj_priv),
  92. obj->size,
  93. obj->read_domains, obj->write_domain,
  94. obj_priv->last_rendering_seqno,
  95. obj_priv->dirty ? " dirty" : "",
  96. obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
  97. if (obj->name)
  98. seq_printf(m, " (name: %d)", obj->name);
  99. if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
  100. seq_printf(m, " (fence: %d)", obj_priv->fence_reg);
  101. if (obj_priv->gtt_space != NULL)
  102. seq_printf(m, " (gtt_offset: %08x)", obj_priv->gtt_offset);
  103. seq_printf(m, "\n");
  104. }
  105. if (lock)
  106. spin_unlock(lock);
  107. return 0;
  108. }
  109. static int i915_gem_request_info(struct seq_file *m, void *data)
  110. {
  111. struct drm_info_node *node = (struct drm_info_node *) m->private;
  112. struct drm_device *dev = node->minor->dev;
  113. drm_i915_private_t *dev_priv = dev->dev_private;
  114. struct drm_i915_gem_request *gem_request;
  115. seq_printf(m, "Request:\n");
  116. list_for_each_entry(gem_request, &dev_priv->mm.request_list, list) {
  117. seq_printf(m, " %d @ %d\n",
  118. gem_request->seqno,
  119. (int) (jiffies - gem_request->emitted_jiffies));
  120. }
  121. return 0;
  122. }
  123. static int i915_gem_seqno_info(struct seq_file *m, void *data)
  124. {
  125. struct drm_info_node *node = (struct drm_info_node *) m->private;
  126. struct drm_device *dev = node->minor->dev;
  127. drm_i915_private_t *dev_priv = dev->dev_private;
  128. if (dev_priv->hw_status_page != NULL) {
  129. seq_printf(m, "Current sequence: %d\n",
  130. i915_get_gem_seqno(dev));
  131. } else {
  132. seq_printf(m, "Current sequence: hws uninitialized\n");
  133. }
  134. seq_printf(m, "Waiter sequence: %d\n",
  135. dev_priv->mm.waiting_gem_seqno);
  136. seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
  137. return 0;
  138. }
  139. static int i915_interrupt_info(struct seq_file *m, void *data)
  140. {
  141. struct drm_info_node *node = (struct drm_info_node *) m->private;
  142. struct drm_device *dev = node->minor->dev;
  143. drm_i915_private_t *dev_priv = dev->dev_private;
  144. if (!HAS_PCH_SPLIT(dev)) {
  145. seq_printf(m, "Interrupt enable: %08x\n",
  146. I915_READ(IER));
  147. seq_printf(m, "Interrupt identity: %08x\n",
  148. I915_READ(IIR));
  149. seq_printf(m, "Interrupt mask: %08x\n",
  150. I915_READ(IMR));
  151. seq_printf(m, "Pipe A stat: %08x\n",
  152. I915_READ(PIPEASTAT));
  153. seq_printf(m, "Pipe B stat: %08x\n",
  154. I915_READ(PIPEBSTAT));
  155. } else {
  156. seq_printf(m, "North Display Interrupt enable: %08x\n",
  157. I915_READ(DEIER));
  158. seq_printf(m, "North Display Interrupt identity: %08x\n",
  159. I915_READ(DEIIR));
  160. seq_printf(m, "North Display Interrupt mask: %08x\n",
  161. I915_READ(DEIMR));
  162. seq_printf(m, "South Display Interrupt enable: %08x\n",
  163. I915_READ(SDEIER));
  164. seq_printf(m, "South Display Interrupt identity: %08x\n",
  165. I915_READ(SDEIIR));
  166. seq_printf(m, "South Display Interrupt mask: %08x\n",
  167. I915_READ(SDEIMR));
  168. seq_printf(m, "Graphics Interrupt enable: %08x\n",
  169. I915_READ(GTIER));
  170. seq_printf(m, "Graphics Interrupt identity: %08x\n",
  171. I915_READ(GTIIR));
  172. seq_printf(m, "Graphics Interrupt mask: %08x\n",
  173. I915_READ(GTIMR));
  174. }
  175. seq_printf(m, "Interrupts received: %d\n",
  176. atomic_read(&dev_priv->irq_received));
  177. if (dev_priv->hw_status_page != NULL) {
  178. seq_printf(m, "Current sequence: %d\n",
  179. i915_get_gem_seqno(dev));
  180. } else {
  181. seq_printf(m, "Current sequence: hws uninitialized\n");
  182. }
  183. seq_printf(m, "Waiter sequence: %d\n",
  184. dev_priv->mm.waiting_gem_seqno);
  185. seq_printf(m, "IRQ sequence: %d\n",
  186. dev_priv->mm.irq_gem_seqno);
  187. return 0;
  188. }
  189. static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
  190. {
  191. struct drm_info_node *node = (struct drm_info_node *) m->private;
  192. struct drm_device *dev = node->minor->dev;
  193. drm_i915_private_t *dev_priv = dev->dev_private;
  194. int i;
  195. seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
  196. seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
  197. for (i = 0; i < dev_priv->num_fence_regs; i++) {
  198. struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
  199. if (obj == NULL) {
  200. seq_printf(m, "Fenced object[%2d] = unused\n", i);
  201. } else {
  202. struct drm_i915_gem_object *obj_priv;
  203. obj_priv = obj->driver_private;
  204. seq_printf(m, "Fenced object[%2d] = %p: %s "
  205. "%08x %08zx %08x %s %08x %08x %d",
  206. i, obj, get_pin_flag(obj_priv),
  207. obj_priv->gtt_offset,
  208. obj->size, obj_priv->stride,
  209. get_tiling_flag(obj_priv),
  210. obj->read_domains, obj->write_domain,
  211. obj_priv->last_rendering_seqno);
  212. if (obj->name)
  213. seq_printf(m, " (name: %d)", obj->name);
  214. seq_printf(m, "\n");
  215. }
  216. }
  217. return 0;
  218. }
  219. static int i915_hws_info(struct seq_file *m, void *data)
  220. {
  221. struct drm_info_node *node = (struct drm_info_node *) m->private;
  222. struct drm_device *dev = node->minor->dev;
  223. drm_i915_private_t *dev_priv = dev->dev_private;
  224. int i;
  225. volatile u32 *hws;
  226. hws = (volatile u32 *)dev_priv->hw_status_page;
  227. if (hws == NULL)
  228. return 0;
  229. for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
  230. seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
  231. i * 4,
  232. hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
  233. }
  234. return 0;
  235. }
  236. static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
  237. {
  238. int page, i;
  239. uint32_t *mem;
  240. for (page = 0; page < page_count; page++) {
  241. mem = kmap_atomic(pages[page], KM_USER0);
  242. for (i = 0; i < PAGE_SIZE; i += 4)
  243. seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
  244. kunmap_atomic(mem, KM_USER0);
  245. }
  246. }
  247. static int i915_batchbuffer_info(struct seq_file *m, void *data)
  248. {
  249. struct drm_info_node *node = (struct drm_info_node *) m->private;
  250. struct drm_device *dev = node->minor->dev;
  251. drm_i915_private_t *dev_priv = dev->dev_private;
  252. struct drm_gem_object *obj;
  253. struct drm_i915_gem_object *obj_priv;
  254. int ret;
  255. spin_lock(&dev_priv->mm.active_list_lock);
  256. list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
  257. obj = obj_priv->obj;
  258. if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
  259. ret = i915_gem_object_get_pages(obj, 0);
  260. if (ret) {
  261. DRM_ERROR("Failed to get pages: %d\n", ret);
  262. spin_unlock(&dev_priv->mm.active_list_lock);
  263. return ret;
  264. }
  265. seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
  266. i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
  267. i915_gem_object_put_pages(obj);
  268. }
  269. }
  270. spin_unlock(&dev_priv->mm.active_list_lock);
  271. return 0;
  272. }
  273. static int i915_ringbuffer_data(struct seq_file *m, void *data)
  274. {
  275. struct drm_info_node *node = (struct drm_info_node *) m->private;
  276. struct drm_device *dev = node->minor->dev;
  277. drm_i915_private_t *dev_priv = dev->dev_private;
  278. u8 *virt;
  279. uint32_t *ptr, off;
  280. if (!dev_priv->ring.ring_obj) {
  281. seq_printf(m, "No ringbuffer setup\n");
  282. return 0;
  283. }
  284. virt = dev_priv->ring.virtual_start;
  285. for (off = 0; off < dev_priv->ring.Size; off += 4) {
  286. ptr = (uint32_t *)(virt + off);
  287. seq_printf(m, "%08x : %08x\n", off, *ptr);
  288. }
  289. return 0;
  290. }
  291. static int i915_ringbuffer_info(struct seq_file *m, void *data)
  292. {
  293. struct drm_info_node *node = (struct drm_info_node *) m->private;
  294. struct drm_device *dev = node->minor->dev;
  295. drm_i915_private_t *dev_priv = dev->dev_private;
  296. unsigned int head, tail;
  297. head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
  298. tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
  299. seq_printf(m, "RingHead : %08x\n", head);
  300. seq_printf(m, "RingTail : %08x\n", tail);
  301. seq_printf(m, "RingSize : %08lx\n", dev_priv->ring.Size);
  302. seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
  303. return 0;
  304. }
  305. static const char *pin_flag(int pinned)
  306. {
  307. if (pinned > 0)
  308. return " P";
  309. else if (pinned < 0)
  310. return " p";
  311. else
  312. return "";
  313. }
  314. static const char *tiling_flag(int tiling)
  315. {
  316. switch (tiling) {
  317. default:
  318. case I915_TILING_NONE: return "";
  319. case I915_TILING_X: return " X";
  320. case I915_TILING_Y: return " Y";
  321. }
  322. }
  323. static const char *dirty_flag(int dirty)
  324. {
  325. return dirty ? " dirty" : "";
  326. }
  327. static const char *purgeable_flag(int purgeable)
  328. {
  329. return purgeable ? " purgeable" : "";
  330. }
  331. static int i915_error_state(struct seq_file *m, void *unused)
  332. {
  333. struct drm_info_node *node = (struct drm_info_node *) m->private;
  334. struct drm_device *dev = node->minor->dev;
  335. drm_i915_private_t *dev_priv = dev->dev_private;
  336. struct drm_i915_error_state *error;
  337. unsigned long flags;
  338. int i, page, offset, elt;
  339. spin_lock_irqsave(&dev_priv->error_lock, flags);
  340. if (!dev_priv->first_error) {
  341. seq_printf(m, "no error state collected\n");
  342. goto out;
  343. }
  344. error = dev_priv->first_error;
  345. seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
  346. error->time.tv_usec);
  347. seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
  348. seq_printf(m, "EIR: 0x%08x\n", error->eir);
  349. seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
  350. seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
  351. seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
  352. seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
  353. seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
  354. seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
  355. if (IS_I965G(dev)) {
  356. seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
  357. seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
  358. }
  359. seq_printf(m, "seqno: 0x%08x\n", error->seqno);
  360. if (error->active_bo_count) {
  361. seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
  362. for (i = 0; i < error->active_bo_count; i++) {
  363. seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
  364. error->active_bo[i].gtt_offset,
  365. error->active_bo[i].size,
  366. error->active_bo[i].read_domains,
  367. error->active_bo[i].write_domain,
  368. error->active_bo[i].seqno,
  369. pin_flag(error->active_bo[i].pinned),
  370. tiling_flag(error->active_bo[i].tiling),
  371. dirty_flag(error->active_bo[i].dirty),
  372. purgeable_flag(error->active_bo[i].purgeable));
  373. if (error->active_bo[i].name)
  374. seq_printf(m, " (name: %d)", error->active_bo[i].name);
  375. if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
  376. seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
  377. seq_printf(m, "\n");
  378. }
  379. }
  380. for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
  381. if (error->batchbuffer[i]) {
  382. struct drm_i915_error_object *obj = error->batchbuffer[i];
  383. seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
  384. offset = 0;
  385. for (page = 0; page < obj->page_count; page++) {
  386. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  387. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  388. offset += 4;
  389. }
  390. }
  391. }
  392. }
  393. if (error->ringbuffer) {
  394. struct drm_i915_error_object *obj = error->ringbuffer;
  395. seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
  396. offset = 0;
  397. for (page = 0; page < obj->page_count; page++) {
  398. for (elt = 0; elt < PAGE_SIZE/4; elt++) {
  399. seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
  400. offset += 4;
  401. }
  402. }
  403. }
  404. out:
  405. spin_unlock_irqrestore(&dev_priv->error_lock, flags);
  406. return 0;
  407. }
  408. static int i915_rstdby_delays(struct seq_file *m, void *unused)
  409. {
  410. struct drm_info_node *node = (struct drm_info_node *) m->private;
  411. struct drm_device *dev = node->minor->dev;
  412. drm_i915_private_t *dev_priv = dev->dev_private;
  413. u16 crstanddelay = I915_READ16(CRSTANDVID);
  414. seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
  415. return 0;
  416. }
  417. static int i915_cur_delayinfo(struct seq_file *m, void *unused)
  418. {
  419. struct drm_info_node *node = (struct drm_info_node *) m->private;
  420. struct drm_device *dev = node->minor->dev;
  421. drm_i915_private_t *dev_priv = dev->dev_private;
  422. u16 rgvswctl = I915_READ16(MEMSWCTL);
  423. seq_printf(m, "Last command: 0x%01x\n", (rgvswctl >> 13) & 0x3);
  424. seq_printf(m, "Command status: %d\n", (rgvswctl >> 12) & 1);
  425. seq_printf(m, "P%d DELAY 0x%02x\n", (rgvswctl >> 8) & 0xf,
  426. rgvswctl & 0x3f);
  427. return 0;
  428. }
  429. static int i915_delayfreq_table(struct seq_file *m, void *unused)
  430. {
  431. struct drm_info_node *node = (struct drm_info_node *) m->private;
  432. struct drm_device *dev = node->minor->dev;
  433. drm_i915_private_t *dev_priv = dev->dev_private;
  434. u32 delayfreq;
  435. int i;
  436. for (i = 0; i < 16; i++) {
  437. delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
  438. seq_printf(m, "P%02dVIDFREQ: 0x%08x\n", i, delayfreq);
  439. }
  440. return 0;
  441. }
  442. static inline int MAP_TO_MV(int map)
  443. {
  444. return 1250 - (map * 25);
  445. }
  446. static int i915_inttoext_table(struct seq_file *m, void *unused)
  447. {
  448. struct drm_info_node *node = (struct drm_info_node *) m->private;
  449. struct drm_device *dev = node->minor->dev;
  450. drm_i915_private_t *dev_priv = dev->dev_private;
  451. u32 inttoext;
  452. int i;
  453. for (i = 1; i <= 32; i++) {
  454. inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
  455. seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
  456. }
  457. return 0;
  458. }
  459. static int i915_drpc_info(struct seq_file *m, void *unused)
  460. {
  461. struct drm_info_node *node = (struct drm_info_node *) m->private;
  462. struct drm_device *dev = node->minor->dev;
  463. drm_i915_private_t *dev_priv = dev->dev_private;
  464. u32 rgvmodectl = I915_READ(MEMMODECTL);
  465. seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
  466. "yes" : "no");
  467. seq_printf(m, "Boost freq: %d\n",
  468. (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
  469. MEMMODE_BOOST_FREQ_SHIFT);
  470. seq_printf(m, "HW control enabled: %s\n",
  471. rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
  472. seq_printf(m, "SW control enabled: %s\n",
  473. rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
  474. seq_printf(m, "Gated voltage change: %s\n",
  475. rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
  476. seq_printf(m, "Starting frequency: P%d\n",
  477. (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
  478. seq_printf(m, "Max frequency: P%d\n",
  479. (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
  480. seq_printf(m, "Min frequency: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
  481. return 0;
  482. }
  483. static int i915_fbc_status(struct seq_file *m, void *unused)
  484. {
  485. struct drm_info_node *node = (struct drm_info_node *) m->private;
  486. struct drm_device *dev = node->minor->dev;
  487. struct drm_crtc *crtc;
  488. drm_i915_private_t *dev_priv = dev->dev_private;
  489. bool fbc_enabled = false;
  490. if (!dev_priv->display.fbc_enabled) {
  491. seq_printf(m, "FBC unsupported on this chipset\n");
  492. return 0;
  493. }
  494. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  495. if (!crtc->enabled)
  496. continue;
  497. if (dev_priv->display.fbc_enabled(crtc))
  498. fbc_enabled = true;
  499. }
  500. if (fbc_enabled) {
  501. seq_printf(m, "FBC enabled\n");
  502. } else {
  503. seq_printf(m, "FBC disabled: ");
  504. switch (dev_priv->no_fbc_reason) {
  505. case FBC_STOLEN_TOO_SMALL:
  506. seq_printf(m, "not enough stolen memory");
  507. break;
  508. case FBC_UNSUPPORTED_MODE:
  509. seq_printf(m, "mode not supported");
  510. break;
  511. case FBC_MODE_TOO_LARGE:
  512. seq_printf(m, "mode too large");
  513. break;
  514. case FBC_BAD_PLANE:
  515. seq_printf(m, "FBC unsupported on plane");
  516. break;
  517. case FBC_NOT_TILED:
  518. seq_printf(m, "scanout buffer not tiled");
  519. break;
  520. default:
  521. seq_printf(m, "unknown reason");
  522. }
  523. seq_printf(m, "\n");
  524. }
  525. return 0;
  526. }
  527. static int i915_sr_status(struct seq_file *m, void *unused)
  528. {
  529. struct drm_info_node *node = (struct drm_info_node *) m->private;
  530. struct drm_device *dev = node->minor->dev;
  531. drm_i915_private_t *dev_priv = dev->dev_private;
  532. bool sr_enabled = false;
  533. if (IS_I965G(dev) || IS_I945G(dev) || IS_I945GM(dev))
  534. sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
  535. else if (IS_I915GM(dev))
  536. sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
  537. else if (IS_PINEVIEW(dev))
  538. sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
  539. seq_printf(m, "self-refresh: %s\n", sr_enabled ? "enabled" :
  540. "disabled");
  541. return 0;
  542. }
  543. static int
  544. i915_wedged_open(struct inode *inode,
  545. struct file *filp)
  546. {
  547. filp->private_data = inode->i_private;
  548. return 0;
  549. }
  550. static ssize_t
  551. i915_wedged_read(struct file *filp,
  552. char __user *ubuf,
  553. size_t max,
  554. loff_t *ppos)
  555. {
  556. struct drm_device *dev = filp->private_data;
  557. drm_i915_private_t *dev_priv = dev->dev_private;
  558. char buf[80];
  559. int len;
  560. len = snprintf(buf, sizeof (buf),
  561. "wedged : %d\n",
  562. atomic_read(&dev_priv->mm.wedged));
  563. return simple_read_from_buffer(ubuf, max, ppos, buf, len);
  564. }
  565. static ssize_t
  566. i915_wedged_write(struct file *filp,
  567. const char __user *ubuf,
  568. size_t cnt,
  569. loff_t *ppos)
  570. {
  571. struct drm_device *dev = filp->private_data;
  572. drm_i915_private_t *dev_priv = dev->dev_private;
  573. char buf[20];
  574. int val = 1;
  575. if (cnt > 0) {
  576. if (cnt > sizeof (buf) - 1)
  577. return -EINVAL;
  578. if (copy_from_user(buf, ubuf, cnt))
  579. return -EFAULT;
  580. buf[cnt] = 0;
  581. val = simple_strtoul(buf, NULL, 0);
  582. }
  583. DRM_INFO("Manually setting wedged to %d\n", val);
  584. atomic_set(&dev_priv->mm.wedged, val);
  585. if (val) {
  586. DRM_WAKEUP(&dev_priv->irq_queue);
  587. queue_work(dev_priv->wq, &dev_priv->error_work);
  588. }
  589. return cnt;
  590. }
  591. static const struct file_operations i915_wedged_fops = {
  592. .owner = THIS_MODULE,
  593. .open = i915_wedged_open,
  594. .read = i915_wedged_read,
  595. .write = i915_wedged_write,
  596. };
  597. /* As the drm_debugfs_init() routines are called before dev->dev_private is
  598. * allocated we need to hook into the minor for release. */
  599. static int
  600. drm_add_fake_info_node(struct drm_minor *minor,
  601. struct dentry *ent,
  602. const void *key)
  603. {
  604. struct drm_info_node *node;
  605. node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
  606. if (node == NULL) {
  607. debugfs_remove(ent);
  608. return -ENOMEM;
  609. }
  610. node->minor = minor;
  611. node->dent = ent;
  612. node->info_ent = (void *) key;
  613. list_add(&node->list, &minor->debugfs_nodes.list);
  614. return 0;
  615. }
  616. static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
  617. {
  618. struct drm_device *dev = minor->dev;
  619. struct dentry *ent;
  620. ent = debugfs_create_file("i915_wedged",
  621. S_IRUGO | S_IWUSR,
  622. root, dev,
  623. &i915_wedged_fops);
  624. if (IS_ERR(ent))
  625. return PTR_ERR(ent);
  626. return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
  627. }
  628. static struct drm_info_list i915_debugfs_list[] = {
  629. {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
  630. {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
  631. {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
  632. {"i915_gem_request", i915_gem_request_info, 0},
  633. {"i915_gem_seqno", i915_gem_seqno_info, 0},
  634. {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
  635. {"i915_gem_interrupt", i915_interrupt_info, 0},
  636. {"i915_gem_hws", i915_hws_info, 0},
  637. {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
  638. {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
  639. {"i915_batchbuffers", i915_batchbuffer_info, 0},
  640. {"i915_error_state", i915_error_state, 0},
  641. {"i915_rstdby_delays", i915_rstdby_delays, 0},
  642. {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
  643. {"i915_delayfreq_table", i915_delayfreq_table, 0},
  644. {"i915_inttoext_table", i915_inttoext_table, 0},
  645. {"i915_drpc_info", i915_drpc_info, 0},
  646. {"i915_fbc_status", i915_fbc_status, 0},
  647. {"i915_sr_status", i915_sr_status, 0},
  648. };
  649. #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
  650. int i915_debugfs_init(struct drm_minor *minor)
  651. {
  652. int ret;
  653. ret = i915_wedged_create(minor->debugfs_root, minor);
  654. if (ret)
  655. return ret;
  656. return drm_debugfs_create_files(i915_debugfs_list,
  657. I915_DEBUGFS_ENTRIES,
  658. minor->debugfs_root, minor);
  659. }
  660. void i915_debugfs_cleanup(struct drm_minor *minor)
  661. {
  662. drm_debugfs_remove_files(i915_debugfs_list,
  663. I915_DEBUGFS_ENTRIES, minor);
  664. drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
  665. 1, minor);
  666. }
  667. #endif /* CONFIG_DEBUG_FS */