nicstar.c 84 KB

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  1. /******************************************************************************
  2. *
  3. * nicstar.c
  4. *
  5. * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
  6. *
  7. * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
  8. * It was taken from the frle-0.22 device driver.
  9. * As the file doesn't have a copyright notice, in the file
  10. * nicstarmac.copyright I put the copyright notice from the
  11. * frle-0.22 device driver.
  12. * Some code is based on the nicstar driver by M. Welsh.
  13. *
  14. * Author: Rui Prior (rprior@inescn.pt)
  15. * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
  16. *
  17. *
  18. * (C) INESC 1999
  19. *
  20. *
  21. ******************************************************************************/
  22. /**** IMPORTANT INFORMATION ***************************************************
  23. *
  24. * There are currently three types of spinlocks:
  25. *
  26. * 1 - Per card interrupt spinlock (to protect structures and such)
  27. * 2 - Per SCQ scq spinlock
  28. * 3 - Per card resource spinlock (to access registers, etc.)
  29. *
  30. * These must NEVER be grabbed in reverse order.
  31. *
  32. ******************************************************************************/
  33. /* Header files ***************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/atmdev.h>
  38. #include <linux/atm.h>
  39. #include <linux/pci.h>
  40. #include <linux/types.h>
  41. #include <linux/string.h>
  42. #include <linux/delay.h>
  43. #include <linux/init.h>
  44. #include <linux/sched.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/bitops.h>
  48. #include <asm/io.h>
  49. #include <asm/uaccess.h>
  50. #include <asm/atomic.h>
  51. #include "nicstar.h"
  52. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  53. #include "suni.h"
  54. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  55. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  56. #include "idt77105.h"
  57. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  58. #if BITS_PER_LONG != 32
  59. # error FIXME: this driver requires a 32-bit platform
  60. #endif
  61. /* Additional code ************************************************************/
  62. #include "nicstarmac.c"
  63. /* Configurable parameters ****************************************************/
  64. #undef PHY_LOOPBACK
  65. #undef TX_DEBUG
  66. #undef RX_DEBUG
  67. #undef GENERAL_DEBUG
  68. #undef EXTRA_DEBUG
  69. #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
  70. you're going to use only raw ATM */
  71. /* Do not touch these *********************************************************/
  72. #ifdef TX_DEBUG
  73. #define TXPRINTK(args...) printk(args)
  74. #else
  75. #define TXPRINTK(args...)
  76. #endif /* TX_DEBUG */
  77. #ifdef RX_DEBUG
  78. #define RXPRINTK(args...) printk(args)
  79. #else
  80. #define RXPRINTK(args...)
  81. #endif /* RX_DEBUG */
  82. #ifdef GENERAL_DEBUG
  83. #define PRINTK(args...) printk(args)
  84. #else
  85. #define PRINTK(args...)
  86. #endif /* GENERAL_DEBUG */
  87. #ifdef EXTRA_DEBUG
  88. #define XPRINTK(args...) printk(args)
  89. #else
  90. #define XPRINTK(args...)
  91. #endif /* EXTRA_DEBUG */
  92. /* Macros *********************************************************************/
  93. #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
  94. #define NS_DELAY mdelay(1)
  95. #define ALIGN_BUS_ADDR(addr, alignment) \
  96. ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
  97. #define ALIGN_ADDRESS(addr, alignment) \
  98. bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
  99. #undef CEIL
  100. #ifndef ATM_SKB
  101. #define ATM_SKB(s) (&(s)->atm)
  102. #endif
  103. /* Function declarations ******************************************************/
  104. static u32 ns_read_sram(ns_dev *card, u32 sram_address);
  105. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
  106. static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
  107. static void __devinit ns_init_card_error(ns_dev *card, int error);
  108. static scq_info *get_scq(int size, u32 scd);
  109. static void free_scq(scq_info *scq, struct atm_vcc *vcc);
  110. static void push_rxbufs(ns_dev *, struct sk_buff *);
  111. static irqreturn_t ns_irq_handler(int irq, void *dev_id);
  112. static int ns_open(struct atm_vcc *vcc);
  113. static void ns_close(struct atm_vcc *vcc);
  114. static void fill_tst(ns_dev *card, int n, vc_map *vc);
  115. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
  116. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  117. struct sk_buff *skb);
  118. static void process_tsq(ns_dev *card);
  119. static void drain_scq(ns_dev *card, scq_info *scq, int pos);
  120. static void process_rsq(ns_dev *card);
  121. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
  122. #ifdef NS_USE_DESTRUCTORS
  123. static void ns_sb_destructor(struct sk_buff *sb);
  124. static void ns_lb_destructor(struct sk_buff *lb);
  125. static void ns_hb_destructor(struct sk_buff *hb);
  126. #endif /* NS_USE_DESTRUCTORS */
  127. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
  128. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
  129. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
  130. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
  131. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
  132. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
  133. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
  134. static void which_list(ns_dev *card, struct sk_buff *skb);
  135. static void ns_poll(unsigned long arg);
  136. static int ns_parse_mac(char *mac, unsigned char *esi);
  137. static short ns_h2i(char c);
  138. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  139. unsigned long addr);
  140. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
  141. /* Global variables ***********************************************************/
  142. static struct ns_dev *cards[NS_MAX_CARDS];
  143. static unsigned num_cards;
  144. static struct atmdev_ops atm_ops =
  145. {
  146. .open = ns_open,
  147. .close = ns_close,
  148. .ioctl = ns_ioctl,
  149. .send = ns_send,
  150. .phy_put = ns_phy_put,
  151. .phy_get = ns_phy_get,
  152. .proc_read = ns_proc_read,
  153. .owner = THIS_MODULE,
  154. };
  155. static struct timer_list ns_timer;
  156. static char *mac[NS_MAX_CARDS];
  157. module_param_array(mac, charp, NULL, 0);
  158. MODULE_LICENSE("GPL");
  159. /* Functions*******************************************************************/
  160. static int __devinit nicstar_init_one(struct pci_dev *pcidev,
  161. const struct pci_device_id *ent)
  162. {
  163. static int index = -1;
  164. unsigned int error;
  165. index++;
  166. cards[index] = NULL;
  167. error = ns_init_card(index, pcidev);
  168. if (error) {
  169. cards[index--] = NULL; /* don't increment index */
  170. goto err_out;
  171. }
  172. return 0;
  173. err_out:
  174. return -ENODEV;
  175. }
  176. static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
  177. {
  178. int i, j;
  179. ns_dev *card = pci_get_drvdata(pcidev);
  180. struct sk_buff *hb;
  181. struct sk_buff *iovb;
  182. struct sk_buff *lb;
  183. struct sk_buff *sb;
  184. i = card->index;
  185. if (cards[i] == NULL)
  186. return;
  187. if (card->atmdev->phy && card->atmdev->phy->stop)
  188. card->atmdev->phy->stop(card->atmdev);
  189. /* Stop everything */
  190. writel(0x00000000, card->membase + CFG);
  191. /* De-register device */
  192. atm_dev_deregister(card->atmdev);
  193. /* Disable PCI device */
  194. pci_disable_device(pcidev);
  195. /* Free up resources */
  196. j = 0;
  197. PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
  198. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  199. {
  200. dev_kfree_skb_any(hb);
  201. j++;
  202. }
  203. PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
  204. j = 0;
  205. PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
  206. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  207. {
  208. dev_kfree_skb_any(iovb);
  209. j++;
  210. }
  211. PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
  212. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  213. dev_kfree_skb_any(lb);
  214. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  215. dev_kfree_skb_any(sb);
  216. free_scq(card->scq0, NULL);
  217. for (j = 0; j < NS_FRSCD_NUM; j++)
  218. {
  219. if (card->scd2vc[j] != NULL)
  220. free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
  221. }
  222. kfree(card->rsq.org);
  223. kfree(card->tsq.org);
  224. free_irq(card->pcidev->irq, card);
  225. iounmap(card->membase);
  226. kfree(card);
  227. }
  228. static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
  229. {
  230. {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
  231. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  232. {0,} /* terminate list */
  233. };
  234. MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
  235. static struct pci_driver nicstar_driver = {
  236. .name = "nicstar",
  237. .id_table = nicstar_pci_tbl,
  238. .probe = nicstar_init_one,
  239. .remove = __devexit_p(nicstar_remove_one),
  240. };
  241. static int __init nicstar_init(void)
  242. {
  243. unsigned error = 0; /* Initialized to remove compile warning */
  244. XPRINTK("nicstar: nicstar_init() called.\n");
  245. error = pci_register_driver(&nicstar_driver);
  246. TXPRINTK("nicstar: TX debug enabled.\n");
  247. RXPRINTK("nicstar: RX debug enabled.\n");
  248. PRINTK("nicstar: General debug enabled.\n");
  249. #ifdef PHY_LOOPBACK
  250. printk("nicstar: using PHY loopback.\n");
  251. #endif /* PHY_LOOPBACK */
  252. XPRINTK("nicstar: nicstar_init() returned.\n");
  253. if (!error) {
  254. init_timer(&ns_timer);
  255. ns_timer.expires = jiffies + NS_POLL_PERIOD;
  256. ns_timer.data = 0UL;
  257. ns_timer.function = ns_poll;
  258. add_timer(&ns_timer);
  259. }
  260. return error;
  261. }
  262. static void __exit nicstar_cleanup(void)
  263. {
  264. XPRINTK("nicstar: nicstar_cleanup() called.\n");
  265. del_timer(&ns_timer);
  266. pci_unregister_driver(&nicstar_driver);
  267. XPRINTK("nicstar: nicstar_cleanup() returned.\n");
  268. }
  269. static u32 ns_read_sram(ns_dev *card, u32 sram_address)
  270. {
  271. unsigned long flags;
  272. u32 data;
  273. sram_address <<= 2;
  274. sram_address &= 0x0007FFFC; /* address must be dword aligned */
  275. sram_address |= 0x50000000; /* SRAM read command */
  276. spin_lock_irqsave(&card->res_lock, flags);
  277. while (CMD_BUSY(card));
  278. writel(sram_address, card->membase + CMD);
  279. while (CMD_BUSY(card));
  280. data = readl(card->membase + DR0);
  281. spin_unlock_irqrestore(&card->res_lock, flags);
  282. return data;
  283. }
  284. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
  285. {
  286. unsigned long flags;
  287. int i, c;
  288. count--; /* count range now is 0..3 instead of 1..4 */
  289. c = count;
  290. c <<= 2; /* to use increments of 4 */
  291. spin_lock_irqsave(&card->res_lock, flags);
  292. while (CMD_BUSY(card));
  293. for (i = 0; i <= c; i += 4)
  294. writel(*(value++), card->membase + i);
  295. /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
  296. so card->membase + DR0 == card->membase */
  297. sram_address <<= 2;
  298. sram_address &= 0x0007FFFC;
  299. sram_address |= (0x40000000 | count);
  300. writel(sram_address, card->membase + CMD);
  301. spin_unlock_irqrestore(&card->res_lock, flags);
  302. }
  303. static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
  304. {
  305. int j;
  306. struct ns_dev *card = NULL;
  307. unsigned char pci_latency;
  308. unsigned error;
  309. u32 data;
  310. u32 u32d[4];
  311. u32 ns_cfg_rctsize;
  312. int bcount;
  313. unsigned long membase;
  314. error = 0;
  315. if (pci_enable_device(pcidev))
  316. {
  317. printk("nicstar%d: can't enable PCI device\n", i);
  318. error = 2;
  319. ns_init_card_error(card, error);
  320. return error;
  321. }
  322. if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
  323. {
  324. printk("nicstar%d: can't allocate memory for device structure.\n", i);
  325. error = 2;
  326. ns_init_card_error(card, error);
  327. return error;
  328. }
  329. cards[i] = card;
  330. spin_lock_init(&card->int_lock);
  331. spin_lock_init(&card->res_lock);
  332. pci_set_drvdata(pcidev, card);
  333. card->index = i;
  334. card->atmdev = NULL;
  335. card->pcidev = pcidev;
  336. membase = pci_resource_start(pcidev, 1);
  337. card->membase = ioremap(membase, NS_IOREMAP_SIZE);
  338. if (!card->membase)
  339. {
  340. printk("nicstar%d: can't ioremap() membase.\n",i);
  341. error = 3;
  342. ns_init_card_error(card, error);
  343. return error;
  344. }
  345. PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
  346. pci_set_master(pcidev);
  347. if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
  348. {
  349. printk("nicstar%d: can't read PCI latency timer.\n", i);
  350. error = 6;
  351. ns_init_card_error(card, error);
  352. return error;
  353. }
  354. #ifdef NS_PCI_LATENCY
  355. if (pci_latency < NS_PCI_LATENCY)
  356. {
  357. PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  358. for (j = 1; j < 4; j++)
  359. {
  360. if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
  361. break;
  362. }
  363. if (j == 4)
  364. {
  365. printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  366. error = 7;
  367. ns_init_card_error(card, error);
  368. return error;
  369. }
  370. }
  371. #endif /* NS_PCI_LATENCY */
  372. /* Clear timer overflow */
  373. data = readl(card->membase + STAT);
  374. if (data & NS_STAT_TMROF)
  375. writel(NS_STAT_TMROF, card->membase + STAT);
  376. /* Software reset */
  377. writel(NS_CFG_SWRST, card->membase + CFG);
  378. NS_DELAY;
  379. writel(0x00000000, card->membase + CFG);
  380. /* PHY reset */
  381. writel(0x00000008, card->membase + GP);
  382. NS_DELAY;
  383. writel(0x00000001, card->membase + GP);
  384. NS_DELAY;
  385. while (CMD_BUSY(card));
  386. writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
  387. NS_DELAY;
  388. /* Detect PHY type */
  389. while (CMD_BUSY(card));
  390. writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
  391. while (CMD_BUSY(card));
  392. data = readl(card->membase + DR0);
  393. switch(data) {
  394. case 0x00000009:
  395. printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
  396. card->max_pcr = ATM_25_PCR;
  397. while(CMD_BUSY(card));
  398. writel(0x00000008, card->membase + DR0);
  399. writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
  400. /* Clear an eventual pending interrupt */
  401. writel(NS_STAT_SFBQF, card->membase + STAT);
  402. #ifdef PHY_LOOPBACK
  403. while(CMD_BUSY(card));
  404. writel(0x00000022, card->membase + DR0);
  405. writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
  406. #endif /* PHY_LOOPBACK */
  407. break;
  408. case 0x00000030:
  409. case 0x00000031:
  410. printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
  411. card->max_pcr = ATM_OC3_PCR;
  412. #ifdef PHY_LOOPBACK
  413. while(CMD_BUSY(card));
  414. writel(0x00000002, card->membase + DR0);
  415. writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
  416. #endif /* PHY_LOOPBACK */
  417. break;
  418. default:
  419. printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
  420. error = 8;
  421. ns_init_card_error(card, error);
  422. return error;
  423. }
  424. writel(0x00000000, card->membase + GP);
  425. /* Determine SRAM size */
  426. data = 0x76543210;
  427. ns_write_sram(card, 0x1C003, &data, 1);
  428. data = 0x89ABCDEF;
  429. ns_write_sram(card, 0x14003, &data, 1);
  430. if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
  431. ns_read_sram(card, 0x1C003) == 0x76543210)
  432. card->sram_size = 128;
  433. else
  434. card->sram_size = 32;
  435. PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
  436. card->rct_size = NS_MAX_RCTSIZE;
  437. #if (NS_MAX_RCTSIZE == 4096)
  438. if (card->sram_size == 128)
  439. printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  440. #elif (NS_MAX_RCTSIZE == 16384)
  441. if (card->sram_size == 32)
  442. {
  443. printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  444. card->rct_size = 4096;
  445. }
  446. #else
  447. #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
  448. #endif
  449. card->vpibits = NS_VPIBITS;
  450. if (card->rct_size == 4096)
  451. card->vcibits = 12 - NS_VPIBITS;
  452. else /* card->rct_size == 16384 */
  453. card->vcibits = 14 - NS_VPIBITS;
  454. /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
  455. if (mac[i] == NULL)
  456. nicstar_init_eprom(card->membase);
  457. /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
  458. writel(0x00000000, card->membase + VPM);
  459. /* Initialize TSQ */
  460. card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
  461. if (card->tsq.org == NULL)
  462. {
  463. printk("nicstar%d: can't allocate TSQ.\n", i);
  464. error = 10;
  465. ns_init_card_error(card, error);
  466. return error;
  467. }
  468. card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
  469. card->tsq.next = card->tsq.base;
  470. card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
  471. for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
  472. ns_tsi_init(card->tsq.base + j);
  473. writel(0x00000000, card->membase + TSQH);
  474. writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
  475. PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
  476. (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
  477. /* Initialize RSQ */
  478. card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
  479. if (card->rsq.org == NULL)
  480. {
  481. printk("nicstar%d: can't allocate RSQ.\n", i);
  482. error = 11;
  483. ns_init_card_error(card, error);
  484. return error;
  485. }
  486. card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
  487. card->rsq.next = card->rsq.base;
  488. card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
  489. for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
  490. ns_rsqe_init(card->rsq.base + j);
  491. writel(0x00000000, card->membase + RSQH);
  492. writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
  493. PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
  494. /* Initialize SCQ0, the only VBR SCQ used */
  495. card->scq1 = NULL;
  496. card->scq2 = NULL;
  497. card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
  498. if (card->scq0 == NULL)
  499. {
  500. printk("nicstar%d: can't get SCQ0.\n", i);
  501. error = 12;
  502. ns_init_card_error(card, error);
  503. return error;
  504. }
  505. u32d[0] = (u32) virt_to_bus(card->scq0->base);
  506. u32d[1] = (u32) 0x00000000;
  507. u32d[2] = (u32) 0xffffffff;
  508. u32d[3] = (u32) 0x00000000;
  509. ns_write_sram(card, NS_VRSCD0, u32d, 4);
  510. ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
  511. ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
  512. card->scq0->scd = NS_VRSCD0;
  513. PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
  514. /* Initialize TSTs */
  515. card->tst_addr = NS_TST0;
  516. card->tst_free_entries = NS_TST_NUM_ENTRIES;
  517. data = NS_TST_OPCODE_VARIABLE;
  518. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  519. ns_write_sram(card, NS_TST0 + j, &data, 1);
  520. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
  521. ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
  522. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  523. ns_write_sram(card, NS_TST1 + j, &data, 1);
  524. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
  525. ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
  526. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  527. card->tste2vc[j] = NULL;
  528. writel(NS_TST0 << 2, card->membase + TSTB);
  529. /* Initialize RCT. AAL type is set on opening the VC. */
  530. #ifdef RCQ_SUPPORT
  531. u32d[0] = NS_RCTE_RAWCELLINTEN;
  532. #else
  533. u32d[0] = 0x00000000;
  534. #endif /* RCQ_SUPPORT */
  535. u32d[1] = 0x00000000;
  536. u32d[2] = 0x00000000;
  537. u32d[3] = 0xFFFFFFFF;
  538. for (j = 0; j < card->rct_size; j++)
  539. ns_write_sram(card, j * 4, u32d, 4);
  540. memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
  541. for (j = 0; j < NS_FRSCD_NUM; j++)
  542. card->scd2vc[j] = NULL;
  543. /* Initialize buffer levels */
  544. card->sbnr.min = MIN_SB;
  545. card->sbnr.init = NUM_SB;
  546. card->sbnr.max = MAX_SB;
  547. card->lbnr.min = MIN_LB;
  548. card->lbnr.init = NUM_LB;
  549. card->lbnr.max = MAX_LB;
  550. card->iovnr.min = MIN_IOVB;
  551. card->iovnr.init = NUM_IOVB;
  552. card->iovnr.max = MAX_IOVB;
  553. card->hbnr.min = MIN_HB;
  554. card->hbnr.init = NUM_HB;
  555. card->hbnr.max = MAX_HB;
  556. card->sm_handle = 0x00000000;
  557. card->sm_addr = 0x00000000;
  558. card->lg_handle = 0x00000000;
  559. card->lg_addr = 0x00000000;
  560. card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
  561. /* Pre-allocate some huge buffers */
  562. skb_queue_head_init(&card->hbpool.queue);
  563. card->hbpool.count = 0;
  564. for (j = 0; j < NUM_HB; j++)
  565. {
  566. struct sk_buff *hb;
  567. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  568. if (hb == NULL)
  569. {
  570. printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
  571. i, j, NUM_HB);
  572. error = 13;
  573. ns_init_card_error(card, error);
  574. return error;
  575. }
  576. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  577. skb_queue_tail(&card->hbpool.queue, hb);
  578. card->hbpool.count++;
  579. }
  580. /* Allocate large buffers */
  581. skb_queue_head_init(&card->lbpool.queue);
  582. card->lbpool.count = 0; /* Not used */
  583. for (j = 0; j < NUM_LB; j++)
  584. {
  585. struct sk_buff *lb;
  586. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  587. if (lb == NULL)
  588. {
  589. printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
  590. i, j, NUM_LB);
  591. error = 14;
  592. ns_init_card_error(card, error);
  593. return error;
  594. }
  595. NS_SKB_CB(lb)->buf_type = BUF_LG;
  596. skb_queue_tail(&card->lbpool.queue, lb);
  597. skb_reserve(lb, NS_SMBUFSIZE);
  598. push_rxbufs(card, lb);
  599. /* Due to the implementation of push_rxbufs() this is 1, not 0 */
  600. if (j == 1)
  601. {
  602. card->rcbuf = lb;
  603. card->rawch = (u32) virt_to_bus(lb->data);
  604. }
  605. }
  606. /* Test for strange behaviour which leads to crashes */
  607. if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
  608. {
  609. printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
  610. i, j, bcount);
  611. error = 14;
  612. ns_init_card_error(card, error);
  613. return error;
  614. }
  615. /* Allocate small buffers */
  616. skb_queue_head_init(&card->sbpool.queue);
  617. card->sbpool.count = 0; /* Not used */
  618. for (j = 0; j < NUM_SB; j++)
  619. {
  620. struct sk_buff *sb;
  621. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  622. if (sb == NULL)
  623. {
  624. printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
  625. i, j, NUM_SB);
  626. error = 15;
  627. ns_init_card_error(card, error);
  628. return error;
  629. }
  630. NS_SKB_CB(sb)->buf_type = BUF_SM;
  631. skb_queue_tail(&card->sbpool.queue, sb);
  632. skb_reserve(sb, NS_AAL0_HEADER);
  633. push_rxbufs(card, sb);
  634. }
  635. /* Test for strange behaviour which leads to crashes */
  636. if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
  637. {
  638. printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
  639. i, j, bcount);
  640. error = 15;
  641. ns_init_card_error(card, error);
  642. return error;
  643. }
  644. /* Allocate iovec buffers */
  645. skb_queue_head_init(&card->iovpool.queue);
  646. card->iovpool.count = 0;
  647. for (j = 0; j < NUM_IOVB; j++)
  648. {
  649. struct sk_buff *iovb;
  650. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  651. if (iovb == NULL)
  652. {
  653. printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
  654. i, j, NUM_IOVB);
  655. error = 16;
  656. ns_init_card_error(card, error);
  657. return error;
  658. }
  659. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  660. skb_queue_tail(&card->iovpool.queue, iovb);
  661. card->iovpool.count++;
  662. }
  663. /* Configure NICStAR */
  664. if (card->rct_size == 4096)
  665. ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
  666. else /* (card->rct_size == 16384) */
  667. ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
  668. card->efbie = 1;
  669. card->intcnt = 0;
  670. if (request_irq(pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED, "nicstar", card) != 0)
  671. {
  672. printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
  673. error = 9;
  674. ns_init_card_error(card, error);
  675. return error;
  676. }
  677. /* Register device */
  678. card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
  679. if (card->atmdev == NULL)
  680. {
  681. printk("nicstar%d: can't register device.\n", i);
  682. error = 17;
  683. ns_init_card_error(card, error);
  684. return error;
  685. }
  686. if (ns_parse_mac(mac[i], card->atmdev->esi)) {
  687. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
  688. card->atmdev->esi, 6);
  689. if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
  690. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
  691. card->atmdev->esi, 6);
  692. }
  693. }
  694. printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
  695. card->atmdev->dev_data = card;
  696. card->atmdev->ci_range.vpi_bits = card->vpibits;
  697. card->atmdev->ci_range.vci_bits = card->vcibits;
  698. card->atmdev->link_rate = card->max_pcr;
  699. card->atmdev->phy = NULL;
  700. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  701. if (card->max_pcr == ATM_OC3_PCR)
  702. suni_init(card->atmdev);
  703. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  704. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  705. if (card->max_pcr == ATM_25_PCR)
  706. idt77105_init(card->atmdev);
  707. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  708. if (card->atmdev->phy && card->atmdev->phy->start)
  709. card->atmdev->phy->start(card->atmdev);
  710. writel(NS_CFG_RXPATH |
  711. NS_CFG_SMBUFSIZE |
  712. NS_CFG_LGBUFSIZE |
  713. NS_CFG_EFBIE |
  714. NS_CFG_RSQSIZE |
  715. NS_CFG_VPIBITS |
  716. ns_cfg_rctsize |
  717. NS_CFG_RXINT_NODELAY |
  718. NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
  719. NS_CFG_RSQAFIE |
  720. NS_CFG_TXEN |
  721. NS_CFG_TXIE |
  722. NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
  723. NS_CFG_PHYIE,
  724. card->membase + CFG);
  725. num_cards++;
  726. return error;
  727. }
  728. static void __devinit ns_init_card_error(ns_dev *card, int error)
  729. {
  730. if (error >= 17)
  731. {
  732. writel(0x00000000, card->membase + CFG);
  733. }
  734. if (error >= 16)
  735. {
  736. struct sk_buff *iovb;
  737. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  738. dev_kfree_skb_any(iovb);
  739. }
  740. if (error >= 15)
  741. {
  742. struct sk_buff *sb;
  743. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  744. dev_kfree_skb_any(sb);
  745. free_scq(card->scq0, NULL);
  746. }
  747. if (error >= 14)
  748. {
  749. struct sk_buff *lb;
  750. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  751. dev_kfree_skb_any(lb);
  752. }
  753. if (error >= 13)
  754. {
  755. struct sk_buff *hb;
  756. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  757. dev_kfree_skb_any(hb);
  758. }
  759. if (error >= 12)
  760. {
  761. kfree(card->rsq.org);
  762. }
  763. if (error >= 11)
  764. {
  765. kfree(card->tsq.org);
  766. }
  767. if (error >= 10)
  768. {
  769. free_irq(card->pcidev->irq, card);
  770. }
  771. if (error >= 4)
  772. {
  773. iounmap(card->membase);
  774. }
  775. if (error >= 3)
  776. {
  777. pci_disable_device(card->pcidev);
  778. kfree(card);
  779. }
  780. }
  781. static scq_info *get_scq(int size, u32 scd)
  782. {
  783. scq_info *scq;
  784. int i;
  785. if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
  786. return NULL;
  787. scq = kmalloc(sizeof(scq_info), GFP_KERNEL);
  788. if (scq == NULL)
  789. return NULL;
  790. scq->org = kmalloc(2 * size, GFP_KERNEL);
  791. if (scq->org == NULL)
  792. {
  793. kfree(scq);
  794. return NULL;
  795. }
  796. scq->skb = kmalloc(sizeof(struct sk_buff *) *
  797. (size / NS_SCQE_SIZE), GFP_KERNEL);
  798. if (scq->skb == NULL)
  799. {
  800. kfree(scq->org);
  801. kfree(scq);
  802. return NULL;
  803. }
  804. scq->num_entries = size / NS_SCQE_SIZE;
  805. scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
  806. scq->next = scq->base;
  807. scq->last = scq->base + (scq->num_entries - 1);
  808. scq->tail = scq->last;
  809. scq->scd = scd;
  810. scq->num_entries = size / NS_SCQE_SIZE;
  811. scq->tbd_count = 0;
  812. init_waitqueue_head(&scq->scqfull_waitq);
  813. scq->full = 0;
  814. spin_lock_init(&scq->lock);
  815. for (i = 0; i < scq->num_entries; i++)
  816. scq->skb[i] = NULL;
  817. return scq;
  818. }
  819. /* For variable rate SCQ vcc must be NULL */
  820. static void free_scq(scq_info *scq, struct atm_vcc *vcc)
  821. {
  822. int i;
  823. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  824. for (i = 0; i < scq->num_entries; i++)
  825. {
  826. if (scq->skb[i] != NULL)
  827. {
  828. vcc = ATM_SKB(scq->skb[i])->vcc;
  829. if (vcc->pop != NULL)
  830. vcc->pop(vcc, scq->skb[i]);
  831. else
  832. dev_kfree_skb_any(scq->skb[i]);
  833. }
  834. }
  835. else /* vcc must be != NULL */
  836. {
  837. if (vcc == NULL)
  838. {
  839. printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
  840. for (i = 0; i < scq->num_entries; i++)
  841. dev_kfree_skb_any(scq->skb[i]);
  842. }
  843. else
  844. for (i = 0; i < scq->num_entries; i++)
  845. {
  846. if (scq->skb[i] != NULL)
  847. {
  848. if (vcc->pop != NULL)
  849. vcc->pop(vcc, scq->skb[i]);
  850. else
  851. dev_kfree_skb_any(scq->skb[i]);
  852. }
  853. }
  854. }
  855. kfree(scq->skb);
  856. kfree(scq->org);
  857. kfree(scq);
  858. }
  859. /* The handles passed must be pointers to the sk_buff containing the small
  860. or large buffer(s) cast to u32. */
  861. static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
  862. {
  863. struct ns_skb_cb *cb = NS_SKB_CB(skb);
  864. u32 handle1, addr1;
  865. u32 handle2, addr2;
  866. u32 stat;
  867. unsigned long flags;
  868. /* *BARF* */
  869. handle2 = addr2 = 0;
  870. handle1 = (u32)skb;
  871. addr1 = (u32)virt_to_bus(skb->data);
  872. #ifdef GENERAL_DEBUG
  873. if (!addr1)
  874. printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
  875. #endif /* GENERAL_DEBUG */
  876. stat = readl(card->membase + STAT);
  877. card->sbfqc = ns_stat_sfbqc_get(stat);
  878. card->lbfqc = ns_stat_lfbqc_get(stat);
  879. if (cb->buf_type == BUF_SM)
  880. {
  881. if (!addr2)
  882. {
  883. if (card->sm_addr)
  884. {
  885. addr2 = card->sm_addr;
  886. handle2 = card->sm_handle;
  887. card->sm_addr = 0x00000000;
  888. card->sm_handle = 0x00000000;
  889. }
  890. else /* (!sm_addr) */
  891. {
  892. card->sm_addr = addr1;
  893. card->sm_handle = handle1;
  894. }
  895. }
  896. }
  897. else /* buf_type == BUF_LG */
  898. {
  899. if (!addr2)
  900. {
  901. if (card->lg_addr)
  902. {
  903. addr2 = card->lg_addr;
  904. handle2 = card->lg_handle;
  905. card->lg_addr = 0x00000000;
  906. card->lg_handle = 0x00000000;
  907. }
  908. else /* (!lg_addr) */
  909. {
  910. card->lg_addr = addr1;
  911. card->lg_handle = handle1;
  912. }
  913. }
  914. }
  915. if (addr2)
  916. {
  917. if (cb->buf_type == BUF_SM)
  918. {
  919. if (card->sbfqc >= card->sbnr.max)
  920. {
  921. skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue);
  922. dev_kfree_skb_any((struct sk_buff *) handle1);
  923. skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue);
  924. dev_kfree_skb_any((struct sk_buff *) handle2);
  925. return;
  926. }
  927. else
  928. card->sbfqc += 2;
  929. }
  930. else /* (buf_type == BUF_LG) */
  931. {
  932. if (card->lbfqc >= card->lbnr.max)
  933. {
  934. skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue);
  935. dev_kfree_skb_any((struct sk_buff *) handle1);
  936. skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue);
  937. dev_kfree_skb_any((struct sk_buff *) handle2);
  938. return;
  939. }
  940. else
  941. card->lbfqc += 2;
  942. }
  943. spin_lock_irqsave(&card->res_lock, flags);
  944. while (CMD_BUSY(card));
  945. writel(addr2, card->membase + DR3);
  946. writel(handle2, card->membase + DR2);
  947. writel(addr1, card->membase + DR1);
  948. writel(handle1, card->membase + DR0);
  949. writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD);
  950. spin_unlock_irqrestore(&card->res_lock, flags);
  951. XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
  952. (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2);
  953. }
  954. if (!card->efbie && card->sbfqc >= card->sbnr.min &&
  955. card->lbfqc >= card->lbnr.min)
  956. {
  957. card->efbie = 1;
  958. writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
  959. }
  960. return;
  961. }
  962. static irqreturn_t ns_irq_handler(int irq, void *dev_id)
  963. {
  964. u32 stat_r;
  965. ns_dev *card;
  966. struct atm_dev *dev;
  967. unsigned long flags;
  968. card = (ns_dev *) dev_id;
  969. dev = card->atmdev;
  970. card->intcnt++;
  971. PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
  972. spin_lock_irqsave(&card->int_lock, flags);
  973. stat_r = readl(card->membase + STAT);
  974. /* Transmit Status Indicator has been written to T. S. Queue */
  975. if (stat_r & NS_STAT_TSIF)
  976. {
  977. TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
  978. process_tsq(card);
  979. writel(NS_STAT_TSIF, card->membase + STAT);
  980. }
  981. /* Incomplete CS-PDU has been transmitted */
  982. if (stat_r & NS_STAT_TXICP)
  983. {
  984. writel(NS_STAT_TXICP, card->membase + STAT);
  985. TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
  986. card->index);
  987. }
  988. /* Transmit Status Queue 7/8 full */
  989. if (stat_r & NS_STAT_TSQF)
  990. {
  991. writel(NS_STAT_TSQF, card->membase + STAT);
  992. PRINTK("nicstar%d: TSQ full.\n", card->index);
  993. process_tsq(card);
  994. }
  995. /* Timer overflow */
  996. if (stat_r & NS_STAT_TMROF)
  997. {
  998. writel(NS_STAT_TMROF, card->membase + STAT);
  999. PRINTK("nicstar%d: Timer overflow.\n", card->index);
  1000. }
  1001. /* PHY device interrupt signal active */
  1002. if (stat_r & NS_STAT_PHYI)
  1003. {
  1004. writel(NS_STAT_PHYI, card->membase + STAT);
  1005. PRINTK("nicstar%d: PHY interrupt.\n", card->index);
  1006. if (dev->phy && dev->phy->interrupt) {
  1007. dev->phy->interrupt(dev);
  1008. }
  1009. }
  1010. /* Small Buffer Queue is full */
  1011. if (stat_r & NS_STAT_SFBQF)
  1012. {
  1013. writel(NS_STAT_SFBQF, card->membase + STAT);
  1014. printk("nicstar%d: Small free buffer queue is full.\n", card->index);
  1015. }
  1016. /* Large Buffer Queue is full */
  1017. if (stat_r & NS_STAT_LFBQF)
  1018. {
  1019. writel(NS_STAT_LFBQF, card->membase + STAT);
  1020. printk("nicstar%d: Large free buffer queue is full.\n", card->index);
  1021. }
  1022. /* Receive Status Queue is full */
  1023. if (stat_r & NS_STAT_RSQF)
  1024. {
  1025. writel(NS_STAT_RSQF, card->membase + STAT);
  1026. printk("nicstar%d: RSQ full.\n", card->index);
  1027. process_rsq(card);
  1028. }
  1029. /* Complete CS-PDU received */
  1030. if (stat_r & NS_STAT_EOPDU)
  1031. {
  1032. RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
  1033. process_rsq(card);
  1034. writel(NS_STAT_EOPDU, card->membase + STAT);
  1035. }
  1036. /* Raw cell received */
  1037. if (stat_r & NS_STAT_RAWCF)
  1038. {
  1039. writel(NS_STAT_RAWCF, card->membase + STAT);
  1040. #ifndef RCQ_SUPPORT
  1041. printk("nicstar%d: Raw cell received and no support yet...\n",
  1042. card->index);
  1043. #endif /* RCQ_SUPPORT */
  1044. /* NOTE: the following procedure may keep a raw cell pending until the
  1045. next interrupt. As this preliminary support is only meant to
  1046. avoid buffer leakage, this is not an issue. */
  1047. while (readl(card->membase + RAWCT) != card->rawch)
  1048. {
  1049. ns_rcqe *rawcell;
  1050. rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
  1051. if (ns_rcqe_islast(rawcell))
  1052. {
  1053. struct sk_buff *oldbuf;
  1054. oldbuf = card->rcbuf;
  1055. card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
  1056. card->rawch = (u32) virt_to_bus(card->rcbuf->data);
  1057. recycle_rx_buf(card, oldbuf);
  1058. }
  1059. else
  1060. card->rawch += NS_RCQE_SIZE;
  1061. }
  1062. }
  1063. /* Small buffer queue is empty */
  1064. if (stat_r & NS_STAT_SFBQE)
  1065. {
  1066. int i;
  1067. struct sk_buff *sb;
  1068. writel(NS_STAT_SFBQE, card->membase + STAT);
  1069. printk("nicstar%d: Small free buffer queue empty.\n",
  1070. card->index);
  1071. for (i = 0; i < card->sbnr.min; i++)
  1072. {
  1073. sb = dev_alloc_skb(NS_SMSKBSIZE);
  1074. if (sb == NULL)
  1075. {
  1076. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1077. card->efbie = 0;
  1078. break;
  1079. }
  1080. NS_SKB_CB(sb)->buf_type = BUF_SM;
  1081. skb_queue_tail(&card->sbpool.queue, sb);
  1082. skb_reserve(sb, NS_AAL0_HEADER);
  1083. push_rxbufs(card, sb);
  1084. }
  1085. card->sbfqc = i;
  1086. process_rsq(card);
  1087. }
  1088. /* Large buffer queue empty */
  1089. if (stat_r & NS_STAT_LFBQE)
  1090. {
  1091. int i;
  1092. struct sk_buff *lb;
  1093. writel(NS_STAT_LFBQE, card->membase + STAT);
  1094. printk("nicstar%d: Large free buffer queue empty.\n",
  1095. card->index);
  1096. for (i = 0; i < card->lbnr.min; i++)
  1097. {
  1098. lb = dev_alloc_skb(NS_LGSKBSIZE);
  1099. if (lb == NULL)
  1100. {
  1101. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1102. card->efbie = 0;
  1103. break;
  1104. }
  1105. NS_SKB_CB(lb)->buf_type = BUF_LG;
  1106. skb_queue_tail(&card->lbpool.queue, lb);
  1107. skb_reserve(lb, NS_SMBUFSIZE);
  1108. push_rxbufs(card, lb);
  1109. }
  1110. card->lbfqc = i;
  1111. process_rsq(card);
  1112. }
  1113. /* Receive Status Queue is 7/8 full */
  1114. if (stat_r & NS_STAT_RSQAF)
  1115. {
  1116. writel(NS_STAT_RSQAF, card->membase + STAT);
  1117. RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
  1118. process_rsq(card);
  1119. }
  1120. spin_unlock_irqrestore(&card->int_lock, flags);
  1121. PRINTK("nicstar%d: end of interrupt service\n", card->index);
  1122. return IRQ_HANDLED;
  1123. }
  1124. static int ns_open(struct atm_vcc *vcc)
  1125. {
  1126. ns_dev *card;
  1127. vc_map *vc;
  1128. unsigned long tmpl, modl;
  1129. int tcr, tcra; /* target cell rate, and absolute value */
  1130. int n = 0; /* Number of entries in the TST. Initialized to remove
  1131. the compiler warning. */
  1132. u32 u32d[4];
  1133. int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
  1134. warning. How I wish compilers were clever enough to
  1135. tell which variables can truly be used
  1136. uninitialized... */
  1137. int inuse; /* tx or rx vc already in use by another vcc */
  1138. short vpi = vcc->vpi;
  1139. int vci = vcc->vci;
  1140. card = (ns_dev *) vcc->dev->dev_data;
  1141. PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
  1142. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1143. {
  1144. PRINTK("nicstar%d: unsupported AAL.\n", card->index);
  1145. return -EINVAL;
  1146. }
  1147. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1148. vcc->dev_data = vc;
  1149. inuse = 0;
  1150. if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
  1151. inuse = 1;
  1152. if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
  1153. inuse += 2;
  1154. if (inuse)
  1155. {
  1156. printk("nicstar%d: %s vci already in use.\n", card->index,
  1157. inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
  1158. return -EINVAL;
  1159. }
  1160. set_bit(ATM_VF_ADDR,&vcc->flags);
  1161. /* NOTE: You are not allowed to modify an open connection's QOS. To change
  1162. that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
  1163. needed to do that. */
  1164. if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
  1165. {
  1166. scq_info *scq;
  1167. set_bit(ATM_VF_PARTIAL,&vcc->flags);
  1168. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1169. {
  1170. /* Check requested cell rate and availability of SCD */
  1171. if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
  1172. vcc->qos.txtp.min_pcr == 0)
  1173. {
  1174. PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
  1175. card->index);
  1176. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1177. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1178. return -EINVAL;
  1179. }
  1180. tcr = atm_pcr_goal(&(vcc->qos.txtp));
  1181. tcra = tcr >= 0 ? tcr : -tcr;
  1182. PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
  1183. vcc->qos.txtp.max_pcr);
  1184. tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
  1185. modl = tmpl % card->max_pcr;
  1186. n = (int)(tmpl / card->max_pcr);
  1187. if (tcr > 0)
  1188. {
  1189. if (modl > 0) n++;
  1190. }
  1191. else if (tcr == 0)
  1192. {
  1193. if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
  1194. {
  1195. PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
  1196. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1197. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1198. return -EINVAL;
  1199. }
  1200. }
  1201. if (n == 0)
  1202. {
  1203. printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
  1204. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1205. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1206. return -EINVAL;
  1207. }
  1208. if (n > (card->tst_free_entries - NS_TST_RESERVED))
  1209. {
  1210. PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
  1211. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1212. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1213. return -EINVAL;
  1214. }
  1215. else
  1216. card->tst_free_entries -= n;
  1217. XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
  1218. for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
  1219. {
  1220. if (card->scd2vc[frscdi] == NULL)
  1221. {
  1222. card->scd2vc[frscdi] = vc;
  1223. break;
  1224. }
  1225. }
  1226. if (frscdi == NS_FRSCD_NUM)
  1227. {
  1228. PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
  1229. card->tst_free_entries += n;
  1230. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1231. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1232. return -EBUSY;
  1233. }
  1234. vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
  1235. scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
  1236. if (scq == NULL)
  1237. {
  1238. PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
  1239. card->scd2vc[frscdi] = NULL;
  1240. card->tst_free_entries += n;
  1241. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1242. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1243. return -ENOMEM;
  1244. }
  1245. vc->scq = scq;
  1246. u32d[0] = (u32) virt_to_bus(scq->base);
  1247. u32d[1] = (u32) 0x00000000;
  1248. u32d[2] = (u32) 0xffffffff;
  1249. u32d[3] = (u32) 0x00000000;
  1250. ns_write_sram(card, vc->cbr_scd, u32d, 4);
  1251. fill_tst(card, n, vc);
  1252. }
  1253. else if (vcc->qos.txtp.traffic_class == ATM_UBR)
  1254. {
  1255. vc->cbr_scd = 0x00000000;
  1256. vc->scq = card->scq0;
  1257. }
  1258. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1259. {
  1260. vc->tx = 1;
  1261. vc->tx_vcc = vcc;
  1262. vc->tbd_count = 0;
  1263. }
  1264. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1265. {
  1266. u32 status;
  1267. vc->rx = 1;
  1268. vc->rx_vcc = vcc;
  1269. vc->rx_iov = NULL;
  1270. /* Open the connection in hardware */
  1271. if (vcc->qos.aal == ATM_AAL5)
  1272. status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
  1273. else /* vcc->qos.aal == ATM_AAL0 */
  1274. status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
  1275. #ifdef RCQ_SUPPORT
  1276. status |= NS_RCTE_RAWCELLINTEN;
  1277. #endif /* RCQ_SUPPORT */
  1278. ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
  1279. NS_RCT_ENTRY_SIZE, &status, 1);
  1280. }
  1281. }
  1282. set_bit(ATM_VF_READY,&vcc->flags);
  1283. return 0;
  1284. }
  1285. static void ns_close(struct atm_vcc *vcc)
  1286. {
  1287. vc_map *vc;
  1288. ns_dev *card;
  1289. u32 data;
  1290. int i;
  1291. vc = vcc->dev_data;
  1292. card = vcc->dev->dev_data;
  1293. PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
  1294. (int) vcc->vpi, vcc->vci);
  1295. clear_bit(ATM_VF_READY,&vcc->flags);
  1296. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1297. {
  1298. u32 addr;
  1299. unsigned long flags;
  1300. addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
  1301. spin_lock_irqsave(&card->res_lock, flags);
  1302. while(CMD_BUSY(card));
  1303. writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
  1304. spin_unlock_irqrestore(&card->res_lock, flags);
  1305. vc->rx = 0;
  1306. if (vc->rx_iov != NULL)
  1307. {
  1308. struct sk_buff *iovb;
  1309. u32 stat;
  1310. stat = readl(card->membase + STAT);
  1311. card->sbfqc = ns_stat_sfbqc_get(stat);
  1312. card->lbfqc = ns_stat_lfbqc_get(stat);
  1313. PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
  1314. card->index);
  1315. iovb = vc->rx_iov;
  1316. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1317. NS_SKB(iovb)->iovcnt);
  1318. NS_SKB(iovb)->iovcnt = 0;
  1319. NS_SKB(iovb)->vcc = NULL;
  1320. spin_lock_irqsave(&card->int_lock, flags);
  1321. recycle_iov_buf(card, iovb);
  1322. spin_unlock_irqrestore(&card->int_lock, flags);
  1323. vc->rx_iov = NULL;
  1324. }
  1325. }
  1326. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1327. {
  1328. vc->tx = 0;
  1329. }
  1330. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1331. {
  1332. unsigned long flags;
  1333. ns_scqe *scqep;
  1334. scq_info *scq;
  1335. scq = vc->scq;
  1336. for (;;)
  1337. {
  1338. spin_lock_irqsave(&scq->lock, flags);
  1339. scqep = scq->next;
  1340. if (scqep == scq->base)
  1341. scqep = scq->last;
  1342. else
  1343. scqep--;
  1344. if (scqep == scq->tail)
  1345. {
  1346. spin_unlock_irqrestore(&scq->lock, flags);
  1347. break;
  1348. }
  1349. /* If the last entry is not a TSR, place one in the SCQ in order to
  1350. be able to completely drain it and then close. */
  1351. if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
  1352. {
  1353. ns_scqe tsr;
  1354. u32 scdi, scqi;
  1355. u32 data;
  1356. int index;
  1357. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1358. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1359. scqi = scq->next - scq->base;
  1360. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1361. tsr.word_3 = 0x00000000;
  1362. tsr.word_4 = 0x00000000;
  1363. *scq->next = tsr;
  1364. index = (int) scqi;
  1365. scq->skb[index] = NULL;
  1366. if (scq->next == scq->last)
  1367. scq->next = scq->base;
  1368. else
  1369. scq->next++;
  1370. data = (u32) virt_to_bus(scq->next);
  1371. ns_write_sram(card, scq->scd, &data, 1);
  1372. }
  1373. spin_unlock_irqrestore(&scq->lock, flags);
  1374. schedule();
  1375. }
  1376. /* Free all TST entries */
  1377. data = NS_TST_OPCODE_VARIABLE;
  1378. for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
  1379. {
  1380. if (card->tste2vc[i] == vc)
  1381. {
  1382. ns_write_sram(card, card->tst_addr + i, &data, 1);
  1383. card->tste2vc[i] = NULL;
  1384. card->tst_free_entries++;
  1385. }
  1386. }
  1387. card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
  1388. free_scq(vc->scq, vcc);
  1389. }
  1390. /* remove all references to vcc before deleting it */
  1391. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1392. {
  1393. unsigned long flags;
  1394. scq_info *scq = card->scq0;
  1395. spin_lock_irqsave(&scq->lock, flags);
  1396. for(i = 0; i < scq->num_entries; i++) {
  1397. if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
  1398. ATM_SKB(scq->skb[i])->vcc = NULL;
  1399. atm_return(vcc, scq->skb[i]->truesize);
  1400. PRINTK("nicstar: deleted pending vcc mapping\n");
  1401. }
  1402. }
  1403. spin_unlock_irqrestore(&scq->lock, flags);
  1404. }
  1405. vcc->dev_data = NULL;
  1406. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1407. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1408. #ifdef RX_DEBUG
  1409. {
  1410. u32 stat, cfg;
  1411. stat = readl(card->membase + STAT);
  1412. cfg = readl(card->membase + CFG);
  1413. printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
  1414. printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
  1415. (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
  1416. readl(card->membase + TSQT));
  1417. printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
  1418. (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
  1419. readl(card->membase + RSQT));
  1420. printk("Empty free buffer queue interrupt %s \n",
  1421. card->efbie ? "enabled" : "disabled");
  1422. printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
  1423. ns_stat_sfbqc_get(stat), card->sbpool.count,
  1424. ns_stat_lfbqc_get(stat), card->lbpool.count);
  1425. printk("hbpool.count = %d iovpool.count = %d \n",
  1426. card->hbpool.count, card->iovpool.count);
  1427. }
  1428. #endif /* RX_DEBUG */
  1429. }
  1430. static void fill_tst(ns_dev *card, int n, vc_map *vc)
  1431. {
  1432. u32 new_tst;
  1433. unsigned long cl;
  1434. int e, r;
  1435. u32 data;
  1436. /* It would be very complicated to keep the two TSTs synchronized while
  1437. assuring that writes are only made to the inactive TST. So, for now I
  1438. will use only one TST. If problems occur, I will change this again */
  1439. new_tst = card->tst_addr;
  1440. /* Fill procedure */
  1441. for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
  1442. {
  1443. if (card->tste2vc[e] == NULL)
  1444. break;
  1445. }
  1446. if (e == NS_TST_NUM_ENTRIES) {
  1447. printk("nicstar%d: No free TST entries found. \n", card->index);
  1448. return;
  1449. }
  1450. r = n;
  1451. cl = NS_TST_NUM_ENTRIES;
  1452. data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
  1453. while (r > 0)
  1454. {
  1455. if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
  1456. {
  1457. card->tste2vc[e] = vc;
  1458. ns_write_sram(card, new_tst + e, &data, 1);
  1459. cl -= NS_TST_NUM_ENTRIES;
  1460. r--;
  1461. }
  1462. if (++e == NS_TST_NUM_ENTRIES) {
  1463. e = 0;
  1464. }
  1465. cl += n;
  1466. }
  1467. /* End of fill procedure */
  1468. data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
  1469. ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
  1470. ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
  1471. card->tst_addr = new_tst;
  1472. }
  1473. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
  1474. {
  1475. ns_dev *card;
  1476. vc_map *vc;
  1477. scq_info *scq;
  1478. unsigned long buflen;
  1479. ns_scqe scqe;
  1480. u32 flags; /* TBD flags, not CPU flags */
  1481. card = vcc->dev->dev_data;
  1482. TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
  1483. if ((vc = (vc_map *) vcc->dev_data) == NULL)
  1484. {
  1485. printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
  1486. atomic_inc(&vcc->stats->tx_err);
  1487. dev_kfree_skb_any(skb);
  1488. return -EINVAL;
  1489. }
  1490. if (!vc->tx)
  1491. {
  1492. printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
  1493. atomic_inc(&vcc->stats->tx_err);
  1494. dev_kfree_skb_any(skb);
  1495. return -EINVAL;
  1496. }
  1497. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1498. {
  1499. printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
  1500. atomic_inc(&vcc->stats->tx_err);
  1501. dev_kfree_skb_any(skb);
  1502. return -EINVAL;
  1503. }
  1504. if (skb_shinfo(skb)->nr_frags != 0)
  1505. {
  1506. printk("nicstar%d: No scatter-gather yet.\n", card->index);
  1507. atomic_inc(&vcc->stats->tx_err);
  1508. dev_kfree_skb_any(skb);
  1509. return -EINVAL;
  1510. }
  1511. ATM_SKB(skb)->vcc = vcc;
  1512. if (vcc->qos.aal == ATM_AAL5)
  1513. {
  1514. buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
  1515. flags = NS_TBD_AAL5;
  1516. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
  1517. scqe.word_3 = cpu_to_le32((u32) skb->len);
  1518. scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
  1519. ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
  1520. flags |= NS_TBD_EOPDU;
  1521. }
  1522. else /* (vcc->qos.aal == ATM_AAL0) */
  1523. {
  1524. buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
  1525. flags = NS_TBD_AAL0;
  1526. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
  1527. scqe.word_3 = cpu_to_le32(0x00000000);
  1528. if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
  1529. flags |= NS_TBD_EOPDU;
  1530. scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
  1531. /* Force the VPI/VCI to be the same as in VCC struct */
  1532. scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
  1533. ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
  1534. NS_TBD_VC_MASK);
  1535. }
  1536. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1537. {
  1538. scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
  1539. scq = ((vc_map *) vcc->dev_data)->scq;
  1540. }
  1541. else
  1542. {
  1543. scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
  1544. scq = card->scq0;
  1545. }
  1546. if (push_scqe(card, vc, scq, &scqe, skb) != 0)
  1547. {
  1548. atomic_inc(&vcc->stats->tx_err);
  1549. dev_kfree_skb_any(skb);
  1550. return -EIO;
  1551. }
  1552. atomic_inc(&vcc->stats->tx);
  1553. return 0;
  1554. }
  1555. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  1556. struct sk_buff *skb)
  1557. {
  1558. unsigned long flags;
  1559. ns_scqe tsr;
  1560. u32 scdi, scqi;
  1561. int scq_is_vbr;
  1562. u32 data;
  1563. int index;
  1564. spin_lock_irqsave(&scq->lock, flags);
  1565. while (scq->tail == scq->next)
  1566. {
  1567. if (in_interrupt()) {
  1568. spin_unlock_irqrestore(&scq->lock, flags);
  1569. printk("nicstar%d: Error pushing TBD.\n", card->index);
  1570. return 1;
  1571. }
  1572. scq->full = 1;
  1573. spin_unlock_irqrestore(&scq->lock, flags);
  1574. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1575. spin_lock_irqsave(&scq->lock, flags);
  1576. if (scq->full) {
  1577. spin_unlock_irqrestore(&scq->lock, flags);
  1578. printk("nicstar%d: Timeout pushing TBD.\n", card->index);
  1579. return 1;
  1580. }
  1581. }
  1582. *scq->next = *tbd;
  1583. index = (int) (scq->next - scq->base);
  1584. scq->skb[index] = skb;
  1585. XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
  1586. card->index, (u32) skb, index);
  1587. XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1588. card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
  1589. le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
  1590. (u32) scq->next);
  1591. if (scq->next == scq->last)
  1592. scq->next = scq->base;
  1593. else
  1594. scq->next++;
  1595. vc->tbd_count++;
  1596. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  1597. {
  1598. scq->tbd_count++;
  1599. scq_is_vbr = 1;
  1600. }
  1601. else
  1602. scq_is_vbr = 0;
  1603. if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
  1604. {
  1605. int has_run = 0;
  1606. while (scq->tail == scq->next)
  1607. {
  1608. if (in_interrupt()) {
  1609. data = (u32) virt_to_bus(scq->next);
  1610. ns_write_sram(card, scq->scd, &data, 1);
  1611. spin_unlock_irqrestore(&scq->lock, flags);
  1612. printk("nicstar%d: Error pushing TSR.\n", card->index);
  1613. return 0;
  1614. }
  1615. scq->full = 1;
  1616. if (has_run++) break;
  1617. spin_unlock_irqrestore(&scq->lock, flags);
  1618. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1619. spin_lock_irqsave(&scq->lock, flags);
  1620. }
  1621. if (!scq->full)
  1622. {
  1623. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1624. if (scq_is_vbr)
  1625. scdi = NS_TSR_SCDISVBR;
  1626. else
  1627. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1628. scqi = scq->next - scq->base;
  1629. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1630. tsr.word_3 = 0x00000000;
  1631. tsr.word_4 = 0x00000000;
  1632. *scq->next = tsr;
  1633. index = (int) scqi;
  1634. scq->skb[index] = NULL;
  1635. XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1636. card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
  1637. le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
  1638. (u32) scq->next);
  1639. if (scq->next == scq->last)
  1640. scq->next = scq->base;
  1641. else
  1642. scq->next++;
  1643. vc->tbd_count = 0;
  1644. scq->tbd_count = 0;
  1645. }
  1646. else
  1647. PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
  1648. }
  1649. data = (u32) virt_to_bus(scq->next);
  1650. ns_write_sram(card, scq->scd, &data, 1);
  1651. spin_unlock_irqrestore(&scq->lock, flags);
  1652. return 0;
  1653. }
  1654. static void process_tsq(ns_dev *card)
  1655. {
  1656. u32 scdi;
  1657. scq_info *scq;
  1658. ns_tsi *previous = NULL, *one_ahead, *two_ahead;
  1659. int serviced_entries; /* flag indicating at least on entry was serviced */
  1660. serviced_entries = 0;
  1661. if (card->tsq.next == card->tsq.last)
  1662. one_ahead = card->tsq.base;
  1663. else
  1664. one_ahead = card->tsq.next + 1;
  1665. if (one_ahead == card->tsq.last)
  1666. two_ahead = card->tsq.base;
  1667. else
  1668. two_ahead = one_ahead + 1;
  1669. while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
  1670. !ns_tsi_isempty(two_ahead))
  1671. /* At most two empty, as stated in the 77201 errata */
  1672. {
  1673. serviced_entries = 1;
  1674. /* Skip the one or two possible empty entries */
  1675. while (ns_tsi_isempty(card->tsq.next)) {
  1676. if (card->tsq.next == card->tsq.last)
  1677. card->tsq.next = card->tsq.base;
  1678. else
  1679. card->tsq.next++;
  1680. }
  1681. if (!ns_tsi_tmrof(card->tsq.next))
  1682. {
  1683. scdi = ns_tsi_getscdindex(card->tsq.next);
  1684. if (scdi == NS_TSI_SCDISVBR)
  1685. scq = card->scq0;
  1686. else
  1687. {
  1688. if (card->scd2vc[scdi] == NULL)
  1689. {
  1690. printk("nicstar%d: could not find VC from SCD index.\n",
  1691. card->index);
  1692. ns_tsi_init(card->tsq.next);
  1693. return;
  1694. }
  1695. scq = card->scd2vc[scdi]->scq;
  1696. }
  1697. drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
  1698. scq->full = 0;
  1699. wake_up_interruptible(&(scq->scqfull_waitq));
  1700. }
  1701. ns_tsi_init(card->tsq.next);
  1702. previous = card->tsq.next;
  1703. if (card->tsq.next == card->tsq.last)
  1704. card->tsq.next = card->tsq.base;
  1705. else
  1706. card->tsq.next++;
  1707. if (card->tsq.next == card->tsq.last)
  1708. one_ahead = card->tsq.base;
  1709. else
  1710. one_ahead = card->tsq.next + 1;
  1711. if (one_ahead == card->tsq.last)
  1712. two_ahead = card->tsq.base;
  1713. else
  1714. two_ahead = one_ahead + 1;
  1715. }
  1716. if (serviced_entries) {
  1717. writel((((u32) previous) - ((u32) card->tsq.base)),
  1718. card->membase + TSQH);
  1719. }
  1720. }
  1721. static void drain_scq(ns_dev *card, scq_info *scq, int pos)
  1722. {
  1723. struct atm_vcc *vcc;
  1724. struct sk_buff *skb;
  1725. int i;
  1726. unsigned long flags;
  1727. XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
  1728. card->index, (u32) scq, pos);
  1729. if (pos >= scq->num_entries)
  1730. {
  1731. printk("nicstar%d: Bad index on drain_scq().\n", card->index);
  1732. return;
  1733. }
  1734. spin_lock_irqsave(&scq->lock, flags);
  1735. i = (int) (scq->tail - scq->base);
  1736. if (++i == scq->num_entries)
  1737. i = 0;
  1738. while (i != pos)
  1739. {
  1740. skb = scq->skb[i];
  1741. XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
  1742. card->index, (u32) skb, i);
  1743. if (skb != NULL)
  1744. {
  1745. vcc = ATM_SKB(skb)->vcc;
  1746. if (vcc && vcc->pop != NULL) {
  1747. vcc->pop(vcc, skb);
  1748. } else {
  1749. dev_kfree_skb_irq(skb);
  1750. }
  1751. scq->skb[i] = NULL;
  1752. }
  1753. if (++i == scq->num_entries)
  1754. i = 0;
  1755. }
  1756. scq->tail = scq->base + pos;
  1757. spin_unlock_irqrestore(&scq->lock, flags);
  1758. }
  1759. static void process_rsq(ns_dev *card)
  1760. {
  1761. ns_rsqe *previous;
  1762. if (!ns_rsqe_valid(card->rsq.next))
  1763. return;
  1764. do {
  1765. dequeue_rx(card, card->rsq.next);
  1766. ns_rsqe_init(card->rsq.next);
  1767. previous = card->rsq.next;
  1768. if (card->rsq.next == card->rsq.last)
  1769. card->rsq.next = card->rsq.base;
  1770. else
  1771. card->rsq.next++;
  1772. } while (ns_rsqe_valid(card->rsq.next));
  1773. writel((((u32) previous) - ((u32) card->rsq.base)),
  1774. card->membase + RSQH);
  1775. }
  1776. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
  1777. {
  1778. u32 vpi, vci;
  1779. vc_map *vc;
  1780. struct sk_buff *iovb;
  1781. struct iovec *iov;
  1782. struct atm_vcc *vcc;
  1783. struct sk_buff *skb;
  1784. unsigned short aal5_len;
  1785. int len;
  1786. u32 stat;
  1787. stat = readl(card->membase + STAT);
  1788. card->sbfqc = ns_stat_sfbqc_get(stat);
  1789. card->lbfqc = ns_stat_lfbqc_get(stat);
  1790. skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
  1791. vpi = ns_rsqe_vpi(rsqe);
  1792. vci = ns_rsqe_vci(rsqe);
  1793. if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
  1794. {
  1795. printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
  1796. card->index, vpi, vci);
  1797. recycle_rx_buf(card, skb);
  1798. return;
  1799. }
  1800. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1801. if (!vc->rx)
  1802. {
  1803. RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
  1804. card->index, vpi, vci);
  1805. recycle_rx_buf(card, skb);
  1806. return;
  1807. }
  1808. vcc = vc->rx_vcc;
  1809. if (vcc->qos.aal == ATM_AAL0)
  1810. {
  1811. struct sk_buff *sb;
  1812. unsigned char *cell;
  1813. int i;
  1814. cell = skb->data;
  1815. for (i = ns_rsqe_cellcount(rsqe); i; i--)
  1816. {
  1817. if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
  1818. {
  1819. printk("nicstar%d: Can't allocate buffers for aal0.\n",
  1820. card->index);
  1821. atomic_add(i,&vcc->stats->rx_drop);
  1822. break;
  1823. }
  1824. if (!atm_charge(vcc, sb->truesize))
  1825. {
  1826. RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
  1827. card->index);
  1828. atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
  1829. dev_kfree_skb_any(sb);
  1830. break;
  1831. }
  1832. /* Rebuild the header */
  1833. *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
  1834. (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
  1835. if (i == 1 && ns_rsqe_eopdu(rsqe))
  1836. *((u32 *) sb->data) |= 0x00000002;
  1837. skb_put(sb, NS_AAL0_HEADER);
  1838. memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
  1839. skb_put(sb, ATM_CELL_PAYLOAD);
  1840. ATM_SKB(sb)->vcc = vcc;
  1841. __net_timestamp(sb);
  1842. vcc->push(vcc, sb);
  1843. atomic_inc(&vcc->stats->rx);
  1844. cell += ATM_CELL_PAYLOAD;
  1845. }
  1846. recycle_rx_buf(card, skb);
  1847. return;
  1848. }
  1849. /* To reach this point, the AAL layer can only be AAL5 */
  1850. if ((iovb = vc->rx_iov) == NULL)
  1851. {
  1852. iovb = skb_dequeue(&(card->iovpool.queue));
  1853. if (iovb == NULL) /* No buffers in the queue */
  1854. {
  1855. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
  1856. if (iovb == NULL)
  1857. {
  1858. printk("nicstar%d: Out of iovec buffers.\n", card->index);
  1859. atomic_inc(&vcc->stats->rx_drop);
  1860. recycle_rx_buf(card, skb);
  1861. return;
  1862. }
  1863. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  1864. }
  1865. else
  1866. if (--card->iovpool.count < card->iovnr.min)
  1867. {
  1868. struct sk_buff *new_iovb;
  1869. if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
  1870. {
  1871. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  1872. skb_queue_tail(&card->iovpool.queue, new_iovb);
  1873. card->iovpool.count++;
  1874. }
  1875. }
  1876. vc->rx_iov = iovb;
  1877. NS_SKB(iovb)->iovcnt = 0;
  1878. iovb->len = 0;
  1879. iovb->data = iovb->head;
  1880. skb_reset_tail_pointer(iovb);
  1881. NS_SKB(iovb)->vcc = vcc;
  1882. /* IMPORTANT: a pointer to the sk_buff containing the small or large
  1883. buffer is stored as iovec base, NOT a pointer to the
  1884. small or large buffer itself. */
  1885. }
  1886. else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
  1887. {
  1888. printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
  1889. atomic_inc(&vcc->stats->rx_err);
  1890. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
  1891. NS_SKB(iovb)->iovcnt = 0;
  1892. iovb->len = 0;
  1893. iovb->data = iovb->head;
  1894. skb_reset_tail_pointer(iovb);
  1895. NS_SKB(iovb)->vcc = vcc;
  1896. }
  1897. iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
  1898. iov->iov_base = (void *) skb;
  1899. iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
  1900. iovb->len += iov->iov_len;
  1901. if (NS_SKB(iovb)->iovcnt == 1)
  1902. {
  1903. if (NS_SKB_CB(skb)->buf_type != BUF_SM)
  1904. {
  1905. printk("nicstar%d: Expected a small buffer, and this is not one.\n",
  1906. card->index);
  1907. which_list(card, skb);
  1908. atomic_inc(&vcc->stats->rx_err);
  1909. recycle_rx_buf(card, skb);
  1910. vc->rx_iov = NULL;
  1911. recycle_iov_buf(card, iovb);
  1912. return;
  1913. }
  1914. }
  1915. else /* NS_SKB(iovb)->iovcnt >= 2 */
  1916. {
  1917. if (NS_SKB_CB(skb)->buf_type != BUF_LG)
  1918. {
  1919. printk("nicstar%d: Expected a large buffer, and this is not one.\n",
  1920. card->index);
  1921. which_list(card, skb);
  1922. atomic_inc(&vcc->stats->rx_err);
  1923. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1924. NS_SKB(iovb)->iovcnt);
  1925. vc->rx_iov = NULL;
  1926. recycle_iov_buf(card, iovb);
  1927. return;
  1928. }
  1929. }
  1930. if (ns_rsqe_eopdu(rsqe))
  1931. {
  1932. /* This works correctly regardless of the endianness of the host */
  1933. unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
  1934. iov->iov_len - 6);
  1935. aal5_len = L1L2[0] << 8 | L1L2[1];
  1936. len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
  1937. if (ns_rsqe_crcerr(rsqe) ||
  1938. len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  1939. {
  1940. printk("nicstar%d: AAL5 CRC error", card->index);
  1941. if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  1942. printk(" - PDU size mismatch.\n");
  1943. else
  1944. printk(".\n");
  1945. atomic_inc(&vcc->stats->rx_err);
  1946. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1947. NS_SKB(iovb)->iovcnt);
  1948. vc->rx_iov = NULL;
  1949. recycle_iov_buf(card, iovb);
  1950. return;
  1951. }
  1952. /* By this point we (hopefully) have a complete SDU without errors. */
  1953. if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
  1954. {
  1955. /* skb points to a small buffer */
  1956. if (!atm_charge(vcc, skb->truesize))
  1957. {
  1958. push_rxbufs(card, skb);
  1959. atomic_inc(&vcc->stats->rx_drop);
  1960. }
  1961. else
  1962. {
  1963. skb_put(skb, len);
  1964. dequeue_sm_buf(card, skb);
  1965. #ifdef NS_USE_DESTRUCTORS
  1966. skb->destructor = ns_sb_destructor;
  1967. #endif /* NS_USE_DESTRUCTORS */
  1968. ATM_SKB(skb)->vcc = vcc;
  1969. __net_timestamp(skb);
  1970. vcc->push(vcc, skb);
  1971. atomic_inc(&vcc->stats->rx);
  1972. }
  1973. }
  1974. else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
  1975. {
  1976. struct sk_buff *sb;
  1977. sb = (struct sk_buff *) (iov - 1)->iov_base;
  1978. /* skb points to a large buffer */
  1979. if (len <= NS_SMBUFSIZE)
  1980. {
  1981. if (!atm_charge(vcc, sb->truesize))
  1982. {
  1983. push_rxbufs(card, sb);
  1984. atomic_inc(&vcc->stats->rx_drop);
  1985. }
  1986. else
  1987. {
  1988. skb_put(sb, len);
  1989. dequeue_sm_buf(card, sb);
  1990. #ifdef NS_USE_DESTRUCTORS
  1991. sb->destructor = ns_sb_destructor;
  1992. #endif /* NS_USE_DESTRUCTORS */
  1993. ATM_SKB(sb)->vcc = vcc;
  1994. __net_timestamp(sb);
  1995. vcc->push(vcc, sb);
  1996. atomic_inc(&vcc->stats->rx);
  1997. }
  1998. push_rxbufs(card, skb);
  1999. }
  2000. else /* len > NS_SMBUFSIZE, the usual case */
  2001. {
  2002. if (!atm_charge(vcc, skb->truesize))
  2003. {
  2004. push_rxbufs(card, skb);
  2005. atomic_inc(&vcc->stats->rx_drop);
  2006. }
  2007. else
  2008. {
  2009. dequeue_lg_buf(card, skb);
  2010. #ifdef NS_USE_DESTRUCTORS
  2011. skb->destructor = ns_lb_destructor;
  2012. #endif /* NS_USE_DESTRUCTORS */
  2013. skb_push(skb, NS_SMBUFSIZE);
  2014. skb_copy_from_linear_data(sb, skb->data, NS_SMBUFSIZE);
  2015. skb_put(skb, len - NS_SMBUFSIZE);
  2016. ATM_SKB(skb)->vcc = vcc;
  2017. __net_timestamp(skb);
  2018. vcc->push(vcc, skb);
  2019. atomic_inc(&vcc->stats->rx);
  2020. }
  2021. push_rxbufs(card, sb);
  2022. }
  2023. }
  2024. else /* Must push a huge buffer */
  2025. {
  2026. struct sk_buff *hb, *sb, *lb;
  2027. int remaining, tocopy;
  2028. int j;
  2029. hb = skb_dequeue(&(card->hbpool.queue));
  2030. if (hb == NULL) /* No buffers in the queue */
  2031. {
  2032. hb = dev_alloc_skb(NS_HBUFSIZE);
  2033. if (hb == NULL)
  2034. {
  2035. printk("nicstar%d: Out of huge buffers.\n", card->index);
  2036. atomic_inc(&vcc->stats->rx_drop);
  2037. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2038. NS_SKB(iovb)->iovcnt);
  2039. vc->rx_iov = NULL;
  2040. recycle_iov_buf(card, iovb);
  2041. return;
  2042. }
  2043. else if (card->hbpool.count < card->hbnr.min)
  2044. {
  2045. struct sk_buff *new_hb;
  2046. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2047. {
  2048. skb_queue_tail(&card->hbpool.queue, new_hb);
  2049. card->hbpool.count++;
  2050. }
  2051. }
  2052. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2053. }
  2054. else
  2055. if (--card->hbpool.count < card->hbnr.min)
  2056. {
  2057. struct sk_buff *new_hb;
  2058. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2059. {
  2060. NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
  2061. skb_queue_tail(&card->hbpool.queue, new_hb);
  2062. card->hbpool.count++;
  2063. }
  2064. if (card->hbpool.count < card->hbnr.min)
  2065. {
  2066. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2067. {
  2068. NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
  2069. skb_queue_tail(&card->hbpool.queue, new_hb);
  2070. card->hbpool.count++;
  2071. }
  2072. }
  2073. }
  2074. iov = (struct iovec *) iovb->data;
  2075. if (!atm_charge(vcc, hb->truesize))
  2076. {
  2077. recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
  2078. if (card->hbpool.count < card->hbnr.max)
  2079. {
  2080. skb_queue_tail(&card->hbpool.queue, hb);
  2081. card->hbpool.count++;
  2082. }
  2083. else
  2084. dev_kfree_skb_any(hb);
  2085. atomic_inc(&vcc->stats->rx_drop);
  2086. }
  2087. else
  2088. {
  2089. /* Copy the small buffer to the huge buffer */
  2090. sb = (struct sk_buff *) iov->iov_base;
  2091. skb_copy_from_linear_data(sb, hb->data, iov->iov_len);
  2092. skb_put(hb, iov->iov_len);
  2093. remaining = len - iov->iov_len;
  2094. iov++;
  2095. /* Free the small buffer */
  2096. push_rxbufs(card, sb);
  2097. /* Copy all large buffers to the huge buffer and free them */
  2098. for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
  2099. {
  2100. lb = (struct sk_buff *) iov->iov_base;
  2101. tocopy = min_t(int, remaining, iov->iov_len);
  2102. skb_copy_from_linear_data(lb, skb_tail_pointer(hb), tocopy);
  2103. skb_put(hb, tocopy);
  2104. iov++;
  2105. remaining -= tocopy;
  2106. push_rxbufs(card, lb);
  2107. }
  2108. #ifdef EXTRA_DEBUG
  2109. if (remaining != 0 || hb->len != len)
  2110. printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
  2111. #endif /* EXTRA_DEBUG */
  2112. ATM_SKB(hb)->vcc = vcc;
  2113. #ifdef NS_USE_DESTRUCTORS
  2114. hb->destructor = ns_hb_destructor;
  2115. #endif /* NS_USE_DESTRUCTORS */
  2116. __net_timestamp(hb);
  2117. vcc->push(vcc, hb);
  2118. atomic_inc(&vcc->stats->rx);
  2119. }
  2120. }
  2121. vc->rx_iov = NULL;
  2122. recycle_iov_buf(card, iovb);
  2123. }
  2124. }
  2125. #ifdef NS_USE_DESTRUCTORS
  2126. static void ns_sb_destructor(struct sk_buff *sb)
  2127. {
  2128. ns_dev *card;
  2129. u32 stat;
  2130. card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
  2131. stat = readl(card->membase + STAT);
  2132. card->sbfqc = ns_stat_sfbqc_get(stat);
  2133. card->lbfqc = ns_stat_lfbqc_get(stat);
  2134. do
  2135. {
  2136. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2137. if (sb == NULL)
  2138. break;
  2139. NS_SKB_CB(sb)->buf_type = BUF_SM;
  2140. skb_queue_tail(&card->sbpool.queue, sb);
  2141. skb_reserve(sb, NS_AAL0_HEADER);
  2142. push_rxbufs(card, sb);
  2143. } while (card->sbfqc < card->sbnr.min);
  2144. }
  2145. static void ns_lb_destructor(struct sk_buff *lb)
  2146. {
  2147. ns_dev *card;
  2148. u32 stat;
  2149. card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
  2150. stat = readl(card->membase + STAT);
  2151. card->sbfqc = ns_stat_sfbqc_get(stat);
  2152. card->lbfqc = ns_stat_lfbqc_get(stat);
  2153. do
  2154. {
  2155. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2156. if (lb == NULL)
  2157. break;
  2158. NS_SKB_CB(lb)->buf_type = BUF_LG;
  2159. skb_queue_tail(&card->lbpool.queue, lb);
  2160. skb_reserve(lb, NS_SMBUFSIZE);
  2161. push_rxbufs(card, lb);
  2162. } while (card->lbfqc < card->lbnr.min);
  2163. }
  2164. static void ns_hb_destructor(struct sk_buff *hb)
  2165. {
  2166. ns_dev *card;
  2167. card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
  2168. while (card->hbpool.count < card->hbnr.init)
  2169. {
  2170. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2171. if (hb == NULL)
  2172. break;
  2173. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2174. skb_queue_tail(&card->hbpool.queue, hb);
  2175. card->hbpool.count++;
  2176. }
  2177. }
  2178. #endif /* NS_USE_DESTRUCTORS */
  2179. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
  2180. {
  2181. struct ns_skb_cb *cb = NS_SKB_CB(skb);
  2182. if (unlikely(cb->buf_type == BUF_NONE)) {
  2183. printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
  2184. dev_kfree_skb_any(skb);
  2185. } else
  2186. push_rxbufs(card, skb);
  2187. }
  2188. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
  2189. {
  2190. while (count-- > 0)
  2191. recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base);
  2192. }
  2193. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
  2194. {
  2195. if (card->iovpool.count < card->iovnr.max)
  2196. {
  2197. skb_queue_tail(&card->iovpool.queue, iovb);
  2198. card->iovpool.count++;
  2199. }
  2200. else
  2201. dev_kfree_skb_any(iovb);
  2202. }
  2203. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
  2204. {
  2205. skb_unlink(sb, &card->sbpool.queue);
  2206. #ifdef NS_USE_DESTRUCTORS
  2207. if (card->sbfqc < card->sbnr.min)
  2208. #else
  2209. if (card->sbfqc < card->sbnr.init)
  2210. {
  2211. struct sk_buff *new_sb;
  2212. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2213. {
  2214. NS_SKB_CB(new_sb)->buf_type = BUF_SM;
  2215. skb_queue_tail(&card->sbpool.queue, new_sb);
  2216. skb_reserve(new_sb, NS_AAL0_HEADER);
  2217. push_rxbufs(card, new_sb);
  2218. }
  2219. }
  2220. if (card->sbfqc < card->sbnr.init)
  2221. #endif /* NS_USE_DESTRUCTORS */
  2222. {
  2223. struct sk_buff *new_sb;
  2224. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2225. {
  2226. NS_SKB_CB(new_sb)->buf_type = BUF_SM;
  2227. skb_queue_tail(&card->sbpool.queue, new_sb);
  2228. skb_reserve(new_sb, NS_AAL0_HEADER);
  2229. push_rxbufs(card, new_sb);
  2230. }
  2231. }
  2232. }
  2233. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
  2234. {
  2235. skb_unlink(lb, &card->lbpool.queue);
  2236. #ifdef NS_USE_DESTRUCTORS
  2237. if (card->lbfqc < card->lbnr.min)
  2238. #else
  2239. if (card->lbfqc < card->lbnr.init)
  2240. {
  2241. struct sk_buff *new_lb;
  2242. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2243. {
  2244. NS_SKB_CB(new_lb)->buf_type = BUF_LG;
  2245. skb_queue_tail(&card->lbpool.queue, new_lb);
  2246. skb_reserve(new_lb, NS_SMBUFSIZE);
  2247. push_rxbufs(card, new_lb);
  2248. }
  2249. }
  2250. if (card->lbfqc < card->lbnr.init)
  2251. #endif /* NS_USE_DESTRUCTORS */
  2252. {
  2253. struct sk_buff *new_lb;
  2254. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2255. {
  2256. NS_SKB_CB(new_lb)->buf_type = BUF_LG;
  2257. skb_queue_tail(&card->lbpool.queue, new_lb);
  2258. skb_reserve(new_lb, NS_SMBUFSIZE);
  2259. push_rxbufs(card, new_lb);
  2260. }
  2261. }
  2262. }
  2263. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
  2264. {
  2265. u32 stat;
  2266. ns_dev *card;
  2267. int left;
  2268. left = (int) *pos;
  2269. card = (ns_dev *) dev->dev_data;
  2270. stat = readl(card->membase + STAT);
  2271. if (!left--)
  2272. return sprintf(page, "Pool count min init max \n");
  2273. if (!left--)
  2274. return sprintf(page, "Small %5d %5d %5d %5d \n",
  2275. ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
  2276. card->sbnr.max);
  2277. if (!left--)
  2278. return sprintf(page, "Large %5d %5d %5d %5d \n",
  2279. ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
  2280. card->lbnr.max);
  2281. if (!left--)
  2282. return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
  2283. card->hbnr.min, card->hbnr.init, card->hbnr.max);
  2284. if (!left--)
  2285. return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
  2286. card->iovnr.min, card->iovnr.init, card->iovnr.max);
  2287. if (!left--)
  2288. {
  2289. int retval;
  2290. retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
  2291. card->intcnt = 0;
  2292. return retval;
  2293. }
  2294. #if 0
  2295. /* Dump 25.6 Mbps PHY registers */
  2296. /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
  2297. here just in case it's needed for debugging. */
  2298. if (card->max_pcr == ATM_25_PCR && !left--)
  2299. {
  2300. u32 phy_regs[4];
  2301. u32 i;
  2302. for (i = 0; i < 4; i++)
  2303. {
  2304. while (CMD_BUSY(card));
  2305. writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
  2306. while (CMD_BUSY(card));
  2307. phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
  2308. }
  2309. return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
  2310. phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
  2311. }
  2312. #endif /* 0 - Dump 25.6 Mbps PHY registers */
  2313. #if 0
  2314. /* Dump TST */
  2315. if (left-- < NS_TST_NUM_ENTRIES)
  2316. {
  2317. if (card->tste2vc[left + 1] == NULL)
  2318. return sprintf(page, "%5d - VBR/UBR \n", left + 1);
  2319. else
  2320. return sprintf(page, "%5d - %d %d \n", left + 1,
  2321. card->tste2vc[left + 1]->tx_vcc->vpi,
  2322. card->tste2vc[left + 1]->tx_vcc->vci);
  2323. }
  2324. #endif /* 0 */
  2325. return 0;
  2326. }
  2327. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
  2328. {
  2329. ns_dev *card;
  2330. pool_levels pl;
  2331. long btype;
  2332. unsigned long flags;
  2333. card = dev->dev_data;
  2334. switch (cmd)
  2335. {
  2336. case NS_GETPSTAT:
  2337. if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
  2338. return -EFAULT;
  2339. switch (pl.buftype)
  2340. {
  2341. case NS_BUFTYPE_SMALL:
  2342. pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
  2343. pl.level.min = card->sbnr.min;
  2344. pl.level.init = card->sbnr.init;
  2345. pl.level.max = card->sbnr.max;
  2346. break;
  2347. case NS_BUFTYPE_LARGE:
  2348. pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
  2349. pl.level.min = card->lbnr.min;
  2350. pl.level.init = card->lbnr.init;
  2351. pl.level.max = card->lbnr.max;
  2352. break;
  2353. case NS_BUFTYPE_HUGE:
  2354. pl.count = card->hbpool.count;
  2355. pl.level.min = card->hbnr.min;
  2356. pl.level.init = card->hbnr.init;
  2357. pl.level.max = card->hbnr.max;
  2358. break;
  2359. case NS_BUFTYPE_IOVEC:
  2360. pl.count = card->iovpool.count;
  2361. pl.level.min = card->iovnr.min;
  2362. pl.level.init = card->iovnr.init;
  2363. pl.level.max = card->iovnr.max;
  2364. break;
  2365. default:
  2366. return -ENOIOCTLCMD;
  2367. }
  2368. if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
  2369. return (sizeof(pl));
  2370. else
  2371. return -EFAULT;
  2372. case NS_SETBUFLEV:
  2373. if (!capable(CAP_NET_ADMIN))
  2374. return -EPERM;
  2375. if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
  2376. return -EFAULT;
  2377. if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
  2378. return -EINVAL;
  2379. if (pl.level.min == 0)
  2380. return -EINVAL;
  2381. switch (pl.buftype)
  2382. {
  2383. case NS_BUFTYPE_SMALL:
  2384. if (pl.level.max > TOP_SB)
  2385. return -EINVAL;
  2386. card->sbnr.min = pl.level.min;
  2387. card->sbnr.init = pl.level.init;
  2388. card->sbnr.max = pl.level.max;
  2389. break;
  2390. case NS_BUFTYPE_LARGE:
  2391. if (pl.level.max > TOP_LB)
  2392. return -EINVAL;
  2393. card->lbnr.min = pl.level.min;
  2394. card->lbnr.init = pl.level.init;
  2395. card->lbnr.max = pl.level.max;
  2396. break;
  2397. case NS_BUFTYPE_HUGE:
  2398. if (pl.level.max > TOP_HB)
  2399. return -EINVAL;
  2400. card->hbnr.min = pl.level.min;
  2401. card->hbnr.init = pl.level.init;
  2402. card->hbnr.max = pl.level.max;
  2403. break;
  2404. case NS_BUFTYPE_IOVEC:
  2405. if (pl.level.max > TOP_IOVB)
  2406. return -EINVAL;
  2407. card->iovnr.min = pl.level.min;
  2408. card->iovnr.init = pl.level.init;
  2409. card->iovnr.max = pl.level.max;
  2410. break;
  2411. default:
  2412. return -EINVAL;
  2413. }
  2414. return 0;
  2415. case NS_ADJBUFLEV:
  2416. if (!capable(CAP_NET_ADMIN))
  2417. return -EPERM;
  2418. btype = (long) arg; /* a long is the same size as a pointer or bigger */
  2419. switch (btype)
  2420. {
  2421. case NS_BUFTYPE_SMALL:
  2422. while (card->sbfqc < card->sbnr.init)
  2423. {
  2424. struct sk_buff *sb;
  2425. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2426. if (sb == NULL)
  2427. return -ENOMEM;
  2428. NS_SKB_CB(sb)->buf_type = BUF_SM;
  2429. skb_queue_tail(&card->sbpool.queue, sb);
  2430. skb_reserve(sb, NS_AAL0_HEADER);
  2431. push_rxbufs(card, sb);
  2432. }
  2433. break;
  2434. case NS_BUFTYPE_LARGE:
  2435. while (card->lbfqc < card->lbnr.init)
  2436. {
  2437. struct sk_buff *lb;
  2438. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2439. if (lb == NULL)
  2440. return -ENOMEM;
  2441. NS_SKB_CB(lb)->buf_type = BUF_LG;
  2442. skb_queue_tail(&card->lbpool.queue, lb);
  2443. skb_reserve(lb, NS_SMBUFSIZE);
  2444. push_rxbufs(card, lb);
  2445. }
  2446. break;
  2447. case NS_BUFTYPE_HUGE:
  2448. while (card->hbpool.count > card->hbnr.init)
  2449. {
  2450. struct sk_buff *hb;
  2451. spin_lock_irqsave(&card->int_lock, flags);
  2452. hb = skb_dequeue(&card->hbpool.queue);
  2453. card->hbpool.count--;
  2454. spin_unlock_irqrestore(&card->int_lock, flags);
  2455. if (hb == NULL)
  2456. printk("nicstar%d: huge buffer count inconsistent.\n",
  2457. card->index);
  2458. else
  2459. dev_kfree_skb_any(hb);
  2460. }
  2461. while (card->hbpool.count < card->hbnr.init)
  2462. {
  2463. struct sk_buff *hb;
  2464. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2465. if (hb == NULL)
  2466. return -ENOMEM;
  2467. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2468. spin_lock_irqsave(&card->int_lock, flags);
  2469. skb_queue_tail(&card->hbpool.queue, hb);
  2470. card->hbpool.count++;
  2471. spin_unlock_irqrestore(&card->int_lock, flags);
  2472. }
  2473. break;
  2474. case NS_BUFTYPE_IOVEC:
  2475. while (card->iovpool.count > card->iovnr.init)
  2476. {
  2477. struct sk_buff *iovb;
  2478. spin_lock_irqsave(&card->int_lock, flags);
  2479. iovb = skb_dequeue(&card->iovpool.queue);
  2480. card->iovpool.count--;
  2481. spin_unlock_irqrestore(&card->int_lock, flags);
  2482. if (iovb == NULL)
  2483. printk("nicstar%d: iovec buffer count inconsistent.\n",
  2484. card->index);
  2485. else
  2486. dev_kfree_skb_any(iovb);
  2487. }
  2488. while (card->iovpool.count < card->iovnr.init)
  2489. {
  2490. struct sk_buff *iovb;
  2491. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  2492. if (iovb == NULL)
  2493. return -ENOMEM;
  2494. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  2495. spin_lock_irqsave(&card->int_lock, flags);
  2496. skb_queue_tail(&card->iovpool.queue, iovb);
  2497. card->iovpool.count++;
  2498. spin_unlock_irqrestore(&card->int_lock, flags);
  2499. }
  2500. break;
  2501. default:
  2502. return -EINVAL;
  2503. }
  2504. return 0;
  2505. default:
  2506. if (dev->phy && dev->phy->ioctl) {
  2507. return dev->phy->ioctl(dev, cmd, arg);
  2508. }
  2509. else {
  2510. printk("nicstar%d: %s == NULL \n", card->index,
  2511. dev->phy ? "dev->phy->ioctl" : "dev->phy");
  2512. return -ENOIOCTLCMD;
  2513. }
  2514. }
  2515. }
  2516. static void which_list(ns_dev *card, struct sk_buff *skb)
  2517. {
  2518. printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type);
  2519. }
  2520. static void ns_poll(unsigned long arg)
  2521. {
  2522. int i;
  2523. ns_dev *card;
  2524. unsigned long flags;
  2525. u32 stat_r, stat_w;
  2526. PRINTK("nicstar: Entering ns_poll().\n");
  2527. for (i = 0; i < num_cards; i++)
  2528. {
  2529. card = cards[i];
  2530. if (spin_is_locked(&card->int_lock)) {
  2531. /* Probably it isn't worth spinning */
  2532. continue;
  2533. }
  2534. spin_lock_irqsave(&card->int_lock, flags);
  2535. stat_w = 0;
  2536. stat_r = readl(card->membase + STAT);
  2537. if (stat_r & NS_STAT_TSIF)
  2538. stat_w |= NS_STAT_TSIF;
  2539. if (stat_r & NS_STAT_EOPDU)
  2540. stat_w |= NS_STAT_EOPDU;
  2541. process_tsq(card);
  2542. process_rsq(card);
  2543. writel(stat_w, card->membase + STAT);
  2544. spin_unlock_irqrestore(&card->int_lock, flags);
  2545. }
  2546. mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
  2547. PRINTK("nicstar: Leaving ns_poll().\n");
  2548. }
  2549. static int ns_parse_mac(char *mac, unsigned char *esi)
  2550. {
  2551. int i, j;
  2552. short byte1, byte0;
  2553. if (mac == NULL || esi == NULL)
  2554. return -1;
  2555. j = 0;
  2556. for (i = 0; i < 6; i++)
  2557. {
  2558. if ((byte1 = ns_h2i(mac[j++])) < 0)
  2559. return -1;
  2560. if ((byte0 = ns_h2i(mac[j++])) < 0)
  2561. return -1;
  2562. esi[i] = (unsigned char) (byte1 * 16 + byte0);
  2563. if (i < 5)
  2564. {
  2565. if (mac[j++] != ':')
  2566. return -1;
  2567. }
  2568. }
  2569. return 0;
  2570. }
  2571. static short ns_h2i(char c)
  2572. {
  2573. if (c >= '0' && c <= '9')
  2574. return (short) (c - '0');
  2575. if (c >= 'A' && c <= 'F')
  2576. return (short) (c - 'A' + 10);
  2577. if (c >= 'a' && c <= 'f')
  2578. return (short) (c - 'a' + 10);
  2579. return -1;
  2580. }
  2581. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  2582. unsigned long addr)
  2583. {
  2584. ns_dev *card;
  2585. unsigned long flags;
  2586. card = dev->dev_data;
  2587. spin_lock_irqsave(&card->res_lock, flags);
  2588. while(CMD_BUSY(card));
  2589. writel((unsigned long) value, card->membase + DR0);
  2590. writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2591. card->membase + CMD);
  2592. spin_unlock_irqrestore(&card->res_lock, flags);
  2593. }
  2594. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
  2595. {
  2596. ns_dev *card;
  2597. unsigned long flags;
  2598. unsigned long data;
  2599. card = dev->dev_data;
  2600. spin_lock_irqsave(&card->res_lock, flags);
  2601. while(CMD_BUSY(card));
  2602. writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2603. card->membase + CMD);
  2604. while(CMD_BUSY(card));
  2605. data = readl(card->membase + DR0) & 0x000000FF;
  2606. spin_unlock_irqrestore(&card->res_lock, flags);
  2607. return (unsigned char) data;
  2608. }
  2609. module_init(nicstar_init);
  2610. module_exit(nicstar_cleanup);