init.c 40 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/export.h>
  19. #include <linux/of.h>
  20. #include <linux/mmc/sdio_func.h>
  21. #include "core.h"
  22. #include "cfg80211.h"
  23. #include "target.h"
  24. #include "debug.h"
  25. #include "hif-ops.h"
  26. static unsigned int testmode;
  27. module_param(testmode, uint, 0644);
  28. static const struct ath6kl_hw hw_list[] = {
  29. {
  30. .id = AR6003_HW_2_0_VERSION,
  31. .name = "ar6003 hw 2.0",
  32. .dataset_patch_addr = 0x57e884,
  33. .app_load_addr = 0x543180,
  34. .board_ext_data_addr = 0x57e500,
  35. .reserved_ram_size = 6912,
  36. .refclk_hz = 26000000,
  37. .uarttx_pin = 8,
  38. /* hw2.0 needs override address hardcoded */
  39. .app_start_override_addr = 0x944C00,
  40. .fw = {
  41. .dir = AR6003_HW_2_0_FW_DIR,
  42. .otp = AR6003_HW_2_0_OTP_FILE,
  43. .fw = AR6003_HW_2_0_FIRMWARE_FILE,
  44. .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  45. .patch = AR6003_HW_2_0_PATCH_FILE,
  46. },
  47. .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
  48. .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  49. },
  50. {
  51. .id = AR6003_HW_2_1_1_VERSION,
  52. .name = "ar6003 hw 2.1.1",
  53. .dataset_patch_addr = 0x57ff74,
  54. .app_load_addr = 0x1234,
  55. .board_ext_data_addr = 0x542330,
  56. .reserved_ram_size = 512,
  57. .refclk_hz = 26000000,
  58. .uarttx_pin = 8,
  59. .testscript_addr = 0x57ef74,
  60. .fw = {
  61. .dir = AR6003_HW_2_1_1_FW_DIR,
  62. .otp = AR6003_HW_2_1_1_OTP_FILE,
  63. .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
  64. .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  65. .patch = AR6003_HW_2_1_1_PATCH_FILE,
  66. .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
  67. .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
  68. },
  69. .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  70. .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  71. },
  72. {
  73. .id = AR6004_HW_1_0_VERSION,
  74. .name = "ar6004 hw 1.0",
  75. .dataset_patch_addr = 0x57e884,
  76. .app_load_addr = 0x1234,
  77. .board_ext_data_addr = 0x437000,
  78. .reserved_ram_size = 19456,
  79. .board_addr = 0x433900,
  80. .refclk_hz = 26000000,
  81. .uarttx_pin = 11,
  82. .fw = {
  83. .dir = AR6004_HW_1_0_FW_DIR,
  84. .fw = AR6004_HW_1_0_FIRMWARE_FILE,
  85. },
  86. .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
  87. .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
  88. },
  89. {
  90. .id = AR6004_HW_1_1_VERSION,
  91. .name = "ar6004 hw 1.1",
  92. .dataset_patch_addr = 0x57e884,
  93. .app_load_addr = 0x1234,
  94. .board_ext_data_addr = 0x437000,
  95. .reserved_ram_size = 11264,
  96. .board_addr = 0x43d400,
  97. .refclk_hz = 40000000,
  98. .uarttx_pin = 11,
  99. .fw = {
  100. .dir = AR6004_HW_1_1_FW_DIR,
  101. .fw = AR6004_HW_1_1_FIRMWARE_FILE,
  102. },
  103. .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
  104. .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
  105. },
  106. };
  107. /*
  108. * Include definitions here that can be used to tune the WLAN module
  109. * behavior. Different customers can tune the behavior as per their needs,
  110. * here.
  111. */
  112. /*
  113. * This configuration item enable/disable keepalive support.
  114. * Keepalive support: In the absence of any data traffic to AP, null
  115. * frames will be sent to the AP at periodic interval, to keep the association
  116. * active. This configuration item defines the periodic interval.
  117. * Use value of zero to disable keepalive support
  118. * Default: 60 seconds
  119. */
  120. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  121. /*
  122. * This configuration item sets the value of disconnect timeout
  123. * Firmware delays sending the disconnec event to the host for this
  124. * timeout after is gets disconnected from the current AP.
  125. * If the firmware successly roams within the disconnect timeout
  126. * it sends a new connect event
  127. */
  128. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  129. #define ATH6KL_DATA_OFFSET 64
  130. struct sk_buff *ath6kl_buf_alloc(int size)
  131. {
  132. struct sk_buff *skb;
  133. u16 reserved;
  134. /* Add chacheline space at front and back of buffer */
  135. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  136. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  137. skb = dev_alloc_skb(size + reserved);
  138. if (skb)
  139. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  140. return skb;
  141. }
  142. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  143. {
  144. vif->ssid_len = 0;
  145. memset(vif->ssid, 0, sizeof(vif->ssid));
  146. vif->dot11_auth_mode = OPEN_AUTH;
  147. vif->auth_mode = NONE_AUTH;
  148. vif->prwise_crypto = NONE_CRYPT;
  149. vif->prwise_crypto_len = 0;
  150. vif->grp_crypto = NONE_CRYPT;
  151. vif->grp_crypto_len = 0;
  152. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  153. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  154. memset(vif->bssid, 0, sizeof(vif->bssid));
  155. vif->bss_ch = 0;
  156. }
  157. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  158. {
  159. u32 address, data;
  160. struct host_app_area host_app_area;
  161. /* Fetch the address of the host_app_area_s
  162. * instance in the host interest area */
  163. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  164. address = TARG_VTOP(ar->target_type, address);
  165. if (ath6kl_diag_read32(ar, address, &data))
  166. return -EIO;
  167. address = TARG_VTOP(ar->target_type, data);
  168. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  169. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  170. sizeof(struct host_app_area)))
  171. return -EIO;
  172. return 0;
  173. }
  174. static inline void set_ac2_ep_map(struct ath6kl *ar,
  175. u8 ac,
  176. enum htc_endpoint_id ep)
  177. {
  178. ar->ac2ep_map[ac] = ep;
  179. ar->ep2ac_map[ep] = ac;
  180. }
  181. /* connect to a service */
  182. static int ath6kl_connectservice(struct ath6kl *ar,
  183. struct htc_service_connect_req *con_req,
  184. char *desc)
  185. {
  186. int status;
  187. struct htc_service_connect_resp response;
  188. memset(&response, 0, sizeof(response));
  189. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  190. if (status) {
  191. ath6kl_err("failed to connect to %s service status:%d\n",
  192. desc, status);
  193. return status;
  194. }
  195. switch (con_req->svc_id) {
  196. case WMI_CONTROL_SVC:
  197. if (test_bit(WMI_ENABLED, &ar->flag))
  198. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  199. ar->ctrl_ep = response.endpoint;
  200. break;
  201. case WMI_DATA_BE_SVC:
  202. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  203. break;
  204. case WMI_DATA_BK_SVC:
  205. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  206. break;
  207. case WMI_DATA_VI_SVC:
  208. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  209. break;
  210. case WMI_DATA_VO_SVC:
  211. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  212. break;
  213. default:
  214. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  215. return -EINVAL;
  216. }
  217. return 0;
  218. }
  219. static int ath6kl_init_service_ep(struct ath6kl *ar)
  220. {
  221. struct htc_service_connect_req connect;
  222. memset(&connect, 0, sizeof(connect));
  223. /* these fields are the same for all service endpoints */
  224. connect.ep_cb.rx = ath6kl_rx;
  225. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  226. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  227. /*
  228. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  229. * gets called.
  230. */
  231. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  232. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  233. if (!connect.ep_cb.rx_refill_thresh)
  234. connect.ep_cb.rx_refill_thresh++;
  235. /* connect to control service */
  236. connect.svc_id = WMI_CONTROL_SVC;
  237. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  238. return -EIO;
  239. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  240. /*
  241. * Limit the HTC message size on the send path, although e can
  242. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  243. * (802.3) frames on the send path.
  244. */
  245. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  246. /*
  247. * To reduce the amount of committed memory for larger A_MSDU
  248. * frames, use the recv-alloc threshold mechanism for larger
  249. * packets.
  250. */
  251. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  252. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  253. /*
  254. * For the remaining data services set the connection flag to
  255. * reduce dribbling, if configured to do so.
  256. */
  257. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  258. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  259. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  260. connect.svc_id = WMI_DATA_BE_SVC;
  261. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  262. return -EIO;
  263. /* connect to back-ground map this to WMI LOW_PRI */
  264. connect.svc_id = WMI_DATA_BK_SVC;
  265. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  266. return -EIO;
  267. /* connect to Video service, map this to to HI PRI */
  268. connect.svc_id = WMI_DATA_VI_SVC;
  269. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  270. return -EIO;
  271. /*
  272. * Connect to VO service, this is currently not mapped to a WMI
  273. * priority stream due to historical reasons. WMI originally
  274. * defined 3 priorities over 3 mailboxes We can change this when
  275. * WMI is reworked so that priorities are not dependent on
  276. * mailboxes.
  277. */
  278. connect.svc_id = WMI_DATA_VO_SVC;
  279. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  280. return -EIO;
  281. return 0;
  282. }
  283. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  284. {
  285. ath6kl_init_profile_info(vif);
  286. vif->def_txkey_index = 0;
  287. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  288. vif->ch_hint = 0;
  289. }
  290. /*
  291. * Set HTC/Mbox operational parameters, this can only be called when the
  292. * target is in the BMI phase.
  293. */
  294. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  295. u8 htc_ctrl_buf)
  296. {
  297. int status;
  298. u32 blk_size;
  299. blk_size = ar->mbox_info.block_size;
  300. if (htc_ctrl_buf)
  301. blk_size |= ((u32)htc_ctrl_buf) << 16;
  302. /* set the host interest area for the block size */
  303. status = ath6kl_bmi_write(ar,
  304. ath6kl_get_hi_item_addr(ar,
  305. HI_ITEM(hi_mbox_io_block_sz)),
  306. (u8 *)&blk_size,
  307. 4);
  308. if (status) {
  309. ath6kl_err("bmi_write_memory for IO block size failed\n");
  310. goto out;
  311. }
  312. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  313. blk_size,
  314. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  315. if (mbox_isr_yield_val) {
  316. /* set the host interest area for the mbox ISR yield limit */
  317. status = ath6kl_bmi_write(ar,
  318. ath6kl_get_hi_item_addr(ar,
  319. HI_ITEM(hi_mbox_isr_yield_limit)),
  320. (u8 *)&mbox_isr_yield_val,
  321. 4);
  322. if (status) {
  323. ath6kl_err("bmi_write_memory for yield limit failed\n");
  324. goto out;
  325. }
  326. }
  327. out:
  328. return status;
  329. }
  330. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  331. {
  332. int status = 0;
  333. int ret;
  334. /*
  335. * Configure the device for rx dot11 header rules. "0,0" are the
  336. * default values. Required if checksum offload is needed. Set
  337. * RxMetaVersion to 2.
  338. */
  339. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  340. ar->rx_meta_ver, 0, 0)) {
  341. ath6kl_err("unable to set the rx frame format\n");
  342. status = -EIO;
  343. }
  344. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  345. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  346. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  347. ath6kl_err("unable to set power save fail event policy\n");
  348. status = -EIO;
  349. }
  350. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  351. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  352. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  353. ath6kl_err("unable to set barker preamble policy\n");
  354. status = -EIO;
  355. }
  356. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  357. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  358. ath6kl_err("unable to set keep alive interval\n");
  359. status = -EIO;
  360. }
  361. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  362. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  363. ath6kl_err("unable to set disconnect timeout\n");
  364. status = -EIO;
  365. }
  366. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  367. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  368. ath6kl_err("unable to set txop bursting\n");
  369. status = -EIO;
  370. }
  371. if (ar->p2p && (ar->vif_max == 1 || idx)) {
  372. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  373. P2P_FLAG_CAPABILITIES_REQ |
  374. P2P_FLAG_MACADDR_REQ |
  375. P2P_FLAG_HMODEL_REQ);
  376. if (ret) {
  377. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  378. "capabilities (%d) - assuming P2P not "
  379. "supported\n", ret);
  380. ar->p2p = false;
  381. }
  382. }
  383. if (ar->p2p && (ar->vif_max == 1 || idx)) {
  384. /* Enable Probe Request reporting for P2P */
  385. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  386. if (ret) {
  387. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  388. "Request reporting (%d)\n", ret);
  389. }
  390. }
  391. return status;
  392. }
  393. int ath6kl_configure_target(struct ath6kl *ar)
  394. {
  395. u32 param, ram_reserved_size;
  396. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  397. int i, status;
  398. param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
  399. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  400. HI_ITEM(hi_serial_enable)), (u8 *)&param, 4)) {
  401. ath6kl_err("bmi_write_memory for uart debug failed\n");
  402. return -EIO;
  403. }
  404. /*
  405. * Note: Even though the firmware interface type is
  406. * chosen as BSS_STA for all three interfaces, can
  407. * be configured to IBSS/AP as long as the fw submode
  408. * remains normal mode (0 - AP, STA and IBSS). But
  409. * due to an target assert in firmware only one interface is
  410. * configured for now.
  411. */
  412. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  413. for (i = 0; i < ar->vif_max; i++)
  414. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  415. /*
  416. * By default, submodes :
  417. * vif[0] - AP/STA/IBSS
  418. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  419. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  420. */
  421. for (i = 0; i < ar->max_norm_iface; i++)
  422. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  423. (i * HI_OPTION_FW_SUBMODE_BITS);
  424. for (i = ar->max_norm_iface; i < ar->vif_max; i++)
  425. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  426. (i * HI_OPTION_FW_SUBMODE_BITS);
  427. if (ar->p2p && ar->vif_max == 1)
  428. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  429. param = HTC_PROTOCOL_VERSION;
  430. if (ath6kl_bmi_write(ar,
  431. ath6kl_get_hi_item_addr(ar,
  432. HI_ITEM(hi_app_host_interest)),
  433. (u8 *)&param, 4) != 0) {
  434. ath6kl_err("bmi_write_memory for htc version failed\n");
  435. return -EIO;
  436. }
  437. /* set the firmware mode to STA/IBSS/AP */
  438. param = 0;
  439. if (ath6kl_bmi_read(ar,
  440. ath6kl_get_hi_item_addr(ar,
  441. HI_ITEM(hi_option_flag)),
  442. (u8 *)&param, 4) != 0) {
  443. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  444. return -EIO;
  445. }
  446. param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
  447. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  448. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  449. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  450. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  451. if (ath6kl_bmi_write(ar,
  452. ath6kl_get_hi_item_addr(ar,
  453. HI_ITEM(hi_option_flag)),
  454. (u8 *)&param,
  455. 4) != 0) {
  456. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  457. return -EIO;
  458. }
  459. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  460. /*
  461. * Hardcode the address use for the extended board data
  462. * Ideally this should be pre-allocate by the OS at boot time
  463. * But since it is a new feature and board data is loaded
  464. * at init time, we have to workaround this from host.
  465. * It is difficult to patch the firmware boot code,
  466. * but possible in theory.
  467. */
  468. param = ar->hw.board_ext_data_addr;
  469. ram_reserved_size = ar->hw.reserved_ram_size;
  470. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  471. HI_ITEM(hi_board_ext_data)),
  472. (u8 *)&param, 4) != 0) {
  473. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  474. return -EIO;
  475. }
  476. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  477. HI_ITEM(hi_end_ram_reserve_sz)),
  478. (u8 *)&ram_reserved_size, 4) != 0) {
  479. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  480. return -EIO;
  481. }
  482. /* set the block size for the target */
  483. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  484. /* use default number of control buffers */
  485. return -EIO;
  486. /* Configure GPIO AR600x UART */
  487. param = ar->hw.uarttx_pin;
  488. status = ath6kl_bmi_write(ar,
  489. ath6kl_get_hi_item_addr(ar,
  490. HI_ITEM(hi_dbg_uart_txpin)),
  491. (u8 *)&param, 4);
  492. if (status)
  493. return status;
  494. /* Configure target refclk_hz */
  495. param = ar->hw.refclk_hz;
  496. status = ath6kl_bmi_write(ar,
  497. ath6kl_get_hi_item_addr(ar,
  498. HI_ITEM(hi_refclk_hz)),
  499. (u8 *)&param, 4);
  500. if (status)
  501. return status;
  502. return 0;
  503. }
  504. /* firmware upload */
  505. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  506. u8 **fw, size_t *fw_len)
  507. {
  508. const struct firmware *fw_entry;
  509. int ret;
  510. ret = request_firmware(&fw_entry, filename, ar->dev);
  511. if (ret)
  512. return ret;
  513. *fw_len = fw_entry->size;
  514. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  515. if (*fw == NULL)
  516. ret = -ENOMEM;
  517. release_firmware(fw_entry);
  518. return ret;
  519. }
  520. #ifdef CONFIG_OF
  521. /*
  522. * Check the device tree for a board-id and use it to construct
  523. * the pathname to the firmware file. Used (for now) to find a
  524. * fallback to the "bdata.bin" file--typically a symlink to the
  525. * appropriate board-specific file.
  526. */
  527. static bool check_device_tree(struct ath6kl *ar)
  528. {
  529. static const char *board_id_prop = "atheros,board-id";
  530. struct device_node *node;
  531. char board_filename[64];
  532. const char *board_id;
  533. int ret;
  534. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  535. board_id = of_get_property(node, board_id_prop, NULL);
  536. if (board_id == NULL) {
  537. ath6kl_warn("No \"%s\" property on %s node.\n",
  538. board_id_prop, node->name);
  539. continue;
  540. }
  541. snprintf(board_filename, sizeof(board_filename),
  542. "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
  543. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  544. &ar->fw_board_len);
  545. if (ret) {
  546. ath6kl_err("Failed to get DT board file %s: %d\n",
  547. board_filename, ret);
  548. continue;
  549. }
  550. return true;
  551. }
  552. return false;
  553. }
  554. #else
  555. static bool check_device_tree(struct ath6kl *ar)
  556. {
  557. return false;
  558. }
  559. #endif /* CONFIG_OF */
  560. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  561. {
  562. const char *filename;
  563. int ret;
  564. if (ar->fw_board != NULL)
  565. return 0;
  566. if (WARN_ON(ar->hw.fw_board == NULL))
  567. return -EINVAL;
  568. filename = ar->hw.fw_board;
  569. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  570. &ar->fw_board_len);
  571. if (ret == 0) {
  572. /* managed to get proper board file */
  573. return 0;
  574. }
  575. if (check_device_tree(ar)) {
  576. /* got board file from device tree */
  577. return 0;
  578. }
  579. /* there was no proper board file, try to use default instead */
  580. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  581. filename, ret);
  582. filename = ar->hw.fw_default_board;
  583. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  584. &ar->fw_board_len);
  585. if (ret) {
  586. ath6kl_err("Failed to get default board file %s: %d\n",
  587. filename, ret);
  588. return ret;
  589. }
  590. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  591. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  592. return 0;
  593. }
  594. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  595. {
  596. char filename[100];
  597. int ret;
  598. if (ar->fw_otp != NULL)
  599. return 0;
  600. if (ar->hw.fw.otp == NULL) {
  601. ath6kl_dbg(ATH6KL_DBG_BOOT,
  602. "no OTP file configured for this hw\n");
  603. return 0;
  604. }
  605. snprintf(filename, sizeof(filename), "%s/%s",
  606. ar->hw.fw.dir, ar->hw.fw.otp);
  607. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  608. &ar->fw_otp_len);
  609. if (ret) {
  610. ath6kl_err("Failed to get OTP file %s: %d\n",
  611. filename, ret);
  612. return ret;
  613. }
  614. return 0;
  615. }
  616. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  617. {
  618. char filename[100];
  619. int ret;
  620. if (ar->fw != NULL)
  621. return 0;
  622. if (testmode) {
  623. ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n",
  624. testmode);
  625. if (testmode == 2) {
  626. if (ar->hw.fw.utf == NULL) {
  627. ath6kl_warn("testmode 2 not supported\n");
  628. return -EOPNOTSUPP;
  629. }
  630. snprintf(filename, sizeof(filename), "%s/%s",
  631. ar->hw.fw.dir, ar->hw.fw.utf);
  632. } else {
  633. if (ar->hw.fw.tcmd == NULL) {
  634. ath6kl_warn("testmode 1 not supported\n");
  635. return -EOPNOTSUPP;
  636. }
  637. snprintf(filename, sizeof(filename), "%s/%s",
  638. ar->hw.fw.dir, ar->hw.fw.tcmd);
  639. }
  640. set_bit(TESTMODE, &ar->flag);
  641. goto get_fw;
  642. }
  643. /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
  644. if (WARN_ON(ar->hw.fw.fw == NULL))
  645. return -EINVAL;
  646. snprintf(filename, sizeof(filename), "%s/%s",
  647. ar->hw.fw.dir, ar->hw.fw.fw);
  648. get_fw:
  649. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  650. if (ret) {
  651. ath6kl_err("Failed to get firmware file %s: %d\n",
  652. filename, ret);
  653. return ret;
  654. }
  655. return 0;
  656. }
  657. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  658. {
  659. char filename[100];
  660. int ret;
  661. if (ar->fw_patch != NULL)
  662. return 0;
  663. if (ar->hw.fw.patch == NULL)
  664. return 0;
  665. snprintf(filename, sizeof(filename), "%s/%s",
  666. ar->hw.fw.dir, ar->hw.fw.patch);
  667. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  668. &ar->fw_patch_len);
  669. if (ret) {
  670. ath6kl_err("Failed to get patch file %s: %d\n",
  671. filename, ret);
  672. return ret;
  673. }
  674. return 0;
  675. }
  676. static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
  677. {
  678. char filename[100];
  679. int ret;
  680. if (testmode != 2)
  681. return 0;
  682. if (ar->fw_testscript != NULL)
  683. return 0;
  684. if (ar->hw.fw.testscript == NULL)
  685. return 0;
  686. snprintf(filename, sizeof(filename), "%s/%s",
  687. ar->hw.fw.dir, ar->hw.fw.testscript);
  688. ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
  689. &ar->fw_testscript_len);
  690. if (ret) {
  691. ath6kl_err("Failed to get testscript file %s: %d\n",
  692. filename, ret);
  693. return ret;
  694. }
  695. return 0;
  696. }
  697. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  698. {
  699. int ret;
  700. ret = ath6kl_fetch_otp_file(ar);
  701. if (ret)
  702. return ret;
  703. ret = ath6kl_fetch_fw_file(ar);
  704. if (ret)
  705. return ret;
  706. ret = ath6kl_fetch_patch_file(ar);
  707. if (ret)
  708. return ret;
  709. ret = ath6kl_fetch_testscript_file(ar);
  710. if (ret)
  711. return ret;
  712. return 0;
  713. }
  714. static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
  715. {
  716. size_t magic_len, len, ie_len;
  717. const struct firmware *fw;
  718. struct ath6kl_fw_ie *hdr;
  719. char filename[100];
  720. const u8 *data;
  721. int ret, ie_id, i, index, bit;
  722. __le32 *val;
  723. snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
  724. ret = request_firmware(&fw, filename, ar->dev);
  725. if (ret)
  726. return ret;
  727. data = fw->data;
  728. len = fw->size;
  729. /* magic also includes the null byte, check that as well */
  730. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  731. if (len < magic_len) {
  732. ret = -EINVAL;
  733. goto out;
  734. }
  735. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  736. ret = -EINVAL;
  737. goto out;
  738. }
  739. len -= magic_len;
  740. data += magic_len;
  741. /* loop elements */
  742. while (len > sizeof(struct ath6kl_fw_ie)) {
  743. /* hdr is unaligned! */
  744. hdr = (struct ath6kl_fw_ie *) data;
  745. ie_id = le32_to_cpup(&hdr->id);
  746. ie_len = le32_to_cpup(&hdr->len);
  747. len -= sizeof(*hdr);
  748. data += sizeof(*hdr);
  749. if (len < ie_len) {
  750. ret = -EINVAL;
  751. goto out;
  752. }
  753. switch (ie_id) {
  754. case ATH6KL_FW_IE_OTP_IMAGE:
  755. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  756. ie_len);
  757. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  758. if (ar->fw_otp == NULL) {
  759. ret = -ENOMEM;
  760. goto out;
  761. }
  762. ar->fw_otp_len = ie_len;
  763. break;
  764. case ATH6KL_FW_IE_FW_IMAGE:
  765. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  766. ie_len);
  767. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  768. if (ar->fw == NULL) {
  769. ret = -ENOMEM;
  770. goto out;
  771. }
  772. ar->fw_len = ie_len;
  773. break;
  774. case ATH6KL_FW_IE_PATCH_IMAGE:
  775. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  776. ie_len);
  777. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  778. if (ar->fw_patch == NULL) {
  779. ret = -ENOMEM;
  780. goto out;
  781. }
  782. ar->fw_patch_len = ie_len;
  783. break;
  784. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  785. val = (__le32 *) data;
  786. ar->hw.reserved_ram_size = le32_to_cpup(val);
  787. ath6kl_dbg(ATH6KL_DBG_BOOT,
  788. "found reserved ram size ie 0x%d\n",
  789. ar->hw.reserved_ram_size);
  790. break;
  791. case ATH6KL_FW_IE_CAPABILITIES:
  792. if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
  793. break;
  794. ath6kl_dbg(ATH6KL_DBG_BOOT,
  795. "found firmware capabilities ie (%zd B)\n",
  796. ie_len);
  797. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  798. index = i / 8;
  799. bit = i % 8;
  800. if (data[index] & (1 << bit))
  801. __set_bit(i, ar->fw_capabilities);
  802. }
  803. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  804. ar->fw_capabilities,
  805. sizeof(ar->fw_capabilities));
  806. break;
  807. case ATH6KL_FW_IE_PATCH_ADDR:
  808. if (ie_len != sizeof(*val))
  809. break;
  810. val = (__le32 *) data;
  811. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  812. ath6kl_dbg(ATH6KL_DBG_BOOT,
  813. "found patch address ie 0x%x\n",
  814. ar->hw.dataset_patch_addr);
  815. break;
  816. case ATH6KL_FW_IE_BOARD_ADDR:
  817. if (ie_len != sizeof(*val))
  818. break;
  819. val = (__le32 *) data;
  820. ar->hw.board_addr = le32_to_cpup(val);
  821. ath6kl_dbg(ATH6KL_DBG_BOOT,
  822. "found board address ie 0x%x\n",
  823. ar->hw.board_addr);
  824. break;
  825. case ATH6KL_FW_IE_VIF_MAX:
  826. if (ie_len != sizeof(*val))
  827. break;
  828. val = (__le32 *) data;
  829. ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
  830. ATH6KL_VIF_MAX);
  831. if (ar->vif_max > 1 && !ar->p2p)
  832. ar->max_norm_iface = 2;
  833. ath6kl_dbg(ATH6KL_DBG_BOOT,
  834. "found vif max ie %d\n", ar->vif_max);
  835. break;
  836. default:
  837. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  838. le32_to_cpup(&hdr->id));
  839. break;
  840. }
  841. len -= ie_len;
  842. data += ie_len;
  843. };
  844. ret = 0;
  845. out:
  846. release_firmware(fw);
  847. return ret;
  848. }
  849. int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
  850. {
  851. int ret;
  852. ret = ath6kl_fetch_board_file(ar);
  853. if (ret)
  854. return ret;
  855. ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
  856. if (ret == 0) {
  857. ar->fw_api = 3;
  858. goto out;
  859. }
  860. ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
  861. if (ret == 0) {
  862. ar->fw_api = 2;
  863. goto out;
  864. }
  865. ret = ath6kl_fetch_fw_api1(ar);
  866. if (ret)
  867. return ret;
  868. ar->fw_api = 1;
  869. out:
  870. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  871. return 0;
  872. }
  873. static int ath6kl_upload_board_file(struct ath6kl *ar)
  874. {
  875. u32 board_address, board_ext_address, param;
  876. u32 board_data_size, board_ext_data_size;
  877. int ret;
  878. if (WARN_ON(ar->fw_board == NULL))
  879. return -ENOENT;
  880. /*
  881. * Determine where in Target RAM to write Board Data.
  882. * For AR6004, host determine Target RAM address for
  883. * writing board data.
  884. */
  885. if (ar->hw.board_addr != 0) {
  886. board_address = ar->hw.board_addr;
  887. ath6kl_bmi_write(ar,
  888. ath6kl_get_hi_item_addr(ar,
  889. HI_ITEM(hi_board_data)),
  890. (u8 *) &board_address, 4);
  891. } else {
  892. ath6kl_bmi_read(ar,
  893. ath6kl_get_hi_item_addr(ar,
  894. HI_ITEM(hi_board_data)),
  895. (u8 *) &board_address, 4);
  896. }
  897. /* determine where in target ram to write extended board data */
  898. ath6kl_bmi_read(ar,
  899. ath6kl_get_hi_item_addr(ar,
  900. HI_ITEM(hi_board_ext_data)),
  901. (u8 *) &board_ext_address, 4);
  902. if (ar->target_type == TARGET_TYPE_AR6003 &&
  903. board_ext_address == 0) {
  904. ath6kl_err("Failed to get board file target address.\n");
  905. return -EINVAL;
  906. }
  907. switch (ar->target_type) {
  908. case TARGET_TYPE_AR6003:
  909. board_data_size = AR6003_BOARD_DATA_SZ;
  910. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  911. break;
  912. case TARGET_TYPE_AR6004:
  913. board_data_size = AR6004_BOARD_DATA_SZ;
  914. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  915. break;
  916. default:
  917. WARN_ON(1);
  918. return -EINVAL;
  919. break;
  920. }
  921. if (board_ext_address &&
  922. ar->fw_board_len == (board_data_size + board_ext_data_size)) {
  923. /* write extended board data */
  924. ath6kl_dbg(ATH6KL_DBG_BOOT,
  925. "writing extended board data to 0x%x (%d B)\n",
  926. board_ext_address, board_ext_data_size);
  927. ret = ath6kl_bmi_write(ar, board_ext_address,
  928. ar->fw_board + board_data_size,
  929. board_ext_data_size);
  930. if (ret) {
  931. ath6kl_err("Failed to write extended board data: %d\n",
  932. ret);
  933. return ret;
  934. }
  935. /* record that extended board data is initialized */
  936. param = (board_ext_data_size << 16) | 1;
  937. ath6kl_bmi_write(ar,
  938. ath6kl_get_hi_item_addr(ar,
  939. HI_ITEM(hi_board_ext_data_config)),
  940. (unsigned char *) &param, 4);
  941. }
  942. if (ar->fw_board_len < board_data_size) {
  943. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  944. ret = -EINVAL;
  945. return ret;
  946. }
  947. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  948. board_address, board_data_size);
  949. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  950. board_data_size);
  951. if (ret) {
  952. ath6kl_err("Board file bmi write failed: %d\n", ret);
  953. return ret;
  954. }
  955. /* record the fact that Board Data IS initialized */
  956. param = 1;
  957. ath6kl_bmi_write(ar,
  958. ath6kl_get_hi_item_addr(ar,
  959. HI_ITEM(hi_board_data_initialized)),
  960. (u8 *)&param, 4);
  961. return ret;
  962. }
  963. static int ath6kl_upload_otp(struct ath6kl *ar)
  964. {
  965. u32 address, param;
  966. bool from_hw = false;
  967. int ret;
  968. if (ar->fw_otp == NULL)
  969. return 0;
  970. address = ar->hw.app_load_addr;
  971. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  972. ar->fw_otp_len);
  973. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  974. ar->fw_otp_len);
  975. if (ret) {
  976. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  977. return ret;
  978. }
  979. /* read firmware start address */
  980. ret = ath6kl_bmi_read(ar,
  981. ath6kl_get_hi_item_addr(ar,
  982. HI_ITEM(hi_app_start)),
  983. (u8 *) &address, sizeof(address));
  984. if (ret) {
  985. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  986. return ret;
  987. }
  988. if (ar->hw.app_start_override_addr == 0) {
  989. ar->hw.app_start_override_addr = address;
  990. from_hw = true;
  991. }
  992. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  993. from_hw ? " (from hw)" : "",
  994. ar->hw.app_start_override_addr);
  995. /* execute the OTP code */
  996. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  997. ar->hw.app_start_override_addr);
  998. param = 0;
  999. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  1000. return ret;
  1001. }
  1002. static int ath6kl_upload_firmware(struct ath6kl *ar)
  1003. {
  1004. u32 address;
  1005. int ret;
  1006. if (WARN_ON(ar->fw == NULL))
  1007. return 0;
  1008. address = ar->hw.app_load_addr;
  1009. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  1010. address, ar->fw_len);
  1011. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  1012. if (ret) {
  1013. ath6kl_err("Failed to write firmware: %d\n", ret);
  1014. return ret;
  1015. }
  1016. /*
  1017. * Set starting address for firmware
  1018. * Don't need to setup app_start override addr on AR6004
  1019. */
  1020. if (ar->target_type != TARGET_TYPE_AR6004) {
  1021. address = ar->hw.app_start_override_addr;
  1022. ath6kl_bmi_set_app_start(ar, address);
  1023. }
  1024. return ret;
  1025. }
  1026. static int ath6kl_upload_patch(struct ath6kl *ar)
  1027. {
  1028. u32 address, param;
  1029. int ret;
  1030. if (ar->fw_patch == NULL)
  1031. return 0;
  1032. address = ar->hw.dataset_patch_addr;
  1033. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  1034. address, ar->fw_patch_len);
  1035. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1036. if (ret) {
  1037. ath6kl_err("Failed to write patch file: %d\n", ret);
  1038. return ret;
  1039. }
  1040. param = address;
  1041. ath6kl_bmi_write(ar,
  1042. ath6kl_get_hi_item_addr(ar,
  1043. HI_ITEM(hi_dset_list_head)),
  1044. (unsigned char *) &param, 4);
  1045. return 0;
  1046. }
  1047. static int ath6kl_upload_testscript(struct ath6kl *ar)
  1048. {
  1049. u32 address, param;
  1050. int ret;
  1051. if (testmode != 2)
  1052. return 0;
  1053. if (ar->fw_testscript == NULL)
  1054. return 0;
  1055. address = ar->hw.testscript_addr;
  1056. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
  1057. address, ar->fw_testscript_len);
  1058. ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
  1059. ar->fw_testscript_len);
  1060. if (ret) {
  1061. ath6kl_err("Failed to write testscript file: %d\n", ret);
  1062. return ret;
  1063. }
  1064. param = address;
  1065. ath6kl_bmi_write(ar,
  1066. ath6kl_get_hi_item_addr(ar,
  1067. HI_ITEM(hi_ota_testscript)),
  1068. (unsigned char *) &param, 4);
  1069. param = 4096;
  1070. ath6kl_bmi_write(ar,
  1071. ath6kl_get_hi_item_addr(ar,
  1072. HI_ITEM(hi_end_ram_reserve_sz)),
  1073. (unsigned char *) &param, 4);
  1074. param = 1;
  1075. ath6kl_bmi_write(ar,
  1076. ath6kl_get_hi_item_addr(ar,
  1077. HI_ITEM(hi_test_apps_related)),
  1078. (unsigned char *) &param, 4);
  1079. return 0;
  1080. }
  1081. static int ath6kl_init_upload(struct ath6kl *ar)
  1082. {
  1083. u32 param, options, sleep, address;
  1084. int status = 0;
  1085. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1086. ar->target_type != TARGET_TYPE_AR6004)
  1087. return -EINVAL;
  1088. /* temporarily disable system sleep */
  1089. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1090. status = ath6kl_bmi_reg_read(ar, address, &param);
  1091. if (status)
  1092. return status;
  1093. options = param;
  1094. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1095. status = ath6kl_bmi_reg_write(ar, address, param);
  1096. if (status)
  1097. return status;
  1098. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1099. status = ath6kl_bmi_reg_read(ar, address, &param);
  1100. if (status)
  1101. return status;
  1102. sleep = param;
  1103. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1104. status = ath6kl_bmi_reg_write(ar, address, param);
  1105. if (status)
  1106. return status;
  1107. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1108. options, sleep);
  1109. /* program analog PLL register */
  1110. /* no need to control 40/44MHz clock on AR6004 */
  1111. if (ar->target_type != TARGET_TYPE_AR6004) {
  1112. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1113. 0xF9104001);
  1114. if (status)
  1115. return status;
  1116. /* Run at 80/88MHz by default */
  1117. param = SM(CPU_CLOCK_STANDARD, 1);
  1118. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1119. status = ath6kl_bmi_reg_write(ar, address, param);
  1120. if (status)
  1121. return status;
  1122. }
  1123. param = 0;
  1124. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1125. param = SM(LPO_CAL_ENABLE, 1);
  1126. status = ath6kl_bmi_reg_write(ar, address, param);
  1127. if (status)
  1128. return status;
  1129. /* WAR to avoid SDIO CRC err */
  1130. if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
  1131. ath6kl_err("temporary war to avoid sdio crc error\n");
  1132. param = 0x20;
  1133. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1134. status = ath6kl_bmi_reg_write(ar, address, param);
  1135. if (status)
  1136. return status;
  1137. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1138. status = ath6kl_bmi_reg_write(ar, address, param);
  1139. if (status)
  1140. return status;
  1141. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1142. status = ath6kl_bmi_reg_write(ar, address, param);
  1143. if (status)
  1144. return status;
  1145. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1146. status = ath6kl_bmi_reg_write(ar, address, param);
  1147. if (status)
  1148. return status;
  1149. }
  1150. /* write EEPROM data to Target RAM */
  1151. status = ath6kl_upload_board_file(ar);
  1152. if (status)
  1153. return status;
  1154. /* transfer One time Programmable data */
  1155. status = ath6kl_upload_otp(ar);
  1156. if (status)
  1157. return status;
  1158. /* Download Target firmware */
  1159. status = ath6kl_upload_firmware(ar);
  1160. if (status)
  1161. return status;
  1162. status = ath6kl_upload_patch(ar);
  1163. if (status)
  1164. return status;
  1165. /* Download the test script */
  1166. status = ath6kl_upload_testscript(ar);
  1167. if (status)
  1168. return status;
  1169. /* Restore system sleep */
  1170. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1171. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1172. if (status)
  1173. return status;
  1174. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1175. param = options | 0x20;
  1176. status = ath6kl_bmi_reg_write(ar, address, param);
  1177. if (status)
  1178. return status;
  1179. return status;
  1180. }
  1181. int ath6kl_init_hw_params(struct ath6kl *ar)
  1182. {
  1183. const struct ath6kl_hw *hw;
  1184. int i;
  1185. for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  1186. hw = &hw_list[i];
  1187. if (hw->id == ar->version.target_ver)
  1188. break;
  1189. }
  1190. if (i == ARRAY_SIZE(hw_list)) {
  1191. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1192. ar->version.target_ver);
  1193. return -EINVAL;
  1194. }
  1195. ar->hw = *hw;
  1196. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1197. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1198. ar->version.target_ver, ar->target_type,
  1199. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1200. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1201. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1202. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1203. ar->hw.reserved_ram_size);
  1204. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1205. "refclk_hz %d uarttx_pin %d",
  1206. ar->hw.refclk_hz, ar->hw.uarttx_pin);
  1207. return 0;
  1208. }
  1209. static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
  1210. {
  1211. switch (type) {
  1212. case ATH6KL_HIF_TYPE_SDIO:
  1213. return "sdio";
  1214. case ATH6KL_HIF_TYPE_USB:
  1215. return "usb";
  1216. }
  1217. return NULL;
  1218. }
  1219. int ath6kl_init_hw_start(struct ath6kl *ar)
  1220. {
  1221. long timeleft;
  1222. int ret, i;
  1223. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
  1224. ret = ath6kl_hif_power_on(ar);
  1225. if (ret)
  1226. return ret;
  1227. ret = ath6kl_configure_target(ar);
  1228. if (ret)
  1229. goto err_power_off;
  1230. ret = ath6kl_init_upload(ar);
  1231. if (ret)
  1232. goto err_power_off;
  1233. /* Do we need to finish the BMI phase */
  1234. /* FIXME: return error from ath6kl_bmi_done() */
  1235. if (ath6kl_bmi_done(ar)) {
  1236. ret = -EIO;
  1237. goto err_power_off;
  1238. }
  1239. /*
  1240. * The reason we have to wait for the target here is that the
  1241. * driver layer has to init BMI in order to set the host block
  1242. * size.
  1243. */
  1244. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1245. ret = -EIO;
  1246. goto err_power_off;
  1247. }
  1248. if (ath6kl_init_service_ep(ar)) {
  1249. ret = -EIO;
  1250. goto err_cleanup_scatter;
  1251. }
  1252. /* setup credit distribution */
  1253. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1254. /* start HTC */
  1255. ret = ath6kl_htc_start(ar->htc_target);
  1256. if (ret) {
  1257. /* FIXME: call this */
  1258. ath6kl_cookie_cleanup(ar);
  1259. goto err_cleanup_scatter;
  1260. }
  1261. /* Wait for Wmi event to be ready */
  1262. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1263. test_bit(WMI_READY,
  1264. &ar->flag),
  1265. WMI_TIMEOUT);
  1266. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1267. if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
  1268. ath6kl_info("%s %s fw %s api %d%s\n",
  1269. ar->hw.name,
  1270. ath6kl_init_get_hif_name(ar->hif_type),
  1271. ar->wiphy->fw_version,
  1272. ar->fw_api,
  1273. test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
  1274. }
  1275. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1276. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1277. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1278. ret = -EIO;
  1279. goto err_htc_stop;
  1280. }
  1281. if (!timeleft || signal_pending(current)) {
  1282. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1283. ret = -EIO;
  1284. goto err_htc_stop;
  1285. }
  1286. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1287. /* communicate the wmi protocol verision to the target */
  1288. /* FIXME: return error */
  1289. if ((ath6kl_set_host_app_area(ar)) != 0)
  1290. ath6kl_err("unable to set the host app area\n");
  1291. for (i = 0; i < ar->vif_max; i++) {
  1292. ret = ath6kl_target_config_wlan_params(ar, i);
  1293. if (ret)
  1294. goto err_htc_stop;
  1295. }
  1296. ar->state = ATH6KL_STATE_ON;
  1297. return 0;
  1298. err_htc_stop:
  1299. ath6kl_htc_stop(ar->htc_target);
  1300. err_cleanup_scatter:
  1301. ath6kl_hif_cleanup_scatter(ar);
  1302. err_power_off:
  1303. ath6kl_hif_power_off(ar);
  1304. return ret;
  1305. }
  1306. int ath6kl_init_hw_stop(struct ath6kl *ar)
  1307. {
  1308. int ret;
  1309. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
  1310. ath6kl_htc_stop(ar->htc_target);
  1311. ath6kl_hif_stop(ar);
  1312. ath6kl_bmi_reset(ar);
  1313. ret = ath6kl_hif_power_off(ar);
  1314. if (ret)
  1315. ath6kl_warn("failed to power off hif: %d\n", ret);
  1316. ar->state = ATH6KL_STATE_OFF;
  1317. return 0;
  1318. }
  1319. /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
  1320. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1321. {
  1322. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1323. bool discon_issued;
  1324. netif_stop_queue(vif->ndev);
  1325. clear_bit(WLAN_ENABLED, &vif->flags);
  1326. if (wmi_ready) {
  1327. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1328. test_bit(CONNECT_PEND, &vif->flags);
  1329. ath6kl_disconnect(vif);
  1330. del_timer(&vif->disconnect_timer);
  1331. if (discon_issued)
  1332. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1333. (vif->nw_type & AP_NETWORK) ?
  1334. bcast_mac : vif->bssid,
  1335. 0, NULL, 0);
  1336. }
  1337. if (vif->scan_req) {
  1338. cfg80211_scan_done(vif->scan_req, true);
  1339. vif->scan_req = NULL;
  1340. }
  1341. }
  1342. void ath6kl_stop_txrx(struct ath6kl *ar)
  1343. {
  1344. struct ath6kl_vif *vif, *tmp_vif;
  1345. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1346. if (down_interruptible(&ar->sem)) {
  1347. ath6kl_err("down_interruptible failed\n");
  1348. return;
  1349. }
  1350. spin_lock_bh(&ar->list_lock);
  1351. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1352. list_del(&vif->list);
  1353. spin_unlock_bh(&ar->list_lock);
  1354. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1355. rtnl_lock();
  1356. ath6kl_cfg80211_vif_cleanup(vif);
  1357. rtnl_unlock();
  1358. spin_lock_bh(&ar->list_lock);
  1359. }
  1360. spin_unlock_bh(&ar->list_lock);
  1361. clear_bit(WMI_READY, &ar->flag);
  1362. /*
  1363. * After wmi_shudown all WMI events will be dropped. We
  1364. * need to cleanup the buffers allocated in AP mode and
  1365. * give disconnect notification to stack, which usually
  1366. * happens in the disconnect_event. Simulate the disconnect
  1367. * event by calling the function directly. Sometimes
  1368. * disconnect_event will be received when the debug logs
  1369. * are collected.
  1370. */
  1371. ath6kl_wmi_shutdown(ar->wmi);
  1372. clear_bit(WMI_ENABLED, &ar->flag);
  1373. if (ar->htc_target) {
  1374. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1375. ath6kl_htc_stop(ar->htc_target);
  1376. }
  1377. /*
  1378. * Try to reset the device if we can. The driver may have been
  1379. * configure NOT to reset the target during a debug session.
  1380. */
  1381. ath6kl_dbg(ATH6KL_DBG_TRC,
  1382. "attempting to reset target on instance destroy\n");
  1383. ath6kl_reset_device(ar, ar->target_type, true, true);
  1384. clear_bit(WLAN_ENABLED, &ar->flag);
  1385. }
  1386. EXPORT_SYMBOL(ath6kl_stop_txrx);