Kconfig 8.5 KB

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  1. menu "Platform support"
  2. choice
  3. prompt "Machine type"
  4. depends on PPC64 || 6xx
  5. default PPC_MULTIPLATFORM
  6. config PPC_MULTIPLATFORM
  7. bool "Generic desktop/server/laptop"
  8. help
  9. Select this option if configuring for an IBM pSeries or
  10. RS/6000 machine, an Apple machine, or a PReP, CHRP,
  11. Maple or Cell-based machine.
  12. config PPC_82xx
  13. bool "Freescale 82xx"
  14. depends on 6xx
  15. config PPC_83xx
  16. bool "Freescale 83xx"
  17. depends on 6xx
  18. select FSL_SOC
  19. select MPC83xx
  20. select IPIC
  21. config PPC_86xx
  22. bool "Freescale 86xx"
  23. depends on 6xx
  24. select FSL_SOC
  25. select ALTIVEC
  26. help
  27. The Freescale E600 SoCs have 74xx cores.
  28. endchoice
  29. config CLASSIC32
  30. def_bool y
  31. depends on 6xx && PPC_MULTIPLATFORM
  32. source "arch/powerpc/platforms/pseries/Kconfig"
  33. source "arch/powerpc/platforms/iseries/Kconfig"
  34. source "arch/powerpc/platforms/chrp/Kconfig"
  35. source "arch/powerpc/platforms/512x/Kconfig"
  36. source "arch/powerpc/platforms/52xx/Kconfig"
  37. source "arch/powerpc/platforms/powermac/Kconfig"
  38. source "arch/powerpc/platforms/prep/Kconfig"
  39. source "arch/powerpc/platforms/maple/Kconfig"
  40. source "arch/powerpc/platforms/pasemi/Kconfig"
  41. source "arch/powerpc/platforms/celleb/Kconfig"
  42. source "arch/powerpc/platforms/ps3/Kconfig"
  43. source "arch/powerpc/platforms/cell/Kconfig"
  44. source "arch/powerpc/platforms/8xx/Kconfig"
  45. source "arch/powerpc/platforms/82xx/Kconfig"
  46. source "arch/powerpc/platforms/83xx/Kconfig"
  47. source "arch/powerpc/platforms/85xx/Kconfig"
  48. source "arch/powerpc/platforms/86xx/Kconfig"
  49. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  50. source "arch/powerpc/platforms/44x/Kconfig"
  51. source "arch/powerpc/platforms/40x/Kconfig"
  52. config PPC_NATIVE
  53. bool
  54. depends on PPC_MULTIPLATFORM
  55. help
  56. Support for running natively on the hardware, i.e. without
  57. a hypervisor. This option is not user-selectable but should
  58. be selected by all platforms that need it.
  59. config UDBG_RTAS_CONSOLE
  60. bool "RTAS based debug console"
  61. depends on PPC_RTAS
  62. default n
  63. config PPC_UDBG_BEAT
  64. bool "BEAT based debug console"
  65. depends on PPC_CELLEB
  66. default n
  67. config XICS
  68. depends on PPC_PSERIES
  69. bool
  70. default y
  71. config IPIC
  72. bool
  73. default n
  74. config MPIC
  75. bool
  76. default n
  77. config MPIC_WEIRD
  78. bool
  79. default n
  80. config PPC_I8259
  81. bool
  82. default n
  83. config U3_DART
  84. bool
  85. depends on PPC_MULTIPLATFORM && PPC64
  86. default n
  87. config PPC_RTAS
  88. bool
  89. default n
  90. config RTAS_ERROR_LOGGING
  91. bool
  92. depends on PPC_RTAS
  93. default n
  94. config RTAS_PROC
  95. bool "Proc interface to RTAS"
  96. depends on PPC_RTAS
  97. default y
  98. config RTAS_FLASH
  99. tristate "Firmware flash interface"
  100. depends on PPC64 && RTAS_PROC
  101. config PPC_PMI
  102. tristate "Support for PMI"
  103. depends on PPC_IBM_CELL_BLADE
  104. help
  105. PMI (Platform Management Interrupt) is a way to
  106. communicate with the BMC (Baseboard Management Controller).
  107. It is used in some IBM Cell blades.
  108. default m
  109. config MMIO_NVRAM
  110. bool
  111. default n
  112. config MPIC_U3_HT_IRQS
  113. bool
  114. depends on PPC_MAPLE
  115. default y
  116. config MPIC_BROKEN_REGREAD
  117. bool
  118. depends on MPIC
  119. help
  120. This option enables a MPIC driver workaround for some chips
  121. that have a bug that causes some interrupt source information
  122. to not read back properly. It is safe to use on other chips as
  123. well, but enabling it uses about 8KB of memory to keep copies
  124. of the register contents in software.
  125. config IBMVIO
  126. depends on PPC_PSERIES || PPC_ISERIES
  127. bool
  128. default y
  129. config IBMEBUS
  130. depends on PPC_PSERIES
  131. bool "Support for GX bus based adapters"
  132. help
  133. Bus device driver for GX bus based adapters.
  134. config PPC_MPC106
  135. bool
  136. default n
  137. config PPC_970_NAP
  138. bool
  139. default n
  140. config PPC_INDIRECT_IO
  141. bool
  142. select GENERIC_IOMAP
  143. default n
  144. config GENERIC_IOMAP
  145. bool
  146. default n
  147. source "drivers/cpufreq/Kconfig"
  148. menu "CPU Frequency drivers"
  149. depends on CPU_FREQ
  150. config CPU_FREQ_PMAC
  151. bool "Support for Apple PowerBooks"
  152. depends on ADB_PMU && PPC32
  153. select CPU_FREQ_TABLE
  154. help
  155. This adds support for frequency switching on Apple PowerBooks,
  156. this currently includes some models of iBook & Titanium
  157. PowerBook.
  158. config CPU_FREQ_PMAC64
  159. bool "Support for some Apple G5s"
  160. depends on PPC_PMAC && PPC64
  161. select CPU_FREQ_TABLE
  162. help
  163. This adds support for frequency switching on Apple iMac G5,
  164. and some of the more recent desktop G5 machines as well.
  165. config PPC_PASEMI_CPUFREQ
  166. bool "Support for PA Semi PWRficient"
  167. depends on PPC_PASEMI
  168. default y
  169. select CPU_FREQ_TABLE
  170. help
  171. This adds the support for frequency switching on PA Semi
  172. PWRficient processors.
  173. endmenu
  174. config PPC601_SYNC_FIX
  175. bool "Workarounds for PPC601 bugs"
  176. depends on 6xx && (PPC_PREP || PPC_PMAC)
  177. help
  178. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  179. mean that extra synchronization instructions are required near
  180. certain instructions, typically those that make major changes to the
  181. CPU state. These extra instructions reduce performance slightly.
  182. If you say N here, these extra instructions will not be included,
  183. resulting in a kernel which will run faster but may not run at all
  184. on some systems with the PPC601 chip.
  185. If in doubt, say Y here.
  186. config TAU
  187. bool "On-chip CPU temperature sensor support"
  188. depends on CLASSIC32
  189. help
  190. G3 and G4 processors have an on-chip temperature sensor called the
  191. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  192. temperature within 2-4 degrees Celsius. This option shows the current
  193. on-die temperature in /proc/cpuinfo if the cpu supports it.
  194. Unfortunately, on some chip revisions, this sensor is very inaccurate
  195. and in many cases, does not work at all, so don't assume the cpu
  196. temp is actually what /proc/cpuinfo says it is.
  197. config TAU_INT
  198. bool "Interrupt driven TAU driver (DANGEROUS)"
  199. depends on TAU
  200. ---help---
  201. The TAU supports an interrupt driven mode which causes an interrupt
  202. whenever the temperature goes out of range. This is the fastest way
  203. to get notified the temp has exceeded a range. With this option off,
  204. a timer is used to re-check the temperature periodically.
  205. However, on some cpus it appears that the TAU interrupt hardware
  206. is buggy and can cause a situation which would lead unexplained hard
  207. lockups.
  208. Unless you are extending the TAU driver, or enjoy kernel/hardware
  209. debugging, leave this option off.
  210. config TAU_AVERAGE
  211. bool "Average high and low temp"
  212. depends on TAU
  213. ---help---
  214. The TAU hardware can compare the temperature to an upper and lower
  215. bound. The default behavior is to show both the upper and lower
  216. bound in /proc/cpuinfo. If the range is large, the temperature is
  217. either changing a lot, or the TAU hardware is broken (likely on some
  218. G4's). If the range is small (around 4 degrees), the temperature is
  219. relatively stable. If you say Y here, a single temperature value,
  220. halfway between the upper and lower bounds, will be reported in
  221. /proc/cpuinfo.
  222. If in doubt, say N here.
  223. config QUICC_ENGINE
  224. bool
  225. select PPC_LIB_RHEAP
  226. select CRC32
  227. help
  228. The QUICC Engine (QE) is a new generation of communications
  229. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  230. Selecting this option means that you wish to build a kernel
  231. for a machine with a QE coprocessor.
  232. config CPM2
  233. bool "Enable support for the CPM2 (Communications Processor Module)"
  234. depends on MPC85xx || 8260
  235. select CPM
  236. select PPC_LIB_RHEAP
  237. help
  238. The CPM2 (Communications Processor Module) is a coprocessor on
  239. embedded CPUs made by Freescale. Selecting this option means that
  240. you wish to build a kernel for a machine with a CPM2 coprocessor
  241. on it (826x, 827x, 8560).
  242. config PPC_CPM_NEW_BINDING
  243. bool
  244. depends on CPM1 || CPM2
  245. help
  246. Select this if your board has been converted to use the new
  247. device tree bindings for CPM, and no longer needs the
  248. ioport callbacks or the platform device glue code.
  249. The fs_enet and cpm_uart drivers will be built as
  250. of_platform devices.
  251. config AXON_RAM
  252. tristate "Axon DDR2 memory device driver"
  253. depends on PPC_IBM_CELL_BLADE
  254. default m
  255. help
  256. It registers one block device per Axon's DDR2 memory bank found
  257. on a system. Block devices are called axonram?, their major and
  258. minor numbers are available in /proc/devices, /proc/partitions or
  259. in /sys/block/axonram?/dev.
  260. config FSL_ULI1575
  261. bool
  262. default n
  263. select GENERIC_ISA_DMA
  264. help
  265. Supports for the ULI1575 PCIe south bridge that exists on some
  266. Freescale reference boards. The boards all use the ULI in pretty
  267. much the same way.
  268. config CPM
  269. bool
  270. config OF_RTC
  271. bool
  272. help
  273. Uses information from the OF or flattened device tree to instatiate
  274. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  275. source "arch/powerpc/sysdev/bestcomm/Kconfig"
  276. endmenu