minotaur.c 7.7 KB

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  1. /*
  2. */
  3. #include <linux/device.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/mtd/mtd.h>
  6. #include <linux/mtd/partitions.h>
  7. #include <linux/spi/spi.h>
  8. #include <linux/spi/flash.h>
  9. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  10. #include <linux/usb_isp1362.h>
  11. #endif
  12. #include <linux/ata_platform.h>
  13. #include <linux/irq.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/usb_sl811.h>
  16. #include <asm/dma.h>
  17. #include <asm/bfin5xx_spi.h>
  18. #include <asm/reboot.h>
  19. #include <linux/spi/ad7877.h>
  20. /*
  21. * Name the Board for the /proc/cpuinfo
  22. */
  23. char *bfin_board_name = "CamSig Minotaur BF537";
  24. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  25. static struct resource bfin_pcmcia_cf_resources[] = {
  26. {
  27. .start = 0x20310000, /* IO PORT */
  28. .end = 0x20312000,
  29. .flags = IORESOURCE_MEM,
  30. }, {
  31. .start = 0x20311000, /* Attribute Memory */
  32. .end = 0x20311FFF,
  33. .flags = IORESOURCE_MEM,
  34. }, {
  35. .start = IRQ_PF4,
  36. .end = IRQ_PF4,
  37. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  38. }, {
  39. .start = IRQ_PF6, /* Card Detect PF6 */
  40. .end = IRQ_PF6,
  41. .flags = IORESOURCE_IRQ,
  42. },
  43. };
  44. static struct platform_device bfin_pcmcia_cf_device = {
  45. .name = "bfin_cf_pcmcia",
  46. .id = -1,
  47. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  48. .resource = bfin_pcmcia_cf_resources,
  49. };
  50. #endif
  51. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  52. static struct platform_device rtc_device = {
  53. .name = "rtc-bfin",
  54. .id = -1,
  55. };
  56. #endif
  57. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  58. static struct platform_device bfin_mac_device = {
  59. .name = "bfin_mac",
  60. };
  61. #endif
  62. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  63. static struct resource net2272_bfin_resources[] = {
  64. {
  65. .start = 0x20300000,
  66. .end = 0x20300000 + 0x100,
  67. .flags = IORESOURCE_MEM,
  68. }, {
  69. .start = IRQ_PF7,
  70. .end = IRQ_PF7,
  71. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  72. },
  73. };
  74. static struct platform_device net2272_bfin_device = {
  75. .name = "net2272",
  76. .id = -1,
  77. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  78. .resource = net2272_bfin_resources,
  79. };
  80. #endif
  81. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  82. /* all SPI peripherals info goes here */
  83. #if defined(CONFIG_MTD_M25P80) \
  84. || defined(CONFIG_MTD_M25P80_MODULE)
  85. /* Partition sizes */
  86. #define FLASH_SIZE 0x00400000
  87. #define PSIZE_UBOOT 0x00030000
  88. #define PSIZE_INITRAMFS 0x00240000
  89. static struct mtd_partition bfin_spi_flash_partitions[] = {
  90. {
  91. .name = "uboot",
  92. .size = PSIZE_UBOOT,
  93. .offset = 0x000000,
  94. .mask_flags = MTD_CAP_ROM
  95. }, {
  96. .name = "initramfs",
  97. .size = PSIZE_INITRAMFS,
  98. .offset = PSIZE_UBOOT
  99. }, {
  100. .name = "opt",
  101. .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
  102. .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
  103. }
  104. };
  105. static struct flash_platform_data bfin_spi_flash_data = {
  106. .name = "m25p80",
  107. .parts = bfin_spi_flash_partitions,
  108. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  109. .type = "m25p64",
  110. };
  111. /* SPI flash chip (m25p64) */
  112. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  113. .enable_dma = 0, /* use dma transfer with this chip*/
  114. .bits_per_word = 8,
  115. };
  116. #endif
  117. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  118. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  119. .enable_dma = 1,
  120. .bits_per_word = 8,
  121. };
  122. #endif
  123. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  124. #if defined(CONFIG_MTD_M25P80) \
  125. || defined(CONFIG_MTD_M25P80_MODULE)
  126. {
  127. /* the modalias must be the same as spi device driver name */
  128. .modalias = "m25p80", /* Name of spi_driver for this device */
  129. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  130. .bus_num = 0, /* Framework bus number */
  131. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  132. .platform_data = &bfin_spi_flash_data,
  133. .controller_data = &spi_flash_chip_info,
  134. .mode = SPI_MODE_3,
  135. },
  136. #endif
  137. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  138. {
  139. .modalias = "spi_mmc_dummy",
  140. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  141. .bus_num = 0,
  142. .chip_select = 0,
  143. .platform_data = NULL,
  144. .controller_data = &spi_mmc_chip_info,
  145. .mode = SPI_MODE_3,
  146. },
  147. {
  148. .modalias = "spi_mmc",
  149. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  150. .bus_num = 0,
  151. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  152. .platform_data = NULL,
  153. .controller_data = &spi_mmc_chip_info,
  154. .mode = SPI_MODE_3,
  155. },
  156. #endif
  157. };
  158. /* SPI controller data */
  159. static struct bfin5xx_spi_master bfin_spi0_info = {
  160. .num_chipselect = 8,
  161. .enable_dma = 1, /* master has the ability to do dma transfer */
  162. };
  163. /* SPI (0) */
  164. static struct resource bfin_spi0_resource[] = {
  165. [0] = {
  166. .start = SPI0_REGBASE,
  167. .end = SPI0_REGBASE + 0xFF,
  168. .flags = IORESOURCE_MEM,
  169. },
  170. [1] = {
  171. .start = CH_SPI,
  172. .end = CH_SPI,
  173. .flags = IORESOURCE_IRQ,
  174. },
  175. };
  176. static struct platform_device bfin_spi0_device = {
  177. .name = "bfin-spi",
  178. .id = 0, /* Bus number */
  179. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  180. .resource = bfin_spi0_resource,
  181. .dev = {
  182. .platform_data = &bfin_spi0_info, /* Passed to driver */
  183. },
  184. };
  185. #endif /* spi master and devices */
  186. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  187. static struct resource bfin_uart_resources[] = {
  188. {
  189. .start = 0xFFC00400,
  190. .end = 0xFFC004FF,
  191. .flags = IORESOURCE_MEM,
  192. }, {
  193. .start = 0xFFC02000,
  194. .end = 0xFFC020FF,
  195. .flags = IORESOURCE_MEM,
  196. },
  197. };
  198. static struct platform_device bfin_uart_device = {
  199. .name = "bfin-uart",
  200. .id = 1,
  201. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  202. .resource = bfin_uart_resources,
  203. };
  204. #endif
  205. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  206. static struct resource bfin_twi0_resource[] = {
  207. [0] = {
  208. .start = TWI0_REGBASE,
  209. .end = TWI0_REGBASE + 0xFF,
  210. .flags = IORESOURCE_MEM,
  211. },
  212. [1] = {
  213. .start = IRQ_TWI,
  214. .end = IRQ_TWI,
  215. .flags = IORESOURCE_IRQ,
  216. },
  217. };
  218. static struct platform_device i2c_bfin_twi_device = {
  219. .name = "i2c-bfin-twi",
  220. .id = 0,
  221. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  222. .resource = bfin_twi0_resource,
  223. };
  224. #endif
  225. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  226. static struct platform_device bfin_sport0_uart_device = {
  227. .name = "bfin-sport-uart",
  228. .id = 0,
  229. };
  230. static struct platform_device bfin_sport1_uart_device = {
  231. .name = "bfin-sport-uart",
  232. .id = 1,
  233. };
  234. #endif
  235. static struct platform_device *minotaur_devices[] __initdata = {
  236. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  237. &bfin_pcmcia_cf_device,
  238. #endif
  239. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  240. &rtc_device,
  241. #endif
  242. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  243. &bfin_mac_device,
  244. #endif
  245. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  246. &net2272_bfin_device,
  247. #endif
  248. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  249. &bfin_spi0_device,
  250. #endif
  251. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  252. &bfin_uart_device,
  253. #endif
  254. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  255. &i2c_bfin_twi_device,
  256. #endif
  257. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  258. &bfin_sport0_uart_device,
  259. &bfin_sport1_uart_device,
  260. #endif
  261. };
  262. static int __init minotaur_init(void)
  263. {
  264. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  265. platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
  266. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  267. spi_register_board_info(bfin_spi_board_info,
  268. ARRAY_SIZE(bfin_spi_board_info));
  269. #endif
  270. return 0;
  271. }
  272. arch_initcall(minotaur_init);
  273. void native_machine_restart(char *cmd)
  274. {
  275. /* workaround reboot hang when booting from SPI */
  276. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  277. bfin_gpio_reset_spi0_ssel1();
  278. }