mach-smdk6410.c 5.1 KB

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  1. /* linux/arch/arm/mach-s3c6410/mach-smdk6410.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/i2c.h>
  23. #include <linux/fb.h>
  24. #include <linux/gpio.h>
  25. #include <linux/delay.h>
  26. #include <video/platform_lcd.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/mach/irq.h>
  30. #include <mach/hardware.h>
  31. #include <mach/regs-fb.h>
  32. #include <mach/map.h>
  33. #include <asm/irq.h>
  34. #include <asm/mach-types.h>
  35. #include <plat/regs-serial.h>
  36. #include <plat/regs-modem.h>
  37. #include <plat/regs-gpio.h>
  38. #include <plat/regs-sys.h>
  39. #include <plat/iic.h>
  40. #include <plat/fb.h>
  41. #include <plat/s3c6410.h>
  42. #include <plat/clock.h>
  43. #include <plat/devs.h>
  44. #include <plat/cpu.h>
  45. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  46. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  47. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  48. static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  49. [0] = {
  50. .hwport = 0,
  51. .flags = 0,
  52. .ucon = 0x3c5,
  53. .ulcon = 0x03,
  54. .ufcon = 0x51,
  55. },
  56. [1] = {
  57. .hwport = 1,
  58. .flags = 0,
  59. .ucon = 0x3c5,
  60. .ulcon = 0x03,
  61. .ufcon = 0x51,
  62. },
  63. };
  64. /* framebuffer and LCD setup. */
  65. /* GPF15 = LCD backlight control
  66. * GPF13 => Panel power
  67. * GPN5 = LCD nRESET signal
  68. * PWM_TOUT1 => backlight brightness
  69. */
  70. static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
  71. unsigned int power)
  72. {
  73. if (power) {
  74. gpio_direction_output(S3C64XX_GPF(13), 1);
  75. gpio_direction_output(S3C64XX_GPF(15), 1);
  76. /* fire nRESET on power up */
  77. gpio_direction_output(S3C64XX_GPN(5), 0);
  78. msleep(10);
  79. gpio_direction_output(S3C64XX_GPN(5), 1);
  80. msleep(1);
  81. } else {
  82. gpio_direction_output(S3C64XX_GPF(15), 0);
  83. gpio_direction_output(S3C64XX_GPF(13), 0);
  84. }
  85. }
  86. static struct plat_lcd_data smdk6410_lcd_power_data = {
  87. .set_power = smdk6410_lcd_power_set,
  88. };
  89. static struct platform_device smdk6410_lcd_powerdev = {
  90. .name = "platform-lcd",
  91. .dev.parent = &s3c_device_fb.dev,
  92. .dev.platform_data = &smdk6410_lcd_power_data,
  93. };
  94. static struct s3c_fb_pd_win smdk6410_fb_win0 = {
  95. /* this is to ensure we use win0 */
  96. .win_mode = {
  97. .pixclock = 41094,
  98. .left_margin = 8,
  99. .right_margin = 13,
  100. .upper_margin = 7,
  101. .lower_margin = 5,
  102. .hsync_len = 3,
  103. .vsync_len = 1,
  104. .xres = 800,
  105. .yres = 480,
  106. },
  107. .max_bpp = 32,
  108. .default_bpp = 16,
  109. };
  110. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  111. static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
  112. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  113. .win[0] = &smdk6410_fb_win0,
  114. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  115. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  116. };
  117. static struct map_desc smdk6410_iodesc[] = {};
  118. static struct platform_device *smdk6410_devices[] __initdata = {
  119. #ifdef CONFIG_SMDK6410_SD_CH0
  120. &s3c_device_hsmmc0,
  121. #endif
  122. #ifdef CONFIG_SMDK6410_SD_CH1
  123. &s3c_device_hsmmc1,
  124. #endif
  125. &s3c_device_i2c0,
  126. &s3c_device_i2c1,
  127. &s3c_device_fb,
  128. &smdk6410_lcd_powerdev,
  129. };
  130. static struct i2c_board_info i2c_devs0[] __initdata = {
  131. { I2C_BOARD_INFO("24c08", 0x50), },
  132. { I2C_BOARD_INFO("wm8580", 0x1b), },
  133. };
  134. static struct i2c_board_info i2c_devs1[] __initdata = {
  135. { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
  136. };
  137. static void __init smdk6410_map_io(void)
  138. {
  139. u32 tmp;
  140. s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
  141. s3c24xx_init_clocks(12000000);
  142. s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
  143. /* set the LCD type */
  144. tmp = __raw_readl(S3C64XX_SPCON);
  145. tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
  146. tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
  147. __raw_writel(tmp, S3C64XX_SPCON);
  148. /* remove the lcd bypass */
  149. tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
  150. tmp &= ~MIFPCON_LCD_BYPASS;
  151. __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
  152. }
  153. static void __init smdk6410_machine_init(void)
  154. {
  155. s3c_i2c0_set_platdata(NULL);
  156. s3c_i2c1_set_platdata(NULL);
  157. s3c_fb_set_platdata(&smdk6410_lcd_pdata);
  158. gpio_request(S3C64XX_GPN(5), "LCD power");
  159. gpio_request(S3C64XX_GPF(13), "LCD power");
  160. gpio_request(S3C64XX_GPF(15), "LCD power");
  161. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  162. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  163. platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
  164. }
  165. MACHINE_START(SMDK6410, "SMDK6410")
  166. /* Maintainer: Ben Dooks <ben@fluff.org> */
  167. .phys_io = S3C_PA_UART & 0xfff00000,
  168. .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
  169. .boot_params = S3C64XX_PA_SDRAM + 0x100,
  170. .init_irq = s3c6410_init_irq,
  171. .map_io = smdk6410_map_io,
  172. .init_machine = smdk6410_machine_init,
  173. .timer = &s3c24xx_timer,
  174. MACHINE_END