pmac_cpufreq.c 18 KB

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  1. /*
  2. * arch/ppc/platforms/pmac_cpufreq.c
  3. *
  4. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  5. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * TODO: Need a big cleanup here. Basically, we need to have different
  12. * cpufreq_driver structures for the different type of HW instead of the
  13. * current mess. We also need to better deal with the detection of the
  14. * type of machine.
  15. *
  16. */
  17. #include <linux/config.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/errno.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/sched.h>
  24. #include <linux/adb.h>
  25. #include <linux/pmu.h>
  26. #include <linux/slab.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/init.h>
  29. #include <linux/sysdev.h>
  30. #include <linux/i2c.h>
  31. #include <linux/hardirq.h>
  32. #include <asm/prom.h>
  33. #include <asm/machdep.h>
  34. #include <asm/irq.h>
  35. #include <asm/pmac_feature.h>
  36. #include <asm/mmu_context.h>
  37. #include <asm/sections.h>
  38. #include <asm/cputable.h>
  39. #include <asm/time.h>
  40. #include <asm/system.h>
  41. #include <asm/open_pic.h>
  42. #include <asm/keylargo.h>
  43. /* WARNING !!! This will cause calibrate_delay() to be called,
  44. * but this is an __init function ! So you MUST go edit
  45. * init/main.c to make it non-init before enabling DEBUG_FREQ
  46. */
  47. #undef DEBUG_FREQ
  48. /*
  49. * There is a problem with the core cpufreq code on SMP kernels,
  50. * it won't recalculate the Bogomips properly
  51. */
  52. #ifdef CONFIG_SMP
  53. #warning "WARNING, CPUFREQ not recommended on SMP kernels"
  54. #endif
  55. extern void low_choose_7447a_dfs(int dfs);
  56. extern void low_choose_750fx_pll(int pll);
  57. extern void low_sleep_handler(void);
  58. /*
  59. * Currently, PowerMac cpufreq supports only high & low frequencies
  60. * that are set by the firmware
  61. */
  62. static unsigned int low_freq;
  63. static unsigned int hi_freq;
  64. static unsigned int cur_freq;
  65. static unsigned int sleep_freq;
  66. /*
  67. * Different models uses different mecanisms to switch the frequency
  68. */
  69. static int (*set_speed_proc)(int low_speed);
  70. static unsigned int (*get_speed_proc)(void);
  71. /*
  72. * Some definitions used by the various speedprocs
  73. */
  74. static u32 voltage_gpio;
  75. static u32 frequency_gpio;
  76. static u32 slew_done_gpio;
  77. static int no_schedule;
  78. static int has_cpu_l2lve;
  79. /* There are only two frequency states for each processor. Values
  80. * are in kHz for the time being.
  81. */
  82. #define CPUFREQ_HIGH 0
  83. #define CPUFREQ_LOW 1
  84. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  85. {CPUFREQ_HIGH, 0},
  86. {CPUFREQ_LOW, 0},
  87. {0, CPUFREQ_TABLE_END},
  88. };
  89. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  90. &cpufreq_freq_attr_scaling_available_freqs,
  91. NULL,
  92. };
  93. static inline void local_delay(unsigned long ms)
  94. {
  95. if (no_schedule)
  96. mdelay(ms);
  97. else
  98. msleep(ms);
  99. }
  100. static inline void wakeup_decrementer(void)
  101. {
  102. set_dec(tb_ticks_per_jiffy);
  103. /* No currently-supported powerbook has a 601,
  104. * so use get_tbl, not native
  105. */
  106. last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
  107. }
  108. #ifdef DEBUG_FREQ
  109. static inline void debug_calc_bogomips(void)
  110. {
  111. /* This will cause a recalc of bogomips and display the
  112. * result. We backup/restore the value to avoid affecting the
  113. * core cpufreq framework's own calculation.
  114. */
  115. extern void calibrate_delay(void);
  116. unsigned long save_lpj = loops_per_jiffy;
  117. calibrate_delay();
  118. loops_per_jiffy = save_lpj;
  119. }
  120. #endif /* DEBUG_FREQ */
  121. /* Switch CPU speed under 750FX CPU control
  122. */
  123. static int __pmac cpu_750fx_cpu_speed(int low_speed)
  124. {
  125. u32 hid2;
  126. if (low_speed == 0) {
  127. /* ramping up, set voltage first */
  128. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  129. /* Make sure we sleep for at least 1ms */
  130. local_delay(10);
  131. /* tweak L2 for high voltage */
  132. if (has_cpu_l2lve) {
  133. hid2 = mfspr(SPRN_HID2);
  134. hid2 &= ~0x2000;
  135. mtspr(SPRN_HID2, hid2);
  136. }
  137. }
  138. #ifdef CONFIG_6xx
  139. low_choose_750fx_pll(low_speed);
  140. #endif
  141. if (low_speed == 1) {
  142. /* tweak L2 for low voltage */
  143. if (has_cpu_l2lve) {
  144. hid2 = mfspr(SPRN_HID2);
  145. hid2 |= 0x2000;
  146. mtspr(SPRN_HID2, hid2);
  147. }
  148. /* ramping down, set voltage last */
  149. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  150. local_delay(10);
  151. }
  152. return 0;
  153. }
  154. static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
  155. {
  156. if (mfspr(SPRN_HID1) & HID1_PS)
  157. return low_freq;
  158. else
  159. return hi_freq;
  160. }
  161. /* Switch CPU speed using DFS */
  162. static int __pmac dfs_set_cpu_speed(int low_speed)
  163. {
  164. if (low_speed == 0) {
  165. /* ramping up, set voltage first */
  166. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  167. /* Make sure we sleep for at least 1ms */
  168. local_delay(1);
  169. }
  170. /* set frequency */
  171. #ifdef CONFIG_6xx
  172. low_choose_7447a_dfs(low_speed);
  173. #endif
  174. udelay(100);
  175. if (low_speed == 1) {
  176. /* ramping down, set voltage last */
  177. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  178. local_delay(1);
  179. }
  180. return 0;
  181. }
  182. static unsigned int __pmac dfs_get_cpu_speed(void)
  183. {
  184. if (mfspr(SPRN_HID1) & HID1_DFS)
  185. return low_freq;
  186. else
  187. return hi_freq;
  188. }
  189. /* Switch CPU speed using slewing GPIOs
  190. */
  191. static int __pmac gpios_set_cpu_speed(int low_speed)
  192. {
  193. int gpio, timeout = 0;
  194. /* If ramping up, set voltage first */
  195. if (low_speed == 0) {
  196. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  197. /* Delay is way too big but it's ok, we schedule */
  198. local_delay(10);
  199. }
  200. /* Set frequency */
  201. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  202. if (low_speed == ((gpio & 0x01) == 0))
  203. goto skip;
  204. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  205. low_speed ? 0x04 : 0x05);
  206. udelay(200);
  207. do {
  208. if (++timeout > 100)
  209. break;
  210. local_delay(1);
  211. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  212. } while((gpio & 0x02) == 0);
  213. skip:
  214. /* If ramping down, set voltage last */
  215. if (low_speed == 1) {
  216. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  217. /* Delay is way too big but it's ok, we schedule */
  218. local_delay(10);
  219. }
  220. #ifdef DEBUG_FREQ
  221. debug_calc_bogomips();
  222. #endif
  223. return 0;
  224. }
  225. /* Switch CPU speed under PMU control
  226. */
  227. static int __pmac pmu_set_cpu_speed(int low_speed)
  228. {
  229. struct adb_request req;
  230. unsigned long save_l2cr;
  231. unsigned long save_l3cr;
  232. unsigned int pic_prio;
  233. unsigned long flags;
  234. preempt_disable();
  235. #ifdef DEBUG_FREQ
  236. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  237. #endif
  238. /* Disable all interrupt sources on openpic */
  239. pic_prio = openpic_get_priority();
  240. openpic_set_priority(0xf);
  241. /* Make sure the decrementer won't interrupt us */
  242. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  243. /* Make sure any pending DEC interrupt occuring while we did
  244. * the above didn't re-enable the DEC */
  245. mb();
  246. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  247. /* We can now disable MSR_EE */
  248. local_irq_save(flags);
  249. /* Giveup the FPU & vec */
  250. enable_kernel_fp();
  251. #ifdef CONFIG_ALTIVEC
  252. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  253. enable_kernel_altivec();
  254. #endif /* CONFIG_ALTIVEC */
  255. /* Save & disable L2 and L3 caches */
  256. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  257. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  258. /* Send the new speed command. My assumption is that this command
  259. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  260. */
  261. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  262. while (!req.complete)
  263. pmu_poll();
  264. /* Prepare the northbridge for the speed transition */
  265. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  266. /* Call low level code to backup CPU state and recover from
  267. * hardware reset
  268. */
  269. low_sleep_handler();
  270. /* Restore the northbridge */
  271. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  272. /* Restore L2 cache */
  273. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  274. _set_L2CR(save_l2cr);
  275. /* Restore L3 cache */
  276. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  277. _set_L3CR(save_l3cr);
  278. /* Restore userland MMU context */
  279. set_context(current->active_mm->context, current->active_mm->pgd);
  280. #ifdef DEBUG_FREQ
  281. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  282. #endif
  283. /* Restore low level PMU operations */
  284. pmu_unlock();
  285. /* Restore decrementer */
  286. wakeup_decrementer();
  287. /* Restore interrupts */
  288. openpic_set_priority(pic_prio);
  289. /* Let interrupts flow again ... */
  290. local_irq_restore(flags);
  291. #ifdef DEBUG_FREQ
  292. debug_calc_bogomips();
  293. #endif
  294. preempt_enable();
  295. return 0;
  296. }
  297. static int __pmac do_set_cpu_speed(int speed_mode, int notify)
  298. {
  299. struct cpufreq_freqs freqs;
  300. unsigned long l3cr;
  301. static unsigned long prev_l3cr;
  302. freqs.old = cur_freq;
  303. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  304. freqs.cpu = smp_processor_id();
  305. if (freqs.old == freqs.new)
  306. return 0;
  307. if (notify)
  308. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  309. if (speed_mode == CPUFREQ_LOW &&
  310. cpu_has_feature(CPU_FTR_L3CR)) {
  311. l3cr = _get_L3CR();
  312. if (l3cr & L3CR_L3E) {
  313. prev_l3cr = l3cr;
  314. _set_L3CR(0);
  315. }
  316. }
  317. set_speed_proc(speed_mode == CPUFREQ_LOW);
  318. if (speed_mode == CPUFREQ_HIGH &&
  319. cpu_has_feature(CPU_FTR_L3CR)) {
  320. l3cr = _get_L3CR();
  321. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  322. _set_L3CR(prev_l3cr);
  323. }
  324. if (notify)
  325. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  326. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  327. return 0;
  328. }
  329. static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu)
  330. {
  331. return cur_freq;
  332. }
  333. static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy)
  334. {
  335. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  336. }
  337. static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
  338. unsigned int target_freq,
  339. unsigned int relation)
  340. {
  341. unsigned int newstate = 0;
  342. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  343. target_freq, relation, &newstate))
  344. return -EINVAL;
  345. return do_set_cpu_speed(newstate, 1);
  346. }
  347. unsigned int __pmac pmac_get_one_cpufreq(int i)
  348. {
  349. /* Supports only one CPU for now */
  350. return (i == 0) ? cur_freq : 0;
  351. }
  352. static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  353. {
  354. if (policy->cpu != 0)
  355. return -ENODEV;
  356. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  357. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  358. policy->cur = cur_freq;
  359. cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
  360. return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
  361. }
  362. static u32 __pmac read_gpio(struct device_node *np)
  363. {
  364. u32 *reg = (u32 *)get_property(np, "reg", NULL);
  365. u32 offset;
  366. if (reg == NULL)
  367. return 0;
  368. /* That works for all keylargos but shall be fixed properly
  369. * some day... The problem is that it seems we can't rely
  370. * on the "reg" property of the GPIO nodes, they are either
  371. * relative to the base of KeyLargo or to the base of the
  372. * GPIO space, and the device-tree doesn't help.
  373. */
  374. offset = *reg;
  375. if (offset < KEYLARGO_GPIO_LEVELS0)
  376. offset += KEYLARGO_GPIO_LEVELS0;
  377. return offset;
  378. }
  379. static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, u32 state)
  380. {
  381. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  382. * always force a speed change to high speed before sleep, to make sure
  383. * we have appropriate voltage and/or bus speed for the wakeup process,
  384. * and to make sure our loops_per_jiffies are "good enough", that is will
  385. * not cause too short delays if we sleep in low speed and wake in high
  386. * speed..
  387. */
  388. no_schedule = 1;
  389. sleep_freq = cur_freq;
  390. if (cur_freq == low_freq)
  391. do_set_cpu_speed(CPUFREQ_HIGH, 0);
  392. return 0;
  393. }
  394. static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
  395. {
  396. /* If we resume, first check if we have a get() function */
  397. if (get_speed_proc)
  398. cur_freq = get_speed_proc();
  399. else
  400. cur_freq = 0;
  401. /* We don't, hrm... we don't really know our speed here, best
  402. * is that we force a switch to whatever it was, which is
  403. * probably high speed due to our suspend() routine
  404. */
  405. do_set_cpu_speed(sleep_freq == low_freq ?
  406. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  407. no_schedule = 0;
  408. return 0;
  409. }
  410. static struct cpufreq_driver pmac_cpufreq_driver = {
  411. .verify = pmac_cpufreq_verify,
  412. .target = pmac_cpufreq_target,
  413. .get = pmac_cpufreq_get_speed,
  414. .init = pmac_cpufreq_cpu_init,
  415. .suspend = pmac_cpufreq_suspend,
  416. .resume = pmac_cpufreq_resume,
  417. .flags = CPUFREQ_PM_NO_WARN,
  418. .attr = pmac_cpu_freqs_attr,
  419. .name = "powermac",
  420. .owner = THIS_MODULE,
  421. };
  422. static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  423. {
  424. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  425. "voltage-gpio");
  426. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  427. "frequency-gpio");
  428. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  429. "slewing-done");
  430. u32 *value;
  431. /*
  432. * Check to see if it's GPIO driven or PMU only
  433. *
  434. * The way we extract the GPIO address is slightly hackish, but it
  435. * works well enough for now. We need to abstract the whole GPIO
  436. * stuff sooner or later anyway
  437. */
  438. if (volt_gpio_np)
  439. voltage_gpio = read_gpio(volt_gpio_np);
  440. if (freq_gpio_np)
  441. frequency_gpio = read_gpio(freq_gpio_np);
  442. if (slew_done_gpio_np)
  443. slew_done_gpio = read_gpio(slew_done_gpio_np);
  444. /* If we use the frequency GPIOs, calculate the min/max speeds based
  445. * on the bus frequencies
  446. */
  447. if (frequency_gpio && slew_done_gpio) {
  448. int lenp, rc;
  449. u32 *freqs, *ratio;
  450. freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
  451. lenp /= sizeof(u32);
  452. if (freqs == NULL || lenp != 2) {
  453. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  454. return 1;
  455. }
  456. ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
  457. if (ratio == NULL) {
  458. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  459. return 1;
  460. }
  461. /* Get the min/max bus frequencies */
  462. low_freq = min(freqs[0], freqs[1]);
  463. hi_freq = max(freqs[0], freqs[1]);
  464. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  465. * frequency, it claims it to be around 84Mhz on some models while
  466. * it appears to be approx. 101Mhz on all. Let's hack around here...
  467. * fortunately, we don't need to be too precise
  468. */
  469. if (low_freq < 98000000)
  470. low_freq = 101000000;
  471. /* Convert those to CPU core clocks */
  472. low_freq = (low_freq * (*ratio)) / 2000;
  473. hi_freq = (hi_freq * (*ratio)) / 2000;
  474. /* Now we get the frequencies, we read the GPIO to see what is out current
  475. * speed
  476. */
  477. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  478. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  479. set_speed_proc = gpios_set_cpu_speed;
  480. return 1;
  481. }
  482. /* If we use the PMU, look for the min & max frequencies in the
  483. * device-tree
  484. */
  485. value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
  486. if (!value)
  487. return 1;
  488. low_freq = (*value) / 1000;
  489. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  490. * here */
  491. if (low_freq < 100000)
  492. low_freq *= 10;
  493. value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
  494. if (!value)
  495. return 1;
  496. hi_freq = (*value) / 1000;
  497. set_speed_proc = pmu_set_cpu_speed;
  498. return 0;
  499. }
  500. static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
  501. {
  502. struct device_node *volt_gpio_np;
  503. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  504. return 1;
  505. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  506. if (volt_gpio_np)
  507. voltage_gpio = read_gpio(volt_gpio_np);
  508. if (!voltage_gpio){
  509. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  510. return 1;
  511. }
  512. /* OF only reports the high frequency */
  513. hi_freq = cur_freq;
  514. low_freq = cur_freq/2;
  515. /* Read actual frequency from CPU */
  516. cur_freq = dfs_get_cpu_speed();
  517. set_speed_proc = dfs_set_cpu_speed;
  518. get_speed_proc = dfs_get_cpu_speed;
  519. return 0;
  520. }
  521. static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode)
  522. {
  523. struct device_node *volt_gpio_np;
  524. u32 pvr, *value;
  525. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  526. return 1;
  527. hi_freq = cur_freq;
  528. value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
  529. if (!value)
  530. return 1;
  531. low_freq = (*value) / 1000;
  532. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  533. if (volt_gpio_np)
  534. voltage_gpio = read_gpio(volt_gpio_np);
  535. pvr = mfspr(SPRN_PVR);
  536. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  537. set_speed_proc = cpu_750fx_cpu_speed;
  538. get_speed_proc = cpu_750fx_get_cpu_speed;
  539. cur_freq = cpu_750fx_get_cpu_speed();
  540. return 0;
  541. }
  542. /* Currently, we support the following machines:
  543. *
  544. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  545. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  546. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  547. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  548. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  549. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  550. * - Recent MacRISC3 laptops
  551. * - All new machines with 7447A CPUs
  552. */
  553. static int __init pmac_cpufreq_setup(void)
  554. {
  555. struct device_node *cpunode;
  556. u32 *value;
  557. if (strstr(cmd_line, "nocpufreq"))
  558. return 0;
  559. /* Assume only one CPU */
  560. cpunode = find_type_devices("cpu");
  561. if (!cpunode)
  562. goto out;
  563. /* Get current cpu clock freq */
  564. value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
  565. if (!value)
  566. goto out;
  567. cur_freq = (*value) / 1000;
  568. /* Check for 7447A based MacRISC3 */
  569. if (machine_is_compatible("MacRISC3") &&
  570. get_property(cpunode, "dynamic-power-step", NULL) &&
  571. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  572. pmac_cpufreq_init_7447A(cpunode);
  573. /* Check for other MacRISC3 machines */
  574. } else if (machine_is_compatible("PowerBook3,4") ||
  575. machine_is_compatible("PowerBook3,5") ||
  576. machine_is_compatible("MacRISC3")) {
  577. pmac_cpufreq_init_MacRISC3(cpunode);
  578. /* Else check for iBook2 500/600 */
  579. } else if (machine_is_compatible("PowerBook4,1")) {
  580. hi_freq = cur_freq;
  581. low_freq = 400000;
  582. set_speed_proc = pmu_set_cpu_speed;
  583. }
  584. /* Else check for TiPb 400 & 500 */
  585. else if (machine_is_compatible("PowerBook3,2")) {
  586. /* We only know about the 400 MHz and the 500Mhz model
  587. * they both have 300 MHz as low frequency
  588. */
  589. if (cur_freq < 350000 || cur_freq > 550000)
  590. goto out;
  591. hi_freq = cur_freq;
  592. low_freq = 300000;
  593. set_speed_proc = pmu_set_cpu_speed;
  594. }
  595. /* Else check for 750FX */
  596. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  597. pmac_cpufreq_init_750FX(cpunode);
  598. out:
  599. if (set_speed_proc == NULL)
  600. return -ENODEV;
  601. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  602. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  603. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  604. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  605. low_freq/1000, hi_freq/1000, cur_freq/1000);
  606. return cpufreq_register_driver(&pmac_cpufreq_driver);
  607. }
  608. module_init(pmac_cpufreq_setup);