imx-pcm-fiq.c 9.5 KB

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  1. /*
  2. * imx-pcm-fiq.c -- ALSA Soc Audio Layer
  3. *
  4. * Copyright 2009 Sascha Hauer <s.hauer@pengutronix.de>
  5. *
  6. * This code is based on code copyrighted by Freescale,
  7. * Liam Girdwood, Javier Martin and probably others.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/delay.h>
  16. #include <linux/device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/init.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <sound/core.h>
  24. #include <sound/dmaengine_pcm.h>
  25. #include <sound/initval.h>
  26. #include <sound/pcm.h>
  27. #include <sound/pcm_params.h>
  28. #include <sound/soc.h>
  29. #include <asm/fiq.h>
  30. #include <linux/platform_data/asoc-imx-ssi.h>
  31. #include "imx-ssi.h"
  32. #include "imx-pcm.h"
  33. struct imx_pcm_runtime_data {
  34. unsigned int period;
  35. int periods;
  36. unsigned long offset;
  37. struct hrtimer hrt;
  38. int poll_time_ns;
  39. struct snd_pcm_substream *substream;
  40. atomic_t playing;
  41. atomic_t capturing;
  42. };
  43. static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt)
  44. {
  45. struct imx_pcm_runtime_data *iprtd =
  46. container_of(hrt, struct imx_pcm_runtime_data, hrt);
  47. struct snd_pcm_substream *substream = iprtd->substream;
  48. struct snd_pcm_runtime *runtime = substream->runtime;
  49. struct pt_regs regs;
  50. if (!atomic_read(&iprtd->playing) && !atomic_read(&iprtd->capturing))
  51. return HRTIMER_NORESTART;
  52. get_fiq_regs(&regs);
  53. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  54. iprtd->offset = regs.ARM_r8 & 0xffff;
  55. else
  56. iprtd->offset = regs.ARM_r9 & 0xffff;
  57. snd_pcm_period_elapsed(substream);
  58. hrtimer_forward_now(hrt, ns_to_ktime(iprtd->poll_time_ns));
  59. return HRTIMER_RESTART;
  60. }
  61. static struct fiq_handler fh = {
  62. .name = DRV_NAME,
  63. };
  64. static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream,
  65. struct snd_pcm_hw_params *params)
  66. {
  67. struct snd_pcm_runtime *runtime = substream->runtime;
  68. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  69. iprtd->periods = params_periods(params);
  70. iprtd->period = params_period_bytes(params);
  71. iprtd->offset = 0;
  72. iprtd->poll_time_ns = 1000000000 / params_rate(params) *
  73. params_period_size(params);
  74. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  75. return 0;
  76. }
  77. static int snd_imx_pcm_prepare(struct snd_pcm_substream *substream)
  78. {
  79. struct snd_pcm_runtime *runtime = substream->runtime;
  80. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  81. struct pt_regs regs;
  82. get_fiq_regs(&regs);
  83. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  84. regs.ARM_r8 = (iprtd->period * iprtd->periods - 1) << 16;
  85. else
  86. regs.ARM_r9 = (iprtd->period * iprtd->periods - 1) << 16;
  87. set_fiq_regs(&regs);
  88. return 0;
  89. }
  90. static int imx_pcm_fiq;
  91. static int snd_imx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  92. {
  93. struct snd_pcm_runtime *runtime = substream->runtime;
  94. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  95. switch (cmd) {
  96. case SNDRV_PCM_TRIGGER_START:
  97. case SNDRV_PCM_TRIGGER_RESUME:
  98. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  99. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  100. atomic_set(&iprtd->playing, 1);
  101. else
  102. atomic_set(&iprtd->capturing, 1);
  103. hrtimer_start(&iprtd->hrt, ns_to_ktime(iprtd->poll_time_ns),
  104. HRTIMER_MODE_REL);
  105. enable_fiq(imx_pcm_fiq);
  106. break;
  107. case SNDRV_PCM_TRIGGER_STOP:
  108. case SNDRV_PCM_TRIGGER_SUSPEND:
  109. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  110. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  111. atomic_set(&iprtd->playing, 0);
  112. else
  113. atomic_set(&iprtd->capturing, 0);
  114. if (!atomic_read(&iprtd->playing) &&
  115. !atomic_read(&iprtd->capturing))
  116. disable_fiq(imx_pcm_fiq);
  117. break;
  118. default:
  119. return -EINVAL;
  120. }
  121. return 0;
  122. }
  123. static snd_pcm_uframes_t snd_imx_pcm_pointer(struct snd_pcm_substream *substream)
  124. {
  125. struct snd_pcm_runtime *runtime = substream->runtime;
  126. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  127. return bytes_to_frames(substream->runtime, iprtd->offset);
  128. }
  129. static struct snd_pcm_hardware snd_imx_hardware = {
  130. .info = SNDRV_PCM_INFO_INTERLEAVED |
  131. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  132. SNDRV_PCM_INFO_MMAP |
  133. SNDRV_PCM_INFO_MMAP_VALID |
  134. SNDRV_PCM_INFO_PAUSE |
  135. SNDRV_PCM_INFO_RESUME,
  136. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  137. .rate_min = 8000,
  138. .channels_min = 2,
  139. .channels_max = 2,
  140. .buffer_bytes_max = IMX_SSI_DMABUF_SIZE,
  141. .period_bytes_min = 128,
  142. .period_bytes_max = 16 * 1024,
  143. .periods_min = 4,
  144. .periods_max = 255,
  145. .fifo_size = 0,
  146. };
  147. static int snd_imx_open(struct snd_pcm_substream *substream)
  148. {
  149. struct snd_pcm_runtime *runtime = substream->runtime;
  150. struct imx_pcm_runtime_data *iprtd;
  151. int ret;
  152. iprtd = kzalloc(sizeof(*iprtd), GFP_KERNEL);
  153. if (iprtd == NULL)
  154. return -ENOMEM;
  155. runtime->private_data = iprtd;
  156. iprtd->substream = substream;
  157. atomic_set(&iprtd->playing, 0);
  158. atomic_set(&iprtd->capturing, 0);
  159. hrtimer_init(&iprtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  160. iprtd->hrt.function = snd_hrtimer_callback;
  161. ret = snd_pcm_hw_constraint_integer(substream->runtime,
  162. SNDRV_PCM_HW_PARAM_PERIODS);
  163. if (ret < 0) {
  164. kfree(iprtd);
  165. return ret;
  166. }
  167. snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
  168. return 0;
  169. }
  170. static int snd_imx_close(struct snd_pcm_substream *substream)
  171. {
  172. struct snd_pcm_runtime *runtime = substream->runtime;
  173. struct imx_pcm_runtime_data *iprtd = runtime->private_data;
  174. hrtimer_cancel(&iprtd->hrt);
  175. kfree(iprtd);
  176. return 0;
  177. }
  178. static int snd_imx_pcm_mmap(struct snd_pcm_substream *substream,
  179. struct vm_area_struct *vma)
  180. {
  181. struct snd_pcm_runtime *runtime = substream->runtime;
  182. int ret;
  183. ret = dma_mmap_writecombine(substream->pcm->card->dev, vma,
  184. runtime->dma_area, runtime->dma_addr, runtime->dma_bytes);
  185. pr_debug("%s: ret: %d %p 0x%08x 0x%08x\n", __func__, ret,
  186. runtime->dma_area,
  187. runtime->dma_addr,
  188. runtime->dma_bytes);
  189. return ret;
  190. }
  191. static struct snd_pcm_ops imx_pcm_ops = {
  192. .open = snd_imx_open,
  193. .close = snd_imx_close,
  194. .ioctl = snd_pcm_lib_ioctl,
  195. .hw_params = snd_imx_pcm_hw_params,
  196. .prepare = snd_imx_pcm_prepare,
  197. .trigger = snd_imx_pcm_trigger,
  198. .pointer = snd_imx_pcm_pointer,
  199. .mmap = snd_imx_pcm_mmap,
  200. };
  201. static int imx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
  202. {
  203. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  204. struct snd_dma_buffer *buf = &substream->dma_buffer;
  205. size_t size = IMX_SSI_DMABUF_SIZE;
  206. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  207. buf->dev.dev = pcm->card->dev;
  208. buf->private_data = NULL;
  209. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  210. &buf->addr, GFP_KERNEL);
  211. if (!buf->area)
  212. return -ENOMEM;
  213. buf->bytes = size;
  214. return 0;
  215. }
  216. static u64 imx_pcm_dmamask = DMA_BIT_MASK(32);
  217. static int imx_pcm_new(struct snd_soc_pcm_runtime *rtd)
  218. {
  219. struct snd_card *card = rtd->card->snd_card;
  220. struct snd_pcm *pcm = rtd->pcm;
  221. int ret = 0;
  222. if (!card->dev->dma_mask)
  223. card->dev->dma_mask = &imx_pcm_dmamask;
  224. if (!card->dev->coherent_dma_mask)
  225. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  226. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  227. ret = imx_pcm_preallocate_dma_buffer(pcm,
  228. SNDRV_PCM_STREAM_PLAYBACK);
  229. if (ret)
  230. goto out;
  231. }
  232. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  233. ret = imx_pcm_preallocate_dma_buffer(pcm,
  234. SNDRV_PCM_STREAM_CAPTURE);
  235. if (ret)
  236. goto out;
  237. }
  238. out:
  239. return ret;
  240. }
  241. static int ssi_irq = 0;
  242. static int imx_pcm_fiq_new(struct snd_soc_pcm_runtime *rtd)
  243. {
  244. struct snd_pcm *pcm = rtd->pcm;
  245. struct snd_pcm_substream *substream;
  246. int ret;
  247. ret = imx_pcm_new(rtd);
  248. if (ret)
  249. return ret;
  250. substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  251. if (substream) {
  252. struct snd_dma_buffer *buf = &substream->dma_buffer;
  253. imx_ssi_fiq_tx_buffer = (unsigned long)buf->area;
  254. }
  255. substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
  256. if (substream) {
  257. struct snd_dma_buffer *buf = &substream->dma_buffer;
  258. imx_ssi_fiq_rx_buffer = (unsigned long)buf->area;
  259. }
  260. set_fiq_handler(&imx_ssi_fiq_start,
  261. &imx_ssi_fiq_end - &imx_ssi_fiq_start);
  262. return 0;
  263. }
  264. static void imx_pcm_free(struct snd_pcm *pcm)
  265. {
  266. struct snd_pcm_substream *substream;
  267. struct snd_dma_buffer *buf;
  268. int stream;
  269. for (stream = 0; stream < 2; stream++) {
  270. substream = pcm->streams[stream].substream;
  271. if (!substream)
  272. continue;
  273. buf = &substream->dma_buffer;
  274. if (!buf->area)
  275. continue;
  276. dma_free_writecombine(pcm->card->dev, buf->bytes,
  277. buf->area, buf->addr);
  278. buf->area = NULL;
  279. }
  280. }
  281. static void imx_pcm_fiq_free(struct snd_pcm *pcm)
  282. {
  283. mxc_set_irq_fiq(ssi_irq, 0);
  284. release_fiq(&fh);
  285. imx_pcm_free(pcm);
  286. }
  287. static struct snd_soc_platform_driver imx_soc_platform_fiq = {
  288. .ops = &imx_pcm_ops,
  289. .pcm_new = imx_pcm_fiq_new,
  290. .pcm_free = imx_pcm_fiq_free,
  291. };
  292. int imx_pcm_fiq_init(struct platform_device *pdev,
  293. struct imx_pcm_fiq_params *params)
  294. {
  295. int ret;
  296. ret = claim_fiq(&fh);
  297. if (ret) {
  298. dev_err(&pdev->dev, "failed to claim fiq: %d", ret);
  299. return ret;
  300. }
  301. mxc_set_irq_fiq(params->irq, 1);
  302. ssi_irq = params->irq;
  303. imx_pcm_fiq = params->irq;
  304. imx_ssi_fiq_base = (unsigned long)params->base;
  305. params->dma_params_tx->maxburst = 4;
  306. params->dma_params_rx->maxburst = 6;
  307. ret = snd_soc_register_platform(&pdev->dev, &imx_soc_platform_fiq);
  308. if (ret)
  309. goto failed_register;
  310. return 0;
  311. failed_register:
  312. mxc_set_irq_fiq(ssi_irq, 0);
  313. release_fiq(&fh);
  314. return ret;
  315. }
  316. EXPORT_SYMBOL_GPL(imx_pcm_fiq_init);
  317. void imx_pcm_fiq_exit(struct platform_device *pdev)
  318. {
  319. snd_soc_unregister_platform(&pdev->dev);
  320. }
  321. EXPORT_SYMBOL_GPL(imx_pcm_fiq_exit);
  322. MODULE_LICENSE("GPL");