gpio-mcp23s08.c 12 KB

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  1. /*
  2. * MCP23S08 SPI gpio expander driver
  3. */
  4. #include <linux/kernel.h>
  5. #include <linux/device.h>
  6. #include <linux/mutex.h>
  7. #include <linux/gpio.h>
  8. #include <linux/spi/spi.h>
  9. #include <linux/spi/mcp23s08.h>
  10. #include <linux/slab.h>
  11. #include <asm/byteorder.h>
  12. /**
  13. * MCP types supported by driver
  14. */
  15. #define MCP_TYPE_S08 0
  16. #define MCP_TYPE_S17 1
  17. /* Registers are all 8 bits wide.
  18. *
  19. * The mcp23s17 has twice as many bits, and can be configured to work
  20. * with either 16 bit registers or with two adjacent 8 bit banks.
  21. *
  22. * Also, there are I2C versions of both chips.
  23. */
  24. #define MCP_IODIR 0x00 /* init/reset: all ones */
  25. #define MCP_IPOL 0x01
  26. #define MCP_GPINTEN 0x02
  27. #define MCP_DEFVAL 0x03
  28. #define MCP_INTCON 0x04
  29. #define MCP_IOCON 0x05
  30. # define IOCON_SEQOP (1 << 5)
  31. # define IOCON_HAEN (1 << 3)
  32. # define IOCON_ODR (1 << 2)
  33. # define IOCON_INTPOL (1 << 1)
  34. #define MCP_GPPU 0x06
  35. #define MCP_INTF 0x07
  36. #define MCP_INTCAP 0x08
  37. #define MCP_GPIO 0x09
  38. #define MCP_OLAT 0x0a
  39. struct mcp23s08;
  40. struct mcp23s08_ops {
  41. int (*read)(struct mcp23s08 *mcp, unsigned reg);
  42. int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
  43. int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
  44. u16 *vals, unsigned n);
  45. };
  46. struct mcp23s08 {
  47. u8 addr;
  48. u16 cache[11];
  49. /* lock protects the cached values */
  50. struct mutex lock;
  51. struct gpio_chip chip;
  52. const struct mcp23s08_ops *ops;
  53. void *data; /* ops specific data */
  54. };
  55. /* A given spi_device can represent up to eight mcp23sxx chips
  56. * sharing the same chipselect but using different addresses
  57. * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
  58. * Driver data holds all the per-chip data.
  59. */
  60. struct mcp23s08_driver_data {
  61. unsigned ngpio;
  62. struct mcp23s08 *mcp[8];
  63. struct mcp23s08 chip[];
  64. };
  65. #ifdef CONFIG_SPI_MASTER
  66. static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
  67. {
  68. u8 tx[2], rx[1];
  69. int status;
  70. tx[0] = mcp->addr | 0x01;
  71. tx[1] = reg;
  72. status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx);
  73. return (status < 0) ? status : rx[0];
  74. }
  75. static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  76. {
  77. u8 tx[3];
  78. tx[0] = mcp->addr;
  79. tx[1] = reg;
  80. tx[2] = val;
  81. return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0);
  82. }
  83. static int
  84. mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  85. {
  86. u8 tx[2], *tmp;
  87. int status;
  88. if ((n + reg) > sizeof mcp->cache)
  89. return -EINVAL;
  90. tx[0] = mcp->addr | 0x01;
  91. tx[1] = reg;
  92. tmp = (u8 *)vals;
  93. status = spi_write_then_read(mcp->data, tx, sizeof tx, tmp, n);
  94. if (status >= 0) {
  95. while (n--)
  96. vals[n] = tmp[n]; /* expand to 16bit */
  97. }
  98. return status;
  99. }
  100. static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
  101. {
  102. u8 tx[2], rx[2];
  103. int status;
  104. tx[0] = mcp->addr | 0x01;
  105. tx[1] = reg << 1;
  106. status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx);
  107. return (status < 0) ? status : (rx[0] | (rx[1] << 8));
  108. }
  109. static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  110. {
  111. u8 tx[4];
  112. tx[0] = mcp->addr;
  113. tx[1] = reg << 1;
  114. tx[2] = val;
  115. tx[3] = val >> 8;
  116. return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0);
  117. }
  118. static int
  119. mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  120. {
  121. u8 tx[2];
  122. int status;
  123. if ((n + reg) > sizeof mcp->cache)
  124. return -EINVAL;
  125. tx[0] = mcp->addr | 0x01;
  126. tx[1] = reg << 1;
  127. status = spi_write_then_read(mcp->data, tx, sizeof tx,
  128. (u8 *)vals, n * 2);
  129. if (status >= 0) {
  130. while (n--)
  131. vals[n] = __le16_to_cpu((__le16)vals[n]);
  132. }
  133. return status;
  134. }
  135. static const struct mcp23s08_ops mcp23s08_ops = {
  136. .read = mcp23s08_read,
  137. .write = mcp23s08_write,
  138. .read_regs = mcp23s08_read_regs,
  139. };
  140. static const struct mcp23s08_ops mcp23s17_ops = {
  141. .read = mcp23s17_read,
  142. .write = mcp23s17_write,
  143. .read_regs = mcp23s17_read_regs,
  144. };
  145. #endif /* CONFIG_SPI_MASTER */
  146. /*----------------------------------------------------------------------*/
  147. static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
  148. {
  149. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  150. int status;
  151. mutex_lock(&mcp->lock);
  152. mcp->cache[MCP_IODIR] |= (1 << offset);
  153. status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
  154. mutex_unlock(&mcp->lock);
  155. return status;
  156. }
  157. static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
  158. {
  159. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  160. int status;
  161. mutex_lock(&mcp->lock);
  162. /* REVISIT reading this clears any IRQ ... */
  163. status = mcp->ops->read(mcp, MCP_GPIO);
  164. if (status < 0)
  165. status = 0;
  166. else {
  167. mcp->cache[MCP_GPIO] = status;
  168. status = !!(status & (1 << offset));
  169. }
  170. mutex_unlock(&mcp->lock);
  171. return status;
  172. }
  173. static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
  174. {
  175. unsigned olat = mcp->cache[MCP_OLAT];
  176. if (value)
  177. olat |= mask;
  178. else
  179. olat &= ~mask;
  180. mcp->cache[MCP_OLAT] = olat;
  181. return mcp->ops->write(mcp, MCP_OLAT, olat);
  182. }
  183. static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
  184. {
  185. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  186. unsigned mask = 1 << offset;
  187. mutex_lock(&mcp->lock);
  188. __mcp23s08_set(mcp, mask, value);
  189. mutex_unlock(&mcp->lock);
  190. }
  191. static int
  192. mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
  193. {
  194. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  195. unsigned mask = 1 << offset;
  196. int status;
  197. mutex_lock(&mcp->lock);
  198. status = __mcp23s08_set(mcp, mask, value);
  199. if (status == 0) {
  200. mcp->cache[MCP_IODIR] &= ~mask;
  201. status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
  202. }
  203. mutex_unlock(&mcp->lock);
  204. return status;
  205. }
  206. /*----------------------------------------------------------------------*/
  207. #ifdef CONFIG_DEBUG_FS
  208. #include <linux/seq_file.h>
  209. /*
  210. * This shows more info than the generic gpio dump code:
  211. * pullups, deglitching, open drain drive.
  212. */
  213. static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
  214. {
  215. struct mcp23s08 *mcp;
  216. char bank;
  217. int t;
  218. unsigned mask;
  219. mcp = container_of(chip, struct mcp23s08, chip);
  220. /* NOTE: we only handle one bank for now ... */
  221. bank = '0' + ((mcp->addr >> 1) & 0x7);
  222. mutex_lock(&mcp->lock);
  223. t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
  224. if (t < 0) {
  225. seq_printf(s, " I/O ERROR %d\n", t);
  226. goto done;
  227. }
  228. for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
  229. const char *label;
  230. label = gpiochip_is_requested(chip, t);
  231. if (!label)
  232. continue;
  233. seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
  234. chip->base + t, bank, t, label,
  235. (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
  236. (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
  237. (mcp->cache[MCP_GPPU] & mask) ? " " : "up");
  238. /* NOTE: ignoring the irq-related registers */
  239. seq_printf(s, "\n");
  240. }
  241. done:
  242. mutex_unlock(&mcp->lock);
  243. }
  244. #else
  245. #define mcp23s08_dbg_show NULL
  246. #endif
  247. /*----------------------------------------------------------------------*/
  248. static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
  249. void *data, unsigned addr,
  250. unsigned type, unsigned base, unsigned pullups)
  251. {
  252. int status;
  253. mutex_init(&mcp->lock);
  254. mcp->data = data;
  255. mcp->addr = addr;
  256. mcp->chip.direction_input = mcp23s08_direction_input;
  257. mcp->chip.get = mcp23s08_get;
  258. mcp->chip.direction_output = mcp23s08_direction_output;
  259. mcp->chip.set = mcp23s08_set;
  260. mcp->chip.dbg_show = mcp23s08_dbg_show;
  261. switch (type) {
  262. #ifdef CONFIG_SPI_MASTER
  263. case MCP_TYPE_S08:
  264. mcp->ops = &mcp23s08_ops;
  265. mcp->chip.ngpio = 8;
  266. mcp->chip.label = "mcp23s08";
  267. break;
  268. case MCP_TYPE_S17:
  269. mcp->ops = &mcp23s17_ops;
  270. mcp->chip.ngpio = 16;
  271. mcp->chip.label = "mcp23s17";
  272. break;
  273. #endif /* CONFIG_SPI_MASTER */
  274. default:
  275. dev_err(dev, "invalid device type (%d)\n", type);
  276. return -EINVAL;
  277. }
  278. mcp->chip.base = base;
  279. mcp->chip.can_sleep = 1;
  280. mcp->chip.dev = dev;
  281. mcp->chip.owner = THIS_MODULE;
  282. /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
  283. * and MCP_IOCON.HAEN = 1, so we work with all chips.
  284. */
  285. status = mcp->ops->read(mcp, MCP_IOCON);
  286. if (status < 0)
  287. goto fail;
  288. if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN)) {
  289. /* mcp23s17 has IOCON twice, make sure they are in sync */
  290. status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
  291. status |= IOCON_HAEN | (IOCON_HAEN << 8);
  292. status = mcp->ops->write(mcp, MCP_IOCON, status);
  293. if (status < 0)
  294. goto fail;
  295. }
  296. /* configure ~100K pullups */
  297. status = mcp->ops->write(mcp, MCP_GPPU, pullups);
  298. if (status < 0)
  299. goto fail;
  300. status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
  301. if (status < 0)
  302. goto fail;
  303. /* disable inverter on input */
  304. if (mcp->cache[MCP_IPOL] != 0) {
  305. mcp->cache[MCP_IPOL] = 0;
  306. status = mcp->ops->write(mcp, MCP_IPOL, 0);
  307. if (status < 0)
  308. goto fail;
  309. }
  310. /* disable irqs */
  311. if (mcp->cache[MCP_GPINTEN] != 0) {
  312. mcp->cache[MCP_GPINTEN] = 0;
  313. status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
  314. if (status < 0)
  315. goto fail;
  316. }
  317. status = gpiochip_add(&mcp->chip);
  318. fail:
  319. if (status < 0)
  320. dev_dbg(dev, "can't setup chip %d, --> %d\n",
  321. addr, status);
  322. return status;
  323. }
  324. #ifdef CONFIG_SPI_MASTER
  325. static int mcp23s08_probe(struct spi_device *spi)
  326. {
  327. struct mcp23s08_platform_data *pdata;
  328. unsigned addr;
  329. unsigned chips = 0;
  330. struct mcp23s08_driver_data *data;
  331. int status, type;
  332. unsigned base;
  333. type = spi_get_device_id(spi)->driver_data;
  334. pdata = spi->dev.platform_data;
  335. if (!pdata || !gpio_is_valid(pdata->base)) {
  336. dev_dbg(&spi->dev, "invalid or missing platform data\n");
  337. return -EINVAL;
  338. }
  339. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  340. if (!pdata->chip[addr].is_present)
  341. continue;
  342. chips++;
  343. if ((type == MCP_TYPE_S08) && (addr > 3)) {
  344. dev_err(&spi->dev,
  345. "mcp23s08 only supports address 0..3\n");
  346. return -EINVAL;
  347. }
  348. }
  349. if (!chips)
  350. return -ENODEV;
  351. data = kzalloc(sizeof *data + chips * sizeof(struct mcp23s08),
  352. GFP_KERNEL);
  353. if (!data)
  354. return -ENOMEM;
  355. spi_set_drvdata(spi, data);
  356. base = pdata->base;
  357. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  358. if (!pdata->chip[addr].is_present)
  359. continue;
  360. chips--;
  361. data->mcp[addr] = &data->chip[chips];
  362. status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
  363. 0x40 | (addr << 1), type, base,
  364. pdata->chip[addr].pullups);
  365. if (status < 0)
  366. goto fail;
  367. base += (type == MCP_TYPE_S17) ? 16 : 8;
  368. }
  369. data->ngpio = base - pdata->base;
  370. /* NOTE: these chips have a relatively sane IRQ framework, with
  371. * per-signal masking and level/edge triggering. It's not yet
  372. * handled here...
  373. */
  374. return 0;
  375. fail:
  376. for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
  377. int tmp;
  378. if (!data->mcp[addr])
  379. continue;
  380. tmp = gpiochip_remove(&data->mcp[addr]->chip);
  381. if (tmp < 0)
  382. dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
  383. }
  384. kfree(data);
  385. return status;
  386. }
  387. static int mcp23s08_remove(struct spi_device *spi)
  388. {
  389. struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
  390. unsigned addr;
  391. int status = 0;
  392. for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
  393. int tmp;
  394. if (!data->mcp[addr])
  395. continue;
  396. tmp = gpiochip_remove(&data->mcp[addr]->chip);
  397. if (tmp < 0) {
  398. dev_err(&spi->dev, "%s --> %d\n", "remove", tmp);
  399. status = tmp;
  400. }
  401. }
  402. if (status == 0)
  403. kfree(data);
  404. return status;
  405. }
  406. static const struct spi_device_id mcp23s08_ids[] = {
  407. { "mcp23s08", MCP_TYPE_S08 },
  408. { "mcp23s17", MCP_TYPE_S17 },
  409. { },
  410. };
  411. MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
  412. static struct spi_driver mcp23s08_driver = {
  413. .probe = mcp23s08_probe,
  414. .remove = mcp23s08_remove,
  415. .id_table = mcp23s08_ids,
  416. .driver = {
  417. .name = "mcp23s08",
  418. .owner = THIS_MODULE,
  419. },
  420. };
  421. static int __init mcp23s08_spi_init(void)
  422. {
  423. return spi_register_driver(&mcp23s08_driver);
  424. }
  425. static void mcp23s08_spi_exit(void)
  426. {
  427. spi_unregister_driver(&mcp23s08_driver);
  428. }
  429. #else
  430. static int __init mcp23s08_spi_init(void) { return 0; }
  431. static void mcp23s08_spi_exit(void) { }
  432. #endif /* CONFIG_SPI_MASTER */
  433. /*----------------------------------------------------------------------*/
  434. static int __init mcp23s08_init(void)
  435. {
  436. return mcp23s08_spi_init();
  437. }
  438. /* register after spi postcore initcall and before
  439. * subsys initcalls that may rely on these GPIOs
  440. */
  441. subsys_initcall(mcp23s08_init);
  442. static void __exit mcp23s08_exit(void)
  443. {
  444. mcp23s08_spi_exit();
  445. }
  446. module_exit(mcp23s08_exit);
  447. MODULE_LICENSE("GPL");