synclink_cs.c 115 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/pci.h>
  43. #include <linux/tty.h>
  44. #include <linux/tty_flip.h>
  45. #include <linux/serial.h>
  46. #include <linux/major.h>
  47. #include <linux/string.h>
  48. #include <linux/fcntl.h>
  49. #include <linux/ptrace.h>
  50. #include <linux/ioport.h>
  51. #include <linux/mm.h>
  52. #include <linux/slab.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/vmalloc.h>
  55. #include <linux/init.h>
  56. #include <linux/delay.h>
  57. #include <linux/ioctl.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/dma.h>
  62. #include <linux/bitops.h>
  63. #include <asm/types.h>
  64. #include <linux/termios.h>
  65. #include <linux/workqueue.h>
  66. #include <linux/hdlc.h>
  67. #include <pcmcia/cs_types.h>
  68. #include <pcmcia/cs.h>
  69. #include <pcmcia/cistpl.h>
  70. #include <pcmcia/cisreg.h>
  71. #include <pcmcia/ds.h>
  72. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  73. #define SYNCLINK_GENERIC_HDLC 1
  74. #else
  75. #define SYNCLINK_GENERIC_HDLC 0
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. #include "linux/synclink.h"
  83. static MGSL_PARAMS default_params = {
  84. MGSL_MODE_HDLC, /* unsigned long mode */
  85. 0, /* unsigned char loopback; */
  86. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  87. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  88. 0, /* unsigned long clock_speed; */
  89. 0xff, /* unsigned char addr_filter; */
  90. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  91. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  92. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  93. 9600, /* unsigned long data_rate; */
  94. 8, /* unsigned char data_bits; */
  95. 1, /* unsigned char stop_bits; */
  96. ASYNC_PARITY_NONE /* unsigned char parity; */
  97. };
  98. typedef struct
  99. {
  100. int count;
  101. unsigned char status;
  102. char data[1];
  103. } RXBUF;
  104. /* The queue of BH actions to be performed */
  105. #define BH_RECEIVE 1
  106. #define BH_TRANSMIT 2
  107. #define BH_STATUS 4
  108. #define IO_PIN_SHUTDOWN_LIMIT 100
  109. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  110. struct _input_signal_events {
  111. int ri_up;
  112. int ri_down;
  113. int dsr_up;
  114. int dsr_down;
  115. int dcd_up;
  116. int dcd_down;
  117. int cts_up;
  118. int cts_down;
  119. };
  120. /*
  121. * Device instance data structure
  122. */
  123. typedef struct _mgslpc_info {
  124. void *if_ptr; /* General purpose pointer (used by SPPP) */
  125. int magic;
  126. int flags;
  127. int count; /* count of opens */
  128. int line;
  129. unsigned short close_delay;
  130. unsigned short closing_wait; /* time to wait before closing */
  131. struct mgsl_icount icount;
  132. struct tty_struct *tty;
  133. int timeout;
  134. int x_char; /* xon/xoff character */
  135. int blocked_open; /* # of blocked opens */
  136. unsigned char read_status_mask;
  137. unsigned char ignore_status_mask;
  138. unsigned char *tx_buf;
  139. int tx_put;
  140. int tx_get;
  141. int tx_count;
  142. /* circular list of fixed length rx buffers */
  143. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  144. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  145. int rx_put; /* index of next empty rx buffer */
  146. int rx_get; /* index of next full rx buffer */
  147. int rx_buf_size; /* size in bytes of single rx buffer */
  148. int rx_buf_count; /* total number of rx buffers */
  149. int rx_frame_count; /* number of full rx buffers */
  150. wait_queue_head_t open_wait;
  151. wait_queue_head_t close_wait;
  152. wait_queue_head_t status_event_wait_q;
  153. wait_queue_head_t event_wait_q;
  154. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  155. struct _mgslpc_info *next_device; /* device list link */
  156. unsigned short imra_value;
  157. unsigned short imrb_value;
  158. unsigned char pim_value;
  159. spinlock_t lock;
  160. struct work_struct task; /* task structure for scheduling bh */
  161. u32 max_frame_size;
  162. u32 pending_bh;
  163. int bh_running;
  164. int bh_requested;
  165. int dcd_chkcount; /* check counts to prevent */
  166. int cts_chkcount; /* too many IRQs if a signal */
  167. int dsr_chkcount; /* is floating */
  168. int ri_chkcount;
  169. int rx_enabled;
  170. int rx_overflow;
  171. int tx_enabled;
  172. int tx_active;
  173. int tx_aborting;
  174. u32 idle_mode;
  175. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  176. char device_name[25]; /* device instance name */
  177. unsigned int io_base; /* base I/O address of adapter */
  178. unsigned int irq_level;
  179. MGSL_PARAMS params; /* communications parameters */
  180. unsigned char serial_signals; /* current serial signal states */
  181. char irq_occurred; /* for diagnostics use */
  182. char testing_irq;
  183. unsigned int init_error; /* startup error (DIAGS) */
  184. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  185. BOOLEAN drop_rts_on_tx_done;
  186. struct _input_signal_events input_signal_events;
  187. /* PCMCIA support */
  188. struct pcmcia_device *p_dev;
  189. dev_node_t node;
  190. int stop;
  191. /* SPPP/Cisco HDLC device parts */
  192. int netcount;
  193. int dosyncppp;
  194. spinlock_t netlock;
  195. #if SYNCLINK_GENERIC_HDLC
  196. struct net_device *netdev;
  197. #endif
  198. } MGSLPC_INFO;
  199. #define MGSLPC_MAGIC 0x5402
  200. /*
  201. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  202. */
  203. #define TXBUFSIZE 4096
  204. #define CHA 0x00 /* channel A offset */
  205. #define CHB 0x40 /* channel B offset */
  206. /*
  207. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  208. */
  209. #undef PVR
  210. #define RXFIFO 0
  211. #define TXFIFO 0
  212. #define STAR 0x20
  213. #define CMDR 0x20
  214. #define RSTA 0x21
  215. #define PRE 0x21
  216. #define MODE 0x22
  217. #define TIMR 0x23
  218. #define XAD1 0x24
  219. #define XAD2 0x25
  220. #define RAH1 0x26
  221. #define RAH2 0x27
  222. #define DAFO 0x27
  223. #define RAL1 0x28
  224. #define RFC 0x28
  225. #define RHCR 0x29
  226. #define RAL2 0x29
  227. #define RBCL 0x2a
  228. #define XBCL 0x2a
  229. #define RBCH 0x2b
  230. #define XBCH 0x2b
  231. #define CCR0 0x2c
  232. #define CCR1 0x2d
  233. #define CCR2 0x2e
  234. #define CCR3 0x2f
  235. #define VSTR 0x34
  236. #define BGR 0x34
  237. #define RLCR 0x35
  238. #define AML 0x36
  239. #define AMH 0x37
  240. #define GIS 0x38
  241. #define IVA 0x38
  242. #define IPC 0x39
  243. #define ISR 0x3a
  244. #define IMR 0x3a
  245. #define PVR 0x3c
  246. #define PIS 0x3d
  247. #define PIM 0x3d
  248. #define PCR 0x3e
  249. #define CCR4 0x3f
  250. // IMR/ISR
  251. #define IRQ_BREAK_ON BIT15 // rx break detected
  252. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  253. #define IRQ_ALLSENT BIT13 // all sent
  254. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  255. #define IRQ_TIMER BIT11 // timer interrupt
  256. #define IRQ_CTS BIT10 // CTS status change
  257. #define IRQ_TXREPEAT BIT9 // tx message repeat
  258. #define IRQ_TXFIFO BIT8 // transmit pool ready
  259. #define IRQ_RXEOM BIT7 // receive message end
  260. #define IRQ_EXITHUNT BIT6 // receive frame start
  261. #define IRQ_RXTIME BIT6 // rx char timeout
  262. #define IRQ_DCD BIT2 // carrier detect status change
  263. #define IRQ_OVERRUN BIT1 // receive frame overflow
  264. #define IRQ_RXFIFO BIT0 // receive pool full
  265. // STAR
  266. #define XFW BIT6 // transmit FIFO write enable
  267. #define CEC BIT2 // command executing
  268. #define CTS BIT1 // CTS state
  269. #define PVR_DTR BIT0
  270. #define PVR_DSR BIT1
  271. #define PVR_RI BIT2
  272. #define PVR_AUTOCTS BIT3
  273. #define PVR_RS232 0x20 /* 0010b */
  274. #define PVR_V35 0xe0 /* 1110b */
  275. #define PVR_RS422 0x40 /* 0100b */
  276. /* Register access functions */
  277. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  278. #define read_reg(info, reg) inb((info)->io_base + (reg))
  279. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  280. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  281. #define set_reg_bits(info, reg, mask) \
  282. write_reg(info, (reg), \
  283. (unsigned char) (read_reg(info, (reg)) | (mask)))
  284. #define clear_reg_bits(info, reg, mask) \
  285. write_reg(info, (reg), \
  286. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  287. /*
  288. * interrupt enable/disable routines
  289. */
  290. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  291. {
  292. if (channel == CHA) {
  293. info->imra_value |= mask;
  294. write_reg16(info, CHA + IMR, info->imra_value);
  295. } else {
  296. info->imrb_value |= mask;
  297. write_reg16(info, CHB + IMR, info->imrb_value);
  298. }
  299. }
  300. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  301. {
  302. if (channel == CHA) {
  303. info->imra_value &= ~mask;
  304. write_reg16(info, CHA + IMR, info->imra_value);
  305. } else {
  306. info->imrb_value &= ~mask;
  307. write_reg16(info, CHB + IMR, info->imrb_value);
  308. }
  309. }
  310. #define port_irq_disable(info, mask) \
  311. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  312. #define port_irq_enable(info, mask) \
  313. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  314. static void rx_start(MGSLPC_INFO *info);
  315. static void rx_stop(MGSLPC_INFO *info);
  316. static void tx_start(MGSLPC_INFO *info);
  317. static void tx_stop(MGSLPC_INFO *info);
  318. static void tx_set_idle(MGSLPC_INFO *info);
  319. static void get_signals(MGSLPC_INFO *info);
  320. static void set_signals(MGSLPC_INFO *info);
  321. static void reset_device(MGSLPC_INFO *info);
  322. static void hdlc_mode(MGSLPC_INFO *info);
  323. static void async_mode(MGSLPC_INFO *info);
  324. static void tx_timeout(unsigned long context);
  325. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  326. #if SYNCLINK_GENERIC_HDLC
  327. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  328. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  329. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  330. static int hdlcdev_init(MGSLPC_INFO *info);
  331. static void hdlcdev_exit(MGSLPC_INFO *info);
  332. #endif
  333. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  334. static BOOLEAN register_test(MGSLPC_INFO *info);
  335. static BOOLEAN irq_test(MGSLPC_INFO *info);
  336. static int adapter_test(MGSLPC_INFO *info);
  337. static int claim_resources(MGSLPC_INFO *info);
  338. static void release_resources(MGSLPC_INFO *info);
  339. static void mgslpc_add_device(MGSLPC_INFO *info);
  340. static void mgslpc_remove_device(MGSLPC_INFO *info);
  341. static int rx_get_frame(MGSLPC_INFO *info);
  342. static void rx_reset_buffers(MGSLPC_INFO *info);
  343. static int rx_alloc_buffers(MGSLPC_INFO *info);
  344. static void rx_free_buffers(MGSLPC_INFO *info);
  345. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  346. /*
  347. * Bottom half interrupt handlers
  348. */
  349. static void bh_handler(struct work_struct *work);
  350. static void bh_transmit(MGSLPC_INFO *info);
  351. static void bh_status(MGSLPC_INFO *info);
  352. /*
  353. * ioctl handlers
  354. */
  355. static int tiocmget(struct tty_struct *tty, struct file *file);
  356. static int tiocmset(struct tty_struct *tty, struct file *file,
  357. unsigned int set, unsigned int clear);
  358. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  359. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  360. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  361. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  362. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  363. static int set_txenable(MGSLPC_INFO *info, int enable);
  364. static int tx_abort(MGSLPC_INFO *info);
  365. static int set_rxenable(MGSLPC_INFO *info, int enable);
  366. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  367. static MGSLPC_INFO *mgslpc_device_list = NULL;
  368. static int mgslpc_device_count = 0;
  369. /*
  370. * Set this param to non-zero to load eax with the
  371. * .text section address and breakpoint on module load.
  372. * This is useful for use with gdb and add-symbol-file command.
  373. */
  374. static int break_on_load=0;
  375. /*
  376. * Driver major number, defaults to zero to get auto
  377. * assigned major number. May be forced as module parameter.
  378. */
  379. static int ttymajor=0;
  380. static int debug_level = 0;
  381. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  382. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  383. module_param(break_on_load, bool, 0);
  384. module_param(ttymajor, int, 0);
  385. module_param(debug_level, int, 0);
  386. module_param_array(maxframe, int, NULL, 0);
  387. module_param_array(dosyncppp, int, NULL, 0);
  388. MODULE_LICENSE("GPL");
  389. static char *driver_name = "SyncLink PC Card driver";
  390. static char *driver_version = "$Revision: 4.34 $";
  391. static struct tty_driver *serial_driver;
  392. /* number of characters left in xmit buffer before we ask for more */
  393. #define WAKEUP_CHARS 256
  394. static void mgslpc_change_params(MGSLPC_INFO *info);
  395. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  396. /* PCMCIA prototypes */
  397. static int mgslpc_config(struct pcmcia_device *link);
  398. static void mgslpc_release(u_long arg);
  399. static void mgslpc_detach(struct pcmcia_device *p_dev);
  400. /*
  401. * 1st function defined in .text section. Calling this function in
  402. * init_module() followed by a breakpoint allows a remote debugger
  403. * (gdb) to get the .text address for the add-symbol-file command.
  404. * This allows remote debugging of dynamically loadable modules.
  405. */
  406. static void* mgslpc_get_text_ptr(void)
  407. {
  408. return mgslpc_get_text_ptr;
  409. }
  410. /**
  411. * line discipline callback wrappers
  412. *
  413. * The wrappers maintain line discipline references
  414. * while calling into the line discipline.
  415. *
  416. * ldisc_flush_buffer - flush line discipline receive buffers
  417. * ldisc_receive_buf - pass receive data to line discipline
  418. */
  419. static void ldisc_flush_buffer(struct tty_struct *tty)
  420. {
  421. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  422. if (ld) {
  423. if (ld->flush_buffer)
  424. ld->flush_buffer(tty);
  425. tty_ldisc_deref(ld);
  426. }
  427. }
  428. static void ldisc_receive_buf(struct tty_struct *tty,
  429. const __u8 *data, char *flags, int count)
  430. {
  431. struct tty_ldisc *ld;
  432. if (!tty)
  433. return;
  434. ld = tty_ldisc_ref(tty);
  435. if (ld) {
  436. if (ld->receive_buf)
  437. ld->receive_buf(tty, data, flags, count);
  438. tty_ldisc_deref(ld);
  439. }
  440. }
  441. static int mgslpc_probe(struct pcmcia_device *link)
  442. {
  443. MGSLPC_INFO *info;
  444. int ret;
  445. if (debug_level >= DEBUG_LEVEL_INFO)
  446. printk("mgslpc_attach\n");
  447. info = kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  448. if (!info) {
  449. printk("Error can't allocate device instance data\n");
  450. return -ENOMEM;
  451. }
  452. memset(info, 0, sizeof(MGSLPC_INFO));
  453. info->magic = MGSLPC_MAGIC;
  454. INIT_WORK(&info->task, bh_handler);
  455. info->max_frame_size = 4096;
  456. info->close_delay = 5*HZ/10;
  457. info->closing_wait = 30*HZ;
  458. init_waitqueue_head(&info->open_wait);
  459. init_waitqueue_head(&info->close_wait);
  460. init_waitqueue_head(&info->status_event_wait_q);
  461. init_waitqueue_head(&info->event_wait_q);
  462. spin_lock_init(&info->lock);
  463. spin_lock_init(&info->netlock);
  464. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  465. info->idle_mode = HDLC_TXIDLE_FLAGS;
  466. info->imra_value = 0xffff;
  467. info->imrb_value = 0xffff;
  468. info->pim_value = 0xff;
  469. info->p_dev = link;
  470. link->priv = info;
  471. /* Initialize the struct pcmcia_device structure */
  472. /* Interrupt setup */
  473. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  474. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  475. link->irq.Handler = NULL;
  476. link->conf.Attributes = 0;
  477. link->conf.IntType = INT_MEMORY_AND_IO;
  478. ret = mgslpc_config(link);
  479. if (ret)
  480. return ret;
  481. mgslpc_add_device(info);
  482. return 0;
  483. }
  484. /* Card has been inserted.
  485. */
  486. #define CS_CHECK(fn, ret) \
  487. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  488. static int mgslpc_config(struct pcmcia_device *link)
  489. {
  490. MGSLPC_INFO *info = link->priv;
  491. tuple_t tuple;
  492. cisparse_t parse;
  493. int last_fn, last_ret;
  494. u_char buf[64];
  495. cistpl_cftable_entry_t dflt = { 0 };
  496. cistpl_cftable_entry_t *cfg;
  497. if (debug_level >= DEBUG_LEVEL_INFO)
  498. printk("mgslpc_config(0x%p)\n", link);
  499. tuple.Attributes = 0;
  500. tuple.TupleData = buf;
  501. tuple.TupleDataMax = sizeof(buf);
  502. tuple.TupleOffset = 0;
  503. /* get CIS configuration entry */
  504. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  505. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  506. cfg = &(parse.cftable_entry);
  507. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  508. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  509. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  510. if (cfg->index == 0)
  511. goto cs_failed;
  512. link->conf.ConfigIndex = cfg->index;
  513. link->conf.Attributes |= CONF_ENABLE_IRQ;
  514. /* IO window settings */
  515. link->io.NumPorts1 = 0;
  516. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  517. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  518. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  519. if (!(io->flags & CISTPL_IO_8BIT))
  520. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  521. if (!(io->flags & CISTPL_IO_16BIT))
  522. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  523. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  524. link->io.BasePort1 = io->win[0].base;
  525. link->io.NumPorts1 = io->win[0].len;
  526. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  527. }
  528. link->conf.Attributes = CONF_ENABLE_IRQ;
  529. link->conf.IntType = INT_MEMORY_AND_IO;
  530. link->conf.ConfigIndex = 8;
  531. link->conf.Present = PRESENT_OPTION;
  532. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  533. link->irq.Handler = mgslpc_isr;
  534. link->irq.Instance = info;
  535. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  536. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  537. info->io_base = link->io.BasePort1;
  538. info->irq_level = link->irq.AssignedIRQ;
  539. /* add to linked list of devices */
  540. sprintf(info->node.dev_name, "mgslpc0");
  541. info->node.major = info->node.minor = 0;
  542. link->dev_node = &info->node;
  543. printk(KERN_INFO "%s: index 0x%02x:",
  544. info->node.dev_name, link->conf.ConfigIndex);
  545. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  546. printk(", irq %d", link->irq.AssignedIRQ);
  547. if (link->io.NumPorts1)
  548. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  549. link->io.BasePort1+link->io.NumPorts1-1);
  550. printk("\n");
  551. return 0;
  552. cs_failed:
  553. cs_error(link, last_fn, last_ret);
  554. mgslpc_release((u_long)link);
  555. return -ENODEV;
  556. }
  557. /* Card has been removed.
  558. * Unregister device and release PCMCIA configuration.
  559. * If device is open, postpone until it is closed.
  560. */
  561. static void mgslpc_release(u_long arg)
  562. {
  563. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  564. if (debug_level >= DEBUG_LEVEL_INFO)
  565. printk("mgslpc_release(0x%p)\n", link);
  566. pcmcia_disable_device(link);
  567. }
  568. static void mgslpc_detach(struct pcmcia_device *link)
  569. {
  570. if (debug_level >= DEBUG_LEVEL_INFO)
  571. printk("mgslpc_detach(0x%p)\n", link);
  572. ((MGSLPC_INFO *)link->priv)->stop = 1;
  573. mgslpc_release((u_long)link);
  574. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  575. }
  576. static int mgslpc_suspend(struct pcmcia_device *link)
  577. {
  578. MGSLPC_INFO *info = link->priv;
  579. info->stop = 1;
  580. return 0;
  581. }
  582. static int mgslpc_resume(struct pcmcia_device *link)
  583. {
  584. MGSLPC_INFO *info = link->priv;
  585. info->stop = 0;
  586. return 0;
  587. }
  588. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  589. char *name, const char *routine)
  590. {
  591. #ifdef MGSLPC_PARANOIA_CHECK
  592. static const char *badmagic =
  593. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  594. static const char *badinfo =
  595. "Warning: null mgslpc_info for (%s) in %s\n";
  596. if (!info) {
  597. printk(badinfo, name, routine);
  598. return 1;
  599. }
  600. if (info->magic != MGSLPC_MAGIC) {
  601. printk(badmagic, name, routine);
  602. return 1;
  603. }
  604. #else
  605. if (!info)
  606. return 1;
  607. #endif
  608. return 0;
  609. }
  610. #define CMD_RXFIFO BIT7 // release current rx FIFO
  611. #define CMD_RXRESET BIT6 // receiver reset
  612. #define CMD_RXFIFO_READ BIT5
  613. #define CMD_START_TIMER BIT4
  614. #define CMD_TXFIFO BIT3 // release current tx FIFO
  615. #define CMD_TXEOM BIT1 // transmit end message
  616. #define CMD_TXRESET BIT0 // transmit reset
  617. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  618. {
  619. int i = 0;
  620. /* wait for command completion */
  621. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  622. udelay(1);
  623. if (i++ == 1000)
  624. return FALSE;
  625. }
  626. return TRUE;
  627. }
  628. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  629. {
  630. wait_command_complete(info, channel);
  631. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  632. }
  633. static void tx_pause(struct tty_struct *tty)
  634. {
  635. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  636. unsigned long flags;
  637. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  638. return;
  639. if (debug_level >= DEBUG_LEVEL_INFO)
  640. printk("tx_pause(%s)\n",info->device_name);
  641. spin_lock_irqsave(&info->lock,flags);
  642. if (info->tx_enabled)
  643. tx_stop(info);
  644. spin_unlock_irqrestore(&info->lock,flags);
  645. }
  646. static void tx_release(struct tty_struct *tty)
  647. {
  648. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  649. unsigned long flags;
  650. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  651. return;
  652. if (debug_level >= DEBUG_LEVEL_INFO)
  653. printk("tx_release(%s)\n",info->device_name);
  654. spin_lock_irqsave(&info->lock,flags);
  655. if (!info->tx_enabled)
  656. tx_start(info);
  657. spin_unlock_irqrestore(&info->lock,flags);
  658. }
  659. /* Return next bottom half action to perform.
  660. * or 0 if nothing to do.
  661. */
  662. static int bh_action(MGSLPC_INFO *info)
  663. {
  664. unsigned long flags;
  665. int rc = 0;
  666. spin_lock_irqsave(&info->lock,flags);
  667. if (info->pending_bh & BH_RECEIVE) {
  668. info->pending_bh &= ~BH_RECEIVE;
  669. rc = BH_RECEIVE;
  670. } else if (info->pending_bh & BH_TRANSMIT) {
  671. info->pending_bh &= ~BH_TRANSMIT;
  672. rc = BH_TRANSMIT;
  673. } else if (info->pending_bh & BH_STATUS) {
  674. info->pending_bh &= ~BH_STATUS;
  675. rc = BH_STATUS;
  676. }
  677. if (!rc) {
  678. /* Mark BH routine as complete */
  679. info->bh_running = 0;
  680. info->bh_requested = 0;
  681. }
  682. spin_unlock_irqrestore(&info->lock,flags);
  683. return rc;
  684. }
  685. static void bh_handler(struct work_struct *work)
  686. {
  687. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  688. int action;
  689. if (!info)
  690. return;
  691. if (debug_level >= DEBUG_LEVEL_BH)
  692. printk( "%s(%d):bh_handler(%s) entry\n",
  693. __FILE__,__LINE__,info->device_name);
  694. info->bh_running = 1;
  695. while((action = bh_action(info)) != 0) {
  696. /* Process work item */
  697. if ( debug_level >= DEBUG_LEVEL_BH )
  698. printk( "%s(%d):bh_handler() work item action=%d\n",
  699. __FILE__,__LINE__,action);
  700. switch (action) {
  701. case BH_RECEIVE:
  702. while(rx_get_frame(info));
  703. break;
  704. case BH_TRANSMIT:
  705. bh_transmit(info);
  706. break;
  707. case BH_STATUS:
  708. bh_status(info);
  709. break;
  710. default:
  711. /* unknown work item ID */
  712. printk("Unknown work item ID=%08X!\n", action);
  713. break;
  714. }
  715. }
  716. if (debug_level >= DEBUG_LEVEL_BH)
  717. printk( "%s(%d):bh_handler(%s) exit\n",
  718. __FILE__,__LINE__,info->device_name);
  719. }
  720. static void bh_transmit(MGSLPC_INFO *info)
  721. {
  722. struct tty_struct *tty = info->tty;
  723. if (debug_level >= DEBUG_LEVEL_BH)
  724. printk("bh_transmit() entry on %s\n", info->device_name);
  725. if (tty)
  726. tty_wakeup(tty);
  727. }
  728. static void bh_status(MGSLPC_INFO *info)
  729. {
  730. info->ri_chkcount = 0;
  731. info->dsr_chkcount = 0;
  732. info->dcd_chkcount = 0;
  733. info->cts_chkcount = 0;
  734. }
  735. /* eom: non-zero = end of frame */
  736. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  737. {
  738. unsigned char data[2];
  739. unsigned char fifo_count, read_count, i;
  740. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  741. if (debug_level >= DEBUG_LEVEL_ISR)
  742. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  743. if (!info->rx_enabled)
  744. return;
  745. if (info->rx_frame_count >= info->rx_buf_count) {
  746. /* no more free buffers */
  747. issue_command(info, CHA, CMD_RXRESET);
  748. info->pending_bh |= BH_RECEIVE;
  749. info->rx_overflow = 1;
  750. info->icount.buf_overrun++;
  751. return;
  752. }
  753. if (eom) {
  754. /* end of frame, get FIFO count from RBCL register */
  755. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  756. fifo_count = 32;
  757. } else
  758. fifo_count = 32;
  759. do {
  760. if (fifo_count == 1) {
  761. read_count = 1;
  762. data[0] = read_reg(info, CHA + RXFIFO);
  763. } else {
  764. read_count = 2;
  765. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  766. }
  767. fifo_count -= read_count;
  768. if (!fifo_count && eom)
  769. buf->status = data[--read_count];
  770. for (i = 0; i < read_count; i++) {
  771. if (buf->count >= info->max_frame_size) {
  772. /* frame too large, reset receiver and reset current buffer */
  773. issue_command(info, CHA, CMD_RXRESET);
  774. buf->count = 0;
  775. return;
  776. }
  777. *(buf->data + buf->count) = data[i];
  778. buf->count++;
  779. }
  780. } while (fifo_count);
  781. if (eom) {
  782. info->pending_bh |= BH_RECEIVE;
  783. info->rx_frame_count++;
  784. info->rx_put++;
  785. if (info->rx_put >= info->rx_buf_count)
  786. info->rx_put = 0;
  787. }
  788. issue_command(info, CHA, CMD_RXFIFO);
  789. }
  790. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  791. {
  792. unsigned char data, status, flag;
  793. int fifo_count;
  794. int work = 0;
  795. struct tty_struct *tty = info->tty;
  796. struct mgsl_icount *icount = &info->icount;
  797. if (tcd) {
  798. /* early termination, get FIFO count from RBCL register */
  799. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  800. /* Zero fifo count could mean 0 or 32 bytes available.
  801. * If BIT5 of STAR is set then at least 1 byte is available.
  802. */
  803. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  804. fifo_count = 32;
  805. } else
  806. fifo_count = 32;
  807. tty_buffer_request_room(tty, fifo_count);
  808. /* Flush received async data to receive data buffer. */
  809. while (fifo_count) {
  810. data = read_reg(info, CHA + RXFIFO);
  811. status = read_reg(info, CHA + RXFIFO);
  812. fifo_count -= 2;
  813. icount->rx++;
  814. flag = TTY_NORMAL;
  815. // if no frameing/crc error then save data
  816. // BIT7:parity error
  817. // BIT6:framing error
  818. if (status & (BIT7 + BIT6)) {
  819. if (status & BIT7)
  820. icount->parity++;
  821. else
  822. icount->frame++;
  823. /* discard char if tty control flags say so */
  824. if (status & info->ignore_status_mask)
  825. continue;
  826. status &= info->read_status_mask;
  827. if (status & BIT7)
  828. flag = TTY_PARITY;
  829. else if (status & BIT6)
  830. flag = TTY_FRAME;
  831. }
  832. work += tty_insert_flip_char(tty, data, flag);
  833. }
  834. issue_command(info, CHA, CMD_RXFIFO);
  835. if (debug_level >= DEBUG_LEVEL_ISR) {
  836. printk("%s(%d):rx_ready_async",
  837. __FILE__,__LINE__);
  838. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  839. __FILE__,__LINE__,icount->rx,icount->brk,
  840. icount->parity,icount->frame,icount->overrun);
  841. }
  842. if (work)
  843. tty_flip_buffer_push(tty);
  844. }
  845. static void tx_done(MGSLPC_INFO *info)
  846. {
  847. if (!info->tx_active)
  848. return;
  849. info->tx_active = 0;
  850. info->tx_aborting = 0;
  851. if (info->params.mode == MGSL_MODE_ASYNC)
  852. return;
  853. info->tx_count = info->tx_put = info->tx_get = 0;
  854. del_timer(&info->tx_timer);
  855. if (info->drop_rts_on_tx_done) {
  856. get_signals(info);
  857. if (info->serial_signals & SerialSignal_RTS) {
  858. info->serial_signals &= ~SerialSignal_RTS;
  859. set_signals(info);
  860. }
  861. info->drop_rts_on_tx_done = 0;
  862. }
  863. #if SYNCLINK_GENERIC_HDLC
  864. if (info->netcount)
  865. hdlcdev_tx_done(info);
  866. else
  867. #endif
  868. {
  869. if (info->tty->stopped || info->tty->hw_stopped) {
  870. tx_stop(info);
  871. return;
  872. }
  873. info->pending_bh |= BH_TRANSMIT;
  874. }
  875. }
  876. static void tx_ready(MGSLPC_INFO *info)
  877. {
  878. unsigned char fifo_count = 32;
  879. int c;
  880. if (debug_level >= DEBUG_LEVEL_ISR)
  881. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  882. if (info->params.mode == MGSL_MODE_HDLC) {
  883. if (!info->tx_active)
  884. return;
  885. } else {
  886. if (info->tty->stopped || info->tty->hw_stopped) {
  887. tx_stop(info);
  888. return;
  889. }
  890. if (!info->tx_count)
  891. info->tx_active = 0;
  892. }
  893. if (!info->tx_count)
  894. return;
  895. while (info->tx_count && fifo_count) {
  896. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  897. if (c == 1) {
  898. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  899. } else {
  900. write_reg16(info, CHA + TXFIFO,
  901. *((unsigned short*)(info->tx_buf + info->tx_get)));
  902. }
  903. info->tx_count -= c;
  904. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  905. fifo_count -= c;
  906. }
  907. if (info->params.mode == MGSL_MODE_ASYNC) {
  908. if (info->tx_count < WAKEUP_CHARS)
  909. info->pending_bh |= BH_TRANSMIT;
  910. issue_command(info, CHA, CMD_TXFIFO);
  911. } else {
  912. if (info->tx_count)
  913. issue_command(info, CHA, CMD_TXFIFO);
  914. else
  915. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  916. }
  917. }
  918. static void cts_change(MGSLPC_INFO *info)
  919. {
  920. get_signals(info);
  921. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  922. irq_disable(info, CHB, IRQ_CTS);
  923. info->icount.cts++;
  924. if (info->serial_signals & SerialSignal_CTS)
  925. info->input_signal_events.cts_up++;
  926. else
  927. info->input_signal_events.cts_down++;
  928. wake_up_interruptible(&info->status_event_wait_q);
  929. wake_up_interruptible(&info->event_wait_q);
  930. if (info->flags & ASYNC_CTS_FLOW) {
  931. if (info->tty->hw_stopped) {
  932. if (info->serial_signals & SerialSignal_CTS) {
  933. if (debug_level >= DEBUG_LEVEL_ISR)
  934. printk("CTS tx start...");
  935. if (info->tty)
  936. info->tty->hw_stopped = 0;
  937. tx_start(info);
  938. info->pending_bh |= BH_TRANSMIT;
  939. return;
  940. }
  941. } else {
  942. if (!(info->serial_signals & SerialSignal_CTS)) {
  943. if (debug_level >= DEBUG_LEVEL_ISR)
  944. printk("CTS tx stop...");
  945. if (info->tty)
  946. info->tty->hw_stopped = 1;
  947. tx_stop(info);
  948. }
  949. }
  950. }
  951. info->pending_bh |= BH_STATUS;
  952. }
  953. static void dcd_change(MGSLPC_INFO *info)
  954. {
  955. get_signals(info);
  956. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  957. irq_disable(info, CHB, IRQ_DCD);
  958. info->icount.dcd++;
  959. if (info->serial_signals & SerialSignal_DCD) {
  960. info->input_signal_events.dcd_up++;
  961. }
  962. else
  963. info->input_signal_events.dcd_down++;
  964. #if SYNCLINK_GENERIC_HDLC
  965. if (info->netcount) {
  966. if (info->serial_signals & SerialSignal_DCD)
  967. netif_carrier_on(info->netdev);
  968. else
  969. netif_carrier_off(info->netdev);
  970. }
  971. #endif
  972. wake_up_interruptible(&info->status_event_wait_q);
  973. wake_up_interruptible(&info->event_wait_q);
  974. if (info->flags & ASYNC_CHECK_CD) {
  975. if (debug_level >= DEBUG_LEVEL_ISR)
  976. printk("%s CD now %s...", info->device_name,
  977. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  978. if (info->serial_signals & SerialSignal_DCD)
  979. wake_up_interruptible(&info->open_wait);
  980. else {
  981. if (debug_level >= DEBUG_LEVEL_ISR)
  982. printk("doing serial hangup...");
  983. if (info->tty)
  984. tty_hangup(info->tty);
  985. }
  986. }
  987. info->pending_bh |= BH_STATUS;
  988. }
  989. static void dsr_change(MGSLPC_INFO *info)
  990. {
  991. get_signals(info);
  992. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  993. port_irq_disable(info, PVR_DSR);
  994. info->icount.dsr++;
  995. if (info->serial_signals & SerialSignal_DSR)
  996. info->input_signal_events.dsr_up++;
  997. else
  998. info->input_signal_events.dsr_down++;
  999. wake_up_interruptible(&info->status_event_wait_q);
  1000. wake_up_interruptible(&info->event_wait_q);
  1001. info->pending_bh |= BH_STATUS;
  1002. }
  1003. static void ri_change(MGSLPC_INFO *info)
  1004. {
  1005. get_signals(info);
  1006. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1007. port_irq_disable(info, PVR_RI);
  1008. info->icount.rng++;
  1009. if (info->serial_signals & SerialSignal_RI)
  1010. info->input_signal_events.ri_up++;
  1011. else
  1012. info->input_signal_events.ri_down++;
  1013. wake_up_interruptible(&info->status_event_wait_q);
  1014. wake_up_interruptible(&info->event_wait_q);
  1015. info->pending_bh |= BH_STATUS;
  1016. }
  1017. /* Interrupt service routine entry point.
  1018. *
  1019. * Arguments:
  1020. *
  1021. * irq interrupt number that caused interrupt
  1022. * dev_id device ID supplied during interrupt registration
  1023. */
  1024. static irqreturn_t mgslpc_isr(int irq, void *dev_id)
  1025. {
  1026. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1027. unsigned short isr;
  1028. unsigned char gis, pis;
  1029. int count=0;
  1030. if (debug_level >= DEBUG_LEVEL_ISR)
  1031. printk("mgslpc_isr(%d) entry.\n", irq);
  1032. if (!info)
  1033. return IRQ_NONE;
  1034. if (!(info->p_dev->_locked))
  1035. return IRQ_HANDLED;
  1036. spin_lock(&info->lock);
  1037. while ((gis = read_reg(info, CHA + GIS))) {
  1038. if (debug_level >= DEBUG_LEVEL_ISR)
  1039. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1040. if ((gis & 0x70) || count > 1000) {
  1041. printk("synclink_cs:hardware failed or ejected\n");
  1042. break;
  1043. }
  1044. count++;
  1045. if (gis & (BIT1 + BIT0)) {
  1046. isr = read_reg16(info, CHB + ISR);
  1047. if (isr & IRQ_DCD)
  1048. dcd_change(info);
  1049. if (isr & IRQ_CTS)
  1050. cts_change(info);
  1051. }
  1052. if (gis & (BIT3 + BIT2))
  1053. {
  1054. isr = read_reg16(info, CHA + ISR);
  1055. if (isr & IRQ_TIMER) {
  1056. info->irq_occurred = 1;
  1057. irq_disable(info, CHA, IRQ_TIMER);
  1058. }
  1059. /* receive IRQs */
  1060. if (isr & IRQ_EXITHUNT) {
  1061. info->icount.exithunt++;
  1062. wake_up_interruptible(&info->event_wait_q);
  1063. }
  1064. if (isr & IRQ_BREAK_ON) {
  1065. info->icount.brk++;
  1066. if (info->flags & ASYNC_SAK)
  1067. do_SAK(info->tty);
  1068. }
  1069. if (isr & IRQ_RXTIME) {
  1070. issue_command(info, CHA, CMD_RXFIFO_READ);
  1071. }
  1072. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1073. if (info->params.mode == MGSL_MODE_HDLC)
  1074. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1075. else
  1076. rx_ready_async(info, isr & IRQ_RXEOM);
  1077. }
  1078. /* transmit IRQs */
  1079. if (isr & IRQ_UNDERRUN) {
  1080. if (info->tx_aborting)
  1081. info->icount.txabort++;
  1082. else
  1083. info->icount.txunder++;
  1084. tx_done(info);
  1085. }
  1086. else if (isr & IRQ_ALLSENT) {
  1087. info->icount.txok++;
  1088. tx_done(info);
  1089. }
  1090. else if (isr & IRQ_TXFIFO)
  1091. tx_ready(info);
  1092. }
  1093. if (gis & BIT7) {
  1094. pis = read_reg(info, CHA + PIS);
  1095. if (pis & BIT1)
  1096. dsr_change(info);
  1097. if (pis & BIT2)
  1098. ri_change(info);
  1099. }
  1100. }
  1101. /* Request bottom half processing if there's something
  1102. * for it to do and the bh is not already running
  1103. */
  1104. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1105. if ( debug_level >= DEBUG_LEVEL_ISR )
  1106. printk("%s(%d):%s queueing bh task.\n",
  1107. __FILE__,__LINE__,info->device_name);
  1108. schedule_work(&info->task);
  1109. info->bh_requested = 1;
  1110. }
  1111. spin_unlock(&info->lock);
  1112. if (debug_level >= DEBUG_LEVEL_ISR)
  1113. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1114. __FILE__,__LINE__,irq);
  1115. return IRQ_HANDLED;
  1116. }
  1117. /* Initialize and start device.
  1118. */
  1119. static int startup(MGSLPC_INFO * info)
  1120. {
  1121. int retval = 0;
  1122. if (debug_level >= DEBUG_LEVEL_INFO)
  1123. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1124. if (info->flags & ASYNC_INITIALIZED)
  1125. return 0;
  1126. if (!info->tx_buf) {
  1127. /* allocate a page of memory for a transmit buffer */
  1128. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1129. if (!info->tx_buf) {
  1130. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1131. __FILE__,__LINE__,info->device_name);
  1132. return -ENOMEM;
  1133. }
  1134. }
  1135. info->pending_bh = 0;
  1136. memset(&info->icount, 0, sizeof(info->icount));
  1137. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1138. /* Allocate and claim adapter resources */
  1139. retval = claim_resources(info);
  1140. /* perform existance check and diagnostics */
  1141. if ( !retval )
  1142. retval = adapter_test(info);
  1143. if ( retval ) {
  1144. if (capable(CAP_SYS_ADMIN) && info->tty)
  1145. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1146. release_resources(info);
  1147. return retval;
  1148. }
  1149. /* program hardware for current parameters */
  1150. mgslpc_change_params(info);
  1151. if (info->tty)
  1152. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1153. info->flags |= ASYNC_INITIALIZED;
  1154. return 0;
  1155. }
  1156. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1157. */
  1158. static void shutdown(MGSLPC_INFO * info)
  1159. {
  1160. unsigned long flags;
  1161. if (!(info->flags & ASYNC_INITIALIZED))
  1162. return;
  1163. if (debug_level >= DEBUG_LEVEL_INFO)
  1164. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1165. __FILE__,__LINE__, info->device_name );
  1166. /* clear status wait queue because status changes */
  1167. /* can't happen after shutting down the hardware */
  1168. wake_up_interruptible(&info->status_event_wait_q);
  1169. wake_up_interruptible(&info->event_wait_q);
  1170. del_timer_sync(&info->tx_timer);
  1171. if (info->tx_buf) {
  1172. free_page((unsigned long) info->tx_buf);
  1173. info->tx_buf = NULL;
  1174. }
  1175. spin_lock_irqsave(&info->lock,flags);
  1176. rx_stop(info);
  1177. tx_stop(info);
  1178. /* TODO:disable interrupts instead of reset to preserve signal states */
  1179. reset_device(info);
  1180. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1181. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1182. set_signals(info);
  1183. }
  1184. spin_unlock_irqrestore(&info->lock,flags);
  1185. release_resources(info);
  1186. if (info->tty)
  1187. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1188. info->flags &= ~ASYNC_INITIALIZED;
  1189. }
  1190. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1191. {
  1192. unsigned long flags;
  1193. spin_lock_irqsave(&info->lock,flags);
  1194. rx_stop(info);
  1195. tx_stop(info);
  1196. info->tx_count = info->tx_put = info->tx_get = 0;
  1197. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1198. hdlc_mode(info);
  1199. else
  1200. async_mode(info);
  1201. set_signals(info);
  1202. info->dcd_chkcount = 0;
  1203. info->cts_chkcount = 0;
  1204. info->ri_chkcount = 0;
  1205. info->dsr_chkcount = 0;
  1206. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1207. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1208. get_signals(info);
  1209. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1210. rx_start(info);
  1211. spin_unlock_irqrestore(&info->lock,flags);
  1212. }
  1213. /* Reconfigure adapter based on new parameters
  1214. */
  1215. static void mgslpc_change_params(MGSLPC_INFO *info)
  1216. {
  1217. unsigned cflag;
  1218. int bits_per_char;
  1219. if (!info->tty || !info->tty->termios)
  1220. return;
  1221. if (debug_level >= DEBUG_LEVEL_INFO)
  1222. printk("%s(%d):mgslpc_change_params(%s)\n",
  1223. __FILE__,__LINE__, info->device_name );
  1224. cflag = info->tty->termios->c_cflag;
  1225. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1226. /* otherwise assert DTR and RTS */
  1227. if (cflag & CBAUD)
  1228. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1229. else
  1230. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1231. /* byte size and parity */
  1232. switch (cflag & CSIZE) {
  1233. case CS5: info->params.data_bits = 5; break;
  1234. case CS6: info->params.data_bits = 6; break;
  1235. case CS7: info->params.data_bits = 7; break;
  1236. case CS8: info->params.data_bits = 8; break;
  1237. default: info->params.data_bits = 7; break;
  1238. }
  1239. if (cflag & CSTOPB)
  1240. info->params.stop_bits = 2;
  1241. else
  1242. info->params.stop_bits = 1;
  1243. info->params.parity = ASYNC_PARITY_NONE;
  1244. if (cflag & PARENB) {
  1245. if (cflag & PARODD)
  1246. info->params.parity = ASYNC_PARITY_ODD;
  1247. else
  1248. info->params.parity = ASYNC_PARITY_EVEN;
  1249. #ifdef CMSPAR
  1250. if (cflag & CMSPAR)
  1251. info->params.parity = ASYNC_PARITY_SPACE;
  1252. #endif
  1253. }
  1254. /* calculate number of jiffies to transmit a full
  1255. * FIFO (32 bytes) at specified data rate
  1256. */
  1257. bits_per_char = info->params.data_bits +
  1258. info->params.stop_bits + 1;
  1259. /* if port data rate is set to 460800 or less then
  1260. * allow tty settings to override, otherwise keep the
  1261. * current data rate.
  1262. */
  1263. if (info->params.data_rate <= 460800) {
  1264. info->params.data_rate = tty_get_baud_rate(info->tty);
  1265. }
  1266. if ( info->params.data_rate ) {
  1267. info->timeout = (32*HZ*bits_per_char) /
  1268. info->params.data_rate;
  1269. }
  1270. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1271. if (cflag & CRTSCTS)
  1272. info->flags |= ASYNC_CTS_FLOW;
  1273. else
  1274. info->flags &= ~ASYNC_CTS_FLOW;
  1275. if (cflag & CLOCAL)
  1276. info->flags &= ~ASYNC_CHECK_CD;
  1277. else
  1278. info->flags |= ASYNC_CHECK_CD;
  1279. /* process tty input control flags */
  1280. info->read_status_mask = 0;
  1281. if (I_INPCK(info->tty))
  1282. info->read_status_mask |= BIT7 | BIT6;
  1283. if (I_IGNPAR(info->tty))
  1284. info->ignore_status_mask |= BIT7 | BIT6;
  1285. mgslpc_program_hw(info);
  1286. }
  1287. /* Add a character to the transmit buffer
  1288. */
  1289. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1290. {
  1291. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1292. unsigned long flags;
  1293. if (debug_level >= DEBUG_LEVEL_INFO) {
  1294. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1295. __FILE__,__LINE__,ch,info->device_name);
  1296. }
  1297. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1298. return;
  1299. if (!info->tx_buf)
  1300. return;
  1301. spin_lock_irqsave(&info->lock,flags);
  1302. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1303. if (info->tx_count < TXBUFSIZE - 1) {
  1304. info->tx_buf[info->tx_put++] = ch;
  1305. info->tx_put &= TXBUFSIZE-1;
  1306. info->tx_count++;
  1307. }
  1308. }
  1309. spin_unlock_irqrestore(&info->lock,flags);
  1310. }
  1311. /* Enable transmitter so remaining characters in the
  1312. * transmit buffer are sent.
  1313. */
  1314. static void mgslpc_flush_chars(struct tty_struct *tty)
  1315. {
  1316. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1317. unsigned long flags;
  1318. if (debug_level >= DEBUG_LEVEL_INFO)
  1319. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1320. __FILE__,__LINE__,info->device_name,info->tx_count);
  1321. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1322. return;
  1323. if (info->tx_count <= 0 || tty->stopped ||
  1324. tty->hw_stopped || !info->tx_buf)
  1325. return;
  1326. if (debug_level >= DEBUG_LEVEL_INFO)
  1327. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1328. __FILE__,__LINE__,info->device_name);
  1329. spin_lock_irqsave(&info->lock,flags);
  1330. if (!info->tx_active)
  1331. tx_start(info);
  1332. spin_unlock_irqrestore(&info->lock,flags);
  1333. }
  1334. /* Send a block of data
  1335. *
  1336. * Arguments:
  1337. *
  1338. * tty pointer to tty information structure
  1339. * buf pointer to buffer containing send data
  1340. * count size of send data in bytes
  1341. *
  1342. * Returns: number of characters written
  1343. */
  1344. static int mgslpc_write(struct tty_struct * tty,
  1345. const unsigned char *buf, int count)
  1346. {
  1347. int c, ret = 0;
  1348. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1349. unsigned long flags;
  1350. if (debug_level >= DEBUG_LEVEL_INFO)
  1351. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1352. __FILE__,__LINE__,info->device_name,count);
  1353. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1354. !info->tx_buf)
  1355. goto cleanup;
  1356. if (info->params.mode == MGSL_MODE_HDLC) {
  1357. if (count > TXBUFSIZE) {
  1358. ret = -EIO;
  1359. goto cleanup;
  1360. }
  1361. if (info->tx_active)
  1362. goto cleanup;
  1363. else if (info->tx_count)
  1364. goto start;
  1365. }
  1366. for (;;) {
  1367. c = min(count,
  1368. min(TXBUFSIZE - info->tx_count - 1,
  1369. TXBUFSIZE - info->tx_put));
  1370. if (c <= 0)
  1371. break;
  1372. memcpy(info->tx_buf + info->tx_put, buf, c);
  1373. spin_lock_irqsave(&info->lock,flags);
  1374. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1375. info->tx_count += c;
  1376. spin_unlock_irqrestore(&info->lock,flags);
  1377. buf += c;
  1378. count -= c;
  1379. ret += c;
  1380. }
  1381. start:
  1382. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1383. spin_lock_irqsave(&info->lock,flags);
  1384. if (!info->tx_active)
  1385. tx_start(info);
  1386. spin_unlock_irqrestore(&info->lock,flags);
  1387. }
  1388. cleanup:
  1389. if (debug_level >= DEBUG_LEVEL_INFO)
  1390. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1391. __FILE__,__LINE__,info->device_name,ret);
  1392. return ret;
  1393. }
  1394. /* Return the count of free bytes in transmit buffer
  1395. */
  1396. static int mgslpc_write_room(struct tty_struct *tty)
  1397. {
  1398. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1399. int ret;
  1400. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1401. return 0;
  1402. if (info->params.mode == MGSL_MODE_HDLC) {
  1403. /* HDLC (frame oriented) mode */
  1404. if (info->tx_active)
  1405. return 0;
  1406. else
  1407. return HDLC_MAX_FRAME_SIZE;
  1408. } else {
  1409. ret = TXBUFSIZE - info->tx_count - 1;
  1410. if (ret < 0)
  1411. ret = 0;
  1412. }
  1413. if (debug_level >= DEBUG_LEVEL_INFO)
  1414. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1415. __FILE__,__LINE__, info->device_name, ret);
  1416. return ret;
  1417. }
  1418. /* Return the count of bytes in transmit buffer
  1419. */
  1420. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1421. {
  1422. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1423. int rc;
  1424. if (debug_level >= DEBUG_LEVEL_INFO)
  1425. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1426. __FILE__,__LINE__, info->device_name );
  1427. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1428. return 0;
  1429. if (info->params.mode == MGSL_MODE_HDLC)
  1430. rc = info->tx_active ? info->max_frame_size : 0;
  1431. else
  1432. rc = info->tx_count;
  1433. if (debug_level >= DEBUG_LEVEL_INFO)
  1434. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1435. __FILE__,__LINE__, info->device_name, rc);
  1436. return rc;
  1437. }
  1438. /* Discard all data in the send buffer
  1439. */
  1440. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1441. {
  1442. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1443. unsigned long flags;
  1444. if (debug_level >= DEBUG_LEVEL_INFO)
  1445. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1446. __FILE__,__LINE__, info->device_name );
  1447. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1448. return;
  1449. spin_lock_irqsave(&info->lock,flags);
  1450. info->tx_count = info->tx_put = info->tx_get = 0;
  1451. del_timer(&info->tx_timer);
  1452. spin_unlock_irqrestore(&info->lock,flags);
  1453. wake_up_interruptible(&tty->write_wait);
  1454. tty_wakeup(tty);
  1455. }
  1456. /* Send a high-priority XON/XOFF character
  1457. */
  1458. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1459. {
  1460. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1461. unsigned long flags;
  1462. if (debug_level >= DEBUG_LEVEL_INFO)
  1463. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1464. __FILE__,__LINE__, info->device_name, ch );
  1465. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1466. return;
  1467. info->x_char = ch;
  1468. if (ch) {
  1469. spin_lock_irqsave(&info->lock,flags);
  1470. if (!info->tx_enabled)
  1471. tx_start(info);
  1472. spin_unlock_irqrestore(&info->lock,flags);
  1473. }
  1474. }
  1475. /* Signal remote device to throttle send data (our receive data)
  1476. */
  1477. static void mgslpc_throttle(struct tty_struct * tty)
  1478. {
  1479. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1480. unsigned long flags;
  1481. if (debug_level >= DEBUG_LEVEL_INFO)
  1482. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1483. __FILE__,__LINE__, info->device_name );
  1484. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1485. return;
  1486. if (I_IXOFF(tty))
  1487. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1488. if (tty->termios->c_cflag & CRTSCTS) {
  1489. spin_lock_irqsave(&info->lock,flags);
  1490. info->serial_signals &= ~SerialSignal_RTS;
  1491. set_signals(info);
  1492. spin_unlock_irqrestore(&info->lock,flags);
  1493. }
  1494. }
  1495. /* Signal remote device to stop throttling send data (our receive data)
  1496. */
  1497. static void mgslpc_unthrottle(struct tty_struct * tty)
  1498. {
  1499. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1500. unsigned long flags;
  1501. if (debug_level >= DEBUG_LEVEL_INFO)
  1502. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1503. __FILE__,__LINE__, info->device_name );
  1504. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1505. return;
  1506. if (I_IXOFF(tty)) {
  1507. if (info->x_char)
  1508. info->x_char = 0;
  1509. else
  1510. mgslpc_send_xchar(tty, START_CHAR(tty));
  1511. }
  1512. if (tty->termios->c_cflag & CRTSCTS) {
  1513. spin_lock_irqsave(&info->lock,flags);
  1514. info->serial_signals |= SerialSignal_RTS;
  1515. set_signals(info);
  1516. spin_unlock_irqrestore(&info->lock,flags);
  1517. }
  1518. }
  1519. /* get the current serial statistics
  1520. */
  1521. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1522. {
  1523. int err;
  1524. if (debug_level >= DEBUG_LEVEL_INFO)
  1525. printk("get_params(%s)\n", info->device_name);
  1526. if (!user_icount) {
  1527. memset(&info->icount, 0, sizeof(info->icount));
  1528. } else {
  1529. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1530. if (err)
  1531. return -EFAULT;
  1532. }
  1533. return 0;
  1534. }
  1535. /* get the current serial parameters
  1536. */
  1537. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1538. {
  1539. int err;
  1540. if (debug_level >= DEBUG_LEVEL_INFO)
  1541. printk("get_params(%s)\n", info->device_name);
  1542. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1543. if (err)
  1544. return -EFAULT;
  1545. return 0;
  1546. }
  1547. /* set the serial parameters
  1548. *
  1549. * Arguments:
  1550. *
  1551. * info pointer to device instance data
  1552. * new_params user buffer containing new serial params
  1553. *
  1554. * Returns: 0 if success, otherwise error code
  1555. */
  1556. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1557. {
  1558. unsigned long flags;
  1559. MGSL_PARAMS tmp_params;
  1560. int err;
  1561. if (debug_level >= DEBUG_LEVEL_INFO)
  1562. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1563. info->device_name );
  1564. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1565. if (err) {
  1566. if ( debug_level >= DEBUG_LEVEL_INFO )
  1567. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1568. __FILE__,__LINE__,info->device_name);
  1569. return -EFAULT;
  1570. }
  1571. spin_lock_irqsave(&info->lock,flags);
  1572. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1573. spin_unlock_irqrestore(&info->lock,flags);
  1574. mgslpc_change_params(info);
  1575. return 0;
  1576. }
  1577. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1578. {
  1579. int err;
  1580. if (debug_level >= DEBUG_LEVEL_INFO)
  1581. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1582. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1583. if (err)
  1584. return -EFAULT;
  1585. return 0;
  1586. }
  1587. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1588. {
  1589. unsigned long flags;
  1590. if (debug_level >= DEBUG_LEVEL_INFO)
  1591. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1592. spin_lock_irqsave(&info->lock,flags);
  1593. info->idle_mode = idle_mode;
  1594. tx_set_idle(info);
  1595. spin_unlock_irqrestore(&info->lock,flags);
  1596. return 0;
  1597. }
  1598. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1599. {
  1600. int err;
  1601. if (debug_level >= DEBUG_LEVEL_INFO)
  1602. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1603. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1604. if (err)
  1605. return -EFAULT;
  1606. return 0;
  1607. }
  1608. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1609. {
  1610. unsigned long flags;
  1611. unsigned char val;
  1612. if (debug_level >= DEBUG_LEVEL_INFO)
  1613. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1614. spin_lock_irqsave(&info->lock,flags);
  1615. info->if_mode = if_mode;
  1616. val = read_reg(info, PVR) & 0x0f;
  1617. switch (info->if_mode)
  1618. {
  1619. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1620. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1621. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1622. }
  1623. write_reg(info, PVR, val);
  1624. spin_unlock_irqrestore(&info->lock,flags);
  1625. return 0;
  1626. }
  1627. static int set_txenable(MGSLPC_INFO * info, int enable)
  1628. {
  1629. unsigned long flags;
  1630. if (debug_level >= DEBUG_LEVEL_INFO)
  1631. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1632. spin_lock_irqsave(&info->lock,flags);
  1633. if (enable) {
  1634. if (!info->tx_enabled)
  1635. tx_start(info);
  1636. } else {
  1637. if (info->tx_enabled)
  1638. tx_stop(info);
  1639. }
  1640. spin_unlock_irqrestore(&info->lock,flags);
  1641. return 0;
  1642. }
  1643. static int tx_abort(MGSLPC_INFO * info)
  1644. {
  1645. unsigned long flags;
  1646. if (debug_level >= DEBUG_LEVEL_INFO)
  1647. printk("tx_abort(%s)\n", info->device_name);
  1648. spin_lock_irqsave(&info->lock,flags);
  1649. if (info->tx_active && info->tx_count &&
  1650. info->params.mode == MGSL_MODE_HDLC) {
  1651. /* clear data count so FIFO is not filled on next IRQ.
  1652. * This results in underrun and abort transmission.
  1653. */
  1654. info->tx_count = info->tx_put = info->tx_get = 0;
  1655. info->tx_aborting = TRUE;
  1656. }
  1657. spin_unlock_irqrestore(&info->lock,flags);
  1658. return 0;
  1659. }
  1660. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1661. {
  1662. unsigned long flags;
  1663. if (debug_level >= DEBUG_LEVEL_INFO)
  1664. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1665. spin_lock_irqsave(&info->lock,flags);
  1666. if (enable) {
  1667. if (!info->rx_enabled)
  1668. rx_start(info);
  1669. } else {
  1670. if (info->rx_enabled)
  1671. rx_stop(info);
  1672. }
  1673. spin_unlock_irqrestore(&info->lock,flags);
  1674. return 0;
  1675. }
  1676. /* wait for specified event to occur
  1677. *
  1678. * Arguments: info pointer to device instance data
  1679. * mask pointer to bitmask of events to wait for
  1680. * Return Value: 0 if successful and bit mask updated with
  1681. * of events triggerred,
  1682. * otherwise error code
  1683. */
  1684. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1685. {
  1686. unsigned long flags;
  1687. int s;
  1688. int rc=0;
  1689. struct mgsl_icount cprev, cnow;
  1690. int events;
  1691. int mask;
  1692. struct _input_signal_events oldsigs, newsigs;
  1693. DECLARE_WAITQUEUE(wait, current);
  1694. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1695. if (rc)
  1696. return -EFAULT;
  1697. if (debug_level >= DEBUG_LEVEL_INFO)
  1698. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1699. spin_lock_irqsave(&info->lock,flags);
  1700. /* return immediately if state matches requested events */
  1701. get_signals(info);
  1702. s = info->serial_signals;
  1703. events = mask &
  1704. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1705. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1706. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1707. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1708. if (events) {
  1709. spin_unlock_irqrestore(&info->lock,flags);
  1710. goto exit;
  1711. }
  1712. /* save current irq counts */
  1713. cprev = info->icount;
  1714. oldsigs = info->input_signal_events;
  1715. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1716. (mask & MgslEvent_ExitHuntMode))
  1717. irq_enable(info, CHA, IRQ_EXITHUNT);
  1718. set_current_state(TASK_INTERRUPTIBLE);
  1719. add_wait_queue(&info->event_wait_q, &wait);
  1720. spin_unlock_irqrestore(&info->lock,flags);
  1721. for(;;) {
  1722. schedule();
  1723. if (signal_pending(current)) {
  1724. rc = -ERESTARTSYS;
  1725. break;
  1726. }
  1727. /* get current irq counts */
  1728. spin_lock_irqsave(&info->lock,flags);
  1729. cnow = info->icount;
  1730. newsigs = info->input_signal_events;
  1731. set_current_state(TASK_INTERRUPTIBLE);
  1732. spin_unlock_irqrestore(&info->lock,flags);
  1733. /* if no change, wait aborted for some reason */
  1734. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1735. newsigs.dsr_down == oldsigs.dsr_down &&
  1736. newsigs.dcd_up == oldsigs.dcd_up &&
  1737. newsigs.dcd_down == oldsigs.dcd_down &&
  1738. newsigs.cts_up == oldsigs.cts_up &&
  1739. newsigs.cts_down == oldsigs.cts_down &&
  1740. newsigs.ri_up == oldsigs.ri_up &&
  1741. newsigs.ri_down == oldsigs.ri_down &&
  1742. cnow.exithunt == cprev.exithunt &&
  1743. cnow.rxidle == cprev.rxidle) {
  1744. rc = -EIO;
  1745. break;
  1746. }
  1747. events = mask &
  1748. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1749. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1750. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1751. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1752. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1753. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1754. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1755. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1756. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1757. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1758. if (events)
  1759. break;
  1760. cprev = cnow;
  1761. oldsigs = newsigs;
  1762. }
  1763. remove_wait_queue(&info->event_wait_q, &wait);
  1764. set_current_state(TASK_RUNNING);
  1765. if (mask & MgslEvent_ExitHuntMode) {
  1766. spin_lock_irqsave(&info->lock,flags);
  1767. if (!waitqueue_active(&info->event_wait_q))
  1768. irq_disable(info, CHA, IRQ_EXITHUNT);
  1769. spin_unlock_irqrestore(&info->lock,flags);
  1770. }
  1771. exit:
  1772. if (rc == 0)
  1773. PUT_USER(rc, events, mask_ptr);
  1774. return rc;
  1775. }
  1776. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1777. {
  1778. unsigned long flags;
  1779. int rc;
  1780. struct mgsl_icount cprev, cnow;
  1781. DECLARE_WAITQUEUE(wait, current);
  1782. /* save current irq counts */
  1783. spin_lock_irqsave(&info->lock,flags);
  1784. cprev = info->icount;
  1785. add_wait_queue(&info->status_event_wait_q, &wait);
  1786. set_current_state(TASK_INTERRUPTIBLE);
  1787. spin_unlock_irqrestore(&info->lock,flags);
  1788. for(;;) {
  1789. schedule();
  1790. if (signal_pending(current)) {
  1791. rc = -ERESTARTSYS;
  1792. break;
  1793. }
  1794. /* get new irq counts */
  1795. spin_lock_irqsave(&info->lock,flags);
  1796. cnow = info->icount;
  1797. set_current_state(TASK_INTERRUPTIBLE);
  1798. spin_unlock_irqrestore(&info->lock,flags);
  1799. /* if no change, wait aborted for some reason */
  1800. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1801. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1802. rc = -EIO;
  1803. break;
  1804. }
  1805. /* check for change in caller specified modem input */
  1806. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1807. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1808. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1809. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1810. rc = 0;
  1811. break;
  1812. }
  1813. cprev = cnow;
  1814. }
  1815. remove_wait_queue(&info->status_event_wait_q, &wait);
  1816. set_current_state(TASK_RUNNING);
  1817. return rc;
  1818. }
  1819. /* return the state of the serial control and status signals
  1820. */
  1821. static int tiocmget(struct tty_struct *tty, struct file *file)
  1822. {
  1823. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1824. unsigned int result;
  1825. unsigned long flags;
  1826. spin_lock_irqsave(&info->lock,flags);
  1827. get_signals(info);
  1828. spin_unlock_irqrestore(&info->lock,flags);
  1829. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1830. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1831. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1832. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1833. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1834. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1835. if (debug_level >= DEBUG_LEVEL_INFO)
  1836. printk("%s(%d):%s tiocmget() value=%08X\n",
  1837. __FILE__,__LINE__, info->device_name, result );
  1838. return result;
  1839. }
  1840. /* set modem control signals (DTR/RTS)
  1841. */
  1842. static int tiocmset(struct tty_struct *tty, struct file *file,
  1843. unsigned int set, unsigned int clear)
  1844. {
  1845. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1846. unsigned long flags;
  1847. if (debug_level >= DEBUG_LEVEL_INFO)
  1848. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1849. __FILE__,__LINE__,info->device_name, set, clear);
  1850. if (set & TIOCM_RTS)
  1851. info->serial_signals |= SerialSignal_RTS;
  1852. if (set & TIOCM_DTR)
  1853. info->serial_signals |= SerialSignal_DTR;
  1854. if (clear & TIOCM_RTS)
  1855. info->serial_signals &= ~SerialSignal_RTS;
  1856. if (clear & TIOCM_DTR)
  1857. info->serial_signals &= ~SerialSignal_DTR;
  1858. spin_lock_irqsave(&info->lock,flags);
  1859. set_signals(info);
  1860. spin_unlock_irqrestore(&info->lock,flags);
  1861. return 0;
  1862. }
  1863. /* Set or clear transmit break condition
  1864. *
  1865. * Arguments: tty pointer to tty instance data
  1866. * break_state -1=set break condition, 0=clear
  1867. */
  1868. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1869. {
  1870. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1871. unsigned long flags;
  1872. if (debug_level >= DEBUG_LEVEL_INFO)
  1873. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1874. __FILE__,__LINE__, info->device_name, break_state);
  1875. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1876. return;
  1877. spin_lock_irqsave(&info->lock,flags);
  1878. if (break_state == -1)
  1879. set_reg_bits(info, CHA+DAFO, BIT6);
  1880. else
  1881. clear_reg_bits(info, CHA+DAFO, BIT6);
  1882. spin_unlock_irqrestore(&info->lock,flags);
  1883. }
  1884. /* Service an IOCTL request
  1885. *
  1886. * Arguments:
  1887. *
  1888. * tty pointer to tty instance data
  1889. * file pointer to associated file object for device
  1890. * cmd IOCTL command code
  1891. * arg command argument/context
  1892. *
  1893. * Return Value: 0 if success, otherwise error code
  1894. */
  1895. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1896. unsigned int cmd, unsigned long arg)
  1897. {
  1898. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1899. if (debug_level >= DEBUG_LEVEL_INFO)
  1900. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1901. info->device_name, cmd );
  1902. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1903. return -ENODEV;
  1904. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1905. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1906. if (tty->flags & (1 << TTY_IO_ERROR))
  1907. return -EIO;
  1908. }
  1909. return ioctl_common(info, cmd, arg);
  1910. }
  1911. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1912. {
  1913. int error;
  1914. struct mgsl_icount cnow; /* kernel counter temps */
  1915. struct serial_icounter_struct __user *p_cuser; /* user space */
  1916. void __user *argp = (void __user *)arg;
  1917. unsigned long flags;
  1918. switch (cmd) {
  1919. case MGSL_IOCGPARAMS:
  1920. return get_params(info, argp);
  1921. case MGSL_IOCSPARAMS:
  1922. return set_params(info, argp);
  1923. case MGSL_IOCGTXIDLE:
  1924. return get_txidle(info, argp);
  1925. case MGSL_IOCSTXIDLE:
  1926. return set_txidle(info, (int)arg);
  1927. case MGSL_IOCGIF:
  1928. return get_interface(info, argp);
  1929. case MGSL_IOCSIF:
  1930. return set_interface(info,(int)arg);
  1931. case MGSL_IOCTXENABLE:
  1932. return set_txenable(info,(int)arg);
  1933. case MGSL_IOCRXENABLE:
  1934. return set_rxenable(info,(int)arg);
  1935. case MGSL_IOCTXABORT:
  1936. return tx_abort(info);
  1937. case MGSL_IOCGSTATS:
  1938. return get_stats(info, argp);
  1939. case MGSL_IOCWAITEVENT:
  1940. return wait_events(info, argp);
  1941. case TIOCMIWAIT:
  1942. return modem_input_wait(info,(int)arg);
  1943. case TIOCGICOUNT:
  1944. spin_lock_irqsave(&info->lock,flags);
  1945. cnow = info->icount;
  1946. spin_unlock_irqrestore(&info->lock,flags);
  1947. p_cuser = argp;
  1948. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1949. if (error) return error;
  1950. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1951. if (error) return error;
  1952. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1953. if (error) return error;
  1954. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1955. if (error) return error;
  1956. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1957. if (error) return error;
  1958. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1959. if (error) return error;
  1960. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1961. if (error) return error;
  1962. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1963. if (error) return error;
  1964. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1965. if (error) return error;
  1966. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1967. if (error) return error;
  1968. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1969. if (error) return error;
  1970. return 0;
  1971. default:
  1972. return -ENOIOCTLCMD;
  1973. }
  1974. return 0;
  1975. }
  1976. /* Set new termios settings
  1977. *
  1978. * Arguments:
  1979. *
  1980. * tty pointer to tty structure
  1981. * termios pointer to buffer to hold returned old termios
  1982. */
  1983. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1984. {
  1985. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1986. unsigned long flags;
  1987. if (debug_level >= DEBUG_LEVEL_INFO)
  1988. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1989. tty->driver->name );
  1990. /* just return if nothing has changed */
  1991. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1992. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1993. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1994. return;
  1995. mgslpc_change_params(info);
  1996. /* Handle transition to B0 status */
  1997. if (old_termios->c_cflag & CBAUD &&
  1998. !(tty->termios->c_cflag & CBAUD)) {
  1999. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2000. spin_lock_irqsave(&info->lock,flags);
  2001. set_signals(info);
  2002. spin_unlock_irqrestore(&info->lock,flags);
  2003. }
  2004. /* Handle transition away from B0 status */
  2005. if (!(old_termios->c_cflag & CBAUD) &&
  2006. tty->termios->c_cflag & CBAUD) {
  2007. info->serial_signals |= SerialSignal_DTR;
  2008. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2009. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2010. info->serial_signals |= SerialSignal_RTS;
  2011. }
  2012. spin_lock_irqsave(&info->lock,flags);
  2013. set_signals(info);
  2014. spin_unlock_irqrestore(&info->lock,flags);
  2015. }
  2016. /* Handle turning off CRTSCTS */
  2017. if (old_termios->c_cflag & CRTSCTS &&
  2018. !(tty->termios->c_cflag & CRTSCTS)) {
  2019. tty->hw_stopped = 0;
  2020. tx_release(tty);
  2021. }
  2022. }
  2023. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2024. {
  2025. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2026. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2027. return;
  2028. if (debug_level >= DEBUG_LEVEL_INFO)
  2029. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2030. __FILE__,__LINE__, info->device_name, info->count);
  2031. if (!info->count)
  2032. return;
  2033. if (tty_hung_up_p(filp))
  2034. goto cleanup;
  2035. if ((tty->count == 1) && (info->count != 1)) {
  2036. /*
  2037. * tty->count is 1 and the tty structure will be freed.
  2038. * info->count should be one in this case.
  2039. * if it's not, correct it so that the port is shutdown.
  2040. */
  2041. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2042. "info->count is %d\n", info->count);
  2043. info->count = 1;
  2044. }
  2045. info->count--;
  2046. /* if at least one open remaining, leave hardware active */
  2047. if (info->count)
  2048. goto cleanup;
  2049. info->flags |= ASYNC_CLOSING;
  2050. /* set tty->closing to notify line discipline to
  2051. * only process XON/XOFF characters. Only the N_TTY
  2052. * discipline appears to use this (ppp does not).
  2053. */
  2054. tty->closing = 1;
  2055. /* wait for transmit data to clear all layers */
  2056. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2057. if (debug_level >= DEBUG_LEVEL_INFO)
  2058. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2059. __FILE__,__LINE__, info->device_name );
  2060. tty_wait_until_sent(tty, info->closing_wait);
  2061. }
  2062. if (info->flags & ASYNC_INITIALIZED)
  2063. mgslpc_wait_until_sent(tty, info->timeout);
  2064. if (tty->driver->flush_buffer)
  2065. tty->driver->flush_buffer(tty);
  2066. ldisc_flush_buffer(tty);
  2067. shutdown(info);
  2068. tty->closing = 0;
  2069. info->tty = NULL;
  2070. if (info->blocked_open) {
  2071. if (info->close_delay) {
  2072. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2073. }
  2074. wake_up_interruptible(&info->open_wait);
  2075. }
  2076. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2077. wake_up_interruptible(&info->close_wait);
  2078. cleanup:
  2079. if (debug_level >= DEBUG_LEVEL_INFO)
  2080. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2081. tty->driver->name, info->count);
  2082. }
  2083. /* Wait until the transmitter is empty.
  2084. */
  2085. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2086. {
  2087. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2088. unsigned long orig_jiffies, char_time;
  2089. if (!info )
  2090. return;
  2091. if (debug_level >= DEBUG_LEVEL_INFO)
  2092. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2093. __FILE__,__LINE__, info->device_name );
  2094. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2095. return;
  2096. if (!(info->flags & ASYNC_INITIALIZED))
  2097. goto exit;
  2098. orig_jiffies = jiffies;
  2099. /* Set check interval to 1/5 of estimated time to
  2100. * send a character, and make it at least 1. The check
  2101. * interval should also be less than the timeout.
  2102. * Note: use tight timings here to satisfy the NIST-PCTS.
  2103. */
  2104. if ( info->params.data_rate ) {
  2105. char_time = info->timeout/(32 * 5);
  2106. if (!char_time)
  2107. char_time++;
  2108. } else
  2109. char_time = 1;
  2110. if (timeout)
  2111. char_time = min_t(unsigned long, char_time, timeout);
  2112. if (info->params.mode == MGSL_MODE_HDLC) {
  2113. while (info->tx_active) {
  2114. msleep_interruptible(jiffies_to_msecs(char_time));
  2115. if (signal_pending(current))
  2116. break;
  2117. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2118. break;
  2119. }
  2120. } else {
  2121. while ((info->tx_count || info->tx_active) &&
  2122. info->tx_enabled) {
  2123. msleep_interruptible(jiffies_to_msecs(char_time));
  2124. if (signal_pending(current))
  2125. break;
  2126. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2127. break;
  2128. }
  2129. }
  2130. exit:
  2131. if (debug_level >= DEBUG_LEVEL_INFO)
  2132. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2133. __FILE__,__LINE__, info->device_name );
  2134. }
  2135. /* Called by tty_hangup() when a hangup is signaled.
  2136. * This is the same as closing all open files for the port.
  2137. */
  2138. static void mgslpc_hangup(struct tty_struct *tty)
  2139. {
  2140. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2141. if (debug_level >= DEBUG_LEVEL_INFO)
  2142. printk("%s(%d):mgslpc_hangup(%s)\n",
  2143. __FILE__,__LINE__, info->device_name );
  2144. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2145. return;
  2146. mgslpc_flush_buffer(tty);
  2147. shutdown(info);
  2148. info->count = 0;
  2149. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2150. info->tty = NULL;
  2151. wake_up_interruptible(&info->open_wait);
  2152. }
  2153. /* Block the current process until the specified port
  2154. * is ready to be opened.
  2155. */
  2156. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2157. MGSLPC_INFO *info)
  2158. {
  2159. DECLARE_WAITQUEUE(wait, current);
  2160. int retval;
  2161. int do_clocal = 0, extra_count = 0;
  2162. unsigned long flags;
  2163. if (debug_level >= DEBUG_LEVEL_INFO)
  2164. printk("%s(%d):block_til_ready on %s\n",
  2165. __FILE__,__LINE__, tty->driver->name );
  2166. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2167. /* nonblock mode is set or port is not enabled */
  2168. /* just verify that callout device is not active */
  2169. info->flags |= ASYNC_NORMAL_ACTIVE;
  2170. return 0;
  2171. }
  2172. if (tty->termios->c_cflag & CLOCAL)
  2173. do_clocal = 1;
  2174. /* Wait for carrier detect and the line to become
  2175. * free (i.e., not in use by the callout). While we are in
  2176. * this loop, info->count is dropped by one, so that
  2177. * mgslpc_close() knows when to free things. We restore it upon
  2178. * exit, either normal or abnormal.
  2179. */
  2180. retval = 0;
  2181. add_wait_queue(&info->open_wait, &wait);
  2182. if (debug_level >= DEBUG_LEVEL_INFO)
  2183. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2184. __FILE__,__LINE__, tty->driver->name, info->count );
  2185. spin_lock_irqsave(&info->lock, flags);
  2186. if (!tty_hung_up_p(filp)) {
  2187. extra_count = 1;
  2188. info->count--;
  2189. }
  2190. spin_unlock_irqrestore(&info->lock, flags);
  2191. info->blocked_open++;
  2192. while (1) {
  2193. if ((tty->termios->c_cflag & CBAUD)) {
  2194. spin_lock_irqsave(&info->lock,flags);
  2195. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2196. set_signals(info);
  2197. spin_unlock_irqrestore(&info->lock,flags);
  2198. }
  2199. set_current_state(TASK_INTERRUPTIBLE);
  2200. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2201. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2202. -EAGAIN : -ERESTARTSYS;
  2203. break;
  2204. }
  2205. spin_lock_irqsave(&info->lock,flags);
  2206. get_signals(info);
  2207. spin_unlock_irqrestore(&info->lock,flags);
  2208. if (!(info->flags & ASYNC_CLOSING) &&
  2209. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2210. break;
  2211. }
  2212. if (signal_pending(current)) {
  2213. retval = -ERESTARTSYS;
  2214. break;
  2215. }
  2216. if (debug_level >= DEBUG_LEVEL_INFO)
  2217. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2218. __FILE__,__LINE__, tty->driver->name, info->count );
  2219. schedule();
  2220. }
  2221. set_current_state(TASK_RUNNING);
  2222. remove_wait_queue(&info->open_wait, &wait);
  2223. if (extra_count)
  2224. info->count++;
  2225. info->blocked_open--;
  2226. if (debug_level >= DEBUG_LEVEL_INFO)
  2227. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2228. __FILE__,__LINE__, tty->driver->name, info->count );
  2229. if (!retval)
  2230. info->flags |= ASYNC_NORMAL_ACTIVE;
  2231. return retval;
  2232. }
  2233. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2234. {
  2235. MGSLPC_INFO *info;
  2236. int retval, line;
  2237. unsigned long flags;
  2238. /* verify range of specified line number */
  2239. line = tty->index;
  2240. if ((line < 0) || (line >= mgslpc_device_count)) {
  2241. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2242. __FILE__,__LINE__,line);
  2243. return -ENODEV;
  2244. }
  2245. /* find the info structure for the specified line */
  2246. info = mgslpc_device_list;
  2247. while(info && info->line != line)
  2248. info = info->next_device;
  2249. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2250. return -ENODEV;
  2251. tty->driver_data = info;
  2252. info->tty = tty;
  2253. if (debug_level >= DEBUG_LEVEL_INFO)
  2254. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2255. __FILE__,__LINE__,tty->driver->name, info->count);
  2256. /* If port is closing, signal caller to try again */
  2257. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2258. if (info->flags & ASYNC_CLOSING)
  2259. interruptible_sleep_on(&info->close_wait);
  2260. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2261. -EAGAIN : -ERESTARTSYS);
  2262. goto cleanup;
  2263. }
  2264. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2265. spin_lock_irqsave(&info->netlock, flags);
  2266. if (info->netcount) {
  2267. retval = -EBUSY;
  2268. spin_unlock_irqrestore(&info->netlock, flags);
  2269. goto cleanup;
  2270. }
  2271. info->count++;
  2272. spin_unlock_irqrestore(&info->netlock, flags);
  2273. if (info->count == 1) {
  2274. /* 1st open on this device, init hardware */
  2275. retval = startup(info);
  2276. if (retval < 0)
  2277. goto cleanup;
  2278. }
  2279. retval = block_til_ready(tty, filp, info);
  2280. if (retval) {
  2281. if (debug_level >= DEBUG_LEVEL_INFO)
  2282. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2283. __FILE__,__LINE__, info->device_name, retval);
  2284. goto cleanup;
  2285. }
  2286. if (debug_level >= DEBUG_LEVEL_INFO)
  2287. printk("%s(%d):mgslpc_open(%s) success\n",
  2288. __FILE__,__LINE__, info->device_name);
  2289. retval = 0;
  2290. cleanup:
  2291. if (retval) {
  2292. if (tty->count == 1)
  2293. info->tty = NULL; /* tty layer will release tty struct */
  2294. if(info->count)
  2295. info->count--;
  2296. }
  2297. return retval;
  2298. }
  2299. /*
  2300. * /proc fs routines....
  2301. */
  2302. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2303. {
  2304. char stat_buf[30];
  2305. int ret;
  2306. unsigned long flags;
  2307. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2308. info->device_name, info->io_base, info->irq_level);
  2309. /* output current serial signal states */
  2310. spin_lock_irqsave(&info->lock,flags);
  2311. get_signals(info);
  2312. spin_unlock_irqrestore(&info->lock,flags);
  2313. stat_buf[0] = 0;
  2314. stat_buf[1] = 0;
  2315. if (info->serial_signals & SerialSignal_RTS)
  2316. strcat(stat_buf, "|RTS");
  2317. if (info->serial_signals & SerialSignal_CTS)
  2318. strcat(stat_buf, "|CTS");
  2319. if (info->serial_signals & SerialSignal_DTR)
  2320. strcat(stat_buf, "|DTR");
  2321. if (info->serial_signals & SerialSignal_DSR)
  2322. strcat(stat_buf, "|DSR");
  2323. if (info->serial_signals & SerialSignal_DCD)
  2324. strcat(stat_buf, "|CD");
  2325. if (info->serial_signals & SerialSignal_RI)
  2326. strcat(stat_buf, "|RI");
  2327. if (info->params.mode == MGSL_MODE_HDLC) {
  2328. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2329. info->icount.txok, info->icount.rxok);
  2330. if (info->icount.txunder)
  2331. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2332. if (info->icount.txabort)
  2333. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2334. if (info->icount.rxshort)
  2335. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2336. if (info->icount.rxlong)
  2337. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2338. if (info->icount.rxover)
  2339. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2340. if (info->icount.rxcrc)
  2341. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2342. } else {
  2343. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2344. info->icount.tx, info->icount.rx);
  2345. if (info->icount.frame)
  2346. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2347. if (info->icount.parity)
  2348. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2349. if (info->icount.brk)
  2350. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2351. if (info->icount.overrun)
  2352. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2353. }
  2354. /* Append serial signal status to end */
  2355. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2356. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2357. info->tx_active,info->bh_requested,info->bh_running,
  2358. info->pending_bh);
  2359. return ret;
  2360. }
  2361. /* Called to print information about devices
  2362. */
  2363. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2364. int *eof, void *data)
  2365. {
  2366. int len = 0, l;
  2367. off_t begin = 0;
  2368. MGSLPC_INFO *info;
  2369. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2370. info = mgslpc_device_list;
  2371. while( info ) {
  2372. l = line_info(page + len, info);
  2373. len += l;
  2374. if (len+begin > off+count)
  2375. goto done;
  2376. if (len+begin < off) {
  2377. begin += len;
  2378. len = 0;
  2379. }
  2380. info = info->next_device;
  2381. }
  2382. *eof = 1;
  2383. done:
  2384. if (off >= len+begin)
  2385. return 0;
  2386. *start = page + (off-begin);
  2387. return ((count < begin+len-off) ? count : begin+len-off);
  2388. }
  2389. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2390. {
  2391. /* each buffer has header and data */
  2392. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2393. /* calculate total allocation size for 8 buffers */
  2394. info->rx_buf_total_size = info->rx_buf_size * 8;
  2395. /* limit total allocated memory */
  2396. if (info->rx_buf_total_size > 0x10000)
  2397. info->rx_buf_total_size = 0x10000;
  2398. /* calculate number of buffers */
  2399. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2400. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2401. if (info->rx_buf == NULL)
  2402. return -ENOMEM;
  2403. rx_reset_buffers(info);
  2404. return 0;
  2405. }
  2406. static void rx_free_buffers(MGSLPC_INFO *info)
  2407. {
  2408. kfree(info->rx_buf);
  2409. info->rx_buf = NULL;
  2410. }
  2411. static int claim_resources(MGSLPC_INFO *info)
  2412. {
  2413. if (rx_alloc_buffers(info) < 0 ) {
  2414. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2415. release_resources(info);
  2416. return -ENODEV;
  2417. }
  2418. return 0;
  2419. }
  2420. static void release_resources(MGSLPC_INFO *info)
  2421. {
  2422. if (debug_level >= DEBUG_LEVEL_INFO)
  2423. printk("release_resources(%s)\n", info->device_name);
  2424. rx_free_buffers(info);
  2425. }
  2426. /* Add the specified device instance data structure to the
  2427. * global linked list of devices and increment the device count.
  2428. *
  2429. * Arguments: info pointer to device instance data
  2430. */
  2431. static void mgslpc_add_device(MGSLPC_INFO *info)
  2432. {
  2433. info->next_device = NULL;
  2434. info->line = mgslpc_device_count;
  2435. sprintf(info->device_name,"ttySLP%d",info->line);
  2436. if (info->line < MAX_DEVICE_COUNT) {
  2437. if (maxframe[info->line])
  2438. info->max_frame_size = maxframe[info->line];
  2439. info->dosyncppp = dosyncppp[info->line];
  2440. }
  2441. mgslpc_device_count++;
  2442. if (!mgslpc_device_list)
  2443. mgslpc_device_list = info;
  2444. else {
  2445. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2446. while( current_dev->next_device )
  2447. current_dev = current_dev->next_device;
  2448. current_dev->next_device = info;
  2449. }
  2450. if (info->max_frame_size < 4096)
  2451. info->max_frame_size = 4096;
  2452. else if (info->max_frame_size > 65535)
  2453. info->max_frame_size = 65535;
  2454. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2455. info->device_name, info->io_base, info->irq_level);
  2456. #if SYNCLINK_GENERIC_HDLC
  2457. hdlcdev_init(info);
  2458. #endif
  2459. }
  2460. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2461. {
  2462. MGSLPC_INFO *info = mgslpc_device_list;
  2463. MGSLPC_INFO *last = NULL;
  2464. while(info) {
  2465. if (info == remove_info) {
  2466. if (last)
  2467. last->next_device = info->next_device;
  2468. else
  2469. mgslpc_device_list = info->next_device;
  2470. #if SYNCLINK_GENERIC_HDLC
  2471. hdlcdev_exit(info);
  2472. #endif
  2473. release_resources(info);
  2474. kfree(info);
  2475. mgslpc_device_count--;
  2476. return;
  2477. }
  2478. last = info;
  2479. info = info->next_device;
  2480. }
  2481. }
  2482. static struct pcmcia_device_id mgslpc_ids[] = {
  2483. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2484. PCMCIA_DEVICE_NULL
  2485. };
  2486. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2487. static struct pcmcia_driver mgslpc_driver = {
  2488. .owner = THIS_MODULE,
  2489. .drv = {
  2490. .name = "synclink_cs",
  2491. },
  2492. .probe = mgslpc_probe,
  2493. .remove = mgslpc_detach,
  2494. .id_table = mgslpc_ids,
  2495. .suspend = mgslpc_suspend,
  2496. .resume = mgslpc_resume,
  2497. };
  2498. static const struct tty_operations mgslpc_ops = {
  2499. .open = mgslpc_open,
  2500. .close = mgslpc_close,
  2501. .write = mgslpc_write,
  2502. .put_char = mgslpc_put_char,
  2503. .flush_chars = mgslpc_flush_chars,
  2504. .write_room = mgslpc_write_room,
  2505. .chars_in_buffer = mgslpc_chars_in_buffer,
  2506. .flush_buffer = mgslpc_flush_buffer,
  2507. .ioctl = mgslpc_ioctl,
  2508. .throttle = mgslpc_throttle,
  2509. .unthrottle = mgslpc_unthrottle,
  2510. .send_xchar = mgslpc_send_xchar,
  2511. .break_ctl = mgslpc_break,
  2512. .wait_until_sent = mgslpc_wait_until_sent,
  2513. .read_proc = mgslpc_read_proc,
  2514. .set_termios = mgslpc_set_termios,
  2515. .stop = tx_pause,
  2516. .start = tx_release,
  2517. .hangup = mgslpc_hangup,
  2518. .tiocmget = tiocmget,
  2519. .tiocmset = tiocmset,
  2520. };
  2521. static void synclink_cs_cleanup(void)
  2522. {
  2523. int rc;
  2524. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2525. while(mgslpc_device_list)
  2526. mgslpc_remove_device(mgslpc_device_list);
  2527. if (serial_driver) {
  2528. if ((rc = tty_unregister_driver(serial_driver)))
  2529. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2530. __FILE__,__LINE__,rc);
  2531. put_tty_driver(serial_driver);
  2532. }
  2533. pcmcia_unregister_driver(&mgslpc_driver);
  2534. }
  2535. static int __init synclink_cs_init(void)
  2536. {
  2537. int rc;
  2538. if (break_on_load) {
  2539. mgslpc_get_text_ptr();
  2540. BREAKPOINT();
  2541. }
  2542. printk("%s %s\n", driver_name, driver_version);
  2543. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2544. return rc;
  2545. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2546. if (!serial_driver) {
  2547. rc = -ENOMEM;
  2548. goto error;
  2549. }
  2550. /* Initialize the tty_driver structure */
  2551. serial_driver->owner = THIS_MODULE;
  2552. serial_driver->driver_name = "synclink_cs";
  2553. serial_driver->name = "ttySLP";
  2554. serial_driver->major = ttymajor;
  2555. serial_driver->minor_start = 64;
  2556. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2557. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2558. serial_driver->init_termios = tty_std_termios;
  2559. serial_driver->init_termios.c_cflag =
  2560. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2561. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2562. tty_set_operations(serial_driver, &mgslpc_ops);
  2563. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2564. printk("%s(%d):Couldn't register serial driver\n",
  2565. __FILE__,__LINE__);
  2566. put_tty_driver(serial_driver);
  2567. serial_driver = NULL;
  2568. goto error;
  2569. }
  2570. printk("%s %s, tty major#%d\n",
  2571. driver_name, driver_version,
  2572. serial_driver->major);
  2573. return 0;
  2574. error:
  2575. synclink_cs_cleanup();
  2576. return rc;
  2577. }
  2578. static void __exit synclink_cs_exit(void)
  2579. {
  2580. synclink_cs_cleanup();
  2581. }
  2582. module_init(synclink_cs_init);
  2583. module_exit(synclink_cs_exit);
  2584. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2585. {
  2586. unsigned int M, N;
  2587. unsigned char val;
  2588. /* note:standard BRG mode is broken in V3.2 chip
  2589. * so enhanced mode is always used
  2590. */
  2591. if (rate) {
  2592. N = 3686400 / rate;
  2593. if (!N)
  2594. N = 1;
  2595. N >>= 1;
  2596. for (M = 1; N > 64 && M < 16; M++)
  2597. N >>= 1;
  2598. N--;
  2599. /* BGR[5..0] = N
  2600. * BGR[9..6] = M
  2601. * BGR[7..0] contained in BGR register
  2602. * BGR[9..8] contained in CCR2[7..6]
  2603. * divisor = (N+1)*2^M
  2604. *
  2605. * Note: M *must* not be zero (causes asymetric duty cycle)
  2606. */
  2607. write_reg(info, (unsigned char) (channel + BGR),
  2608. (unsigned char) ((M << 6) + N));
  2609. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2610. val |= ((M << 4) & 0xc0);
  2611. write_reg(info, (unsigned char) (channel + CCR2), val);
  2612. }
  2613. }
  2614. /* Enabled the AUX clock output at the specified frequency.
  2615. */
  2616. static void enable_auxclk(MGSLPC_INFO *info)
  2617. {
  2618. unsigned char val;
  2619. /* MODE
  2620. *
  2621. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2622. * 05 ADM Address Mode, 0 = no addr recognition
  2623. * 04 TMD Timer Mode, 0 = external
  2624. * 03 RAC Receiver Active, 0 = inactive
  2625. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2626. * 01 TRS Timer Resolution, 1=512
  2627. * 00 TLP Test Loop, 0 = no loop
  2628. *
  2629. * 1000 0010
  2630. */
  2631. val = 0x82;
  2632. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2633. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2634. val |= BIT2;
  2635. write_reg(info, CHB + MODE, val);
  2636. /* CCR0
  2637. *
  2638. * 07 PU Power Up, 1=active, 0=power down
  2639. * 06 MCE Master Clock Enable, 1=enabled
  2640. * 05 Reserved, 0
  2641. * 04..02 SC[2..0] Encoding
  2642. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2643. *
  2644. * 11000000
  2645. */
  2646. write_reg(info, CHB + CCR0, 0xc0);
  2647. /* CCR1
  2648. *
  2649. * 07 SFLG Shared Flag, 0 = disable shared flags
  2650. * 06 GALP Go Active On Loop, 0 = not used
  2651. * 05 GLP Go On Loop, 0 = not used
  2652. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2653. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2654. * 02..00 CM[2..0] Clock Mode
  2655. *
  2656. * 0001 0111
  2657. */
  2658. write_reg(info, CHB + CCR1, 0x17);
  2659. /* CCR2 (Channel B)
  2660. *
  2661. * 07..06 BGR[9..8] Baud rate bits 9..8
  2662. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2663. * 04 SSEL Clock source select, 1=submode b
  2664. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2665. * 02 RWX Read/Write Exchange 0=disabled
  2666. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2667. * 00 DIV, data inversion 0=disabled, 1=enabled
  2668. *
  2669. * 0011 1000
  2670. */
  2671. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2672. write_reg(info, CHB + CCR2, 0x38);
  2673. else
  2674. write_reg(info, CHB + CCR2, 0x30);
  2675. /* CCR4
  2676. *
  2677. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2678. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2679. * 05 TST1 Test Pin, 0=normal operation
  2680. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2681. * 03..02 Reserved, must be 0
  2682. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2683. *
  2684. * 0101 0000
  2685. */
  2686. write_reg(info, CHB + CCR4, 0x50);
  2687. /* if auxclk not enabled, set internal BRG so
  2688. * CTS transitions can be detected (requires TxC)
  2689. */
  2690. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2691. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2692. else
  2693. mgslpc_set_rate(info, CHB, 921600);
  2694. }
  2695. static void loopback_enable(MGSLPC_INFO *info)
  2696. {
  2697. unsigned char val;
  2698. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2699. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2700. write_reg(info, CHA + CCR1, val);
  2701. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2702. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2703. write_reg(info, CHA + CCR2, val);
  2704. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2705. if (info->params.clock_speed)
  2706. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2707. else
  2708. mgslpc_set_rate(info, CHA, 1843200);
  2709. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2710. val = read_reg(info, CHA + MODE) | BIT0;
  2711. write_reg(info, CHA + MODE, val);
  2712. }
  2713. static void hdlc_mode(MGSLPC_INFO *info)
  2714. {
  2715. unsigned char val;
  2716. unsigned char clkmode, clksubmode;
  2717. /* disable all interrupts */
  2718. irq_disable(info, CHA, 0xffff);
  2719. irq_disable(info, CHB, 0xffff);
  2720. port_irq_disable(info, 0xff);
  2721. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2722. clkmode = clksubmode = 0;
  2723. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2724. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2725. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2726. clkmode = 7;
  2727. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2728. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2729. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2730. clkmode = 7;
  2731. clksubmode = 1;
  2732. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2733. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2734. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2735. clkmode = 6;
  2736. clksubmode = 1;
  2737. } else {
  2738. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2739. clkmode = 6;
  2740. }
  2741. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2742. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2743. clksubmode = 1;
  2744. }
  2745. /* MODE
  2746. *
  2747. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2748. * 05 ADM Address Mode, 0 = no addr recognition
  2749. * 04 TMD Timer Mode, 0 = external
  2750. * 03 RAC Receiver Active, 0 = inactive
  2751. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2752. * 01 TRS Timer Resolution, 1=512
  2753. * 00 TLP Test Loop, 0 = no loop
  2754. *
  2755. * 1000 0010
  2756. */
  2757. val = 0x82;
  2758. if (info->params.loopback)
  2759. val |= BIT0;
  2760. /* preserve RTS state */
  2761. if (info->serial_signals & SerialSignal_RTS)
  2762. val |= BIT2;
  2763. write_reg(info, CHA + MODE, val);
  2764. /* CCR0
  2765. *
  2766. * 07 PU Power Up, 1=active, 0=power down
  2767. * 06 MCE Master Clock Enable, 1=enabled
  2768. * 05 Reserved, 0
  2769. * 04..02 SC[2..0] Encoding
  2770. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2771. *
  2772. * 11000000
  2773. */
  2774. val = 0xc0;
  2775. switch (info->params.encoding)
  2776. {
  2777. case HDLC_ENCODING_NRZI:
  2778. val |= BIT3;
  2779. break;
  2780. case HDLC_ENCODING_BIPHASE_SPACE:
  2781. val |= BIT4;
  2782. break; // FM0
  2783. case HDLC_ENCODING_BIPHASE_MARK:
  2784. val |= BIT4 + BIT2;
  2785. break; // FM1
  2786. case HDLC_ENCODING_BIPHASE_LEVEL:
  2787. val |= BIT4 + BIT3;
  2788. break; // Manchester
  2789. }
  2790. write_reg(info, CHA + CCR0, val);
  2791. /* CCR1
  2792. *
  2793. * 07 SFLG Shared Flag, 0 = disable shared flags
  2794. * 06 GALP Go Active On Loop, 0 = not used
  2795. * 05 GLP Go On Loop, 0 = not used
  2796. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2797. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2798. * 02..00 CM[2..0] Clock Mode
  2799. *
  2800. * 0001 0000
  2801. */
  2802. val = 0x10 + clkmode;
  2803. write_reg(info, CHA + CCR1, val);
  2804. /* CCR2
  2805. *
  2806. * 07..06 BGR[9..8] Baud rate bits 9..8
  2807. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2808. * 04 SSEL Clock source select, 1=submode b
  2809. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2810. * 02 RWX Read/Write Exchange 0=disabled
  2811. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2812. * 00 DIV, data inversion 0=disabled, 1=enabled
  2813. *
  2814. * 0000 0000
  2815. */
  2816. val = 0x00;
  2817. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2818. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2819. val |= BIT5;
  2820. if (clksubmode)
  2821. val |= BIT4;
  2822. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2823. val |= BIT1;
  2824. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2825. val |= BIT0;
  2826. write_reg(info, CHA + CCR2, val);
  2827. /* CCR3
  2828. *
  2829. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2830. * 05 EPT Enable preamble transmission, 1=enabled
  2831. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2832. * 03 CRL CRC Reset Level, 0=FFFF
  2833. * 02 RCRC Rx CRC 0=On 1=Off
  2834. * 01 TCRC Tx CRC 0=On 1=Off
  2835. * 00 PSD DPLL Phase Shift Disable
  2836. *
  2837. * 0000 0000
  2838. */
  2839. val = 0x00;
  2840. if (info->params.crc_type == HDLC_CRC_NONE)
  2841. val |= BIT2 + BIT1;
  2842. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2843. val |= BIT5;
  2844. switch (info->params.preamble_length)
  2845. {
  2846. case HDLC_PREAMBLE_LENGTH_16BITS:
  2847. val |= BIT6;
  2848. break;
  2849. case HDLC_PREAMBLE_LENGTH_32BITS:
  2850. val |= BIT6;
  2851. break;
  2852. case HDLC_PREAMBLE_LENGTH_64BITS:
  2853. val |= BIT7 + BIT6;
  2854. break;
  2855. }
  2856. write_reg(info, CHA + CCR3, val);
  2857. /* PRE - Preamble pattern */
  2858. val = 0;
  2859. switch (info->params.preamble)
  2860. {
  2861. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2862. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2863. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2864. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2865. }
  2866. write_reg(info, CHA + PRE, val);
  2867. /* CCR4
  2868. *
  2869. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2870. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2871. * 05 TST1 Test Pin, 0=normal operation
  2872. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2873. * 03..02 Reserved, must be 0
  2874. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2875. *
  2876. * 0101 0000
  2877. */
  2878. val = 0x50;
  2879. write_reg(info, CHA + CCR4, val);
  2880. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2881. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2882. else
  2883. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2884. /* RLCR Receive length check register
  2885. *
  2886. * 7 1=enable receive length check
  2887. * 6..0 Max frame length = (RL + 1) * 32
  2888. */
  2889. write_reg(info, CHA + RLCR, 0);
  2890. /* XBCH Transmit Byte Count High
  2891. *
  2892. * 07 DMA mode, 0 = interrupt driven
  2893. * 06 NRM, 0=ABM (ignored)
  2894. * 05 CAS Carrier Auto Start
  2895. * 04 XC Transmit Continuously (ignored)
  2896. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2897. *
  2898. * 0000 0000
  2899. */
  2900. val = 0x00;
  2901. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2902. val |= BIT5;
  2903. write_reg(info, CHA + XBCH, val);
  2904. enable_auxclk(info);
  2905. if (info->params.loopback || info->testing_irq)
  2906. loopback_enable(info);
  2907. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2908. {
  2909. irq_enable(info, CHB, IRQ_CTS);
  2910. /* PVR[3] 1=AUTO CTS active */
  2911. set_reg_bits(info, CHA + PVR, BIT3);
  2912. } else
  2913. clear_reg_bits(info, CHA + PVR, BIT3);
  2914. irq_enable(info, CHA,
  2915. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2916. IRQ_UNDERRUN + IRQ_TXFIFO);
  2917. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2918. wait_command_complete(info, CHA);
  2919. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2920. /* Master clock mode enabled above to allow reset commands
  2921. * to complete even if no data clocks are present.
  2922. *
  2923. * Disable master clock mode for normal communications because
  2924. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2925. * IRQ when in master clock mode.
  2926. *
  2927. * Leave master clock mode enabled for IRQ test because the
  2928. * timer IRQ used by the test can only happen in master clock mode.
  2929. */
  2930. if (!info->testing_irq)
  2931. clear_reg_bits(info, CHA + CCR0, BIT6);
  2932. tx_set_idle(info);
  2933. tx_stop(info);
  2934. rx_stop(info);
  2935. }
  2936. static void rx_stop(MGSLPC_INFO *info)
  2937. {
  2938. if (debug_level >= DEBUG_LEVEL_ISR)
  2939. printk("%s(%d):rx_stop(%s)\n",
  2940. __FILE__,__LINE__, info->device_name );
  2941. /* MODE:03 RAC Receiver Active, 0=inactive */
  2942. clear_reg_bits(info, CHA + MODE, BIT3);
  2943. info->rx_enabled = 0;
  2944. info->rx_overflow = 0;
  2945. }
  2946. static void rx_start(MGSLPC_INFO *info)
  2947. {
  2948. if (debug_level >= DEBUG_LEVEL_ISR)
  2949. printk("%s(%d):rx_start(%s)\n",
  2950. __FILE__,__LINE__, info->device_name );
  2951. rx_reset_buffers(info);
  2952. info->rx_enabled = 0;
  2953. info->rx_overflow = 0;
  2954. /* MODE:03 RAC Receiver Active, 1=active */
  2955. set_reg_bits(info, CHA + MODE, BIT3);
  2956. info->rx_enabled = 1;
  2957. }
  2958. static void tx_start(MGSLPC_INFO *info)
  2959. {
  2960. if (debug_level >= DEBUG_LEVEL_ISR)
  2961. printk("%s(%d):tx_start(%s)\n",
  2962. __FILE__,__LINE__, info->device_name );
  2963. if (info->tx_count) {
  2964. /* If auto RTS enabled and RTS is inactive, then assert */
  2965. /* RTS and set a flag indicating that the driver should */
  2966. /* negate RTS when the transmission completes. */
  2967. info->drop_rts_on_tx_done = 0;
  2968. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2969. get_signals(info);
  2970. if (!(info->serial_signals & SerialSignal_RTS)) {
  2971. info->serial_signals |= SerialSignal_RTS;
  2972. set_signals(info);
  2973. info->drop_rts_on_tx_done = 1;
  2974. }
  2975. }
  2976. if (info->params.mode == MGSL_MODE_ASYNC) {
  2977. if (!info->tx_active) {
  2978. info->tx_active = 1;
  2979. tx_ready(info);
  2980. }
  2981. } else {
  2982. info->tx_active = 1;
  2983. tx_ready(info);
  2984. mod_timer(&info->tx_timer, jiffies +
  2985. msecs_to_jiffies(5000));
  2986. }
  2987. }
  2988. if (!info->tx_enabled)
  2989. info->tx_enabled = 1;
  2990. }
  2991. static void tx_stop(MGSLPC_INFO *info)
  2992. {
  2993. if (debug_level >= DEBUG_LEVEL_ISR)
  2994. printk("%s(%d):tx_stop(%s)\n",
  2995. __FILE__,__LINE__, info->device_name );
  2996. del_timer(&info->tx_timer);
  2997. info->tx_enabled = 0;
  2998. info->tx_active = 0;
  2999. }
  3000. /* Reset the adapter to a known state and prepare it for further use.
  3001. */
  3002. static void reset_device(MGSLPC_INFO *info)
  3003. {
  3004. /* power up both channels (set BIT7) */
  3005. write_reg(info, CHA + CCR0, 0x80);
  3006. write_reg(info, CHB + CCR0, 0x80);
  3007. write_reg(info, CHA + MODE, 0);
  3008. write_reg(info, CHB + MODE, 0);
  3009. /* disable all interrupts */
  3010. irq_disable(info, CHA, 0xffff);
  3011. irq_disable(info, CHB, 0xffff);
  3012. port_irq_disable(info, 0xff);
  3013. /* PCR Port Configuration Register
  3014. *
  3015. * 07..04 DEC[3..0] Serial I/F select outputs
  3016. * 03 output, 1=AUTO CTS control enabled
  3017. * 02 RI Ring Indicator input 0=active
  3018. * 01 DSR input 0=active
  3019. * 00 DTR output 0=active
  3020. *
  3021. * 0000 0110
  3022. */
  3023. write_reg(info, PCR, 0x06);
  3024. /* PVR Port Value Register
  3025. *
  3026. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3027. * 03 AUTO CTS output 1=enabled
  3028. * 02 RI Ring Indicator input
  3029. * 01 DSR input
  3030. * 00 DTR output (1=inactive)
  3031. *
  3032. * 0000 0001
  3033. */
  3034. // write_reg(info, PVR, PVR_DTR);
  3035. /* IPC Interrupt Port Configuration
  3036. *
  3037. * 07 VIS 1=Masked interrupts visible
  3038. * 06..05 Reserved, 0
  3039. * 04..03 SLA Slave address, 00 ignored
  3040. * 02 CASM Cascading Mode, 1=daisy chain
  3041. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3042. *
  3043. * 0000 0101
  3044. */
  3045. write_reg(info, IPC, 0x05);
  3046. }
  3047. static void async_mode(MGSLPC_INFO *info)
  3048. {
  3049. unsigned char val;
  3050. /* disable all interrupts */
  3051. irq_disable(info, CHA, 0xffff);
  3052. irq_disable(info, CHB, 0xffff);
  3053. port_irq_disable(info, 0xff);
  3054. /* MODE
  3055. *
  3056. * 07 Reserved, 0
  3057. * 06 FRTS RTS State, 0=active
  3058. * 05 FCTS Flow Control on CTS
  3059. * 04 FLON Flow Control Enable
  3060. * 03 RAC Receiver Active, 0 = inactive
  3061. * 02 RTS 0=Auto RTS, 1=manual RTS
  3062. * 01 TRS Timer Resolution, 1=512
  3063. * 00 TLP Test Loop, 0 = no loop
  3064. *
  3065. * 0000 0110
  3066. */
  3067. val = 0x06;
  3068. if (info->params.loopback)
  3069. val |= BIT0;
  3070. /* preserve RTS state */
  3071. if (!(info->serial_signals & SerialSignal_RTS))
  3072. val |= BIT6;
  3073. write_reg(info, CHA + MODE, val);
  3074. /* CCR0
  3075. *
  3076. * 07 PU Power Up, 1=active, 0=power down
  3077. * 06 MCE Master Clock Enable, 1=enabled
  3078. * 05 Reserved, 0
  3079. * 04..02 SC[2..0] Encoding, 000=NRZ
  3080. * 01..00 SM[1..0] Serial Mode, 11=Async
  3081. *
  3082. * 1000 0011
  3083. */
  3084. write_reg(info, CHA + CCR0, 0x83);
  3085. /* CCR1
  3086. *
  3087. * 07..05 Reserved, 0
  3088. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3089. * 03 BCR Bit Clock Rate, 1=16x
  3090. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3091. *
  3092. * 0001 1111
  3093. */
  3094. write_reg(info, CHA + CCR1, 0x1f);
  3095. /* CCR2 (channel A)
  3096. *
  3097. * 07..06 BGR[9..8] Baud rate bits 9..8
  3098. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3099. * 04 SSEL Clock source select, 1=submode b
  3100. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3101. * 02 RWX Read/Write Exchange 0=disabled
  3102. * 01 Reserved, 0
  3103. * 00 DIV, data inversion 0=disabled, 1=enabled
  3104. *
  3105. * 0001 0000
  3106. */
  3107. write_reg(info, CHA + CCR2, 0x10);
  3108. /* CCR3
  3109. *
  3110. * 07..01 Reserved, 0
  3111. * 00 PSD DPLL Phase Shift Disable
  3112. *
  3113. * 0000 0000
  3114. */
  3115. write_reg(info, CHA + CCR3, 0);
  3116. /* CCR4
  3117. *
  3118. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3119. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3120. * 05 TST1 Test Pin, 0=normal operation
  3121. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3122. * 03..00 Reserved, must be 0
  3123. *
  3124. * 0101 0000
  3125. */
  3126. write_reg(info, CHA + CCR4, 0x50);
  3127. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3128. /* DAFO Data Format
  3129. *
  3130. * 07 Reserved, 0
  3131. * 06 XBRK transmit break, 0=normal operation
  3132. * 05 Stop bits (0=1, 1=2)
  3133. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3134. * 02 PAREN Parity Enable
  3135. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3136. *
  3137. */
  3138. val = 0x00;
  3139. if (info->params.data_bits != 8)
  3140. val |= BIT0; /* 7 bits */
  3141. if (info->params.stop_bits != 1)
  3142. val |= BIT5;
  3143. if (info->params.parity != ASYNC_PARITY_NONE)
  3144. {
  3145. val |= BIT2; /* Parity enable */
  3146. if (info->params.parity == ASYNC_PARITY_ODD)
  3147. val |= BIT3;
  3148. else
  3149. val |= BIT4;
  3150. }
  3151. write_reg(info, CHA + DAFO, val);
  3152. /* RFC Rx FIFO Control
  3153. *
  3154. * 07 Reserved, 0
  3155. * 06 DPS, 1=parity bit not stored in data byte
  3156. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3157. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3158. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3159. * 01 Reserved, 0
  3160. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3161. *
  3162. * 0101 1100
  3163. */
  3164. write_reg(info, CHA + RFC, 0x5c);
  3165. /* RLCR Receive length check register
  3166. *
  3167. * Max frame length = (RL + 1) * 32
  3168. */
  3169. write_reg(info, CHA + RLCR, 0);
  3170. /* XBCH Transmit Byte Count High
  3171. *
  3172. * 07 DMA mode, 0 = interrupt driven
  3173. * 06 NRM, 0=ABM (ignored)
  3174. * 05 CAS Carrier Auto Start
  3175. * 04 XC Transmit Continuously (ignored)
  3176. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3177. *
  3178. * 0000 0000
  3179. */
  3180. val = 0x00;
  3181. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3182. val |= BIT5;
  3183. write_reg(info, CHA + XBCH, val);
  3184. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3185. irq_enable(info, CHA, IRQ_CTS);
  3186. /* MODE:03 RAC Receiver Active, 1=active */
  3187. set_reg_bits(info, CHA + MODE, BIT3);
  3188. enable_auxclk(info);
  3189. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3190. irq_enable(info, CHB, IRQ_CTS);
  3191. /* PVR[3] 1=AUTO CTS active */
  3192. set_reg_bits(info, CHA + PVR, BIT3);
  3193. } else
  3194. clear_reg_bits(info, CHA + PVR, BIT3);
  3195. irq_enable(info, CHA,
  3196. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3197. IRQ_ALLSENT + IRQ_TXFIFO);
  3198. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3199. wait_command_complete(info, CHA);
  3200. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3201. }
  3202. /* Set the HDLC idle mode for the transmitter.
  3203. */
  3204. static void tx_set_idle(MGSLPC_INFO *info)
  3205. {
  3206. /* Note: ESCC2 only supports flags and one idle modes */
  3207. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3208. set_reg_bits(info, CHA + CCR1, BIT3);
  3209. else
  3210. clear_reg_bits(info, CHA + CCR1, BIT3);
  3211. }
  3212. /* get state of the V24 status (input) signals.
  3213. */
  3214. static void get_signals(MGSLPC_INFO *info)
  3215. {
  3216. unsigned char status = 0;
  3217. /* preserve DTR and RTS */
  3218. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3219. if (read_reg(info, CHB + VSTR) & BIT7)
  3220. info->serial_signals |= SerialSignal_DCD;
  3221. if (read_reg(info, CHB + STAR) & BIT1)
  3222. info->serial_signals |= SerialSignal_CTS;
  3223. status = read_reg(info, CHA + PVR);
  3224. if (!(status & PVR_RI))
  3225. info->serial_signals |= SerialSignal_RI;
  3226. if (!(status & PVR_DSR))
  3227. info->serial_signals |= SerialSignal_DSR;
  3228. }
  3229. /* Set the state of DTR and RTS based on contents of
  3230. * serial_signals member of device extension.
  3231. */
  3232. static void set_signals(MGSLPC_INFO *info)
  3233. {
  3234. unsigned char val;
  3235. val = read_reg(info, CHA + MODE);
  3236. if (info->params.mode == MGSL_MODE_ASYNC) {
  3237. if (info->serial_signals & SerialSignal_RTS)
  3238. val &= ~BIT6;
  3239. else
  3240. val |= BIT6;
  3241. } else {
  3242. if (info->serial_signals & SerialSignal_RTS)
  3243. val |= BIT2;
  3244. else
  3245. val &= ~BIT2;
  3246. }
  3247. write_reg(info, CHA + MODE, val);
  3248. if (info->serial_signals & SerialSignal_DTR)
  3249. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3250. else
  3251. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3252. }
  3253. static void rx_reset_buffers(MGSLPC_INFO *info)
  3254. {
  3255. RXBUF *buf;
  3256. int i;
  3257. info->rx_put = 0;
  3258. info->rx_get = 0;
  3259. info->rx_frame_count = 0;
  3260. for (i=0 ; i < info->rx_buf_count ; i++) {
  3261. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3262. buf->status = buf->count = 0;
  3263. }
  3264. }
  3265. /* Attempt to return a received HDLC frame
  3266. * Only frames received without errors are returned.
  3267. *
  3268. * Returns 1 if frame returned, otherwise 0
  3269. */
  3270. static int rx_get_frame(MGSLPC_INFO *info)
  3271. {
  3272. unsigned short status;
  3273. RXBUF *buf;
  3274. unsigned int framesize = 0;
  3275. unsigned long flags;
  3276. struct tty_struct *tty = info->tty;
  3277. int return_frame = 0;
  3278. if (info->rx_frame_count == 0)
  3279. return 0;
  3280. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3281. status = buf->status;
  3282. /* 07 VFR 1=valid frame
  3283. * 06 RDO 1=data overrun
  3284. * 05 CRC 1=OK, 0=error
  3285. * 04 RAB 1=frame aborted
  3286. */
  3287. if ((status & 0xf0) != 0xA0) {
  3288. if (!(status & BIT7) || (status & BIT4))
  3289. info->icount.rxabort++;
  3290. else if (status & BIT6)
  3291. info->icount.rxover++;
  3292. else if (!(status & BIT5)) {
  3293. info->icount.rxcrc++;
  3294. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3295. return_frame = 1;
  3296. }
  3297. framesize = 0;
  3298. #if SYNCLINK_GENERIC_HDLC
  3299. {
  3300. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3301. stats->rx_errors++;
  3302. stats->rx_frame_errors++;
  3303. }
  3304. #endif
  3305. } else
  3306. return_frame = 1;
  3307. if (return_frame)
  3308. framesize = buf->count;
  3309. if (debug_level >= DEBUG_LEVEL_BH)
  3310. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3311. __FILE__,__LINE__,info->device_name,status,framesize);
  3312. if (debug_level >= DEBUG_LEVEL_DATA)
  3313. trace_block(info, buf->data, framesize, 0);
  3314. if (framesize) {
  3315. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3316. framesize+1 > info->max_frame_size) ||
  3317. framesize > info->max_frame_size)
  3318. info->icount.rxlong++;
  3319. else {
  3320. if (status & BIT5)
  3321. info->icount.rxok++;
  3322. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3323. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3324. ++framesize;
  3325. }
  3326. #if SYNCLINK_GENERIC_HDLC
  3327. if (info->netcount)
  3328. hdlcdev_rx(info, buf->data, framesize);
  3329. else
  3330. #endif
  3331. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3332. }
  3333. }
  3334. spin_lock_irqsave(&info->lock,flags);
  3335. buf->status = buf->count = 0;
  3336. info->rx_frame_count--;
  3337. info->rx_get++;
  3338. if (info->rx_get >= info->rx_buf_count)
  3339. info->rx_get = 0;
  3340. spin_unlock_irqrestore(&info->lock,flags);
  3341. return 1;
  3342. }
  3343. static BOOLEAN register_test(MGSLPC_INFO *info)
  3344. {
  3345. static unsigned char patterns[] =
  3346. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3347. static unsigned int count = ARRAY_SIZE(patterns);
  3348. unsigned int i;
  3349. BOOLEAN rc = TRUE;
  3350. unsigned long flags;
  3351. spin_lock_irqsave(&info->lock,flags);
  3352. reset_device(info);
  3353. for (i = 0; i < count; i++) {
  3354. write_reg(info, XAD1, patterns[i]);
  3355. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3356. if ((read_reg(info, XAD1) != patterns[i]) ||
  3357. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3358. rc = FALSE;
  3359. break;
  3360. }
  3361. }
  3362. spin_unlock_irqrestore(&info->lock,flags);
  3363. return rc;
  3364. }
  3365. static BOOLEAN irq_test(MGSLPC_INFO *info)
  3366. {
  3367. unsigned long end_time;
  3368. unsigned long flags;
  3369. spin_lock_irqsave(&info->lock,flags);
  3370. reset_device(info);
  3371. info->testing_irq = TRUE;
  3372. hdlc_mode(info);
  3373. info->irq_occurred = FALSE;
  3374. /* init hdlc mode */
  3375. irq_enable(info, CHA, IRQ_TIMER);
  3376. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3377. issue_command(info, CHA, CMD_START_TIMER);
  3378. spin_unlock_irqrestore(&info->lock,flags);
  3379. end_time=100;
  3380. while(end_time-- && !info->irq_occurred) {
  3381. msleep_interruptible(10);
  3382. }
  3383. info->testing_irq = FALSE;
  3384. spin_lock_irqsave(&info->lock,flags);
  3385. reset_device(info);
  3386. spin_unlock_irqrestore(&info->lock,flags);
  3387. return info->irq_occurred ? TRUE : FALSE;
  3388. }
  3389. static int adapter_test(MGSLPC_INFO *info)
  3390. {
  3391. if (!register_test(info)) {
  3392. info->init_error = DiagStatus_AddressFailure;
  3393. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3394. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3395. return -ENODEV;
  3396. }
  3397. if (!irq_test(info)) {
  3398. info->init_error = DiagStatus_IrqFailure;
  3399. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3400. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3401. return -ENODEV;
  3402. }
  3403. if (debug_level >= DEBUG_LEVEL_INFO)
  3404. printk("%s(%d):device %s passed diagnostics\n",
  3405. __FILE__,__LINE__,info->device_name);
  3406. return 0;
  3407. }
  3408. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3409. {
  3410. int i;
  3411. int linecount;
  3412. if (xmit)
  3413. printk("%s tx data:\n",info->device_name);
  3414. else
  3415. printk("%s rx data:\n",info->device_name);
  3416. while(count) {
  3417. if (count > 16)
  3418. linecount = 16;
  3419. else
  3420. linecount = count;
  3421. for(i=0;i<linecount;i++)
  3422. printk("%02X ",(unsigned char)data[i]);
  3423. for(;i<17;i++)
  3424. printk(" ");
  3425. for(i=0;i<linecount;i++) {
  3426. if (data[i]>=040 && data[i]<=0176)
  3427. printk("%c",data[i]);
  3428. else
  3429. printk(".");
  3430. }
  3431. printk("\n");
  3432. data += linecount;
  3433. count -= linecount;
  3434. }
  3435. }
  3436. /* HDLC frame time out
  3437. * update stats and do tx completion processing
  3438. */
  3439. static void tx_timeout(unsigned long context)
  3440. {
  3441. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3442. unsigned long flags;
  3443. if ( debug_level >= DEBUG_LEVEL_INFO )
  3444. printk( "%s(%d):tx_timeout(%s)\n",
  3445. __FILE__,__LINE__,info->device_name);
  3446. if(info->tx_active &&
  3447. info->params.mode == MGSL_MODE_HDLC) {
  3448. info->icount.txtimeout++;
  3449. }
  3450. spin_lock_irqsave(&info->lock,flags);
  3451. info->tx_active = 0;
  3452. info->tx_count = info->tx_put = info->tx_get = 0;
  3453. spin_unlock_irqrestore(&info->lock,flags);
  3454. #if SYNCLINK_GENERIC_HDLC
  3455. if (info->netcount)
  3456. hdlcdev_tx_done(info);
  3457. else
  3458. #endif
  3459. bh_transmit(info);
  3460. }
  3461. #if SYNCLINK_GENERIC_HDLC
  3462. /**
  3463. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3464. * set encoding and frame check sequence (FCS) options
  3465. *
  3466. * dev pointer to network device structure
  3467. * encoding serial encoding setting
  3468. * parity FCS setting
  3469. *
  3470. * returns 0 if success, otherwise error code
  3471. */
  3472. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3473. unsigned short parity)
  3474. {
  3475. MGSLPC_INFO *info = dev_to_port(dev);
  3476. unsigned char new_encoding;
  3477. unsigned short new_crctype;
  3478. /* return error if TTY interface open */
  3479. if (info->count)
  3480. return -EBUSY;
  3481. switch (encoding)
  3482. {
  3483. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3484. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3485. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3486. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3487. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3488. default: return -EINVAL;
  3489. }
  3490. switch (parity)
  3491. {
  3492. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3493. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3494. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3495. default: return -EINVAL;
  3496. }
  3497. info->params.encoding = new_encoding;
  3498. info->params.crc_type = new_crctype;
  3499. /* if network interface up, reprogram hardware */
  3500. if (info->netcount)
  3501. mgslpc_program_hw(info);
  3502. return 0;
  3503. }
  3504. /**
  3505. * called by generic HDLC layer to send frame
  3506. *
  3507. * skb socket buffer containing HDLC frame
  3508. * dev pointer to network device structure
  3509. *
  3510. * returns 0 if success, otherwise error code
  3511. */
  3512. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3513. {
  3514. MGSLPC_INFO *info = dev_to_port(dev);
  3515. struct net_device_stats *stats = hdlc_stats(dev);
  3516. unsigned long flags;
  3517. if (debug_level >= DEBUG_LEVEL_INFO)
  3518. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3519. /* stop sending until this frame completes */
  3520. netif_stop_queue(dev);
  3521. /* copy data to device buffers */
  3522. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3523. info->tx_get = 0;
  3524. info->tx_put = info->tx_count = skb->len;
  3525. /* update network statistics */
  3526. stats->tx_packets++;
  3527. stats->tx_bytes += skb->len;
  3528. /* done with socket buffer, so free it */
  3529. dev_kfree_skb(skb);
  3530. /* save start time for transmit timeout detection */
  3531. dev->trans_start = jiffies;
  3532. /* start hardware transmitter if necessary */
  3533. spin_lock_irqsave(&info->lock,flags);
  3534. if (!info->tx_active)
  3535. tx_start(info);
  3536. spin_unlock_irqrestore(&info->lock,flags);
  3537. return 0;
  3538. }
  3539. /**
  3540. * called by network layer when interface enabled
  3541. * claim resources and initialize hardware
  3542. *
  3543. * dev pointer to network device structure
  3544. *
  3545. * returns 0 if success, otherwise error code
  3546. */
  3547. static int hdlcdev_open(struct net_device *dev)
  3548. {
  3549. MGSLPC_INFO *info = dev_to_port(dev);
  3550. int rc;
  3551. unsigned long flags;
  3552. if (debug_level >= DEBUG_LEVEL_INFO)
  3553. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3554. /* generic HDLC layer open processing */
  3555. if ((rc = hdlc_open(dev)))
  3556. return rc;
  3557. /* arbitrate between network and tty opens */
  3558. spin_lock_irqsave(&info->netlock, flags);
  3559. if (info->count != 0 || info->netcount != 0) {
  3560. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3561. spin_unlock_irqrestore(&info->netlock, flags);
  3562. return -EBUSY;
  3563. }
  3564. info->netcount=1;
  3565. spin_unlock_irqrestore(&info->netlock, flags);
  3566. /* claim resources and init adapter */
  3567. if ((rc = startup(info)) != 0) {
  3568. spin_lock_irqsave(&info->netlock, flags);
  3569. info->netcount=0;
  3570. spin_unlock_irqrestore(&info->netlock, flags);
  3571. return rc;
  3572. }
  3573. /* assert DTR and RTS, apply hardware settings */
  3574. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3575. mgslpc_program_hw(info);
  3576. /* enable network layer transmit */
  3577. dev->trans_start = jiffies;
  3578. netif_start_queue(dev);
  3579. /* inform generic HDLC layer of current DCD status */
  3580. spin_lock_irqsave(&info->lock, flags);
  3581. get_signals(info);
  3582. spin_unlock_irqrestore(&info->lock, flags);
  3583. if (info->serial_signals & SerialSignal_DCD)
  3584. netif_carrier_on(dev);
  3585. else
  3586. netif_carrier_off(dev);
  3587. return 0;
  3588. }
  3589. /**
  3590. * called by network layer when interface is disabled
  3591. * shutdown hardware and release resources
  3592. *
  3593. * dev pointer to network device structure
  3594. *
  3595. * returns 0 if success, otherwise error code
  3596. */
  3597. static int hdlcdev_close(struct net_device *dev)
  3598. {
  3599. MGSLPC_INFO *info = dev_to_port(dev);
  3600. unsigned long flags;
  3601. if (debug_level >= DEBUG_LEVEL_INFO)
  3602. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3603. netif_stop_queue(dev);
  3604. /* shutdown adapter and release resources */
  3605. shutdown(info);
  3606. hdlc_close(dev);
  3607. spin_lock_irqsave(&info->netlock, flags);
  3608. info->netcount=0;
  3609. spin_unlock_irqrestore(&info->netlock, flags);
  3610. return 0;
  3611. }
  3612. /**
  3613. * called by network layer to process IOCTL call to network device
  3614. *
  3615. * dev pointer to network device structure
  3616. * ifr pointer to network interface request structure
  3617. * cmd IOCTL command code
  3618. *
  3619. * returns 0 if success, otherwise error code
  3620. */
  3621. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3622. {
  3623. const size_t size = sizeof(sync_serial_settings);
  3624. sync_serial_settings new_line;
  3625. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3626. MGSLPC_INFO *info = dev_to_port(dev);
  3627. unsigned int flags;
  3628. if (debug_level >= DEBUG_LEVEL_INFO)
  3629. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3630. /* return error if TTY interface open */
  3631. if (info->count)
  3632. return -EBUSY;
  3633. if (cmd != SIOCWANDEV)
  3634. return hdlc_ioctl(dev, ifr, cmd);
  3635. switch(ifr->ifr_settings.type) {
  3636. case IF_GET_IFACE: /* return current sync_serial_settings */
  3637. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3638. if (ifr->ifr_settings.size < size) {
  3639. ifr->ifr_settings.size = size; /* data size wanted */
  3640. return -ENOBUFS;
  3641. }
  3642. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3643. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3644. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3645. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3646. switch (flags){
  3647. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3648. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3649. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3650. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3651. default: new_line.clock_type = CLOCK_DEFAULT;
  3652. }
  3653. new_line.clock_rate = info->params.clock_speed;
  3654. new_line.loopback = info->params.loopback ? 1:0;
  3655. if (copy_to_user(line, &new_line, size))
  3656. return -EFAULT;
  3657. return 0;
  3658. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3659. if(!capable(CAP_NET_ADMIN))
  3660. return -EPERM;
  3661. if (copy_from_user(&new_line, line, size))
  3662. return -EFAULT;
  3663. switch (new_line.clock_type)
  3664. {
  3665. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3666. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3667. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3668. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3669. case CLOCK_DEFAULT: flags = info->params.flags &
  3670. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3671. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3672. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3673. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3674. default: return -EINVAL;
  3675. }
  3676. if (new_line.loopback != 0 && new_line.loopback != 1)
  3677. return -EINVAL;
  3678. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3679. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3680. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3681. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3682. info->params.flags |= flags;
  3683. info->params.loopback = new_line.loopback;
  3684. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3685. info->params.clock_speed = new_line.clock_rate;
  3686. else
  3687. info->params.clock_speed = 0;
  3688. /* if network interface up, reprogram hardware */
  3689. if (info->netcount)
  3690. mgslpc_program_hw(info);
  3691. return 0;
  3692. default:
  3693. return hdlc_ioctl(dev, ifr, cmd);
  3694. }
  3695. }
  3696. /**
  3697. * called by network layer when transmit timeout is detected
  3698. *
  3699. * dev pointer to network device structure
  3700. */
  3701. static void hdlcdev_tx_timeout(struct net_device *dev)
  3702. {
  3703. MGSLPC_INFO *info = dev_to_port(dev);
  3704. struct net_device_stats *stats = hdlc_stats(dev);
  3705. unsigned long flags;
  3706. if (debug_level >= DEBUG_LEVEL_INFO)
  3707. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3708. stats->tx_errors++;
  3709. stats->tx_aborted_errors++;
  3710. spin_lock_irqsave(&info->lock,flags);
  3711. tx_stop(info);
  3712. spin_unlock_irqrestore(&info->lock,flags);
  3713. netif_wake_queue(dev);
  3714. }
  3715. /**
  3716. * called by device driver when transmit completes
  3717. * reenable network layer transmit if stopped
  3718. *
  3719. * info pointer to device instance information
  3720. */
  3721. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3722. {
  3723. if (netif_queue_stopped(info->netdev))
  3724. netif_wake_queue(info->netdev);
  3725. }
  3726. /**
  3727. * called by device driver when frame received
  3728. * pass frame to network layer
  3729. *
  3730. * info pointer to device instance information
  3731. * buf pointer to buffer contianing frame data
  3732. * size count of data bytes in buf
  3733. */
  3734. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3735. {
  3736. struct sk_buff *skb = dev_alloc_skb(size);
  3737. struct net_device *dev = info->netdev;
  3738. struct net_device_stats *stats = hdlc_stats(dev);
  3739. if (debug_level >= DEBUG_LEVEL_INFO)
  3740. printk("hdlcdev_rx(%s)\n",dev->name);
  3741. if (skb == NULL) {
  3742. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3743. stats->rx_dropped++;
  3744. return;
  3745. }
  3746. memcpy(skb_put(skb, size),buf,size);
  3747. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3748. stats->rx_packets++;
  3749. stats->rx_bytes += size;
  3750. netif_rx(skb);
  3751. info->netdev->last_rx = jiffies;
  3752. }
  3753. /**
  3754. * called by device driver when adding device instance
  3755. * do generic HDLC initialization
  3756. *
  3757. * info pointer to device instance information
  3758. *
  3759. * returns 0 if success, otherwise error code
  3760. */
  3761. static int hdlcdev_init(MGSLPC_INFO *info)
  3762. {
  3763. int rc;
  3764. struct net_device *dev;
  3765. hdlc_device *hdlc;
  3766. /* allocate and initialize network and HDLC layer objects */
  3767. if (!(dev = alloc_hdlcdev(info))) {
  3768. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3769. return -ENOMEM;
  3770. }
  3771. /* for network layer reporting purposes only */
  3772. dev->base_addr = info->io_base;
  3773. dev->irq = info->irq_level;
  3774. /* network layer callbacks and settings */
  3775. dev->do_ioctl = hdlcdev_ioctl;
  3776. dev->open = hdlcdev_open;
  3777. dev->stop = hdlcdev_close;
  3778. dev->tx_timeout = hdlcdev_tx_timeout;
  3779. dev->watchdog_timeo = 10*HZ;
  3780. dev->tx_queue_len = 50;
  3781. /* generic HDLC layer callbacks and settings */
  3782. hdlc = dev_to_hdlc(dev);
  3783. hdlc->attach = hdlcdev_attach;
  3784. hdlc->xmit = hdlcdev_xmit;
  3785. /* register objects with HDLC layer */
  3786. if ((rc = register_hdlc_device(dev))) {
  3787. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3788. free_netdev(dev);
  3789. return rc;
  3790. }
  3791. info->netdev = dev;
  3792. return 0;
  3793. }
  3794. /**
  3795. * called by device driver when removing device instance
  3796. * do generic HDLC cleanup
  3797. *
  3798. * info pointer to device instance information
  3799. */
  3800. static void hdlcdev_exit(MGSLPC_INFO *info)
  3801. {
  3802. unregister_hdlc_device(info->netdev);
  3803. free_netdev(info->netdev);
  3804. info->netdev = NULL;
  3805. }
  3806. #endif /* CONFIG_HDLC */