mach-smdk6410.c 16 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/input.h>
  20. #include <linux/serial_core.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/io.h>
  23. #include <linux/i2c.h>
  24. #include <linux/leds.h>
  25. #include <linux/fb.h>
  26. #include <linux/gpio.h>
  27. #include <linux/delay.h>
  28. #include <linux/smsc911x.h>
  29. #include <linux/regulator/fixed.h>
  30. #ifdef CONFIG_SMDK6410_WM1190_EV1
  31. #include <linux/mfd/wm8350/core.h>
  32. #include <linux/mfd/wm8350/pmic.h>
  33. #endif
  34. #ifdef CONFIG_SMDK6410_WM1192_EV1
  35. #include <linux/mfd/wm831x/core.h>
  36. #include <linux/mfd/wm831x/pdata.h>
  37. #endif
  38. #include <video/platform_lcd.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/mach/irq.h>
  42. #include <mach/hardware.h>
  43. #include <mach/regs-fb.h>
  44. #include <mach/map.h>
  45. #include <asm/irq.h>
  46. #include <asm/mach-types.h>
  47. #include <plat/regs-serial.h>
  48. #include <mach/regs-modem.h>
  49. #include <mach/regs-gpio.h>
  50. #include <mach/regs-sys.h>
  51. #include <mach/regs-srom.h>
  52. #include <plat/ata.h>
  53. #include <plat/iic.h>
  54. #include <plat/fb.h>
  55. #include <plat/gpio-cfg.h>
  56. #include <mach/s3c6410.h>
  57. #include <plat/clock.h>
  58. #include <plat/devs.h>
  59. #include <plat/cpu.h>
  60. #include <plat/adc.h>
  61. #include <plat/ts.h>
  62. #include <plat/keypad.h>
  63. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  64. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  65. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  66. static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  67. [0] = {
  68. .hwport = 0,
  69. .flags = 0,
  70. .ucon = UCON,
  71. .ulcon = ULCON,
  72. .ufcon = UFCON,
  73. },
  74. [1] = {
  75. .hwport = 1,
  76. .flags = 0,
  77. .ucon = UCON,
  78. .ulcon = ULCON,
  79. .ufcon = UFCON,
  80. },
  81. [2] = {
  82. .hwport = 2,
  83. .flags = 0,
  84. .ucon = UCON,
  85. .ulcon = ULCON,
  86. .ufcon = UFCON,
  87. },
  88. [3] = {
  89. .hwport = 3,
  90. .flags = 0,
  91. .ucon = UCON,
  92. .ulcon = ULCON,
  93. .ufcon = UFCON,
  94. },
  95. };
  96. /* framebuffer and LCD setup. */
  97. /* GPF15 = LCD backlight control
  98. * GPF13 => Panel power
  99. * GPN5 = LCD nRESET signal
  100. * PWM_TOUT1 => backlight brightness
  101. */
  102. static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
  103. unsigned int power)
  104. {
  105. if (power) {
  106. gpio_direction_output(S3C64XX_GPF(13), 1);
  107. gpio_direction_output(S3C64XX_GPF(15), 1);
  108. /* fire nRESET on power up */
  109. gpio_direction_output(S3C64XX_GPN(5), 0);
  110. msleep(10);
  111. gpio_direction_output(S3C64XX_GPN(5), 1);
  112. msleep(1);
  113. } else {
  114. gpio_direction_output(S3C64XX_GPF(15), 0);
  115. gpio_direction_output(S3C64XX_GPF(13), 0);
  116. }
  117. }
  118. static struct plat_lcd_data smdk6410_lcd_power_data = {
  119. .set_power = smdk6410_lcd_power_set,
  120. };
  121. static struct platform_device smdk6410_lcd_powerdev = {
  122. .name = "platform-lcd",
  123. .dev.parent = &s3c_device_fb.dev,
  124. .dev.platform_data = &smdk6410_lcd_power_data,
  125. };
  126. static struct s3c_fb_pd_win smdk6410_fb_win0 = {
  127. /* this is to ensure we use win0 */
  128. .win_mode = {
  129. .pixclock = 41094,
  130. .left_margin = 8,
  131. .right_margin = 13,
  132. .upper_margin = 7,
  133. .lower_margin = 5,
  134. .hsync_len = 3,
  135. .vsync_len = 1,
  136. .xres = 800,
  137. .yres = 480,
  138. },
  139. .max_bpp = 32,
  140. .default_bpp = 16,
  141. };
  142. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  143. static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
  144. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  145. .win[0] = &smdk6410_fb_win0,
  146. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  147. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  148. };
  149. /*
  150. * Configuring Ethernet on SMDK6410
  151. *
  152. * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
  153. * The constant address below corresponds to nCS1
  154. *
  155. * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
  156. * 2) CFG6 needs to be switched to "LAN9115" side
  157. */
  158. static struct resource smdk6410_smsc911x_resources[] = {
  159. [0] = {
  160. .start = S3C64XX_PA_XM0CSN1,
  161. .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. [1] = {
  165. .start = S3C_EINT(10),
  166. .end = S3C_EINT(10),
  167. .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
  168. },
  169. };
  170. static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
  171. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  172. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  173. .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
  174. .phy_interface = PHY_INTERFACE_MODE_MII,
  175. };
  176. static struct platform_device smdk6410_smsc911x = {
  177. .name = "smsc911x",
  178. .id = -1,
  179. .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
  180. .resource = &smdk6410_smsc911x_resources[0],
  181. .dev = {
  182. .platform_data = &smdk6410_smsc911x_pdata,
  183. },
  184. };
  185. #ifdef CONFIG_REGULATOR
  186. static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
  187. {
  188. /* WM8580 */
  189. .supply = "PVDD",
  190. .dev_name = "0-001b",
  191. },
  192. {
  193. /* WM8580 */
  194. .supply = "AVDD",
  195. .dev_name = "0-001b",
  196. },
  197. };
  198. static struct regulator_init_data smdk6410_b_pwr_5v_data = {
  199. .constraints = {
  200. .always_on = 1,
  201. },
  202. .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
  203. .consumer_supplies = smdk6410_b_pwr_5v_consumers,
  204. };
  205. static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
  206. .supply_name = "B_PWR_5V",
  207. .microvolts = 5000000,
  208. .init_data = &smdk6410_b_pwr_5v_data,
  209. .gpio = -EINVAL,
  210. };
  211. static struct platform_device smdk6410_b_pwr_5v = {
  212. .name = "reg-fixed-voltage",
  213. .id = -1,
  214. .dev = {
  215. .platform_data = &smdk6410_b_pwr_5v_pdata,
  216. },
  217. };
  218. #endif
  219. static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
  220. .setup_gpio = s3c64xx_ide_setup_gpio,
  221. };
  222. static uint32_t smdk6410_keymap[] __initdata = {
  223. /* KEY(row, col, keycode) */
  224. KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
  225. KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
  226. KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
  227. KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
  228. };
  229. static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
  230. .keymap = smdk6410_keymap,
  231. .keymap_size = ARRAY_SIZE(smdk6410_keymap),
  232. };
  233. static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
  234. .keymap_data = &smdk6410_keymap_data,
  235. .rows = 2,
  236. .cols = 8,
  237. };
  238. static struct map_desc smdk6410_iodesc[] = {};
  239. static struct platform_device *smdk6410_devices[] __initdata = {
  240. #ifdef CONFIG_SMDK6410_SD_CH0
  241. &s3c_device_hsmmc0,
  242. #endif
  243. #ifdef CONFIG_SMDK6410_SD_CH1
  244. &s3c_device_hsmmc1,
  245. #endif
  246. &s3c_device_i2c0,
  247. &s3c_device_i2c1,
  248. &s3c_device_fb,
  249. &s3c_device_ohci,
  250. &s3c_device_usb_hsotg,
  251. &s3c64xx_device_iisv4,
  252. &samsung_device_keypad,
  253. #ifdef CONFIG_REGULATOR
  254. &smdk6410_b_pwr_5v,
  255. #endif
  256. &smdk6410_lcd_powerdev,
  257. &smdk6410_smsc911x,
  258. &s3c_device_adc,
  259. &s3c_device_cfcon,
  260. &s3c_device_rtc,
  261. &s3c_device_ts,
  262. &s3c_device_wdt,
  263. };
  264. #ifdef CONFIG_REGULATOR
  265. /* ARM core */
  266. static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
  267. {
  268. .supply = "vddarm",
  269. }
  270. };
  271. /* VDDARM, BUCK1 on J5 */
  272. static struct regulator_init_data smdk6410_vddarm = {
  273. .constraints = {
  274. .name = "PVDD_ARM",
  275. .min_uV = 1000000,
  276. .max_uV = 1300000,
  277. .always_on = 1,
  278. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  279. },
  280. .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
  281. .consumer_supplies = smdk6410_vddarm_consumers,
  282. };
  283. /* VDD_INT, BUCK2 on J5 */
  284. static struct regulator_init_data smdk6410_vddint = {
  285. .constraints = {
  286. .name = "PVDD_INT",
  287. .min_uV = 1000000,
  288. .max_uV = 1200000,
  289. .always_on = 1,
  290. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  291. },
  292. };
  293. /* VDD_HI, LDO3 on J5 */
  294. static struct regulator_init_data smdk6410_vddhi = {
  295. .constraints = {
  296. .name = "PVDD_HI",
  297. .always_on = 1,
  298. },
  299. };
  300. /* VDD_PLL, LDO2 on J5 */
  301. static struct regulator_init_data smdk6410_vddpll = {
  302. .constraints = {
  303. .name = "PVDD_PLL",
  304. .always_on = 1,
  305. },
  306. };
  307. /* VDD_UH_MMC, LDO5 on J5 */
  308. static struct regulator_init_data smdk6410_vdduh_mmc = {
  309. .constraints = {
  310. .name = "PVDD_UH/PVDD_MMC",
  311. .always_on = 1,
  312. },
  313. };
  314. /* VCCM3BT, LDO8 on J5 */
  315. static struct regulator_init_data smdk6410_vccmc3bt = {
  316. .constraints = {
  317. .name = "PVCCM3BT",
  318. .always_on = 1,
  319. },
  320. };
  321. /* VCCM2MTV, LDO11 on J5 */
  322. static struct regulator_init_data smdk6410_vccm2mtv = {
  323. .constraints = {
  324. .name = "PVCCM2MTV",
  325. .always_on = 1,
  326. },
  327. };
  328. /* VDD_LCD, LDO12 on J5 */
  329. static struct regulator_init_data smdk6410_vddlcd = {
  330. .constraints = {
  331. .name = "PVDD_LCD",
  332. .always_on = 1,
  333. },
  334. };
  335. /* VDD_OTGI, LDO9 on J5 */
  336. static struct regulator_init_data smdk6410_vddotgi = {
  337. .constraints = {
  338. .name = "PVDD_OTGI",
  339. .always_on = 1,
  340. },
  341. };
  342. /* VDD_OTG, LDO14 on J5 */
  343. static struct regulator_init_data smdk6410_vddotg = {
  344. .constraints = {
  345. .name = "PVDD_OTG",
  346. .always_on = 1,
  347. },
  348. };
  349. /* VDD_ALIVE, LDO15 on J5 */
  350. static struct regulator_init_data smdk6410_vddalive = {
  351. .constraints = {
  352. .name = "PVDD_ALIVE",
  353. .always_on = 1,
  354. },
  355. };
  356. /* VDD_AUDIO, VLDO_AUDIO on J5 */
  357. static struct regulator_init_data smdk6410_vddaudio = {
  358. .constraints = {
  359. .name = "PVDD_AUDIO",
  360. .always_on = 1,
  361. },
  362. };
  363. #endif
  364. #ifdef CONFIG_SMDK6410_WM1190_EV1
  365. /* S3C64xx internal logic & PLL */
  366. static struct regulator_init_data wm8350_dcdc1_data = {
  367. .constraints = {
  368. .name = "PVDD_INT/PVDD_PLL",
  369. .min_uV = 1200000,
  370. .max_uV = 1200000,
  371. .always_on = 1,
  372. .apply_uV = 1,
  373. },
  374. };
  375. /* Memory */
  376. static struct regulator_init_data wm8350_dcdc3_data = {
  377. .constraints = {
  378. .name = "PVDD_MEM",
  379. .min_uV = 1800000,
  380. .max_uV = 1800000,
  381. .always_on = 1,
  382. .state_mem = {
  383. .uV = 1800000,
  384. .mode = REGULATOR_MODE_NORMAL,
  385. .enabled = 1,
  386. },
  387. .initial_state = PM_SUSPEND_MEM,
  388. },
  389. };
  390. /* USB, EXT, PCM, ADC/DAC, USB, MMC */
  391. static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
  392. {
  393. /* WM8580 */
  394. .supply = "DVDD",
  395. .dev_name = "0-001b",
  396. },
  397. };
  398. static struct regulator_init_data wm8350_dcdc4_data = {
  399. .constraints = {
  400. .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
  401. .min_uV = 3000000,
  402. .max_uV = 3000000,
  403. .always_on = 1,
  404. },
  405. .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
  406. .consumer_supplies = wm8350_dcdc4_consumers,
  407. };
  408. /* OTGi/1190-EV1 HPVDD & AVDD */
  409. static struct regulator_init_data wm8350_ldo4_data = {
  410. .constraints = {
  411. .name = "PVDD_OTGI/HPVDD/AVDD",
  412. .min_uV = 1200000,
  413. .max_uV = 1200000,
  414. .apply_uV = 1,
  415. .always_on = 1,
  416. },
  417. };
  418. static struct {
  419. int regulator;
  420. struct regulator_init_data *initdata;
  421. } wm1190_regulators[] = {
  422. { WM8350_DCDC_1, &wm8350_dcdc1_data },
  423. { WM8350_DCDC_3, &wm8350_dcdc3_data },
  424. { WM8350_DCDC_4, &wm8350_dcdc4_data },
  425. { WM8350_DCDC_6, &smdk6410_vddarm },
  426. { WM8350_LDO_1, &smdk6410_vddalive },
  427. { WM8350_LDO_2, &smdk6410_vddotg },
  428. { WM8350_LDO_3, &smdk6410_vddlcd },
  429. { WM8350_LDO_4, &wm8350_ldo4_data },
  430. };
  431. static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
  432. {
  433. int i;
  434. /* Configure the IRQ line */
  435. s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
  436. /* Instantiate the regulators */
  437. for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
  438. wm8350_register_regulator(wm8350,
  439. wm1190_regulators[i].regulator,
  440. wm1190_regulators[i].initdata);
  441. return 0;
  442. }
  443. static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
  444. .init = smdk6410_wm8350_init,
  445. .irq_high = 1,
  446. .irq_base = IRQ_BOARD_START,
  447. };
  448. #endif
  449. #ifdef CONFIG_SMDK6410_WM1192_EV1
  450. static struct gpio_led wm1192_pmic_leds[] = {
  451. {
  452. .name = "PMIC:red:power",
  453. .gpio = GPIO_BOARD_START + 3,
  454. .default_state = LEDS_GPIO_DEFSTATE_ON,
  455. },
  456. };
  457. static struct gpio_led_platform_data wm1192_pmic_led = {
  458. .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
  459. .leds = wm1192_pmic_leds,
  460. };
  461. static struct platform_device wm1192_pmic_led_dev = {
  462. .name = "leds-gpio",
  463. .id = -1,
  464. .dev = {
  465. .platform_data = &wm1192_pmic_led,
  466. },
  467. };
  468. static int wm1192_pre_init(struct wm831x *wm831x)
  469. {
  470. int ret;
  471. /* Configure the IRQ line */
  472. s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
  473. ret = platform_device_register(&wm1192_pmic_led_dev);
  474. if (ret != 0)
  475. dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
  476. return 0;
  477. }
  478. static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
  479. .isink = 1,
  480. .max_uA = 27554,
  481. };
  482. static struct regulator_init_data wm1192_dcdc3 = {
  483. .constraints = {
  484. .name = "PVDD_MEM/PVDD_GPS",
  485. .always_on = 1,
  486. },
  487. };
  488. static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
  489. { .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */
  490. };
  491. static struct regulator_init_data wm1192_ldo1 = {
  492. .constraints = {
  493. .name = "PVDD_LCD/PVDD_EXT",
  494. .always_on = 1,
  495. },
  496. .consumer_supplies = wm1192_ldo1_consumers,
  497. .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
  498. };
  499. static struct wm831x_status_pdata wm1192_led7_pdata = {
  500. .name = "LED7:green:",
  501. };
  502. static struct wm831x_status_pdata wm1192_led8_pdata = {
  503. .name = "LED8:green:",
  504. };
  505. static struct wm831x_pdata smdk6410_wm1192_pdata = {
  506. .pre_init = wm1192_pre_init,
  507. .irq_base = IRQ_BOARD_START,
  508. .backlight = &wm1192_backlight_pdata,
  509. .dcdc = {
  510. &smdk6410_vddarm, /* DCDC1 */
  511. &smdk6410_vddint, /* DCDC2 */
  512. &wm1192_dcdc3,
  513. },
  514. .gpio_base = GPIO_BOARD_START,
  515. .ldo = {
  516. &wm1192_ldo1, /* LDO1 */
  517. &smdk6410_vdduh_mmc, /* LDO2 */
  518. NULL, /* LDO3 NC */
  519. &smdk6410_vddotgi, /* LDO4 */
  520. &smdk6410_vddotg, /* LDO5 */
  521. &smdk6410_vddhi, /* LDO6 */
  522. &smdk6410_vddaudio, /* LDO7 */
  523. &smdk6410_vccm2mtv, /* LDO8 */
  524. &smdk6410_vddpll, /* LDO9 */
  525. &smdk6410_vccmc3bt, /* LDO10 */
  526. &smdk6410_vddalive, /* LDO11 */
  527. },
  528. .status = {
  529. &wm1192_led7_pdata,
  530. &wm1192_led8_pdata,
  531. },
  532. };
  533. #endif
  534. static struct i2c_board_info i2c_devs0[] __initdata = {
  535. { I2C_BOARD_INFO("24c08", 0x50), },
  536. { I2C_BOARD_INFO("wm8580", 0x1b), },
  537. #ifdef CONFIG_SMDK6410_WM1192_EV1
  538. { I2C_BOARD_INFO("wm8312", 0x34),
  539. .platform_data = &smdk6410_wm1192_pdata,
  540. .irq = S3C_EINT(12),
  541. },
  542. #endif
  543. #ifdef CONFIG_SMDK6410_WM1190_EV1
  544. { I2C_BOARD_INFO("wm8350", 0x1a),
  545. .platform_data = &smdk6410_wm8350_pdata,
  546. .irq = S3C_EINT(12),
  547. },
  548. #endif
  549. };
  550. static struct i2c_board_info i2c_devs1[] __initdata = {
  551. { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
  552. };
  553. static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
  554. .delay = 10000,
  555. .presc = 49,
  556. .oversampling_shift = 2,
  557. };
  558. static void __init smdk6410_map_io(void)
  559. {
  560. u32 tmp;
  561. s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
  562. s3c24xx_init_clocks(12000000);
  563. s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
  564. /* set the LCD type */
  565. tmp = __raw_readl(S3C64XX_SPCON);
  566. tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
  567. tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
  568. __raw_writel(tmp, S3C64XX_SPCON);
  569. /* remove the lcd bypass */
  570. tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
  571. tmp &= ~MIFPCON_LCD_BYPASS;
  572. __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
  573. }
  574. static void __init smdk6410_machine_init(void)
  575. {
  576. u32 cs1;
  577. s3c_i2c0_set_platdata(NULL);
  578. s3c_i2c1_set_platdata(NULL);
  579. s3c_fb_set_platdata(&smdk6410_lcd_pdata);
  580. samsung_keypad_set_platdata(&smdk6410_keypad_data);
  581. s3c24xx_ts_set_platdata(&s3c_ts_platform);
  582. /* configure nCS1 width to 16 bits */
  583. cs1 = __raw_readl(S3C64XX_SROM_BW) &
  584. ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
  585. cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
  586. (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
  587. (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
  588. S3C64XX_SROM_BW__NCS1__SHIFT;
  589. __raw_writel(cs1, S3C64XX_SROM_BW);
  590. /* set timing for nCS1 suitable for ethernet chip */
  591. __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
  592. (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
  593. (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
  594. (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
  595. (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
  596. (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
  597. (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
  598. gpio_request(S3C64XX_GPN(5), "LCD power");
  599. gpio_request(S3C64XX_GPF(13), "LCD power");
  600. gpio_request(S3C64XX_GPF(15), "LCD power");
  601. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  602. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  603. s3c_ide_set_platdata(&smdk6410_ide_pdata);
  604. platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
  605. }
  606. MACHINE_START(SMDK6410, "SMDK6410")
  607. /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
  608. .phys_io = S3C_PA_UART & 0xfff00000,
  609. .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
  610. .boot_params = S3C64XX_PA_SDRAM + 0x100,
  611. .init_irq = s3c6410_init_irq,
  612. .map_io = smdk6410_map_io,
  613. .init_machine = smdk6410_machine_init,
  614. .timer = &s3c24xx_timer,
  615. MACHINE_END