board-3430sdp.c 19 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-3430sdp.c
  3. *
  4. * Copyright (C) 2007 Texas Instruments
  5. *
  6. * Modified from mach-omap2/board-generic.c
  7. *
  8. * Initial code: Syed Mohammed Khasim
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/delay.h>
  18. #include <linux/input.h>
  19. #include <linux/input/matrix_keypad.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/spi/ads7846.h>
  22. #include <linux/i2c/twl.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/mmc/host.h>
  27. #include <mach/hardware.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/map.h>
  31. #include <plat/mcspi.h>
  32. #include <plat/board.h>
  33. #include <plat/usb.h>
  34. #include <plat/common.h>
  35. #include <plat/dma.h>
  36. #include <plat/gpmc.h>
  37. #include <plat/display.h>
  38. #include <plat/panel-generic-dpi.h>
  39. #include <plat/gpmc-smc91x.h>
  40. #include "board-flash.h"
  41. #include "mux.h"
  42. #include "sdram-qimonda-hyb18m512160af-6.h"
  43. #include "hsmmc.h"
  44. #include "pm.h"
  45. #include "control.h"
  46. #define CONFIG_DISABLE_HFCLK 1
  47. #define SDP3430_TS_GPIO_IRQ_SDPV1 3
  48. #define SDP3430_TS_GPIO_IRQ_SDPV2 2
  49. #define ENABLE_VAUX3_DEDICATED 0x03
  50. #define ENABLE_VAUX3_DEV_GRP 0x20
  51. #define TWL4030_MSECURE_GPIO 22
  52. /* FIXME: These values need to be updated based on more profiling on 3430sdp*/
  53. static struct cpuidle_params omap3_cpuidle_params_table[] = {
  54. /* C1 */
  55. {1, 2, 2, 5},
  56. /* C2 */
  57. {1, 10, 10, 30},
  58. /* C3 */
  59. {1, 50, 50, 300},
  60. /* C4 */
  61. {1, 1500, 1800, 4000},
  62. /* C5 */
  63. {1, 2500, 7500, 12000},
  64. /* C6 */
  65. {1, 3000, 8500, 15000},
  66. /* C7 */
  67. {1, 10000, 30000, 300000},
  68. };
  69. static uint32_t board_keymap[] = {
  70. KEY(0, 0, KEY_LEFT),
  71. KEY(0, 1, KEY_RIGHT),
  72. KEY(0, 2, KEY_A),
  73. KEY(0, 3, KEY_B),
  74. KEY(0, 4, KEY_C),
  75. KEY(1, 0, KEY_DOWN),
  76. KEY(1, 1, KEY_UP),
  77. KEY(1, 2, KEY_E),
  78. KEY(1, 3, KEY_F),
  79. KEY(1, 4, KEY_G),
  80. KEY(2, 0, KEY_ENTER),
  81. KEY(2, 1, KEY_I),
  82. KEY(2, 2, KEY_J),
  83. KEY(2, 3, KEY_K),
  84. KEY(2, 4, KEY_3),
  85. KEY(3, 0, KEY_M),
  86. KEY(3, 1, KEY_N),
  87. KEY(3, 2, KEY_O),
  88. KEY(3, 3, KEY_P),
  89. KEY(3, 4, KEY_Q),
  90. KEY(4, 0, KEY_R),
  91. KEY(4, 1, KEY_4),
  92. KEY(4, 2, KEY_T),
  93. KEY(4, 3, KEY_U),
  94. KEY(4, 4, KEY_D),
  95. KEY(5, 0, KEY_V),
  96. KEY(5, 1, KEY_W),
  97. KEY(5, 2, KEY_L),
  98. KEY(5, 3, KEY_S),
  99. KEY(5, 4, KEY_H),
  100. 0
  101. };
  102. static struct matrix_keymap_data board_map_data = {
  103. .keymap = board_keymap,
  104. .keymap_size = ARRAY_SIZE(board_keymap),
  105. };
  106. static struct twl4030_keypad_data sdp3430_kp_data = {
  107. .keymap_data = &board_map_data,
  108. .rows = 5,
  109. .cols = 6,
  110. .rep = 1,
  111. };
  112. static int ts_gpio; /* Needed for ads7846_get_pendown_state */
  113. /**
  114. * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
  115. *
  116. * @return - void. If request gpio fails then Flag KERN_ERR.
  117. */
  118. static void ads7846_dev_init(void)
  119. {
  120. if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
  121. printk(KERN_ERR "can't get ads746 pen down GPIO\n");
  122. return;
  123. }
  124. gpio_direction_input(ts_gpio);
  125. gpio_set_debounce(ts_gpio, 310);
  126. }
  127. static int ads7846_get_pendown_state(void)
  128. {
  129. return !gpio_get_value(ts_gpio);
  130. }
  131. static struct ads7846_platform_data tsc2046_config __initdata = {
  132. .get_pendown_state = ads7846_get_pendown_state,
  133. .keep_vref_on = 1,
  134. .wakeup = true,
  135. };
  136. static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
  137. .turbo_mode = 0,
  138. .single_channel = 1, /* 0: slave, 1: master */
  139. };
  140. static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
  141. [0] = {
  142. /*
  143. * TSC2046 operates at a max freqency of 2MHz, so
  144. * operate slightly below at 1.5MHz
  145. */
  146. .modalias = "ads7846",
  147. .bus_num = 1,
  148. .chip_select = 0,
  149. .max_speed_hz = 1500000,
  150. .controller_data = &tsc2046_mcspi_config,
  151. .irq = 0,
  152. .platform_data = &tsc2046_config,
  153. },
  154. };
  155. #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
  156. #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
  157. static unsigned backlight_gpio;
  158. static unsigned enable_gpio;
  159. static int lcd_enabled;
  160. static int dvi_enabled;
  161. static void __init sdp3430_display_init(void)
  162. {
  163. int r;
  164. enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
  165. backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
  166. r = gpio_request(enable_gpio, "LCD reset");
  167. if (r) {
  168. printk(KERN_ERR "failed to get LCD reset GPIO\n");
  169. goto err0;
  170. }
  171. r = gpio_request(backlight_gpio, "LCD Backlight");
  172. if (r) {
  173. printk(KERN_ERR "failed to get LCD backlight GPIO\n");
  174. goto err1;
  175. }
  176. gpio_direction_output(enable_gpio, 0);
  177. gpio_direction_output(backlight_gpio, 0);
  178. return;
  179. err1:
  180. gpio_free(enable_gpio);
  181. err0:
  182. return;
  183. }
  184. static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
  185. {
  186. if (dvi_enabled) {
  187. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  188. return -EINVAL;
  189. }
  190. gpio_direction_output(enable_gpio, 1);
  191. gpio_direction_output(backlight_gpio, 1);
  192. lcd_enabled = 1;
  193. return 0;
  194. }
  195. static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
  196. {
  197. lcd_enabled = 0;
  198. gpio_direction_output(enable_gpio, 0);
  199. gpio_direction_output(backlight_gpio, 0);
  200. }
  201. static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
  202. {
  203. if (lcd_enabled) {
  204. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  205. return -EINVAL;
  206. }
  207. dvi_enabled = 1;
  208. return 0;
  209. }
  210. static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
  211. {
  212. dvi_enabled = 0;
  213. }
  214. static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
  215. {
  216. return 0;
  217. }
  218. static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
  219. {
  220. }
  221. static struct omap_dss_device sdp3430_lcd_device = {
  222. .name = "lcd",
  223. .driver_name = "sharp_ls_panel",
  224. .type = OMAP_DISPLAY_TYPE_DPI,
  225. .phy.dpi.data_lines = 16,
  226. .platform_enable = sdp3430_panel_enable_lcd,
  227. .platform_disable = sdp3430_panel_disable_lcd,
  228. };
  229. static struct panel_generic_dpi_data dvi_panel = {
  230. .name = "generic",
  231. .platform_enable = sdp3430_panel_enable_dvi,
  232. .platform_disable = sdp3430_panel_disable_dvi,
  233. };
  234. static struct omap_dss_device sdp3430_dvi_device = {
  235. .name = "dvi",
  236. .type = OMAP_DISPLAY_TYPE_DPI,
  237. .driver_name = "generic_dpi_panel",
  238. .data = &dvi_panel,
  239. .phy.dpi.data_lines = 24,
  240. };
  241. static struct omap_dss_device sdp3430_tv_device = {
  242. .name = "tv",
  243. .driver_name = "venc",
  244. .type = OMAP_DISPLAY_TYPE_VENC,
  245. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  246. .platform_enable = sdp3430_panel_enable_tv,
  247. .platform_disable = sdp3430_panel_disable_tv,
  248. };
  249. static struct omap_dss_device *sdp3430_dss_devices[] = {
  250. &sdp3430_lcd_device,
  251. &sdp3430_dvi_device,
  252. &sdp3430_tv_device,
  253. };
  254. static struct omap_dss_board_info sdp3430_dss_data = {
  255. .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
  256. .devices = sdp3430_dss_devices,
  257. .default_device = &sdp3430_lcd_device,
  258. };
  259. static struct regulator_consumer_supply sdp3430_vdda_dac_supply =
  260. REGULATOR_SUPPLY("vdda_dac", "omapdss");
  261. static struct omap_board_config_kernel sdp3430_config[] __initdata = {
  262. };
  263. static void __init omap_3430sdp_init_early(void)
  264. {
  265. omap_board_config = sdp3430_config;
  266. omap_board_config_size = ARRAY_SIZE(sdp3430_config);
  267. omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
  268. omap2_init_common_infrastructure();
  269. omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
  270. }
  271. static int sdp3430_batt_table[] = {
  272. /* 0 C*/
  273. 30800, 29500, 28300, 27100,
  274. 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
  275. 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
  276. 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
  277. 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
  278. 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
  279. 4040, 3910, 3790, 3670, 3550
  280. };
  281. static struct twl4030_bci_platform_data sdp3430_bci_data = {
  282. .battery_tmp_tbl = sdp3430_batt_table,
  283. .tblsize = ARRAY_SIZE(sdp3430_batt_table),
  284. };
  285. static struct omap2_hsmmc_info mmc[] = {
  286. {
  287. .mmc = 1,
  288. /* 8 bits (default) requires S6.3 == ON,
  289. * so the SIM card isn't used; else 4 bits.
  290. */
  291. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  292. .gpio_wp = 4,
  293. },
  294. {
  295. .mmc = 2,
  296. .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
  297. .gpio_wp = 7,
  298. },
  299. {} /* Terminator */
  300. };
  301. static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
  302. .supply = "vmmc",
  303. };
  304. static struct regulator_consumer_supply sdp3430_vsim_supply = {
  305. .supply = "vmmc_aux",
  306. };
  307. static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
  308. .supply = "vmmc",
  309. };
  310. static int sdp3430_twl_gpio_setup(struct device *dev,
  311. unsigned gpio, unsigned ngpio)
  312. {
  313. /* gpio + 0 is "mmc0_cd" (input/IRQ),
  314. * gpio + 1 is "mmc1_cd" (input/IRQ)
  315. */
  316. mmc[0].gpio_cd = gpio + 0;
  317. mmc[1].gpio_cd = gpio + 1;
  318. omap2_hsmmc_init(mmc);
  319. /* link regulators to MMC adapters ... we "know" the
  320. * regulators will be set up only *after* we return.
  321. */
  322. sdp3430_vmmc1_supply.dev = mmc[0].dev;
  323. sdp3430_vsim_supply.dev = mmc[0].dev;
  324. sdp3430_vmmc2_supply.dev = mmc[1].dev;
  325. /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
  326. gpio_request(gpio + 7, "sub_lcd_en_bkl");
  327. gpio_direction_output(gpio + 7, 0);
  328. /* gpio + 15 is "sub_lcd_nRST" (output) */
  329. gpio_request(gpio + 15, "sub_lcd_nRST");
  330. gpio_direction_output(gpio + 15, 0);
  331. return 0;
  332. }
  333. static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
  334. .gpio_base = OMAP_MAX_GPIO_LINES,
  335. .irq_base = TWL4030_GPIO_IRQ_BASE,
  336. .irq_end = TWL4030_GPIO_IRQ_END,
  337. .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
  338. | BIT(16) | BIT(17),
  339. .setup = sdp3430_twl_gpio_setup,
  340. };
  341. static struct twl4030_usb_data sdp3430_usb_data = {
  342. .usb_mode = T2_USB_MODE_ULPI,
  343. };
  344. static struct twl4030_madc_platform_data sdp3430_madc_data = {
  345. .irq_line = 1,
  346. };
  347. /*
  348. * Apply all the fixed voltages since most versions of U-Boot
  349. * don't bother with that initialization.
  350. */
  351. /* VAUX1 for mainboard (irda and sub-lcd) */
  352. static struct regulator_init_data sdp3430_vaux1 = {
  353. .constraints = {
  354. .min_uV = 2800000,
  355. .max_uV = 2800000,
  356. .apply_uV = true,
  357. .valid_modes_mask = REGULATOR_MODE_NORMAL
  358. | REGULATOR_MODE_STANDBY,
  359. .valid_ops_mask = REGULATOR_CHANGE_MODE
  360. | REGULATOR_CHANGE_STATUS,
  361. },
  362. };
  363. /* VAUX2 for camera module */
  364. static struct regulator_init_data sdp3430_vaux2 = {
  365. .constraints = {
  366. .min_uV = 2800000,
  367. .max_uV = 2800000,
  368. .apply_uV = true,
  369. .valid_modes_mask = REGULATOR_MODE_NORMAL
  370. | REGULATOR_MODE_STANDBY,
  371. .valid_ops_mask = REGULATOR_CHANGE_MODE
  372. | REGULATOR_CHANGE_STATUS,
  373. },
  374. };
  375. /* VAUX3 for LCD board */
  376. static struct regulator_init_data sdp3430_vaux3 = {
  377. .constraints = {
  378. .min_uV = 2800000,
  379. .max_uV = 2800000,
  380. .apply_uV = true,
  381. .valid_modes_mask = REGULATOR_MODE_NORMAL
  382. | REGULATOR_MODE_STANDBY,
  383. .valid_ops_mask = REGULATOR_CHANGE_MODE
  384. | REGULATOR_CHANGE_STATUS,
  385. },
  386. };
  387. /* VAUX4 for OMAP VDD_CSI2 (camera) */
  388. static struct regulator_init_data sdp3430_vaux4 = {
  389. .constraints = {
  390. .min_uV = 1800000,
  391. .max_uV = 1800000,
  392. .apply_uV = true,
  393. .valid_modes_mask = REGULATOR_MODE_NORMAL
  394. | REGULATOR_MODE_STANDBY,
  395. .valid_ops_mask = REGULATOR_CHANGE_MODE
  396. | REGULATOR_CHANGE_STATUS,
  397. },
  398. };
  399. /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
  400. static struct regulator_init_data sdp3430_vmmc1 = {
  401. .constraints = {
  402. .min_uV = 1850000,
  403. .max_uV = 3150000,
  404. .valid_modes_mask = REGULATOR_MODE_NORMAL
  405. | REGULATOR_MODE_STANDBY,
  406. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  407. | REGULATOR_CHANGE_MODE
  408. | REGULATOR_CHANGE_STATUS,
  409. },
  410. .num_consumer_supplies = 1,
  411. .consumer_supplies = &sdp3430_vmmc1_supply,
  412. };
  413. /* VMMC2 for MMC2 card */
  414. static struct regulator_init_data sdp3430_vmmc2 = {
  415. .constraints = {
  416. .min_uV = 1850000,
  417. .max_uV = 1850000,
  418. .apply_uV = true,
  419. .valid_modes_mask = REGULATOR_MODE_NORMAL
  420. | REGULATOR_MODE_STANDBY,
  421. .valid_ops_mask = REGULATOR_CHANGE_MODE
  422. | REGULATOR_CHANGE_STATUS,
  423. },
  424. .num_consumer_supplies = 1,
  425. .consumer_supplies = &sdp3430_vmmc2_supply,
  426. };
  427. /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
  428. static struct regulator_init_data sdp3430_vsim = {
  429. .constraints = {
  430. .min_uV = 1800000,
  431. .max_uV = 3000000,
  432. .valid_modes_mask = REGULATOR_MODE_NORMAL
  433. | REGULATOR_MODE_STANDBY,
  434. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  435. | REGULATOR_CHANGE_MODE
  436. | REGULATOR_CHANGE_STATUS,
  437. },
  438. .num_consumer_supplies = 1,
  439. .consumer_supplies = &sdp3430_vsim_supply,
  440. };
  441. /* VDAC for DSS driving S-Video */
  442. static struct regulator_init_data sdp3430_vdac = {
  443. .constraints = {
  444. .min_uV = 1800000,
  445. .max_uV = 1800000,
  446. .apply_uV = true,
  447. .valid_modes_mask = REGULATOR_MODE_NORMAL
  448. | REGULATOR_MODE_STANDBY,
  449. .valid_ops_mask = REGULATOR_CHANGE_MODE
  450. | REGULATOR_CHANGE_STATUS,
  451. },
  452. .num_consumer_supplies = 1,
  453. .consumer_supplies = &sdp3430_vdda_dac_supply,
  454. };
  455. /* VPLL2 for digital video outputs */
  456. static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
  457. REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
  458. };
  459. static struct regulator_init_data sdp3430_vpll2 = {
  460. .constraints = {
  461. .name = "VDVI",
  462. .min_uV = 1800000,
  463. .max_uV = 1800000,
  464. .apply_uV = true,
  465. .valid_modes_mask = REGULATOR_MODE_NORMAL
  466. | REGULATOR_MODE_STANDBY,
  467. .valid_ops_mask = REGULATOR_CHANGE_MODE
  468. | REGULATOR_CHANGE_STATUS,
  469. },
  470. .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
  471. .consumer_supplies = sdp3430_vpll2_supplies,
  472. };
  473. static struct twl4030_codec_audio_data sdp3430_audio = {
  474. .audio_mclk = 26000000,
  475. };
  476. static struct twl4030_codec_data sdp3430_codec = {
  477. .audio_mclk = 26000000,
  478. .audio = &sdp3430_audio,
  479. };
  480. static struct twl4030_platform_data sdp3430_twldata = {
  481. .irq_base = TWL4030_IRQ_BASE,
  482. .irq_end = TWL4030_IRQ_END,
  483. /* platform_data for children goes here */
  484. .bci = &sdp3430_bci_data,
  485. .gpio = &sdp3430_gpio_data,
  486. .madc = &sdp3430_madc_data,
  487. .keypad = &sdp3430_kp_data,
  488. .usb = &sdp3430_usb_data,
  489. .codec = &sdp3430_codec,
  490. .vaux1 = &sdp3430_vaux1,
  491. .vaux2 = &sdp3430_vaux2,
  492. .vaux3 = &sdp3430_vaux3,
  493. .vaux4 = &sdp3430_vaux4,
  494. .vmmc1 = &sdp3430_vmmc1,
  495. .vmmc2 = &sdp3430_vmmc2,
  496. .vsim = &sdp3430_vsim,
  497. .vdac = &sdp3430_vdac,
  498. .vpll2 = &sdp3430_vpll2,
  499. };
  500. static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
  501. {
  502. I2C_BOARD_INFO("twl4030", 0x48),
  503. .flags = I2C_CLIENT_WAKE,
  504. .irq = INT_34XX_SYS_NIRQ,
  505. .platform_data = &sdp3430_twldata,
  506. },
  507. };
  508. static int __init omap3430_i2c_init(void)
  509. {
  510. /* i2c1 for PMIC only */
  511. omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
  512. ARRAY_SIZE(sdp3430_i2c_boardinfo));
  513. /* i2c2 on camera connector (for sensor control) and optional isp1301 */
  514. omap_register_i2c_bus(2, 400, NULL, 0);
  515. /* i2c3 on display connector (for DVI, tfp410) */
  516. omap_register_i2c_bus(3, 400, NULL, 0);
  517. return 0;
  518. }
  519. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  520. static struct omap_smc91x_platform_data board_smc91x_data = {
  521. .cs = 3,
  522. .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
  523. IORESOURCE_IRQ_LOWLEVEL,
  524. };
  525. static void __init board_smc91x_init(void)
  526. {
  527. if (omap_rev() > OMAP3430_REV_ES1_0)
  528. board_smc91x_data.gpio_irq = 6;
  529. else
  530. board_smc91x_data.gpio_irq = 29;
  531. gpmc_smc91x_init(&board_smc91x_data);
  532. }
  533. #else
  534. static inline void board_smc91x_init(void)
  535. {
  536. }
  537. #endif
  538. static void enable_board_wakeup_source(void)
  539. {
  540. /* T2 interrupt line (keypad) */
  541. omap_mux_init_signal("sys_nirq",
  542. OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
  543. }
  544. static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
  545. .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  546. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  547. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  548. .phy_reset = true,
  549. .reset_gpio_port[0] = 57,
  550. .reset_gpio_port[1] = 61,
  551. .reset_gpio_port[2] = -EINVAL
  552. };
  553. #ifdef CONFIG_OMAP_MUX
  554. static struct omap_board_mux board_mux[] __initdata = {
  555. { .reg_offset = OMAP_MUX_TERMINATOR },
  556. };
  557. #endif
  558. /*
  559. * SDP3430 V2 Board CS organization
  560. * Different from SDP3430 V1. Now 4 switches used to specify CS
  561. *
  562. * See also the Switch S8 settings in the comments.
  563. */
  564. static char chip_sel_3430[][GPMC_CS_NUM] = {
  565. {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
  566. {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
  567. {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
  568. };
  569. static struct mtd_partition sdp_nor_partitions[] = {
  570. /* bootloader (U-Boot, etc) in first sector */
  571. {
  572. .name = "Bootloader-NOR",
  573. .offset = 0,
  574. .size = SZ_256K,
  575. .mask_flags = MTD_WRITEABLE, /* force read-only */
  576. },
  577. /* bootloader params in the next sector */
  578. {
  579. .name = "Params-NOR",
  580. .offset = MTDPART_OFS_APPEND,
  581. .size = SZ_256K,
  582. .mask_flags = 0,
  583. },
  584. /* kernel */
  585. {
  586. .name = "Kernel-NOR",
  587. .offset = MTDPART_OFS_APPEND,
  588. .size = SZ_2M,
  589. .mask_flags = 0
  590. },
  591. /* file system */
  592. {
  593. .name = "Filesystem-NOR",
  594. .offset = MTDPART_OFS_APPEND,
  595. .size = MTDPART_SIZ_FULL,
  596. .mask_flags = 0
  597. }
  598. };
  599. static struct mtd_partition sdp_onenand_partitions[] = {
  600. {
  601. .name = "X-Loader-OneNAND",
  602. .offset = 0,
  603. .size = 4 * (64 * 2048),
  604. .mask_flags = MTD_WRITEABLE /* force read-only */
  605. },
  606. {
  607. .name = "U-Boot-OneNAND",
  608. .offset = MTDPART_OFS_APPEND,
  609. .size = 2 * (64 * 2048),
  610. .mask_flags = MTD_WRITEABLE /* force read-only */
  611. },
  612. {
  613. .name = "U-Boot Environment-OneNAND",
  614. .offset = MTDPART_OFS_APPEND,
  615. .size = 1 * (64 * 2048),
  616. },
  617. {
  618. .name = "Kernel-OneNAND",
  619. .offset = MTDPART_OFS_APPEND,
  620. .size = 16 * (64 * 2048),
  621. },
  622. {
  623. .name = "File System-OneNAND",
  624. .offset = MTDPART_OFS_APPEND,
  625. .size = MTDPART_SIZ_FULL,
  626. },
  627. };
  628. static struct mtd_partition sdp_nand_partitions[] = {
  629. /* All the partition sizes are listed in terms of NAND block size */
  630. {
  631. .name = "X-Loader-NAND",
  632. .offset = 0,
  633. .size = 4 * (64 * 2048),
  634. .mask_flags = MTD_WRITEABLE, /* force read-only */
  635. },
  636. {
  637. .name = "U-Boot-NAND",
  638. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  639. .size = 10 * (64 * 2048),
  640. .mask_flags = MTD_WRITEABLE, /* force read-only */
  641. },
  642. {
  643. .name = "Boot Env-NAND",
  644. .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
  645. .size = 6 * (64 * 2048),
  646. },
  647. {
  648. .name = "Kernel-NAND",
  649. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  650. .size = 40 * (64 * 2048),
  651. },
  652. {
  653. .name = "File System - NAND",
  654. .size = MTDPART_SIZ_FULL,
  655. .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
  656. },
  657. };
  658. static struct flash_partitions sdp_flash_partitions[] = {
  659. {
  660. .parts = sdp_nor_partitions,
  661. .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
  662. },
  663. {
  664. .parts = sdp_onenand_partitions,
  665. .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
  666. },
  667. {
  668. .parts = sdp_nand_partitions,
  669. .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
  670. },
  671. };
  672. static struct omap_musb_board_data musb_board_data = {
  673. .interface_type = MUSB_INTERFACE_ULPI,
  674. .mode = MUSB_OTG,
  675. .power = 100,
  676. };
  677. static void __init omap_3430sdp_init(void)
  678. {
  679. omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
  680. omap3430_i2c_init();
  681. omap_display_init(&sdp3430_dss_data);
  682. if (omap_rev() > OMAP3430_REV_ES1_0)
  683. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
  684. else
  685. ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
  686. sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
  687. spi_register_board_info(sdp3430_spi_board_info,
  688. ARRAY_SIZE(sdp3430_spi_board_info));
  689. ads7846_dev_init();
  690. omap_serial_init();
  691. usb_musb_init(&musb_board_data);
  692. board_smc91x_init();
  693. board_flash_init(sdp_flash_partitions, chip_sel_3430);
  694. sdp3430_display_init();
  695. enable_board_wakeup_source();
  696. usb_ehci_init(&ehci_pdata);
  697. }
  698. MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
  699. /* Maintainer: Syed Khasim - Texas Instruments Inc */
  700. .boot_params = 0x80000100,
  701. .reserve = omap_reserve,
  702. .map_io = omap3_map_io,
  703. .init_early = omap_3430sdp_init_early,
  704. .init_irq = omap_init_irq,
  705. .init_machine = omap_3430sdp_init,
  706. .timer = &omap_timer,
  707. MACHINE_END