qlge_mpi.c 30 KB

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  1. #include "qlge.h"
  2. int ql_unpause_mpi_risc(struct ql_adapter *qdev)
  3. {
  4. u32 tmp;
  5. /* Un-pause the RISC */
  6. tmp = ql_read32(qdev, CSR);
  7. if (!(tmp & CSR_RP))
  8. return -EIO;
  9. ql_write32(qdev, CSR, CSR_CMD_CLR_PAUSE);
  10. return 0;
  11. }
  12. int ql_pause_mpi_risc(struct ql_adapter *qdev)
  13. {
  14. u32 tmp;
  15. int count = UDELAY_COUNT;
  16. /* Pause the RISC */
  17. ql_write32(qdev, CSR, CSR_CMD_SET_PAUSE);
  18. do {
  19. tmp = ql_read32(qdev, CSR);
  20. if (tmp & CSR_RP)
  21. break;
  22. mdelay(UDELAY_DELAY);
  23. count--;
  24. } while (count);
  25. return (count == 0) ? -ETIMEDOUT : 0;
  26. }
  27. int ql_hard_reset_mpi_risc(struct ql_adapter *qdev)
  28. {
  29. u32 tmp;
  30. int count = UDELAY_COUNT;
  31. /* Reset the RISC */
  32. ql_write32(qdev, CSR, CSR_CMD_SET_RST);
  33. do {
  34. tmp = ql_read32(qdev, CSR);
  35. if (tmp & CSR_RR) {
  36. ql_write32(qdev, CSR, CSR_CMD_CLR_RST);
  37. break;
  38. }
  39. mdelay(UDELAY_DELAY);
  40. count--;
  41. } while (count);
  42. return (count == 0) ? -ETIMEDOUT : 0;
  43. }
  44. int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data)
  45. {
  46. int status;
  47. /* wait for reg to come ready */
  48. status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  49. if (status)
  50. goto exit;
  51. /* set up for reg read */
  52. ql_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R);
  53. /* wait for reg to come ready */
  54. status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  55. if (status)
  56. goto exit;
  57. /* get the data */
  58. *data = ql_read32(qdev, PROC_DATA);
  59. exit:
  60. return status;
  61. }
  62. int ql_write_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 data)
  63. {
  64. int status = 0;
  65. /* wait for reg to come ready */
  66. status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  67. if (status)
  68. goto exit;
  69. /* write the data to the data reg */
  70. ql_write32(qdev, PROC_DATA, data);
  71. /* trigger the write */
  72. ql_write32(qdev, PROC_ADDR, reg);
  73. /* wait for reg to come ready */
  74. status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
  75. if (status)
  76. goto exit;
  77. exit:
  78. return status;
  79. }
  80. int ql_soft_reset_mpi_risc(struct ql_adapter *qdev)
  81. {
  82. int status;
  83. status = ql_write_mpi_reg(qdev, 0x00001010, 1);
  84. return status;
  85. }
  86. /* Determine if we are in charge of the firwmare. If
  87. * we are the lower of the 2 NIC pcie functions, or if
  88. * we are the higher function and the lower function
  89. * is not enabled.
  90. */
  91. int ql_own_firmware(struct ql_adapter *qdev)
  92. {
  93. u32 temp;
  94. /* If we are the lower of the 2 NIC functions
  95. * on the chip the we are responsible for
  96. * core dump and firmware reset after an error.
  97. */
  98. if (qdev->func < qdev->alt_func)
  99. return 1;
  100. /* If we are the higher of the 2 NIC functions
  101. * on the chip and the lower function is not
  102. * enabled, then we are responsible for
  103. * core dump and firmware reset after an error.
  104. */
  105. temp = ql_read32(qdev, STS);
  106. if (!(temp & (1 << (8 + qdev->alt_func))))
  107. return 1;
  108. return 0;
  109. }
  110. static int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp)
  111. {
  112. int i, status;
  113. status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK);
  114. if (status)
  115. return -EBUSY;
  116. for (i = 0; i < mbcp->out_count; i++) {
  117. status =
  118. ql_read_mpi_reg(qdev, qdev->mailbox_out + i,
  119. &mbcp->mbox_out[i]);
  120. if (status) {
  121. QPRINTK(qdev, DRV, ERR, "Failed mailbox read.\n");
  122. break;
  123. }
  124. }
  125. ql_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */
  126. return status;
  127. }
  128. /* Wait for a single mailbox command to complete.
  129. * Returns zero on success.
  130. */
  131. static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev)
  132. {
  133. int count = 100;
  134. u32 value;
  135. do {
  136. value = ql_read32(qdev, STS);
  137. if (value & STS_PI)
  138. return 0;
  139. mdelay(UDELAY_DELAY); /* 100ms */
  140. } while (--count);
  141. return -ETIMEDOUT;
  142. }
  143. /* Execute a single mailbox command.
  144. * Caller must hold PROC_ADDR semaphore.
  145. */
  146. static int ql_exec_mb_cmd(struct ql_adapter *qdev, struct mbox_params *mbcp)
  147. {
  148. int i, status;
  149. /*
  150. * Make sure there's nothing pending.
  151. * This shouldn't happen.
  152. */
  153. if (ql_read32(qdev, CSR) & CSR_HRI)
  154. return -EIO;
  155. status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK);
  156. if (status)
  157. return status;
  158. /*
  159. * Fill the outbound mailboxes.
  160. */
  161. for (i = 0; i < mbcp->in_count; i++) {
  162. status = ql_write_mpi_reg(qdev, qdev->mailbox_in + i,
  163. mbcp->mbox_in[i]);
  164. if (status)
  165. goto end;
  166. }
  167. /*
  168. * Wake up the MPI firmware.
  169. */
  170. ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT);
  171. end:
  172. ql_sem_unlock(qdev, SEM_PROC_REG_MASK);
  173. return status;
  174. }
  175. /* We are being asked by firmware to accept
  176. * a change to the port. This is only
  177. * a change to max frame sizes (Tx/Rx), pause
  178. * parameters, or loopback mode. We wake up a worker
  179. * to handler processing this since a mailbox command
  180. * will need to be sent to ACK the request.
  181. */
  182. static int ql_idc_req_aen(struct ql_adapter *qdev)
  183. {
  184. int status;
  185. struct mbox_params *mbcp = &qdev->idc_mbc;
  186. QPRINTK(qdev, DRV, ERR, "Enter!\n");
  187. /* Get the status data and start up a thread to
  188. * handle the request.
  189. */
  190. mbcp = &qdev->idc_mbc;
  191. mbcp->out_count = 4;
  192. status = ql_get_mb_sts(qdev, mbcp);
  193. if (status) {
  194. QPRINTK(qdev, DRV, ERR,
  195. "Could not read MPI, resetting ASIC!\n");
  196. ql_queue_asic_error(qdev);
  197. } else {
  198. /* Begin polled mode early so
  199. * we don't get another interrupt
  200. * when we leave mpi_worker.
  201. */
  202. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
  203. queue_delayed_work(qdev->workqueue, &qdev->mpi_idc_work, 0);
  204. }
  205. return status;
  206. }
  207. /* Process an inter-device event completion.
  208. * If good, signal the caller's completion.
  209. */
  210. static int ql_idc_cmplt_aen(struct ql_adapter *qdev)
  211. {
  212. int status;
  213. struct mbox_params *mbcp = &qdev->idc_mbc;
  214. mbcp->out_count = 4;
  215. status = ql_get_mb_sts(qdev, mbcp);
  216. if (status) {
  217. QPRINTK(qdev, DRV, ERR,
  218. "Could not read MPI, resetting RISC!\n");
  219. ql_queue_fw_error(qdev);
  220. } else
  221. /* Wake up the sleeping mpi_idc_work thread that is
  222. * waiting for this event.
  223. */
  224. complete(&qdev->ide_completion);
  225. return status;
  226. }
  227. static void ql_link_up(struct ql_adapter *qdev, struct mbox_params *mbcp)
  228. {
  229. int status;
  230. mbcp->out_count = 2;
  231. status = ql_get_mb_sts(qdev, mbcp);
  232. if (status) {
  233. QPRINTK(qdev, DRV, ERR,
  234. "%s: Could not get mailbox status.\n", __func__);
  235. return;
  236. }
  237. qdev->link_status = mbcp->mbox_out[1];
  238. QPRINTK(qdev, DRV, ERR, "Link Up.\n");
  239. /* If we're coming back from an IDC event
  240. * then set up the CAM and frame routing.
  241. */
  242. if (test_bit(QL_CAM_RT_SET, &qdev->flags)) {
  243. status = ql_cam_route_initialize(qdev);
  244. if (status) {
  245. QPRINTK(qdev, IFUP, ERR,
  246. "Failed to init CAM/Routing tables.\n");
  247. return;
  248. } else
  249. clear_bit(QL_CAM_RT_SET, &qdev->flags);
  250. }
  251. /* Queue up a worker to check the frame
  252. * size information, and fix it if it's not
  253. * to our liking.
  254. */
  255. if (!test_bit(QL_PORT_CFG, &qdev->flags)) {
  256. QPRINTK(qdev, DRV, ERR, "Queue Port Config Worker!\n");
  257. set_bit(QL_PORT_CFG, &qdev->flags);
  258. /* Begin polled mode early so
  259. * we don't get another interrupt
  260. * when we leave mpi_worker dpc.
  261. */
  262. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
  263. queue_delayed_work(qdev->workqueue,
  264. &qdev->mpi_port_cfg_work, 0);
  265. }
  266. ql_link_on(qdev);
  267. }
  268. static void ql_link_down(struct ql_adapter *qdev, struct mbox_params *mbcp)
  269. {
  270. int status;
  271. mbcp->out_count = 3;
  272. status = ql_get_mb_sts(qdev, mbcp);
  273. if (status)
  274. QPRINTK(qdev, DRV, ERR, "Link down AEN broken!\n");
  275. ql_link_off(qdev);
  276. }
  277. static int ql_sfp_in(struct ql_adapter *qdev, struct mbox_params *mbcp)
  278. {
  279. int status;
  280. mbcp->out_count = 5;
  281. status = ql_get_mb_sts(qdev, mbcp);
  282. if (status)
  283. QPRINTK(qdev, DRV, ERR, "SFP in AEN broken!\n");
  284. else
  285. QPRINTK(qdev, DRV, ERR, "SFP insertion detected.\n");
  286. return status;
  287. }
  288. static int ql_sfp_out(struct ql_adapter *qdev, struct mbox_params *mbcp)
  289. {
  290. int status;
  291. mbcp->out_count = 1;
  292. status = ql_get_mb_sts(qdev, mbcp);
  293. if (status)
  294. QPRINTK(qdev, DRV, ERR, "SFP out AEN broken!\n");
  295. else
  296. QPRINTK(qdev, DRV, ERR, "SFP removal detected.\n");
  297. return status;
  298. }
  299. static int ql_aen_lost(struct ql_adapter *qdev, struct mbox_params *mbcp)
  300. {
  301. int status;
  302. mbcp->out_count = 6;
  303. status = ql_get_mb_sts(qdev, mbcp);
  304. if (status)
  305. QPRINTK(qdev, DRV, ERR, "Lost AEN broken!\n");
  306. else {
  307. int i;
  308. QPRINTK(qdev, DRV, ERR, "Lost AEN detected.\n");
  309. for (i = 0; i < mbcp->out_count; i++)
  310. QPRINTK(qdev, DRV, ERR, "mbox_out[%d] = 0x%.08x.\n",
  311. i, mbcp->mbox_out[i]);
  312. }
  313. return status;
  314. }
  315. static void ql_init_fw_done(struct ql_adapter *qdev, struct mbox_params *mbcp)
  316. {
  317. int status;
  318. mbcp->out_count = 2;
  319. status = ql_get_mb_sts(qdev, mbcp);
  320. if (status) {
  321. QPRINTK(qdev, DRV, ERR, "Firmware did not initialize!\n");
  322. } else {
  323. QPRINTK(qdev, DRV, ERR, "Firmware Revision = 0x%.08x.\n",
  324. mbcp->mbox_out[1]);
  325. qdev->fw_rev_id = mbcp->mbox_out[1];
  326. status = ql_cam_route_initialize(qdev);
  327. if (status)
  328. QPRINTK(qdev, IFUP, ERR,
  329. "Failed to init CAM/Routing tables.\n");
  330. }
  331. }
  332. /* Process an async event and clear it unless it's an
  333. * error condition.
  334. * This can get called iteratively from the mpi_work thread
  335. * when events arrive via an interrupt.
  336. * It also gets called when a mailbox command is polling for
  337. * it's completion. */
  338. static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp)
  339. {
  340. int status;
  341. int orig_count = mbcp->out_count;
  342. /* Just get mailbox zero for now. */
  343. mbcp->out_count = 1;
  344. status = ql_get_mb_sts(qdev, mbcp);
  345. if (status) {
  346. QPRINTK(qdev, DRV, ERR,
  347. "Could not read MPI, resetting ASIC!\n");
  348. ql_queue_asic_error(qdev);
  349. goto end;
  350. }
  351. switch (mbcp->mbox_out[0]) {
  352. /* This case is only active when we arrive here
  353. * as a result of issuing a mailbox command to
  354. * the firmware.
  355. */
  356. case MB_CMD_STS_INTRMDT:
  357. case MB_CMD_STS_GOOD:
  358. case MB_CMD_STS_INVLD_CMD:
  359. case MB_CMD_STS_XFC_ERR:
  360. case MB_CMD_STS_CSUM_ERR:
  361. case MB_CMD_STS_ERR:
  362. case MB_CMD_STS_PARAM_ERR:
  363. /* We can only get mailbox status if we're polling from an
  364. * unfinished command. Get the rest of the status data and
  365. * return back to the caller.
  366. * We only end up here when we're polling for a mailbox
  367. * command completion.
  368. */
  369. mbcp->out_count = orig_count;
  370. status = ql_get_mb_sts(qdev, mbcp);
  371. return status;
  372. /* We are being asked by firmware to accept
  373. * a change to the port. This is only
  374. * a change to max frame sizes (Tx/Rx), pause
  375. * parameters, or loopback mode.
  376. */
  377. case AEN_IDC_REQ:
  378. status = ql_idc_req_aen(qdev);
  379. break;
  380. /* Process and inbound IDC event.
  381. * This will happen when we're trying to
  382. * change tx/rx max frame size, change pause
  383. * parameters or loopback mode.
  384. */
  385. case AEN_IDC_CMPLT:
  386. case AEN_IDC_EXT:
  387. status = ql_idc_cmplt_aen(qdev);
  388. break;
  389. case AEN_LINK_UP:
  390. ql_link_up(qdev, mbcp);
  391. break;
  392. case AEN_LINK_DOWN:
  393. ql_link_down(qdev, mbcp);
  394. break;
  395. case AEN_FW_INIT_DONE:
  396. /* If we're in process on executing the firmware,
  397. * then convert the status to normal mailbox status.
  398. */
  399. if (mbcp->mbox_in[0] == MB_CMD_EX_FW) {
  400. mbcp->out_count = orig_count;
  401. status = ql_get_mb_sts(qdev, mbcp);
  402. mbcp->mbox_out[0] = MB_CMD_STS_GOOD;
  403. return status;
  404. }
  405. ql_init_fw_done(qdev, mbcp);
  406. break;
  407. case AEN_AEN_SFP_IN:
  408. ql_sfp_in(qdev, mbcp);
  409. break;
  410. case AEN_AEN_SFP_OUT:
  411. ql_sfp_out(qdev, mbcp);
  412. break;
  413. /* This event can arrive at boot time or after an
  414. * MPI reset if the firmware failed to initialize.
  415. */
  416. case AEN_FW_INIT_FAIL:
  417. /* If we're in process on executing the firmware,
  418. * then convert the status to normal mailbox status.
  419. */
  420. if (mbcp->mbox_in[0] == MB_CMD_EX_FW) {
  421. mbcp->out_count = orig_count;
  422. status = ql_get_mb_sts(qdev, mbcp);
  423. mbcp->mbox_out[0] = MB_CMD_STS_ERR;
  424. return status;
  425. }
  426. QPRINTK(qdev, DRV, ERR,
  427. "Firmware initialization failed.\n");
  428. status = -EIO;
  429. ql_queue_fw_error(qdev);
  430. break;
  431. case AEN_SYS_ERR:
  432. QPRINTK(qdev, DRV, ERR,
  433. "System Error.\n");
  434. ql_queue_fw_error(qdev);
  435. status = -EIO;
  436. break;
  437. case AEN_AEN_LOST:
  438. ql_aen_lost(qdev, mbcp);
  439. break;
  440. case AEN_DCBX_CHG:
  441. /* Need to support AEN 8110 */
  442. break;
  443. default:
  444. QPRINTK(qdev, DRV, ERR,
  445. "Unsupported AE %.08x.\n", mbcp->mbox_out[0]);
  446. /* Clear the MPI firmware status. */
  447. }
  448. end:
  449. ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
  450. /* Restore the original mailbox count to
  451. * what the caller asked for. This can get
  452. * changed when a mailbox command is waiting
  453. * for a response and an AEN arrives and
  454. * is handled.
  455. * */
  456. mbcp->out_count = orig_count;
  457. return status;
  458. }
  459. /* Execute a single mailbox command.
  460. * mbcp is a pointer to an array of u32. Each
  461. * element in the array contains the value for it's
  462. * respective mailbox register.
  463. */
  464. static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp)
  465. {
  466. int status;
  467. unsigned long count;
  468. /* Begin polled mode for MPI */
  469. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
  470. /* Load the mailbox registers and wake up MPI RISC. */
  471. status = ql_exec_mb_cmd(qdev, mbcp);
  472. if (status)
  473. goto end;
  474. /* If we're generating a system error, then there's nothing
  475. * to wait for.
  476. */
  477. if (mbcp->mbox_in[0] == MB_CMD_MAKE_SYS_ERR)
  478. goto end;
  479. /* Wait for the command to complete. We loop
  480. * here because some AEN might arrive while
  481. * we're waiting for the mailbox command to
  482. * complete. If more than 5 seconds expire we can
  483. * assume something is wrong. */
  484. count = jiffies + HZ * MAILBOX_TIMEOUT;
  485. do {
  486. /* Wait for the interrupt to come in. */
  487. status = ql_wait_mbx_cmd_cmplt(qdev);
  488. if (status)
  489. continue;
  490. /* Process the event. If it's an AEN, it
  491. * will be handled in-line or a worker
  492. * will be spawned. If it's our completion
  493. * we will catch it below.
  494. */
  495. status = ql_mpi_handler(qdev, mbcp);
  496. if (status)
  497. goto end;
  498. /* It's either the completion for our mailbox
  499. * command complete or an AEN. If it's our
  500. * completion then get out.
  501. */
  502. if (((mbcp->mbox_out[0] & 0x0000f000) ==
  503. MB_CMD_STS_GOOD) ||
  504. ((mbcp->mbox_out[0] & 0x0000f000) ==
  505. MB_CMD_STS_INTRMDT))
  506. goto done;
  507. } while (time_before(jiffies, count));
  508. QPRINTK(qdev, DRV, ERR,
  509. "Timed out waiting for mailbox complete.\n");
  510. status = -ETIMEDOUT;
  511. goto end;
  512. done:
  513. /* Now we can clear the interrupt condition
  514. * and look at our status.
  515. */
  516. ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
  517. if (((mbcp->mbox_out[0] & 0x0000f000) !=
  518. MB_CMD_STS_GOOD) &&
  519. ((mbcp->mbox_out[0] & 0x0000f000) !=
  520. MB_CMD_STS_INTRMDT)) {
  521. status = -EIO;
  522. }
  523. end:
  524. /* End polled mode for MPI */
  525. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
  526. return status;
  527. }
  528. int ql_mb_sys_err(struct ql_adapter *qdev)
  529. {
  530. struct mbox_params mbc;
  531. struct mbox_params *mbcp = &mbc;
  532. int status;
  533. memset(mbcp, 0, sizeof(struct mbox_params));
  534. mbcp->in_count = 1;
  535. mbcp->out_count = 0;
  536. mbcp->mbox_in[0] = MB_CMD_MAKE_SYS_ERR;
  537. status = ql_mailbox_command(qdev, mbcp);
  538. return status;
  539. }
  540. /* Get MPI firmware version. This will be used for
  541. * driver banner and for ethtool info.
  542. * Returns zero on success.
  543. */
  544. int ql_mb_about_fw(struct ql_adapter *qdev)
  545. {
  546. struct mbox_params mbc;
  547. struct mbox_params *mbcp = &mbc;
  548. int status = 0;
  549. memset(mbcp, 0, sizeof(struct mbox_params));
  550. mbcp->in_count = 1;
  551. mbcp->out_count = 3;
  552. mbcp->mbox_in[0] = MB_CMD_ABOUT_FW;
  553. status = ql_mailbox_command(qdev, mbcp);
  554. if (status)
  555. return status;
  556. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  557. QPRINTK(qdev, DRV, ERR,
  558. "Failed about firmware command\n");
  559. status = -EIO;
  560. }
  561. /* Store the firmware version */
  562. qdev->fw_rev_id = mbcp->mbox_out[1];
  563. return status;
  564. }
  565. /* Get functional state for MPI firmware.
  566. * Returns zero on success.
  567. */
  568. int ql_mb_get_fw_state(struct ql_adapter *qdev)
  569. {
  570. struct mbox_params mbc;
  571. struct mbox_params *mbcp = &mbc;
  572. int status = 0;
  573. memset(mbcp, 0, sizeof(struct mbox_params));
  574. mbcp->in_count = 1;
  575. mbcp->out_count = 2;
  576. mbcp->mbox_in[0] = MB_CMD_GET_FW_STATE;
  577. status = ql_mailbox_command(qdev, mbcp);
  578. if (status)
  579. return status;
  580. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  581. QPRINTK(qdev, DRV, ERR,
  582. "Failed Get Firmware State.\n");
  583. status = -EIO;
  584. }
  585. /* If bit zero is set in mbx 1 then the firmware is
  586. * running, but not initialized. This should never
  587. * happen.
  588. */
  589. if (mbcp->mbox_out[1] & 1) {
  590. QPRINTK(qdev, DRV, ERR,
  591. "Firmware waiting for initialization.\n");
  592. status = -EIO;
  593. }
  594. return status;
  595. }
  596. /* Send and ACK mailbox command to the firmware to
  597. * let it continue with the change.
  598. */
  599. int ql_mb_idc_ack(struct ql_adapter *qdev)
  600. {
  601. struct mbox_params mbc;
  602. struct mbox_params *mbcp = &mbc;
  603. int status = 0;
  604. memset(mbcp, 0, sizeof(struct mbox_params));
  605. mbcp->in_count = 5;
  606. mbcp->out_count = 1;
  607. mbcp->mbox_in[0] = MB_CMD_IDC_ACK;
  608. mbcp->mbox_in[1] = qdev->idc_mbc.mbox_out[1];
  609. mbcp->mbox_in[2] = qdev->idc_mbc.mbox_out[2];
  610. mbcp->mbox_in[3] = qdev->idc_mbc.mbox_out[3];
  611. mbcp->mbox_in[4] = qdev->idc_mbc.mbox_out[4];
  612. status = ql_mailbox_command(qdev, mbcp);
  613. if (status)
  614. return status;
  615. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  616. QPRINTK(qdev, DRV, ERR,
  617. "Failed IDC ACK send.\n");
  618. status = -EIO;
  619. }
  620. return status;
  621. }
  622. /* Get link settings and maximum frame size settings
  623. * for the current port.
  624. * Most likely will block.
  625. */
  626. int ql_mb_set_port_cfg(struct ql_adapter *qdev)
  627. {
  628. struct mbox_params mbc;
  629. struct mbox_params *mbcp = &mbc;
  630. int status = 0;
  631. memset(mbcp, 0, sizeof(struct mbox_params));
  632. mbcp->in_count = 3;
  633. mbcp->out_count = 1;
  634. mbcp->mbox_in[0] = MB_CMD_SET_PORT_CFG;
  635. mbcp->mbox_in[1] = qdev->link_config;
  636. mbcp->mbox_in[2] = qdev->max_frame_size;
  637. status = ql_mailbox_command(qdev, mbcp);
  638. if (status)
  639. return status;
  640. if (mbcp->mbox_out[0] == MB_CMD_STS_INTRMDT) {
  641. QPRINTK(qdev, DRV, ERR,
  642. "Port Config sent, wait for IDC.\n");
  643. } else if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  644. QPRINTK(qdev, DRV, ERR,
  645. "Failed Set Port Configuration.\n");
  646. status = -EIO;
  647. }
  648. return status;
  649. }
  650. int ql_mb_dump_ram(struct ql_adapter *qdev, u64 req_dma, u32 addr,
  651. u32 size)
  652. {
  653. int status = 0;
  654. struct mbox_params mbc;
  655. struct mbox_params *mbcp = &mbc;
  656. memset(mbcp, 0, sizeof(struct mbox_params));
  657. mbcp->in_count = 9;
  658. mbcp->out_count = 1;
  659. mbcp->mbox_in[0] = MB_CMD_DUMP_RISC_RAM;
  660. mbcp->mbox_in[1] = LSW(addr);
  661. mbcp->mbox_in[2] = MSW(req_dma);
  662. mbcp->mbox_in[3] = LSW(req_dma);
  663. mbcp->mbox_in[4] = MSW(size);
  664. mbcp->mbox_in[5] = LSW(size);
  665. mbcp->mbox_in[6] = MSW(MSD(req_dma));
  666. mbcp->mbox_in[7] = LSW(MSD(req_dma));
  667. mbcp->mbox_in[8] = MSW(addr);
  668. status = ql_mailbox_command(qdev, mbcp);
  669. if (status)
  670. return status;
  671. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  672. QPRINTK(qdev, DRV, ERR,
  673. "Failed to dump risc RAM.\n");
  674. status = -EIO;
  675. }
  676. return status;
  677. }
  678. /* Issue a mailbox command to dump RISC RAM. */
  679. int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf,
  680. u32 ram_addr, int word_count)
  681. {
  682. int status;
  683. char *my_buf;
  684. dma_addr_t buf_dma;
  685. my_buf = pci_alloc_consistent(qdev->pdev, word_count * sizeof(u32),
  686. &buf_dma);
  687. if (!my_buf)
  688. return -EIO;
  689. status = ql_mb_dump_ram(qdev, buf_dma, ram_addr, word_count);
  690. if (!status)
  691. memcpy(buf, my_buf, word_count * sizeof(u32));
  692. pci_free_consistent(qdev->pdev, word_count * sizeof(u32), my_buf,
  693. buf_dma);
  694. return status;
  695. }
  696. /* Get link settings and maximum frame size settings
  697. * for the current port.
  698. * Most likely will block.
  699. */
  700. int ql_mb_get_port_cfg(struct ql_adapter *qdev)
  701. {
  702. struct mbox_params mbc;
  703. struct mbox_params *mbcp = &mbc;
  704. int status = 0;
  705. memset(mbcp, 0, sizeof(struct mbox_params));
  706. mbcp->in_count = 1;
  707. mbcp->out_count = 3;
  708. mbcp->mbox_in[0] = MB_CMD_GET_PORT_CFG;
  709. status = ql_mailbox_command(qdev, mbcp);
  710. if (status)
  711. return status;
  712. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  713. QPRINTK(qdev, DRV, ERR,
  714. "Failed Get Port Configuration.\n");
  715. status = -EIO;
  716. } else {
  717. QPRINTK(qdev, DRV, DEBUG,
  718. "Passed Get Port Configuration.\n");
  719. qdev->link_config = mbcp->mbox_out[1];
  720. qdev->max_frame_size = mbcp->mbox_out[2];
  721. }
  722. return status;
  723. }
  724. int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol)
  725. {
  726. struct mbox_params mbc;
  727. struct mbox_params *mbcp = &mbc;
  728. int status;
  729. memset(mbcp, 0, sizeof(struct mbox_params));
  730. mbcp->in_count = 2;
  731. mbcp->out_count = 1;
  732. mbcp->mbox_in[0] = MB_CMD_SET_WOL_MODE;
  733. mbcp->mbox_in[1] = wol;
  734. status = ql_mailbox_command(qdev, mbcp);
  735. if (status)
  736. return status;
  737. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  738. QPRINTK(qdev, DRV, ERR,
  739. "Failed to set WOL mode.\n");
  740. status = -EIO;
  741. }
  742. return status;
  743. }
  744. int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol)
  745. {
  746. struct mbox_params mbc;
  747. struct mbox_params *mbcp = &mbc;
  748. int status;
  749. u8 *addr = qdev->ndev->dev_addr;
  750. memset(mbcp, 0, sizeof(struct mbox_params));
  751. mbcp->in_count = 8;
  752. mbcp->out_count = 1;
  753. mbcp->mbox_in[0] = MB_CMD_SET_WOL_MAGIC;
  754. if (enable_wol) {
  755. mbcp->mbox_in[1] = (u32)addr[0];
  756. mbcp->mbox_in[2] = (u32)addr[1];
  757. mbcp->mbox_in[3] = (u32)addr[2];
  758. mbcp->mbox_in[4] = (u32)addr[3];
  759. mbcp->mbox_in[5] = (u32)addr[4];
  760. mbcp->mbox_in[6] = (u32)addr[5];
  761. mbcp->mbox_in[7] = 0;
  762. } else {
  763. mbcp->mbox_in[1] = 0;
  764. mbcp->mbox_in[2] = 1;
  765. mbcp->mbox_in[3] = 1;
  766. mbcp->mbox_in[4] = 1;
  767. mbcp->mbox_in[5] = 1;
  768. mbcp->mbox_in[6] = 1;
  769. mbcp->mbox_in[7] = 0;
  770. }
  771. status = ql_mailbox_command(qdev, mbcp);
  772. if (status)
  773. return status;
  774. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  775. QPRINTK(qdev, DRV, ERR,
  776. "Failed to set WOL mode.\n");
  777. status = -EIO;
  778. }
  779. return status;
  780. }
  781. /* IDC - Inter Device Communication...
  782. * Some firmware commands require consent of adjacent FCOE
  783. * function. This function waits for the OK, or a
  784. * counter-request for a little more time.i
  785. * The firmware will complete the request if the other
  786. * function doesn't respond.
  787. */
  788. static int ql_idc_wait(struct ql_adapter *qdev)
  789. {
  790. int status = -ETIMEDOUT;
  791. long wait_time = 1 * HZ;
  792. struct mbox_params *mbcp = &qdev->idc_mbc;
  793. do {
  794. /* Wait here for the command to complete
  795. * via the IDC process.
  796. */
  797. wait_time =
  798. wait_for_completion_timeout(&qdev->ide_completion,
  799. wait_time);
  800. if (!wait_time) {
  801. QPRINTK(qdev, DRV, ERR,
  802. "IDC Timeout.\n");
  803. break;
  804. }
  805. /* Now examine the response from the IDC process.
  806. * We might have a good completion or a request for
  807. * more wait time.
  808. */
  809. if (mbcp->mbox_out[0] == AEN_IDC_EXT) {
  810. QPRINTK(qdev, DRV, ERR,
  811. "IDC Time Extension from function.\n");
  812. wait_time += (mbcp->mbox_out[1] >> 8) & 0x0000000f;
  813. } else if (mbcp->mbox_out[0] == AEN_IDC_CMPLT) {
  814. QPRINTK(qdev, DRV, ERR,
  815. "IDC Success.\n");
  816. status = 0;
  817. break;
  818. } else {
  819. QPRINTK(qdev, DRV, ERR,
  820. "IDC: Invalid State 0x%.04x.\n",
  821. mbcp->mbox_out[0]);
  822. status = -EIO;
  823. break;
  824. }
  825. } while (wait_time);
  826. return status;
  827. }
  828. int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config)
  829. {
  830. struct mbox_params mbc;
  831. struct mbox_params *mbcp = &mbc;
  832. int status;
  833. memset(mbcp, 0, sizeof(struct mbox_params));
  834. mbcp->in_count = 2;
  835. mbcp->out_count = 1;
  836. mbcp->mbox_in[0] = MB_CMD_SET_LED_CFG;
  837. mbcp->mbox_in[1] = led_config;
  838. status = ql_mailbox_command(qdev, mbcp);
  839. if (status)
  840. return status;
  841. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  842. QPRINTK(qdev, DRV, ERR,
  843. "Failed to set LED Configuration.\n");
  844. status = -EIO;
  845. }
  846. return status;
  847. }
  848. int ql_mb_get_led_cfg(struct ql_adapter *qdev)
  849. {
  850. struct mbox_params mbc;
  851. struct mbox_params *mbcp = &mbc;
  852. int status;
  853. memset(mbcp, 0, sizeof(struct mbox_params));
  854. mbcp->in_count = 1;
  855. mbcp->out_count = 2;
  856. mbcp->mbox_in[0] = MB_CMD_GET_LED_CFG;
  857. status = ql_mailbox_command(qdev, mbcp);
  858. if (status)
  859. return status;
  860. if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
  861. QPRINTK(qdev, DRV, ERR,
  862. "Failed to get LED Configuration.\n");
  863. status = -EIO;
  864. } else
  865. qdev->led_config = mbcp->mbox_out[1];
  866. return status;
  867. }
  868. int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control)
  869. {
  870. struct mbox_params mbc;
  871. struct mbox_params *mbcp = &mbc;
  872. int status;
  873. memset(mbcp, 0, sizeof(struct mbox_params));
  874. mbcp->in_count = 1;
  875. mbcp->out_count = 2;
  876. mbcp->mbox_in[0] = MB_CMD_SET_MGMNT_TFK_CTL;
  877. mbcp->mbox_in[1] = control;
  878. status = ql_mailbox_command(qdev, mbcp);
  879. if (status)
  880. return status;
  881. if (mbcp->mbox_out[0] == MB_CMD_STS_GOOD)
  882. return status;
  883. if (mbcp->mbox_out[0] == MB_CMD_STS_INVLD_CMD) {
  884. QPRINTK(qdev, DRV, ERR,
  885. "Command not supported by firmware.\n");
  886. status = -EINVAL;
  887. } else if (mbcp->mbox_out[0] == MB_CMD_STS_ERR) {
  888. /* This indicates that the firmware is
  889. * already in the state we are trying to
  890. * change it to.
  891. */
  892. QPRINTK(qdev, DRV, ERR,
  893. "Command parameters make no change.\n");
  894. }
  895. return status;
  896. }
  897. /* Returns a negative error code or the mailbox command status. */
  898. static int ql_mb_get_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 *control)
  899. {
  900. struct mbox_params mbc;
  901. struct mbox_params *mbcp = &mbc;
  902. int status;
  903. memset(mbcp, 0, sizeof(struct mbox_params));
  904. *control = 0;
  905. mbcp->in_count = 1;
  906. mbcp->out_count = 1;
  907. mbcp->mbox_in[0] = MB_CMD_GET_MGMNT_TFK_CTL;
  908. status = ql_mailbox_command(qdev, mbcp);
  909. if (status)
  910. return status;
  911. if (mbcp->mbox_out[0] == MB_CMD_STS_GOOD) {
  912. *control = mbcp->mbox_in[1];
  913. return status;
  914. }
  915. if (mbcp->mbox_out[0] == MB_CMD_STS_INVLD_CMD) {
  916. QPRINTK(qdev, DRV, ERR,
  917. "Command not supported by firmware.\n");
  918. status = -EINVAL;
  919. } else if (mbcp->mbox_out[0] == MB_CMD_STS_ERR) {
  920. QPRINTK(qdev, DRV, ERR,
  921. "Failed to get MPI traffic control.\n");
  922. status = -EIO;
  923. }
  924. return status;
  925. }
  926. int ql_wait_fifo_empty(struct ql_adapter *qdev)
  927. {
  928. int count = 5;
  929. u32 mgmnt_fifo_empty;
  930. u32 nic_fifo_empty;
  931. do {
  932. nic_fifo_empty = ql_read32(qdev, STS) & STS_NFE;
  933. ql_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty);
  934. mgmnt_fifo_empty &= MB_GET_MPI_TFK_FIFO_EMPTY;
  935. if (nic_fifo_empty && mgmnt_fifo_empty)
  936. return 0;
  937. msleep(100);
  938. } while (count-- > 0);
  939. return -ETIMEDOUT;
  940. }
  941. /* API called in work thread context to set new TX/RX
  942. * maximum frame size values to match MTU.
  943. */
  944. static int ql_set_port_cfg(struct ql_adapter *qdev)
  945. {
  946. int status;
  947. rtnl_lock();
  948. status = ql_mb_set_port_cfg(qdev);
  949. rtnl_unlock();
  950. if (status)
  951. return status;
  952. status = ql_idc_wait(qdev);
  953. return status;
  954. }
  955. /* The following routines are worker threads that process
  956. * events that may sleep waiting for completion.
  957. */
  958. /* This thread gets the maximum TX and RX frame size values
  959. * from the firmware and, if necessary, changes them to match
  960. * the MTU setting.
  961. */
  962. void ql_mpi_port_cfg_work(struct work_struct *work)
  963. {
  964. struct ql_adapter *qdev =
  965. container_of(work, struct ql_adapter, mpi_port_cfg_work.work);
  966. int status;
  967. rtnl_lock();
  968. status = ql_mb_get_port_cfg(qdev);
  969. rtnl_unlock();
  970. if (status) {
  971. QPRINTK(qdev, DRV, ERR,
  972. "Bug: Failed to get port config data.\n");
  973. goto err;
  974. }
  975. if (qdev->link_config & CFG_JUMBO_FRAME_SIZE &&
  976. qdev->max_frame_size ==
  977. CFG_DEFAULT_MAX_FRAME_SIZE)
  978. goto end;
  979. qdev->link_config |= CFG_JUMBO_FRAME_SIZE;
  980. qdev->max_frame_size = CFG_DEFAULT_MAX_FRAME_SIZE;
  981. status = ql_set_port_cfg(qdev);
  982. if (status) {
  983. QPRINTK(qdev, DRV, ERR,
  984. "Bug: Failed to set port config data.\n");
  985. goto err;
  986. }
  987. end:
  988. clear_bit(QL_PORT_CFG, &qdev->flags);
  989. return;
  990. err:
  991. ql_queue_fw_error(qdev);
  992. goto end;
  993. }
  994. /* Process an inter-device request. This is issues by
  995. * the firmware in response to another function requesting
  996. * a change to the port. We set a flag to indicate a change
  997. * has been made and then send a mailbox command ACKing
  998. * the change request.
  999. */
  1000. void ql_mpi_idc_work(struct work_struct *work)
  1001. {
  1002. struct ql_adapter *qdev =
  1003. container_of(work, struct ql_adapter, mpi_idc_work.work);
  1004. int status;
  1005. struct mbox_params *mbcp = &qdev->idc_mbc;
  1006. u32 aen;
  1007. int timeout;
  1008. rtnl_lock();
  1009. aen = mbcp->mbox_out[1] >> 16;
  1010. timeout = (mbcp->mbox_out[1] >> 8) & 0xf;
  1011. switch (aen) {
  1012. default:
  1013. QPRINTK(qdev, DRV, ERR,
  1014. "Bug: Unhandled IDC action.\n");
  1015. break;
  1016. case MB_CMD_PORT_RESET:
  1017. case MB_CMD_STOP_FW:
  1018. ql_link_off(qdev);
  1019. case MB_CMD_SET_PORT_CFG:
  1020. /* Signal the resulting link up AEN
  1021. * that the frame routing and mac addr
  1022. * needs to be set.
  1023. * */
  1024. set_bit(QL_CAM_RT_SET, &qdev->flags);
  1025. /* Do ACK if required */
  1026. if (timeout) {
  1027. status = ql_mb_idc_ack(qdev);
  1028. if (status)
  1029. QPRINTK(qdev, DRV, ERR,
  1030. "Bug: No pending IDC!\n");
  1031. } else {
  1032. QPRINTK(qdev, DRV, DEBUG,
  1033. "IDC ACK not required\n");
  1034. status = 0; /* success */
  1035. }
  1036. break;
  1037. /* These sub-commands issued by another (FCoE)
  1038. * function are requesting to do an operation
  1039. * on the shared resource (MPI environment).
  1040. * We currently don't issue these so we just
  1041. * ACK the request.
  1042. */
  1043. case MB_CMD_IOP_RESTART_MPI:
  1044. case MB_CMD_IOP_PREP_LINK_DOWN:
  1045. /* Drop the link, reload the routing
  1046. * table when link comes up.
  1047. */
  1048. ql_link_off(qdev);
  1049. set_bit(QL_CAM_RT_SET, &qdev->flags);
  1050. /* Fall through. */
  1051. case MB_CMD_IOP_DVR_START:
  1052. case MB_CMD_IOP_FLASH_ACC:
  1053. case MB_CMD_IOP_CORE_DUMP_MPI:
  1054. case MB_CMD_IOP_PREP_UPDATE_MPI:
  1055. case MB_CMD_IOP_COMP_UPDATE_MPI:
  1056. case MB_CMD_IOP_NONE: /* an IDC without params */
  1057. /* Do ACK if required */
  1058. if (timeout) {
  1059. status = ql_mb_idc_ack(qdev);
  1060. if (status)
  1061. QPRINTK(qdev, DRV, ERR,
  1062. "Bug: No pending IDC!\n");
  1063. } else {
  1064. QPRINTK(qdev, DRV, DEBUG,
  1065. "IDC ACK not required\n");
  1066. status = 0; /* success */
  1067. }
  1068. break;
  1069. }
  1070. rtnl_unlock();
  1071. }
  1072. void ql_mpi_work(struct work_struct *work)
  1073. {
  1074. struct ql_adapter *qdev =
  1075. container_of(work, struct ql_adapter, mpi_work.work);
  1076. struct mbox_params mbc;
  1077. struct mbox_params *mbcp = &mbc;
  1078. int err = 0;
  1079. rtnl_lock();
  1080. /* Begin polled mode for MPI */
  1081. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
  1082. while (ql_read32(qdev, STS) & STS_PI) {
  1083. memset(mbcp, 0, sizeof(struct mbox_params));
  1084. mbcp->out_count = 1;
  1085. /* Don't continue if an async event
  1086. * did not complete properly.
  1087. */
  1088. err = ql_mpi_handler(qdev, mbcp);
  1089. if (err)
  1090. break;
  1091. }
  1092. /* End polled mode for MPI */
  1093. ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
  1094. rtnl_unlock();
  1095. ql_enable_completion_interrupt(qdev, 0);
  1096. }
  1097. void ql_mpi_reset_work(struct work_struct *work)
  1098. {
  1099. struct ql_adapter *qdev =
  1100. container_of(work, struct ql_adapter, mpi_reset_work.work);
  1101. cancel_delayed_work_sync(&qdev->mpi_work);
  1102. cancel_delayed_work_sync(&qdev->mpi_port_cfg_work);
  1103. cancel_delayed_work_sync(&qdev->mpi_idc_work);
  1104. /* If we're not the dominant NIC function,
  1105. * then there is nothing to do.
  1106. */
  1107. if (!ql_own_firmware(qdev)) {
  1108. QPRINTK(qdev, DRV, ERR, "Don't own firmware!\n");
  1109. return;
  1110. }
  1111. if (!ql_core_dump(qdev, qdev->mpi_coredump)) {
  1112. QPRINTK(qdev, DRV, ERR, "Core is dumped!\n");
  1113. qdev->core_is_dumped = 1;
  1114. queue_delayed_work(qdev->workqueue,
  1115. &qdev->mpi_core_to_log, 5 * HZ);
  1116. }
  1117. ql_soft_reset_mpi_risc(qdev);
  1118. }