mwl8k.c 147 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110
  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/list.h>
  18. #include <linux/pci.h>
  19. #include <linux/delay.h>
  20. #include <linux/completion.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/slab.h>
  23. #include <net/mac80211.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/firmware.h>
  26. #include <linux/workqueue.h>
  27. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  28. #define MWL8K_NAME KBUILD_MODNAME
  29. #define MWL8K_VERSION "0.13"
  30. /* Module parameters */
  31. static bool ap_mode_default;
  32. module_param(ap_mode_default, bool, 0);
  33. MODULE_PARM_DESC(ap_mode_default,
  34. "Set to 1 to make ap mode the default instead of sta mode");
  35. /* Register definitions */
  36. #define MWL8K_HIU_GEN_PTR 0x00000c10
  37. #define MWL8K_MODE_STA 0x0000005a
  38. #define MWL8K_MODE_AP 0x000000a5
  39. #define MWL8K_HIU_INT_CODE 0x00000c14
  40. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  41. #define MWL8K_FWAP_READY 0xf1f2f4a5
  42. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  43. #define MWL8K_HIU_SCRATCH 0x00000c40
  44. /* Host->device communications */
  45. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  46. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  47. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  48. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  49. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  50. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  51. #define MWL8K_H2A_INT_RESET (1 << 15)
  52. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  53. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  54. /* Device->host communications */
  55. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  56. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  57. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  58. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  59. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  60. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  61. #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
  62. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  63. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  64. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  65. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  66. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  67. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  68. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  69. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  70. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  71. /* HW micro second timer register
  72. * located at offset 0xA600. This
  73. * will be used to timestamp tx
  74. * packets.
  75. */
  76. #define MWL8K_HW_TIMER_REGISTER 0x0000a600
  77. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  78. MWL8K_A2H_INT_CHNL_SWITCHED | \
  79. MWL8K_A2H_INT_QUEUE_EMPTY | \
  80. MWL8K_A2H_INT_RADAR_DETECT | \
  81. MWL8K_A2H_INT_RADIO_ON | \
  82. MWL8K_A2H_INT_RADIO_OFF | \
  83. MWL8K_A2H_INT_MAC_EVENT | \
  84. MWL8K_A2H_INT_OPC_DONE | \
  85. MWL8K_A2H_INT_RX_READY | \
  86. MWL8K_A2H_INT_TX_DONE | \
  87. MWL8K_A2H_INT_BA_WATCHDOG)
  88. #define MWL8K_RX_QUEUES 1
  89. #define MWL8K_TX_WMM_QUEUES 4
  90. #define MWL8K_MAX_AMPDU_QUEUES 8
  91. #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
  92. #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
  93. /* txpriorities are mapped with hw queues.
  94. * Each hw queue has a txpriority.
  95. */
  96. #define TOTAL_HW_TX_QUEUES 8
  97. /* Each HW queue can have one AMPDU stream.
  98. * But, because one of the hw queue is reserved,
  99. * maximum AMPDU queues that can be created are
  100. * one short of total tx queues.
  101. */
  102. #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1)
  103. struct rxd_ops {
  104. int rxd_size;
  105. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  106. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  107. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  108. __le16 *qos, s8 *noise);
  109. };
  110. struct mwl8k_device_info {
  111. char *part_name;
  112. char *helper_image;
  113. char *fw_image_sta;
  114. char *fw_image_ap;
  115. struct rxd_ops *ap_rxd_ops;
  116. u32 fw_api_ap;
  117. };
  118. struct mwl8k_rx_queue {
  119. int rxd_count;
  120. /* hw receives here */
  121. int head;
  122. /* refill descs here */
  123. int tail;
  124. void *rxd;
  125. dma_addr_t rxd_dma;
  126. struct {
  127. struct sk_buff *skb;
  128. DEFINE_DMA_UNMAP_ADDR(dma);
  129. } *buf;
  130. };
  131. struct mwl8k_tx_queue {
  132. /* hw transmits here */
  133. int head;
  134. /* sw appends here */
  135. int tail;
  136. unsigned int len;
  137. struct mwl8k_tx_desc *txd;
  138. dma_addr_t txd_dma;
  139. struct sk_buff **skb;
  140. };
  141. enum {
  142. AMPDU_NO_STREAM,
  143. AMPDU_STREAM_NEW,
  144. AMPDU_STREAM_IN_PROGRESS,
  145. AMPDU_STREAM_ACTIVE,
  146. };
  147. struct mwl8k_ampdu_stream {
  148. struct ieee80211_sta *sta;
  149. u8 tid;
  150. u8 state;
  151. u8 idx;
  152. };
  153. struct mwl8k_priv {
  154. struct ieee80211_hw *hw;
  155. struct pci_dev *pdev;
  156. int irq;
  157. struct mwl8k_device_info *device_info;
  158. void __iomem *sram;
  159. void __iomem *regs;
  160. /* firmware */
  161. const struct firmware *fw_helper;
  162. const struct firmware *fw_ucode;
  163. /* hardware/firmware parameters */
  164. bool ap_fw;
  165. struct rxd_ops *rxd_ops;
  166. struct ieee80211_supported_band band_24;
  167. struct ieee80211_channel channels_24[14];
  168. struct ieee80211_rate rates_24[14];
  169. struct ieee80211_supported_band band_50;
  170. struct ieee80211_channel channels_50[4];
  171. struct ieee80211_rate rates_50[9];
  172. u32 ap_macids_supported;
  173. u32 sta_macids_supported;
  174. /* Ampdu stream information */
  175. u8 num_ampdu_queues;
  176. spinlock_t stream_lock;
  177. struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
  178. struct work_struct watchdog_ba_handle;
  179. /* firmware access */
  180. struct mutex fw_mutex;
  181. struct task_struct *fw_mutex_owner;
  182. struct task_struct *hw_restart_owner;
  183. int fw_mutex_depth;
  184. struct completion *hostcmd_wait;
  185. atomic_t watchdog_event_pending;
  186. /* lock held over TX and TX reap */
  187. spinlock_t tx_lock;
  188. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  189. struct completion *tx_wait;
  190. /* List of interfaces. */
  191. u32 macids_used;
  192. struct list_head vif_list;
  193. /* power management status cookie from firmware */
  194. u32 *cookie;
  195. dma_addr_t cookie_dma;
  196. u16 num_mcaddrs;
  197. u8 hw_rev;
  198. u32 fw_rev;
  199. /*
  200. * Running count of TX packets in flight, to avoid
  201. * iterating over the transmit rings each time.
  202. */
  203. int pending_tx_pkts;
  204. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  205. struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
  206. u32 txq_offset[MWL8K_MAX_TX_QUEUES];
  207. bool radio_on;
  208. bool radio_short_preamble;
  209. bool sniffer_enabled;
  210. bool wmm_enabled;
  211. /* XXX need to convert this to handle multiple interfaces */
  212. bool capture_beacon;
  213. u8 capture_bssid[ETH_ALEN];
  214. struct sk_buff *beacon_skb;
  215. /*
  216. * This FJ worker has to be global as it is scheduled from the
  217. * RX handler. At this point we don't know which interface it
  218. * belongs to until the list of bssids waiting to complete join
  219. * is checked.
  220. */
  221. struct work_struct finalize_join_worker;
  222. /* Tasklet to perform TX reclaim. */
  223. struct tasklet_struct poll_tx_task;
  224. /* Tasklet to perform RX. */
  225. struct tasklet_struct poll_rx_task;
  226. /* Most recently reported noise in dBm */
  227. s8 noise;
  228. /*
  229. * preserve the queue configurations so they can be restored if/when
  230. * the firmware image is swapped.
  231. */
  232. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
  233. /* To perform the task of reloading the firmware */
  234. struct work_struct fw_reload;
  235. bool hw_restart_in_progress;
  236. /* async firmware loading state */
  237. unsigned fw_state;
  238. char *fw_pref;
  239. char *fw_alt;
  240. struct completion firmware_loading_complete;
  241. /* bitmap of running BSSes */
  242. u32 running_bsses;
  243. };
  244. #define MAX_WEP_KEY_LEN 13
  245. #define NUM_WEP_KEYS 4
  246. /* Per interface specific private data */
  247. struct mwl8k_vif {
  248. struct list_head list;
  249. struct ieee80211_vif *vif;
  250. /* Firmware macid for this vif. */
  251. int macid;
  252. /* Non AMPDU sequence number assigned by driver. */
  253. u16 seqno;
  254. /* Saved WEP keys */
  255. struct {
  256. u8 enabled;
  257. u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
  258. } wep_key_conf[NUM_WEP_KEYS];
  259. /* BSSID */
  260. u8 bssid[ETH_ALEN];
  261. /* A flag to indicate is HW crypto is enabled for this bssid */
  262. bool is_hw_crypto_enabled;
  263. };
  264. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  265. #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
  266. struct tx_traffic_info {
  267. u32 start_time;
  268. u32 pkts;
  269. };
  270. #define MWL8K_MAX_TID 8
  271. struct mwl8k_sta {
  272. /* Index into station database. Returned by UPDATE_STADB. */
  273. u8 peer_id;
  274. u8 is_ampdu_allowed;
  275. struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
  276. };
  277. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  278. static const struct ieee80211_channel mwl8k_channels_24[] = {
  279. { .center_freq = 2412, .hw_value = 1, },
  280. { .center_freq = 2417, .hw_value = 2, },
  281. { .center_freq = 2422, .hw_value = 3, },
  282. { .center_freq = 2427, .hw_value = 4, },
  283. { .center_freq = 2432, .hw_value = 5, },
  284. { .center_freq = 2437, .hw_value = 6, },
  285. { .center_freq = 2442, .hw_value = 7, },
  286. { .center_freq = 2447, .hw_value = 8, },
  287. { .center_freq = 2452, .hw_value = 9, },
  288. { .center_freq = 2457, .hw_value = 10, },
  289. { .center_freq = 2462, .hw_value = 11, },
  290. { .center_freq = 2467, .hw_value = 12, },
  291. { .center_freq = 2472, .hw_value = 13, },
  292. { .center_freq = 2484, .hw_value = 14, },
  293. };
  294. static const struct ieee80211_rate mwl8k_rates_24[] = {
  295. { .bitrate = 10, .hw_value = 2, },
  296. { .bitrate = 20, .hw_value = 4, },
  297. { .bitrate = 55, .hw_value = 11, },
  298. { .bitrate = 110, .hw_value = 22, },
  299. { .bitrate = 220, .hw_value = 44, },
  300. { .bitrate = 60, .hw_value = 12, },
  301. { .bitrate = 90, .hw_value = 18, },
  302. { .bitrate = 120, .hw_value = 24, },
  303. { .bitrate = 180, .hw_value = 36, },
  304. { .bitrate = 240, .hw_value = 48, },
  305. { .bitrate = 360, .hw_value = 72, },
  306. { .bitrate = 480, .hw_value = 96, },
  307. { .bitrate = 540, .hw_value = 108, },
  308. { .bitrate = 720, .hw_value = 144, },
  309. };
  310. static const struct ieee80211_channel mwl8k_channels_50[] = {
  311. { .center_freq = 5180, .hw_value = 36, },
  312. { .center_freq = 5200, .hw_value = 40, },
  313. { .center_freq = 5220, .hw_value = 44, },
  314. { .center_freq = 5240, .hw_value = 48, },
  315. };
  316. static const struct ieee80211_rate mwl8k_rates_50[] = {
  317. { .bitrate = 60, .hw_value = 12, },
  318. { .bitrate = 90, .hw_value = 18, },
  319. { .bitrate = 120, .hw_value = 24, },
  320. { .bitrate = 180, .hw_value = 36, },
  321. { .bitrate = 240, .hw_value = 48, },
  322. { .bitrate = 360, .hw_value = 72, },
  323. { .bitrate = 480, .hw_value = 96, },
  324. { .bitrate = 540, .hw_value = 108, },
  325. { .bitrate = 720, .hw_value = 144, },
  326. };
  327. /* Set or get info from Firmware */
  328. #define MWL8K_CMD_GET 0x0000
  329. #define MWL8K_CMD_SET 0x0001
  330. #define MWL8K_CMD_SET_LIST 0x0002
  331. /* Firmware command codes */
  332. #define MWL8K_CMD_CODE_DNLD 0x0001
  333. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  334. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  335. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  336. #define MWL8K_CMD_GET_STAT 0x0014
  337. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  338. #define MWL8K_CMD_RF_TX_POWER 0x001e
  339. #define MWL8K_CMD_TX_POWER 0x001f
  340. #define MWL8K_CMD_RF_ANTENNA 0x0020
  341. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  342. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  343. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  344. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  345. #define MWL8K_CMD_SET_AID 0x010d
  346. #define MWL8K_CMD_SET_RATE 0x0110
  347. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  348. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  349. #define MWL8K_CMD_SET_SLOT 0x0114
  350. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  351. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  352. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  353. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  354. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  355. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  356. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  357. #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
  358. #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
  359. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  360. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  361. #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
  362. #define MWL8K_CMD_UPDATE_STADB 0x1123
  363. #define MWL8K_CMD_BASTREAM 0x1125
  364. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  365. {
  366. u16 command = le16_to_cpu(cmd);
  367. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  368. snprintf(buf, bufsize, "%s", #x);\
  369. return buf;\
  370. } while (0)
  371. switch (command & ~0x8000) {
  372. MWL8K_CMDNAME(CODE_DNLD);
  373. MWL8K_CMDNAME(GET_HW_SPEC);
  374. MWL8K_CMDNAME(SET_HW_SPEC);
  375. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  376. MWL8K_CMDNAME(GET_STAT);
  377. MWL8K_CMDNAME(RADIO_CONTROL);
  378. MWL8K_CMDNAME(RF_TX_POWER);
  379. MWL8K_CMDNAME(TX_POWER);
  380. MWL8K_CMDNAME(RF_ANTENNA);
  381. MWL8K_CMDNAME(SET_BEACON);
  382. MWL8K_CMDNAME(SET_PRE_SCAN);
  383. MWL8K_CMDNAME(SET_POST_SCAN);
  384. MWL8K_CMDNAME(SET_RF_CHANNEL);
  385. MWL8K_CMDNAME(SET_AID);
  386. MWL8K_CMDNAME(SET_RATE);
  387. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  388. MWL8K_CMDNAME(RTS_THRESHOLD);
  389. MWL8K_CMDNAME(SET_SLOT);
  390. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  391. MWL8K_CMDNAME(SET_WMM_MODE);
  392. MWL8K_CMDNAME(MIMO_CONFIG);
  393. MWL8K_CMDNAME(USE_FIXED_RATE);
  394. MWL8K_CMDNAME(ENABLE_SNIFFER);
  395. MWL8K_CMDNAME(SET_MAC_ADDR);
  396. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  397. MWL8K_CMDNAME(BSS_START);
  398. MWL8K_CMDNAME(SET_NEW_STN);
  399. MWL8K_CMDNAME(UPDATE_ENCRYPTION);
  400. MWL8K_CMDNAME(UPDATE_STADB);
  401. MWL8K_CMDNAME(BASTREAM);
  402. MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
  403. default:
  404. snprintf(buf, bufsize, "0x%x", cmd);
  405. }
  406. #undef MWL8K_CMDNAME
  407. return buf;
  408. }
  409. /* Hardware and firmware reset */
  410. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  411. {
  412. iowrite32(MWL8K_H2A_INT_RESET,
  413. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  414. iowrite32(MWL8K_H2A_INT_RESET,
  415. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  416. msleep(20);
  417. }
  418. /* Release fw image */
  419. static void mwl8k_release_fw(const struct firmware **fw)
  420. {
  421. if (*fw == NULL)
  422. return;
  423. release_firmware(*fw);
  424. *fw = NULL;
  425. }
  426. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  427. {
  428. mwl8k_release_fw(&priv->fw_ucode);
  429. mwl8k_release_fw(&priv->fw_helper);
  430. }
  431. /* states for asynchronous f/w loading */
  432. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  433. enum {
  434. FW_STATE_INIT = 0,
  435. FW_STATE_LOADING_PREF,
  436. FW_STATE_LOADING_ALT,
  437. FW_STATE_ERROR,
  438. };
  439. /* Request fw image */
  440. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  441. const char *fname, const struct firmware **fw,
  442. bool nowait)
  443. {
  444. /* release current image */
  445. if (*fw != NULL)
  446. mwl8k_release_fw(fw);
  447. if (nowait)
  448. return request_firmware_nowait(THIS_MODULE, 1, fname,
  449. &priv->pdev->dev, GFP_KERNEL,
  450. priv, mwl8k_fw_state_machine);
  451. else
  452. return request_firmware(fw, fname, &priv->pdev->dev);
  453. }
  454. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  455. bool nowait)
  456. {
  457. struct mwl8k_device_info *di = priv->device_info;
  458. int rc;
  459. if (di->helper_image != NULL) {
  460. if (nowait)
  461. rc = mwl8k_request_fw(priv, di->helper_image,
  462. &priv->fw_helper, true);
  463. else
  464. rc = mwl8k_request_fw(priv, di->helper_image,
  465. &priv->fw_helper, false);
  466. if (rc)
  467. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  468. pci_name(priv->pdev), di->helper_image);
  469. if (rc || nowait)
  470. return rc;
  471. }
  472. if (nowait) {
  473. /*
  474. * if we get here, no helper image is needed. Skip the
  475. * FW_STATE_INIT state.
  476. */
  477. priv->fw_state = FW_STATE_LOADING_PREF;
  478. rc = mwl8k_request_fw(priv, fw_image,
  479. &priv->fw_ucode,
  480. true);
  481. } else
  482. rc = mwl8k_request_fw(priv, fw_image,
  483. &priv->fw_ucode, false);
  484. if (rc) {
  485. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  486. pci_name(priv->pdev), fw_image);
  487. mwl8k_release_fw(&priv->fw_helper);
  488. return rc;
  489. }
  490. return 0;
  491. }
  492. struct mwl8k_cmd_pkt {
  493. __le16 code;
  494. __le16 length;
  495. __u8 seq_num;
  496. __u8 macid;
  497. __le16 result;
  498. char payload[0];
  499. } __packed;
  500. /*
  501. * Firmware loading.
  502. */
  503. static int
  504. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  505. {
  506. void __iomem *regs = priv->regs;
  507. dma_addr_t dma_addr;
  508. int loops;
  509. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  510. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  511. return -ENOMEM;
  512. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  513. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  514. iowrite32(MWL8K_H2A_INT_DOORBELL,
  515. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  516. iowrite32(MWL8K_H2A_INT_DUMMY,
  517. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  518. loops = 1000;
  519. do {
  520. u32 int_code;
  521. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  522. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  523. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  524. break;
  525. }
  526. cond_resched();
  527. udelay(1);
  528. } while (--loops);
  529. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  530. return loops ? 0 : -ETIMEDOUT;
  531. }
  532. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  533. const u8 *data, size_t length)
  534. {
  535. struct mwl8k_cmd_pkt *cmd;
  536. int done;
  537. int rc = 0;
  538. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  539. if (cmd == NULL)
  540. return -ENOMEM;
  541. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  542. cmd->seq_num = 0;
  543. cmd->macid = 0;
  544. cmd->result = 0;
  545. done = 0;
  546. while (length) {
  547. int block_size = length > 256 ? 256 : length;
  548. memcpy(cmd->payload, data + done, block_size);
  549. cmd->length = cpu_to_le16(block_size);
  550. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  551. sizeof(*cmd) + block_size);
  552. if (rc)
  553. break;
  554. done += block_size;
  555. length -= block_size;
  556. }
  557. if (!rc) {
  558. cmd->length = 0;
  559. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  560. }
  561. kfree(cmd);
  562. return rc;
  563. }
  564. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  565. const u8 *data, size_t length)
  566. {
  567. unsigned char *buffer;
  568. int may_continue, rc = 0;
  569. u32 done, prev_block_size;
  570. buffer = kmalloc(1024, GFP_KERNEL);
  571. if (buffer == NULL)
  572. return -ENOMEM;
  573. done = 0;
  574. prev_block_size = 0;
  575. may_continue = 1000;
  576. while (may_continue > 0) {
  577. u32 block_size;
  578. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  579. if (block_size & 1) {
  580. block_size &= ~1;
  581. may_continue--;
  582. } else {
  583. done += prev_block_size;
  584. length -= prev_block_size;
  585. }
  586. if (block_size > 1024 || block_size > length) {
  587. rc = -EOVERFLOW;
  588. break;
  589. }
  590. if (length == 0) {
  591. rc = 0;
  592. break;
  593. }
  594. if (block_size == 0) {
  595. rc = -EPROTO;
  596. may_continue--;
  597. udelay(1);
  598. continue;
  599. }
  600. prev_block_size = block_size;
  601. memcpy(buffer, data + done, block_size);
  602. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  603. if (rc)
  604. break;
  605. }
  606. if (!rc && length != 0)
  607. rc = -EREMOTEIO;
  608. kfree(buffer);
  609. return rc;
  610. }
  611. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  612. {
  613. struct mwl8k_priv *priv = hw->priv;
  614. const struct firmware *fw = priv->fw_ucode;
  615. int rc;
  616. int loops;
  617. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  618. const struct firmware *helper = priv->fw_helper;
  619. if (helper == NULL) {
  620. printk(KERN_ERR "%s: helper image needed but none "
  621. "given\n", pci_name(priv->pdev));
  622. return -EINVAL;
  623. }
  624. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  625. if (rc) {
  626. printk(KERN_ERR "%s: unable to load firmware "
  627. "helper image\n", pci_name(priv->pdev));
  628. return rc;
  629. }
  630. msleep(20);
  631. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  632. } else {
  633. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  634. }
  635. if (rc) {
  636. printk(KERN_ERR "%s: unable to load firmware image\n",
  637. pci_name(priv->pdev));
  638. return rc;
  639. }
  640. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  641. loops = 500000;
  642. do {
  643. u32 ready_code;
  644. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  645. if (ready_code == MWL8K_FWAP_READY) {
  646. priv->ap_fw = true;
  647. break;
  648. } else if (ready_code == MWL8K_FWSTA_READY) {
  649. priv->ap_fw = false;
  650. break;
  651. }
  652. cond_resched();
  653. udelay(1);
  654. } while (--loops);
  655. return loops ? 0 : -ETIMEDOUT;
  656. }
  657. /* DMA header used by firmware and hardware. */
  658. struct mwl8k_dma_data {
  659. __le16 fwlen;
  660. struct ieee80211_hdr wh;
  661. char data[0];
  662. } __packed;
  663. /* Routines to add/remove DMA header from skb. */
  664. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  665. {
  666. struct mwl8k_dma_data *tr;
  667. int hdrlen;
  668. tr = (struct mwl8k_dma_data *)skb->data;
  669. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  670. if (hdrlen != sizeof(tr->wh)) {
  671. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  672. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  673. *((__le16 *)(tr->data - 2)) = qos;
  674. } else {
  675. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  676. }
  677. }
  678. if (hdrlen != sizeof(*tr))
  679. skb_pull(skb, sizeof(*tr) - hdrlen);
  680. }
  681. #define REDUCED_TX_HEADROOM 8
  682. static void
  683. mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
  684. int head_pad, int tail_pad)
  685. {
  686. struct ieee80211_hdr *wh;
  687. int hdrlen;
  688. int reqd_hdrlen;
  689. struct mwl8k_dma_data *tr;
  690. /*
  691. * Add a firmware DMA header; the firmware requires that we
  692. * present a 2-byte payload length followed by a 4-address
  693. * header (without QoS field), followed (optionally) by any
  694. * WEP/ExtIV header (but only filled in for CCMP).
  695. */
  696. wh = (struct ieee80211_hdr *)skb->data;
  697. hdrlen = ieee80211_hdrlen(wh->frame_control);
  698. /*
  699. * Check if skb_resize is required because of
  700. * tx_headroom adjustment.
  701. */
  702. if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
  703. + REDUCED_TX_HEADROOM))) {
  704. if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
  705. wiphy_err(priv->hw->wiphy,
  706. "Failed to reallocate TX buffer\n");
  707. return;
  708. }
  709. skb->truesize += REDUCED_TX_HEADROOM;
  710. }
  711. reqd_hdrlen = sizeof(*tr) + head_pad;
  712. if (hdrlen != reqd_hdrlen)
  713. skb_push(skb, reqd_hdrlen - hdrlen);
  714. if (ieee80211_is_data_qos(wh->frame_control))
  715. hdrlen -= IEEE80211_QOS_CTL_LEN;
  716. tr = (struct mwl8k_dma_data *)skb->data;
  717. if (wh != &tr->wh)
  718. memmove(&tr->wh, wh, hdrlen);
  719. if (hdrlen != sizeof(tr->wh))
  720. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  721. /*
  722. * Firmware length is the length of the fully formed "802.11
  723. * payload". That is, everything except for the 802.11 header.
  724. * This includes all crypto material including the MIC.
  725. */
  726. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
  727. }
  728. static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
  729. struct sk_buff *skb)
  730. {
  731. struct ieee80211_hdr *wh;
  732. struct ieee80211_tx_info *tx_info;
  733. struct ieee80211_key_conf *key_conf;
  734. int data_pad;
  735. int head_pad = 0;
  736. wh = (struct ieee80211_hdr *)skb->data;
  737. tx_info = IEEE80211_SKB_CB(skb);
  738. key_conf = NULL;
  739. if (ieee80211_is_data(wh->frame_control))
  740. key_conf = tx_info->control.hw_key;
  741. /*
  742. * Make sure the packet header is in the DMA header format (4-address
  743. * without QoS), and add head & tail padding when HW crypto is enabled.
  744. *
  745. * We have the following trailer padding requirements:
  746. * - WEP: 4 trailer bytes (ICV)
  747. * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
  748. * - CCMP: 8 trailer bytes (MIC)
  749. */
  750. data_pad = 0;
  751. if (key_conf != NULL) {
  752. head_pad = key_conf->iv_len;
  753. switch (key_conf->cipher) {
  754. case WLAN_CIPHER_SUITE_WEP40:
  755. case WLAN_CIPHER_SUITE_WEP104:
  756. data_pad = 4;
  757. break;
  758. case WLAN_CIPHER_SUITE_TKIP:
  759. data_pad = 12;
  760. break;
  761. case WLAN_CIPHER_SUITE_CCMP:
  762. data_pad = 8;
  763. break;
  764. }
  765. }
  766. mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
  767. }
  768. /*
  769. * Packet reception for 88w8366 AP firmware.
  770. */
  771. struct mwl8k_rxd_8366_ap {
  772. __le16 pkt_len;
  773. __u8 sq2;
  774. __u8 rate;
  775. __le32 pkt_phys_addr;
  776. __le32 next_rxd_phys_addr;
  777. __le16 qos_control;
  778. __le16 htsig2;
  779. __le32 hw_rssi_info;
  780. __le32 hw_noise_floor_info;
  781. __u8 noise_floor;
  782. __u8 pad0[3];
  783. __u8 rssi;
  784. __u8 rx_status;
  785. __u8 channel;
  786. __u8 rx_ctrl;
  787. } __packed;
  788. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  789. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  790. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  791. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  792. /* 8366 AP rx_status bits */
  793. #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
  794. #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
  795. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
  796. #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
  797. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
  798. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  799. {
  800. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  801. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  802. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  803. }
  804. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  805. {
  806. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  807. rxd->pkt_len = cpu_to_le16(len);
  808. rxd->pkt_phys_addr = cpu_to_le32(addr);
  809. wmb();
  810. rxd->rx_ctrl = 0;
  811. }
  812. static int
  813. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  814. __le16 *qos, s8 *noise)
  815. {
  816. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  817. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  818. return -1;
  819. rmb();
  820. memset(status, 0, sizeof(*status));
  821. status->signal = -rxd->rssi;
  822. *noise = -rxd->noise_floor;
  823. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  824. status->flag |= RX_FLAG_HT;
  825. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  826. status->flag |= RX_FLAG_40MHZ;
  827. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  828. } else {
  829. int i;
  830. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  831. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  832. status->rate_idx = i;
  833. break;
  834. }
  835. }
  836. }
  837. if (rxd->channel > 14) {
  838. status->band = IEEE80211_BAND_5GHZ;
  839. if (!(status->flag & RX_FLAG_HT))
  840. status->rate_idx -= 5;
  841. } else {
  842. status->band = IEEE80211_BAND_2GHZ;
  843. }
  844. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  845. status->band);
  846. *qos = rxd->qos_control;
  847. if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
  848. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
  849. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
  850. status->flag |= RX_FLAG_MMIC_ERROR;
  851. return le16_to_cpu(rxd->pkt_len);
  852. }
  853. static struct rxd_ops rxd_8366_ap_ops = {
  854. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  855. .rxd_init = mwl8k_rxd_8366_ap_init,
  856. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  857. .rxd_process = mwl8k_rxd_8366_ap_process,
  858. };
  859. /*
  860. * Packet reception for STA firmware.
  861. */
  862. struct mwl8k_rxd_sta {
  863. __le16 pkt_len;
  864. __u8 link_quality;
  865. __u8 noise_level;
  866. __le32 pkt_phys_addr;
  867. __le32 next_rxd_phys_addr;
  868. __le16 qos_control;
  869. __le16 rate_info;
  870. __le32 pad0[4];
  871. __u8 rssi;
  872. __u8 channel;
  873. __le16 pad1;
  874. __u8 rx_ctrl;
  875. __u8 rx_status;
  876. __u8 pad2[2];
  877. } __packed;
  878. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  879. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  880. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  881. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  882. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  883. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  884. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  885. #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
  886. /* ICV=0 or MIC=1 */
  887. #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
  888. /* Key is uploaded only in failure case */
  889. #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
  890. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  891. {
  892. struct mwl8k_rxd_sta *rxd = _rxd;
  893. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  894. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  895. }
  896. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  897. {
  898. struct mwl8k_rxd_sta *rxd = _rxd;
  899. rxd->pkt_len = cpu_to_le16(len);
  900. rxd->pkt_phys_addr = cpu_to_le32(addr);
  901. wmb();
  902. rxd->rx_ctrl = 0;
  903. }
  904. static int
  905. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  906. __le16 *qos, s8 *noise)
  907. {
  908. struct mwl8k_rxd_sta *rxd = _rxd;
  909. u16 rate_info;
  910. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  911. return -1;
  912. rmb();
  913. rate_info = le16_to_cpu(rxd->rate_info);
  914. memset(status, 0, sizeof(*status));
  915. status->signal = -rxd->rssi;
  916. *noise = -rxd->noise_level;
  917. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  918. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  919. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  920. status->flag |= RX_FLAG_SHORTPRE;
  921. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  922. status->flag |= RX_FLAG_40MHZ;
  923. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  924. status->flag |= RX_FLAG_SHORT_GI;
  925. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  926. status->flag |= RX_FLAG_HT;
  927. if (rxd->channel > 14) {
  928. status->band = IEEE80211_BAND_5GHZ;
  929. if (!(status->flag & RX_FLAG_HT))
  930. status->rate_idx -= 5;
  931. } else {
  932. status->band = IEEE80211_BAND_2GHZ;
  933. }
  934. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  935. status->band);
  936. *qos = rxd->qos_control;
  937. if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
  938. (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
  939. status->flag |= RX_FLAG_MMIC_ERROR;
  940. return le16_to_cpu(rxd->pkt_len);
  941. }
  942. static struct rxd_ops rxd_sta_ops = {
  943. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  944. .rxd_init = mwl8k_rxd_sta_init,
  945. .rxd_refill = mwl8k_rxd_sta_refill,
  946. .rxd_process = mwl8k_rxd_sta_process,
  947. };
  948. #define MWL8K_RX_DESCS 256
  949. #define MWL8K_RX_MAXSZ 3800
  950. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  951. {
  952. struct mwl8k_priv *priv = hw->priv;
  953. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  954. int size;
  955. int i;
  956. rxq->rxd_count = 0;
  957. rxq->head = 0;
  958. rxq->tail = 0;
  959. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  960. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  961. if (rxq->rxd == NULL) {
  962. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  963. return -ENOMEM;
  964. }
  965. memset(rxq->rxd, 0, size);
  966. rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
  967. if (rxq->buf == NULL) {
  968. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  969. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  970. return -ENOMEM;
  971. }
  972. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  973. int desc_size;
  974. void *rxd;
  975. int nexti;
  976. dma_addr_t next_dma_addr;
  977. desc_size = priv->rxd_ops->rxd_size;
  978. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  979. nexti = i + 1;
  980. if (nexti == MWL8K_RX_DESCS)
  981. nexti = 0;
  982. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  983. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  984. }
  985. return 0;
  986. }
  987. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  988. {
  989. struct mwl8k_priv *priv = hw->priv;
  990. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  991. int refilled;
  992. refilled = 0;
  993. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  994. struct sk_buff *skb;
  995. dma_addr_t addr;
  996. int rx;
  997. void *rxd;
  998. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  999. if (skb == NULL)
  1000. break;
  1001. addr = pci_map_single(priv->pdev, skb->data,
  1002. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  1003. rxq->rxd_count++;
  1004. rx = rxq->tail++;
  1005. if (rxq->tail == MWL8K_RX_DESCS)
  1006. rxq->tail = 0;
  1007. rxq->buf[rx].skb = skb;
  1008. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  1009. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  1010. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  1011. refilled++;
  1012. }
  1013. return refilled;
  1014. }
  1015. /* Must be called only when the card's reception is completely halted */
  1016. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  1017. {
  1018. struct mwl8k_priv *priv = hw->priv;
  1019. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1020. int i;
  1021. if (rxq->rxd == NULL)
  1022. return;
  1023. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  1024. if (rxq->buf[i].skb != NULL) {
  1025. pci_unmap_single(priv->pdev,
  1026. dma_unmap_addr(&rxq->buf[i], dma),
  1027. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1028. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  1029. kfree_skb(rxq->buf[i].skb);
  1030. rxq->buf[i].skb = NULL;
  1031. }
  1032. }
  1033. kfree(rxq->buf);
  1034. rxq->buf = NULL;
  1035. pci_free_consistent(priv->pdev,
  1036. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  1037. rxq->rxd, rxq->rxd_dma);
  1038. rxq->rxd = NULL;
  1039. }
  1040. /*
  1041. * Scan a list of BSSIDs to process for finalize join.
  1042. * Allows for extension to process multiple BSSIDs.
  1043. */
  1044. static inline int
  1045. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  1046. {
  1047. return priv->capture_beacon &&
  1048. ieee80211_is_beacon(wh->frame_control) &&
  1049. ether_addr_equal(wh->addr3, priv->capture_bssid);
  1050. }
  1051. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  1052. struct sk_buff *skb)
  1053. {
  1054. struct mwl8k_priv *priv = hw->priv;
  1055. priv->capture_beacon = false;
  1056. memset(priv->capture_bssid, 0, ETH_ALEN);
  1057. /*
  1058. * Use GFP_ATOMIC as rxq_process is called from
  1059. * the primary interrupt handler, memory allocation call
  1060. * must not sleep.
  1061. */
  1062. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  1063. if (priv->beacon_skb != NULL)
  1064. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  1065. }
  1066. static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
  1067. u8 *bssid)
  1068. {
  1069. struct mwl8k_vif *mwl8k_vif;
  1070. list_for_each_entry(mwl8k_vif,
  1071. vif_list, list) {
  1072. if (memcmp(bssid, mwl8k_vif->bssid,
  1073. ETH_ALEN) == 0)
  1074. return mwl8k_vif;
  1075. }
  1076. return NULL;
  1077. }
  1078. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  1079. {
  1080. struct mwl8k_priv *priv = hw->priv;
  1081. struct mwl8k_vif *mwl8k_vif = NULL;
  1082. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1083. int processed;
  1084. processed = 0;
  1085. while (rxq->rxd_count && limit--) {
  1086. struct sk_buff *skb;
  1087. void *rxd;
  1088. int pkt_len;
  1089. struct ieee80211_rx_status status;
  1090. struct ieee80211_hdr *wh;
  1091. __le16 qos;
  1092. skb = rxq->buf[rxq->head].skb;
  1093. if (skb == NULL)
  1094. break;
  1095. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  1096. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  1097. &priv->noise);
  1098. if (pkt_len < 0)
  1099. break;
  1100. rxq->buf[rxq->head].skb = NULL;
  1101. pci_unmap_single(priv->pdev,
  1102. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  1103. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1104. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  1105. rxq->head++;
  1106. if (rxq->head == MWL8K_RX_DESCS)
  1107. rxq->head = 0;
  1108. rxq->rxd_count--;
  1109. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1110. /*
  1111. * Check for a pending join operation. Save a
  1112. * copy of the beacon and schedule a tasklet to
  1113. * send a FINALIZE_JOIN command to the firmware.
  1114. */
  1115. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  1116. mwl8k_save_beacon(hw, skb);
  1117. if (ieee80211_has_protected(wh->frame_control)) {
  1118. /* Check if hw crypto has been enabled for
  1119. * this bss. If yes, set the status flags
  1120. * accordingly
  1121. */
  1122. mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
  1123. wh->addr1);
  1124. if (mwl8k_vif != NULL &&
  1125. mwl8k_vif->is_hw_crypto_enabled) {
  1126. /*
  1127. * When MMIC ERROR is encountered
  1128. * by the firmware, payload is
  1129. * dropped and only 32 bytes of
  1130. * mwl8k Firmware header is sent
  1131. * to the host.
  1132. *
  1133. * We need to add four bytes of
  1134. * key information. In it
  1135. * MAC80211 expects keyidx set to
  1136. * 0 for triggering Counter
  1137. * Measure of MMIC failure.
  1138. */
  1139. if (status.flag & RX_FLAG_MMIC_ERROR) {
  1140. struct mwl8k_dma_data *tr;
  1141. tr = (struct mwl8k_dma_data *)skb->data;
  1142. memset((void *)&(tr->data), 0, 4);
  1143. pkt_len += 4;
  1144. }
  1145. if (!ieee80211_is_auth(wh->frame_control))
  1146. status.flag |= RX_FLAG_IV_STRIPPED |
  1147. RX_FLAG_DECRYPTED |
  1148. RX_FLAG_MMIC_STRIPPED;
  1149. }
  1150. }
  1151. skb_put(skb, pkt_len);
  1152. mwl8k_remove_dma_header(skb, qos);
  1153. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  1154. ieee80211_rx_irqsafe(hw, skb);
  1155. processed++;
  1156. }
  1157. return processed;
  1158. }
  1159. /*
  1160. * Packet transmission.
  1161. */
  1162. #define MWL8K_TXD_STATUS_OK 0x00000001
  1163. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  1164. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  1165. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  1166. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  1167. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  1168. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  1169. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  1170. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  1171. #define MWL8K_QOS_EOSP 0x0010
  1172. struct mwl8k_tx_desc {
  1173. __le32 status;
  1174. __u8 data_rate;
  1175. __u8 tx_priority;
  1176. __le16 qos_control;
  1177. __le32 pkt_phys_addr;
  1178. __le16 pkt_len;
  1179. __u8 dest_MAC_addr[ETH_ALEN];
  1180. __le32 next_txd_phys_addr;
  1181. __le32 timestamp;
  1182. __le16 rate_info;
  1183. __u8 peer_id;
  1184. __u8 tx_frag_cnt;
  1185. } __packed;
  1186. #define MWL8K_TX_DESCS 128
  1187. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  1188. {
  1189. struct mwl8k_priv *priv = hw->priv;
  1190. struct mwl8k_tx_queue *txq = priv->txq + index;
  1191. int size;
  1192. int i;
  1193. txq->len = 0;
  1194. txq->head = 0;
  1195. txq->tail = 0;
  1196. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  1197. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  1198. if (txq->txd == NULL) {
  1199. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  1200. return -ENOMEM;
  1201. }
  1202. memset(txq->txd, 0, size);
  1203. txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
  1204. if (txq->skb == NULL) {
  1205. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  1206. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1207. return -ENOMEM;
  1208. }
  1209. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1210. struct mwl8k_tx_desc *tx_desc;
  1211. int nexti;
  1212. tx_desc = txq->txd + i;
  1213. nexti = (i + 1) % MWL8K_TX_DESCS;
  1214. tx_desc->status = 0;
  1215. tx_desc->next_txd_phys_addr =
  1216. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1217. }
  1218. return 0;
  1219. }
  1220. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1221. {
  1222. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1223. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1224. iowrite32(MWL8K_H2A_INT_DUMMY,
  1225. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1226. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1227. }
  1228. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1229. {
  1230. struct mwl8k_priv *priv = hw->priv;
  1231. int i;
  1232. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  1233. struct mwl8k_tx_queue *txq = priv->txq + i;
  1234. int fw_owned = 0;
  1235. int drv_owned = 0;
  1236. int unused = 0;
  1237. int desc;
  1238. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1239. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1240. u32 status;
  1241. status = le32_to_cpu(tx_desc->status);
  1242. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1243. fw_owned++;
  1244. else
  1245. drv_owned++;
  1246. if (tx_desc->pkt_len == 0)
  1247. unused++;
  1248. }
  1249. wiphy_err(hw->wiphy,
  1250. "txq[%d] len=%d head=%d tail=%d "
  1251. "fw_owned=%d drv_owned=%d unused=%d\n",
  1252. i,
  1253. txq->len, txq->head, txq->tail,
  1254. fw_owned, drv_owned, unused);
  1255. }
  1256. }
  1257. /*
  1258. * Must be called with priv->fw_mutex held and tx queues stopped.
  1259. */
  1260. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1261. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1262. {
  1263. struct mwl8k_priv *priv = hw->priv;
  1264. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1265. int retry;
  1266. int rc;
  1267. might_sleep();
  1268. /* Since fw restart is in progress, allow only the firmware
  1269. * commands from the restart code and block the other
  1270. * commands since they are going to fail in any case since
  1271. * the firmware has crashed
  1272. */
  1273. if (priv->hw_restart_in_progress) {
  1274. if (priv->hw_restart_owner == current)
  1275. return 0;
  1276. else
  1277. return -EBUSY;
  1278. }
  1279. if (atomic_read(&priv->watchdog_event_pending))
  1280. return 0;
  1281. /*
  1282. * The TX queues are stopped at this point, so this test
  1283. * doesn't need to take ->tx_lock.
  1284. */
  1285. if (!priv->pending_tx_pkts)
  1286. return 0;
  1287. retry = 0;
  1288. rc = 0;
  1289. spin_lock_bh(&priv->tx_lock);
  1290. priv->tx_wait = &tx_wait;
  1291. while (!rc) {
  1292. int oldcount;
  1293. unsigned long timeout;
  1294. oldcount = priv->pending_tx_pkts;
  1295. spin_unlock_bh(&priv->tx_lock);
  1296. timeout = wait_for_completion_timeout(&tx_wait,
  1297. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1298. if (atomic_read(&priv->watchdog_event_pending)) {
  1299. spin_lock_bh(&priv->tx_lock);
  1300. priv->tx_wait = NULL;
  1301. spin_unlock_bh(&priv->tx_lock);
  1302. return 0;
  1303. }
  1304. spin_lock_bh(&priv->tx_lock);
  1305. if (timeout) {
  1306. WARN_ON(priv->pending_tx_pkts);
  1307. if (retry)
  1308. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1309. break;
  1310. }
  1311. if (priv->pending_tx_pkts < oldcount) {
  1312. wiphy_notice(hw->wiphy,
  1313. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1314. oldcount, priv->pending_tx_pkts);
  1315. retry = 1;
  1316. continue;
  1317. }
  1318. priv->tx_wait = NULL;
  1319. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1320. MWL8K_TX_WAIT_TIMEOUT_MS);
  1321. mwl8k_dump_tx_rings(hw);
  1322. priv->hw_restart_in_progress = true;
  1323. ieee80211_queue_work(hw, &priv->fw_reload);
  1324. rc = -ETIMEDOUT;
  1325. }
  1326. priv->tx_wait = NULL;
  1327. spin_unlock_bh(&priv->tx_lock);
  1328. return rc;
  1329. }
  1330. #define MWL8K_TXD_SUCCESS(status) \
  1331. ((status) & (MWL8K_TXD_STATUS_OK | \
  1332. MWL8K_TXD_STATUS_OK_RETRY | \
  1333. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1334. static int mwl8k_tid_queue_mapping(u8 tid)
  1335. {
  1336. BUG_ON(tid > 7);
  1337. switch (tid) {
  1338. case 0:
  1339. case 3:
  1340. return IEEE80211_AC_BE;
  1341. break;
  1342. case 1:
  1343. case 2:
  1344. return IEEE80211_AC_BK;
  1345. break;
  1346. case 4:
  1347. case 5:
  1348. return IEEE80211_AC_VI;
  1349. break;
  1350. case 6:
  1351. case 7:
  1352. return IEEE80211_AC_VO;
  1353. break;
  1354. default:
  1355. return -1;
  1356. break;
  1357. }
  1358. }
  1359. /* The firmware will fill in the rate information
  1360. * for each packet that gets queued in the hardware
  1361. * and these macros will interpret that info.
  1362. */
  1363. #define RI_FORMAT(a) (a & 0x0001)
  1364. #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
  1365. static int
  1366. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1367. {
  1368. struct mwl8k_priv *priv = hw->priv;
  1369. struct mwl8k_tx_queue *txq = priv->txq + index;
  1370. int processed;
  1371. processed = 0;
  1372. while (txq->len > 0 && limit--) {
  1373. int tx;
  1374. struct mwl8k_tx_desc *tx_desc;
  1375. unsigned long addr;
  1376. int size;
  1377. struct sk_buff *skb;
  1378. struct ieee80211_tx_info *info;
  1379. u32 status;
  1380. struct ieee80211_sta *sta;
  1381. struct mwl8k_sta *sta_info = NULL;
  1382. u16 rate_info;
  1383. struct ieee80211_hdr *wh;
  1384. tx = txq->head;
  1385. tx_desc = txq->txd + tx;
  1386. status = le32_to_cpu(tx_desc->status);
  1387. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1388. if (!force)
  1389. break;
  1390. tx_desc->status &=
  1391. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1392. }
  1393. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1394. BUG_ON(txq->len == 0);
  1395. txq->len--;
  1396. priv->pending_tx_pkts--;
  1397. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1398. size = le16_to_cpu(tx_desc->pkt_len);
  1399. skb = txq->skb[tx];
  1400. txq->skb[tx] = NULL;
  1401. BUG_ON(skb == NULL);
  1402. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1403. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1404. wh = (struct ieee80211_hdr *) skb->data;
  1405. /* Mark descriptor as unused */
  1406. tx_desc->pkt_phys_addr = 0;
  1407. tx_desc->pkt_len = 0;
  1408. info = IEEE80211_SKB_CB(skb);
  1409. if (ieee80211_is_data(wh->frame_control)) {
  1410. rcu_read_lock();
  1411. sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
  1412. wh->addr2);
  1413. if (sta) {
  1414. sta_info = MWL8K_STA(sta);
  1415. BUG_ON(sta_info == NULL);
  1416. rate_info = le16_to_cpu(tx_desc->rate_info);
  1417. /* If rate is < 6.5 Mpbs for an ht station
  1418. * do not form an ampdu. If the station is a
  1419. * legacy station (format = 0), do not form an
  1420. * ampdu
  1421. */
  1422. if (RI_RATE_ID_MCS(rate_info) < 1 ||
  1423. RI_FORMAT(rate_info) == 0) {
  1424. sta_info->is_ampdu_allowed = false;
  1425. } else {
  1426. sta_info->is_ampdu_allowed = true;
  1427. }
  1428. }
  1429. rcu_read_unlock();
  1430. }
  1431. ieee80211_tx_info_clear_status(info);
  1432. /* Rate control is happening in the firmware.
  1433. * Ensure no tx rate is being reported.
  1434. */
  1435. info->status.rates[0].idx = -1;
  1436. info->status.rates[0].count = 1;
  1437. if (MWL8K_TXD_SUCCESS(status))
  1438. info->flags |= IEEE80211_TX_STAT_ACK;
  1439. ieee80211_tx_status_irqsafe(hw, skb);
  1440. processed++;
  1441. }
  1442. return processed;
  1443. }
  1444. /* must be called only when the card's transmit is completely halted */
  1445. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1446. {
  1447. struct mwl8k_priv *priv = hw->priv;
  1448. struct mwl8k_tx_queue *txq = priv->txq + index;
  1449. if (txq->txd == NULL)
  1450. return;
  1451. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1452. kfree(txq->skb);
  1453. txq->skb = NULL;
  1454. pci_free_consistent(priv->pdev,
  1455. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1456. txq->txd, txq->txd_dma);
  1457. txq->txd = NULL;
  1458. }
  1459. /* caller must hold priv->stream_lock when calling the stream functions */
  1460. static struct mwl8k_ampdu_stream *
  1461. mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
  1462. {
  1463. struct mwl8k_ampdu_stream *stream;
  1464. struct mwl8k_priv *priv = hw->priv;
  1465. int i;
  1466. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  1467. stream = &priv->ampdu[i];
  1468. if (stream->state == AMPDU_NO_STREAM) {
  1469. stream->sta = sta;
  1470. stream->state = AMPDU_STREAM_NEW;
  1471. stream->tid = tid;
  1472. stream->idx = i;
  1473. wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
  1474. sta->addr, tid);
  1475. return stream;
  1476. }
  1477. }
  1478. return NULL;
  1479. }
  1480. static int
  1481. mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1482. {
  1483. int ret;
  1484. /* if the stream has already been started, don't start it again */
  1485. if (stream->state != AMPDU_STREAM_NEW)
  1486. return 0;
  1487. ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
  1488. if (ret)
  1489. wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
  1490. "%d\n", stream->sta->addr, stream->tid, ret);
  1491. else
  1492. wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
  1493. stream->sta->addr, stream->tid);
  1494. return ret;
  1495. }
  1496. static void
  1497. mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1498. {
  1499. wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
  1500. stream->tid);
  1501. memset(stream, 0, sizeof(*stream));
  1502. }
  1503. static struct mwl8k_ampdu_stream *
  1504. mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
  1505. {
  1506. struct mwl8k_priv *priv = hw->priv;
  1507. int i;
  1508. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  1509. struct mwl8k_ampdu_stream *stream;
  1510. stream = &priv->ampdu[i];
  1511. if (stream->state == AMPDU_NO_STREAM)
  1512. continue;
  1513. if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
  1514. stream->tid == tid)
  1515. return stream;
  1516. }
  1517. return NULL;
  1518. }
  1519. #define MWL8K_AMPDU_PACKET_THRESHOLD 64
  1520. static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
  1521. {
  1522. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1523. struct tx_traffic_info *tx_stats;
  1524. BUG_ON(tid >= MWL8K_MAX_TID);
  1525. tx_stats = &sta_info->tx_stats[tid];
  1526. return sta_info->is_ampdu_allowed &&
  1527. tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
  1528. }
  1529. static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
  1530. {
  1531. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1532. struct tx_traffic_info *tx_stats;
  1533. BUG_ON(tid >= MWL8K_MAX_TID);
  1534. tx_stats = &sta_info->tx_stats[tid];
  1535. if (tx_stats->start_time == 0)
  1536. tx_stats->start_time = jiffies;
  1537. /* reset the packet count after each second elapses. If the number of
  1538. * packets ever exceeds the ampdu_min_traffic threshold, we will allow
  1539. * an ampdu stream to be started.
  1540. */
  1541. if (jiffies - tx_stats->start_time > HZ) {
  1542. tx_stats->pkts = 0;
  1543. tx_stats->start_time = 0;
  1544. } else
  1545. tx_stats->pkts++;
  1546. }
  1547. /* The hardware ampdu queues start from 5.
  1548. * txpriorities for ampdu queues are
  1549. * 5 6 7 0 1 2 3 4 ie., queue 5 is highest
  1550. * and queue 3 is lowest (queue 4 is reserved)
  1551. */
  1552. #define BA_QUEUE 5
  1553. static void
  1554. mwl8k_txq_xmit(struct ieee80211_hw *hw,
  1555. int index,
  1556. struct ieee80211_sta *sta,
  1557. struct sk_buff *skb)
  1558. {
  1559. struct mwl8k_priv *priv = hw->priv;
  1560. struct ieee80211_tx_info *tx_info;
  1561. struct mwl8k_vif *mwl8k_vif;
  1562. struct ieee80211_hdr *wh;
  1563. struct mwl8k_tx_queue *txq;
  1564. struct mwl8k_tx_desc *tx;
  1565. dma_addr_t dma;
  1566. u32 txstatus;
  1567. u8 txdatarate;
  1568. u16 qos;
  1569. int txpriority;
  1570. u8 tid = 0;
  1571. struct mwl8k_ampdu_stream *stream = NULL;
  1572. bool start_ba_session = false;
  1573. bool mgmtframe = false;
  1574. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
  1575. bool eapol_frame = false;
  1576. wh = (struct ieee80211_hdr *)skb->data;
  1577. if (ieee80211_is_data_qos(wh->frame_control))
  1578. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1579. else
  1580. qos = 0;
  1581. if (skb->protocol == cpu_to_be16(ETH_P_PAE))
  1582. eapol_frame = true;
  1583. if (ieee80211_is_mgmt(wh->frame_control))
  1584. mgmtframe = true;
  1585. if (priv->ap_fw)
  1586. mwl8k_encapsulate_tx_frame(priv, skb);
  1587. else
  1588. mwl8k_add_dma_header(priv, skb, 0, 0);
  1589. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1590. tx_info = IEEE80211_SKB_CB(skb);
  1591. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1592. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1593. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1594. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1595. mwl8k_vif->seqno += 0x10;
  1596. }
  1597. /* Setup firmware control bit fields for each frame type. */
  1598. txstatus = 0;
  1599. txdatarate = 0;
  1600. if (ieee80211_is_mgmt(wh->frame_control) ||
  1601. ieee80211_is_ctl(wh->frame_control)) {
  1602. txdatarate = 0;
  1603. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1604. } else if (ieee80211_is_data(wh->frame_control)) {
  1605. txdatarate = 1;
  1606. if (is_multicast_ether_addr(wh->addr1))
  1607. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1608. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1609. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1610. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1611. else
  1612. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1613. }
  1614. /* Queue ADDBA request in the respective data queue. While setting up
  1615. * the ampdu stream, mac80211 queues further packets for that
  1616. * particular ra/tid pair. However, packets piled up in the hardware
  1617. * for that ra/tid pair will still go out. ADDBA request and the
  1618. * related data packets going out from different queues asynchronously
  1619. * will cause a shift in the receiver window which might result in
  1620. * ampdu packets getting dropped at the receiver after the stream has
  1621. * been setup.
  1622. */
  1623. if (unlikely(ieee80211_is_action(wh->frame_control) &&
  1624. mgmt->u.action.category == WLAN_CATEGORY_BACK &&
  1625. mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
  1626. priv->ap_fw)) {
  1627. u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
  1628. tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
  1629. index = mwl8k_tid_queue_mapping(tid);
  1630. }
  1631. txpriority = index;
  1632. if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
  1633. ieee80211_is_data_qos(wh->frame_control)) {
  1634. tid = qos & 0xf;
  1635. mwl8k_tx_count_packet(sta, tid);
  1636. spin_lock(&priv->stream_lock);
  1637. stream = mwl8k_lookup_stream(hw, sta->addr, tid);
  1638. if (stream != NULL) {
  1639. if (stream->state == AMPDU_STREAM_ACTIVE) {
  1640. WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK));
  1641. txpriority = (BA_QUEUE + stream->idx) %
  1642. TOTAL_HW_TX_QUEUES;
  1643. if (stream->idx <= 1)
  1644. index = stream->idx +
  1645. MWL8K_TX_WMM_QUEUES;
  1646. } else if (stream->state == AMPDU_STREAM_NEW) {
  1647. /* We get here if the driver sends us packets
  1648. * after we've initiated a stream, but before
  1649. * our ampdu_action routine has been called
  1650. * with IEEE80211_AMPDU_TX_START to get the SSN
  1651. * for the ADDBA request. So this packet can
  1652. * go out with no risk of sequence number
  1653. * mismatch. No special handling is required.
  1654. */
  1655. } else {
  1656. /* Drop packets that would go out after the
  1657. * ADDBA request was sent but before the ADDBA
  1658. * response is received. If we don't do this,
  1659. * the recipient would probably receive it
  1660. * after the ADDBA request with SSN 0. This
  1661. * will cause the recipient's BA receive window
  1662. * to shift, which would cause the subsequent
  1663. * packets in the BA stream to be discarded.
  1664. * mac80211 queues our packets for us in this
  1665. * case, so this is really just a safety check.
  1666. */
  1667. wiphy_warn(hw->wiphy,
  1668. "Cannot send packet while ADDBA "
  1669. "dialog is underway.\n");
  1670. spin_unlock(&priv->stream_lock);
  1671. dev_kfree_skb(skb);
  1672. return;
  1673. }
  1674. } else {
  1675. /* Defer calling mwl8k_start_stream so that the current
  1676. * skb can go out before the ADDBA request. This
  1677. * prevents sequence number mismatch at the recepient
  1678. * as described above.
  1679. */
  1680. if (mwl8k_ampdu_allowed(sta, tid)) {
  1681. stream = mwl8k_add_stream(hw, sta, tid);
  1682. if (stream != NULL)
  1683. start_ba_session = true;
  1684. }
  1685. }
  1686. spin_unlock(&priv->stream_lock);
  1687. } else {
  1688. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1689. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1690. }
  1691. dma = pci_map_single(priv->pdev, skb->data,
  1692. skb->len, PCI_DMA_TODEVICE);
  1693. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1694. wiphy_debug(hw->wiphy,
  1695. "failed to dma map skb, dropping TX frame.\n");
  1696. if (start_ba_session) {
  1697. spin_lock(&priv->stream_lock);
  1698. mwl8k_remove_stream(hw, stream);
  1699. spin_unlock(&priv->stream_lock);
  1700. }
  1701. dev_kfree_skb(skb);
  1702. return;
  1703. }
  1704. spin_lock_bh(&priv->tx_lock);
  1705. txq = priv->txq + index;
  1706. /* Mgmt frames that go out frequently are probe
  1707. * responses. Other mgmt frames got out relatively
  1708. * infrequently. Hence reserve 2 buffers so that
  1709. * other mgmt frames do not get dropped due to an
  1710. * already queued probe response in one of the
  1711. * reserved buffers.
  1712. */
  1713. if (txq->len >= MWL8K_TX_DESCS - 2) {
  1714. if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
  1715. if (start_ba_session) {
  1716. spin_lock(&priv->stream_lock);
  1717. mwl8k_remove_stream(hw, stream);
  1718. spin_unlock(&priv->stream_lock);
  1719. }
  1720. spin_unlock_bh(&priv->tx_lock);
  1721. pci_unmap_single(priv->pdev, dma, skb->len,
  1722. PCI_DMA_TODEVICE);
  1723. dev_kfree_skb(skb);
  1724. return;
  1725. }
  1726. }
  1727. BUG_ON(txq->skb[txq->tail] != NULL);
  1728. txq->skb[txq->tail] = skb;
  1729. tx = txq->txd + txq->tail;
  1730. tx->data_rate = txdatarate;
  1731. tx->tx_priority = txpriority;
  1732. tx->qos_control = cpu_to_le16(qos);
  1733. tx->pkt_phys_addr = cpu_to_le32(dma);
  1734. tx->pkt_len = cpu_to_le16(skb->len);
  1735. tx->rate_info = 0;
  1736. if (!priv->ap_fw && sta != NULL)
  1737. tx->peer_id = MWL8K_STA(sta)->peer_id;
  1738. else
  1739. tx->peer_id = 0;
  1740. if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
  1741. tx->timestamp = cpu_to_le32(ioread32(priv->regs +
  1742. MWL8K_HW_TIMER_REGISTER));
  1743. else
  1744. tx->timestamp = 0;
  1745. wmb();
  1746. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1747. txq->len++;
  1748. priv->pending_tx_pkts++;
  1749. txq->tail++;
  1750. if (txq->tail == MWL8K_TX_DESCS)
  1751. txq->tail = 0;
  1752. mwl8k_tx_start(priv);
  1753. spin_unlock_bh(&priv->tx_lock);
  1754. /* Initiate the ampdu session here */
  1755. if (start_ba_session) {
  1756. spin_lock(&priv->stream_lock);
  1757. if (mwl8k_start_stream(hw, stream))
  1758. mwl8k_remove_stream(hw, stream);
  1759. spin_unlock(&priv->stream_lock);
  1760. }
  1761. }
  1762. /*
  1763. * Firmware access.
  1764. *
  1765. * We have the following requirements for issuing firmware commands:
  1766. * - Some commands require that the packet transmit path is idle when
  1767. * the command is issued. (For simplicity, we'll just quiesce the
  1768. * transmit path for every command.)
  1769. * - There are certain sequences of commands that need to be issued to
  1770. * the hardware sequentially, with no other intervening commands.
  1771. *
  1772. * This leads to an implementation of a "firmware lock" as a mutex that
  1773. * can be taken recursively, and which is taken by both the low-level
  1774. * command submission function (mwl8k_post_cmd) as well as any users of
  1775. * that function that require issuing of an atomic sequence of commands,
  1776. * and quiesces the transmit path whenever it's taken.
  1777. */
  1778. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1779. {
  1780. struct mwl8k_priv *priv = hw->priv;
  1781. if (priv->fw_mutex_owner != current) {
  1782. int rc;
  1783. mutex_lock(&priv->fw_mutex);
  1784. ieee80211_stop_queues(hw);
  1785. rc = mwl8k_tx_wait_empty(hw);
  1786. if (rc) {
  1787. if (!priv->hw_restart_in_progress)
  1788. ieee80211_wake_queues(hw);
  1789. mutex_unlock(&priv->fw_mutex);
  1790. return rc;
  1791. }
  1792. priv->fw_mutex_owner = current;
  1793. }
  1794. priv->fw_mutex_depth++;
  1795. return 0;
  1796. }
  1797. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1798. {
  1799. struct mwl8k_priv *priv = hw->priv;
  1800. if (!--priv->fw_mutex_depth) {
  1801. if (!priv->hw_restart_in_progress)
  1802. ieee80211_wake_queues(hw);
  1803. priv->fw_mutex_owner = NULL;
  1804. mutex_unlock(&priv->fw_mutex);
  1805. }
  1806. }
  1807. static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable,
  1808. u32 bitmap);
  1809. /*
  1810. * Command processing.
  1811. */
  1812. /* Timeout firmware commands after 10s */
  1813. #define MWL8K_CMD_TIMEOUT_MS 10000
  1814. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1815. {
  1816. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1817. struct mwl8k_priv *priv = hw->priv;
  1818. void __iomem *regs = priv->regs;
  1819. dma_addr_t dma_addr;
  1820. unsigned int dma_size;
  1821. int rc;
  1822. unsigned long timeout = 0;
  1823. u8 buf[32];
  1824. u32 bitmap = 0;
  1825. wiphy_dbg(hw->wiphy, "Posting %s [%d]\n",
  1826. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), cmd->macid);
  1827. /* Before posting firmware commands that could change the hardware
  1828. * characteristics, make sure that all BSSes are stopped temporary.
  1829. * Enable these stopped BSSes after completion of the commands
  1830. */
  1831. rc = mwl8k_fw_lock(hw);
  1832. if (rc)
  1833. return rc;
  1834. if (priv->ap_fw && priv->running_bsses) {
  1835. switch (le16_to_cpu(cmd->code)) {
  1836. case MWL8K_CMD_SET_RF_CHANNEL:
  1837. case MWL8K_CMD_RADIO_CONTROL:
  1838. case MWL8K_CMD_RF_TX_POWER:
  1839. case MWL8K_CMD_TX_POWER:
  1840. case MWL8K_CMD_RF_ANTENNA:
  1841. case MWL8K_CMD_RTS_THRESHOLD:
  1842. case MWL8K_CMD_MIMO_CONFIG:
  1843. bitmap = priv->running_bsses;
  1844. mwl8k_enable_bsses(hw, false, bitmap);
  1845. break;
  1846. }
  1847. }
  1848. cmd->result = (__force __le16) 0xffff;
  1849. dma_size = le16_to_cpu(cmd->length);
  1850. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1851. PCI_DMA_BIDIRECTIONAL);
  1852. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1853. return -ENOMEM;
  1854. priv->hostcmd_wait = &cmd_wait;
  1855. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1856. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1857. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1858. iowrite32(MWL8K_H2A_INT_DUMMY,
  1859. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1860. timeout = wait_for_completion_timeout(&cmd_wait,
  1861. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1862. priv->hostcmd_wait = NULL;
  1863. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1864. PCI_DMA_BIDIRECTIONAL);
  1865. if (!timeout) {
  1866. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1867. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1868. MWL8K_CMD_TIMEOUT_MS);
  1869. rc = -ETIMEDOUT;
  1870. } else {
  1871. int ms;
  1872. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1873. rc = cmd->result ? -EINVAL : 0;
  1874. if (rc)
  1875. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1876. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1877. le16_to_cpu(cmd->result));
  1878. else if (ms > 2000)
  1879. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1880. mwl8k_cmd_name(cmd->code,
  1881. buf, sizeof(buf)),
  1882. ms);
  1883. }
  1884. if (bitmap)
  1885. mwl8k_enable_bsses(hw, true, bitmap);
  1886. mwl8k_fw_unlock(hw);
  1887. return rc;
  1888. }
  1889. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1890. struct ieee80211_vif *vif,
  1891. struct mwl8k_cmd_pkt *cmd)
  1892. {
  1893. if (vif != NULL)
  1894. cmd->macid = MWL8K_VIF(vif)->macid;
  1895. return mwl8k_post_cmd(hw, cmd);
  1896. }
  1897. /*
  1898. * Setup code shared between STA and AP firmware images.
  1899. */
  1900. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1901. {
  1902. struct mwl8k_priv *priv = hw->priv;
  1903. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1904. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1905. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1906. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1907. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1908. priv->band_24.channels = priv->channels_24;
  1909. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1910. priv->band_24.bitrates = priv->rates_24;
  1911. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1912. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1913. }
  1914. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1915. {
  1916. struct mwl8k_priv *priv = hw->priv;
  1917. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1918. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1919. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1920. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1921. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1922. priv->band_50.channels = priv->channels_50;
  1923. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1924. priv->band_50.bitrates = priv->rates_50;
  1925. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1926. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1927. }
  1928. /*
  1929. * CMD_GET_HW_SPEC (STA version).
  1930. */
  1931. struct mwl8k_cmd_get_hw_spec_sta {
  1932. struct mwl8k_cmd_pkt header;
  1933. __u8 hw_rev;
  1934. __u8 host_interface;
  1935. __le16 num_mcaddrs;
  1936. __u8 perm_addr[ETH_ALEN];
  1937. __le16 region_code;
  1938. __le32 fw_rev;
  1939. __le32 ps_cookie;
  1940. __le32 caps;
  1941. __u8 mcs_bitmap[16];
  1942. __le32 rx_queue_ptr;
  1943. __le32 num_tx_queues;
  1944. __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
  1945. __le32 caps2;
  1946. __le32 num_tx_desc_per_queue;
  1947. __le32 total_rxd;
  1948. } __packed;
  1949. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1950. #define MWL8K_CAP_GREENFIELD 0x08000000
  1951. #define MWL8K_CAP_AMPDU 0x04000000
  1952. #define MWL8K_CAP_RX_STBC 0x01000000
  1953. #define MWL8K_CAP_TX_STBC 0x00800000
  1954. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1955. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1956. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1957. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1958. #define MWL8K_CAP_DELAY_BA 0x00003000
  1959. #define MWL8K_CAP_MIMO 0x00000200
  1960. #define MWL8K_CAP_40MHZ 0x00000100
  1961. #define MWL8K_CAP_BAND_MASK 0x00000007
  1962. #define MWL8K_CAP_5GHZ 0x00000004
  1963. #define MWL8K_CAP_2GHZ4 0x00000001
  1964. static void
  1965. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1966. struct ieee80211_supported_band *band, u32 cap)
  1967. {
  1968. int rx_streams;
  1969. int tx_streams;
  1970. band->ht_cap.ht_supported = 1;
  1971. if (cap & MWL8K_CAP_MAX_AMSDU)
  1972. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1973. if (cap & MWL8K_CAP_GREENFIELD)
  1974. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1975. if (cap & MWL8K_CAP_AMPDU) {
  1976. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1977. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1978. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1979. }
  1980. if (cap & MWL8K_CAP_RX_STBC)
  1981. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1982. if (cap & MWL8K_CAP_TX_STBC)
  1983. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1984. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1985. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1986. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1987. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1988. if (cap & MWL8K_CAP_DELAY_BA)
  1989. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1990. if (cap & MWL8K_CAP_40MHZ)
  1991. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1992. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1993. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1994. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1995. if (rx_streams >= 2)
  1996. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1997. if (rx_streams >= 3)
  1998. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1999. band->ht_cap.mcs.rx_mask[4] = 0x01;
  2000. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2001. if (rx_streams != tx_streams) {
  2002. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2003. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  2004. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  2005. }
  2006. }
  2007. static void
  2008. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  2009. {
  2010. struct mwl8k_priv *priv = hw->priv;
  2011. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  2012. mwl8k_setup_2ghz_band(hw);
  2013. if (caps & MWL8K_CAP_MIMO)
  2014. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  2015. }
  2016. if (caps & MWL8K_CAP_5GHZ) {
  2017. mwl8k_setup_5ghz_band(hw);
  2018. if (caps & MWL8K_CAP_MIMO)
  2019. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  2020. }
  2021. }
  2022. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  2023. {
  2024. struct mwl8k_priv *priv = hw->priv;
  2025. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  2026. int rc;
  2027. int i;
  2028. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2029. if (cmd == NULL)
  2030. return -ENOMEM;
  2031. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2032. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2033. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2034. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2035. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2036. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2037. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  2038. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  2039. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2040. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2041. rc = mwl8k_post_cmd(hw, &cmd->header);
  2042. if (!rc) {
  2043. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2044. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2045. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2046. priv->hw_rev = cmd->hw_rev;
  2047. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2048. priv->ap_macids_supported = 0x00000000;
  2049. priv->sta_macids_supported = 0x00000001;
  2050. }
  2051. kfree(cmd);
  2052. return rc;
  2053. }
  2054. /*
  2055. * CMD_GET_HW_SPEC (AP version).
  2056. */
  2057. struct mwl8k_cmd_get_hw_spec_ap {
  2058. struct mwl8k_cmd_pkt header;
  2059. __u8 hw_rev;
  2060. __u8 host_interface;
  2061. __le16 num_wcb;
  2062. __le16 num_mcaddrs;
  2063. __u8 perm_addr[ETH_ALEN];
  2064. __le16 region_code;
  2065. __le16 num_antenna;
  2066. __le32 fw_rev;
  2067. __le32 wcbbase0;
  2068. __le32 rxwrptr;
  2069. __le32 rxrdptr;
  2070. __le32 ps_cookie;
  2071. __le32 wcbbase1;
  2072. __le32 wcbbase2;
  2073. __le32 wcbbase3;
  2074. __le32 fw_api_version;
  2075. __le32 caps;
  2076. __le32 num_of_ampdu_queues;
  2077. __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
  2078. } __packed;
  2079. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  2080. {
  2081. struct mwl8k_priv *priv = hw->priv;
  2082. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  2083. int rc, i;
  2084. u32 api_version;
  2085. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2086. if (cmd == NULL)
  2087. return -ENOMEM;
  2088. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2089. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2090. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2091. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2092. rc = mwl8k_post_cmd(hw, &cmd->header);
  2093. if (!rc) {
  2094. int off;
  2095. api_version = le32_to_cpu(cmd->fw_api_version);
  2096. if (priv->device_info->fw_api_ap != api_version) {
  2097. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  2098. " Expected %d got %d.\n", MWL8K_NAME,
  2099. priv->device_info->part_name,
  2100. priv->device_info->fw_api_ap,
  2101. api_version);
  2102. rc = -EINVAL;
  2103. goto done;
  2104. }
  2105. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2106. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2107. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2108. priv->hw_rev = cmd->hw_rev;
  2109. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2110. priv->ap_macids_supported = 0x000000ff;
  2111. priv->sta_macids_supported = 0x00000100;
  2112. priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
  2113. if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
  2114. wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
  2115. " but we only support %d.\n",
  2116. priv->num_ampdu_queues,
  2117. MWL8K_MAX_AMPDU_QUEUES);
  2118. priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
  2119. }
  2120. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  2121. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2122. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  2123. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2124. priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  2125. priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  2126. priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  2127. priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  2128. for (i = 0; i < priv->num_ampdu_queues; i++)
  2129. priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
  2130. le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
  2131. }
  2132. done:
  2133. kfree(cmd);
  2134. return rc;
  2135. }
  2136. /*
  2137. * CMD_SET_HW_SPEC.
  2138. */
  2139. struct mwl8k_cmd_set_hw_spec {
  2140. struct mwl8k_cmd_pkt header;
  2141. __u8 hw_rev;
  2142. __u8 host_interface;
  2143. __le16 num_mcaddrs;
  2144. __u8 perm_addr[ETH_ALEN];
  2145. __le16 region_code;
  2146. __le32 fw_rev;
  2147. __le32 ps_cookie;
  2148. __le32 caps;
  2149. __le32 rx_queue_ptr;
  2150. __le32 num_tx_queues;
  2151. __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
  2152. __le32 flags;
  2153. __le32 num_tx_desc_per_queue;
  2154. __le32 total_rxd;
  2155. } __packed;
  2156. /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
  2157. * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
  2158. * the packets that are queued for more than 500ms, will be dropped in the
  2159. * hardware. This helps minimizing the issues caused due to head-of-line
  2160. * blocking where a slow client can hog the bandwidth and affect traffic to a
  2161. * faster client.
  2162. */
  2163. #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
  2164. #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
  2165. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  2166. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  2167. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  2168. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  2169. {
  2170. struct mwl8k_priv *priv = hw->priv;
  2171. struct mwl8k_cmd_set_hw_spec *cmd;
  2172. int rc;
  2173. int i;
  2174. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2175. if (cmd == NULL)
  2176. return -ENOMEM;
  2177. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  2178. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2179. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2180. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2181. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2182. /*
  2183. * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
  2184. * that order. Firmware has Q3 as highest priority and Q0 as lowest
  2185. * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
  2186. * priority is interpreted the right way in firmware.
  2187. */
  2188. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  2189. int j = mwl8k_tx_queues(priv) - 1 - i;
  2190. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
  2191. }
  2192. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  2193. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  2194. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
  2195. MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
  2196. MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
  2197. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2198. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2199. rc = mwl8k_post_cmd(hw, &cmd->header);
  2200. kfree(cmd);
  2201. return rc;
  2202. }
  2203. /*
  2204. * CMD_MAC_MULTICAST_ADR.
  2205. */
  2206. struct mwl8k_cmd_mac_multicast_adr {
  2207. struct mwl8k_cmd_pkt header;
  2208. __le16 action;
  2209. __le16 numaddr;
  2210. __u8 addr[0][ETH_ALEN];
  2211. };
  2212. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  2213. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  2214. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  2215. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  2216. static struct mwl8k_cmd_pkt *
  2217. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  2218. struct netdev_hw_addr_list *mc_list)
  2219. {
  2220. struct mwl8k_priv *priv = hw->priv;
  2221. struct mwl8k_cmd_mac_multicast_adr *cmd;
  2222. int size;
  2223. int mc_count = 0;
  2224. if (mc_list)
  2225. mc_count = netdev_hw_addr_list_count(mc_list);
  2226. if (allmulti || mc_count > priv->num_mcaddrs) {
  2227. allmulti = 1;
  2228. mc_count = 0;
  2229. }
  2230. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  2231. cmd = kzalloc(size, GFP_ATOMIC);
  2232. if (cmd == NULL)
  2233. return NULL;
  2234. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  2235. cmd->header.length = cpu_to_le16(size);
  2236. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  2237. MWL8K_ENABLE_RX_BROADCAST);
  2238. if (allmulti) {
  2239. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  2240. } else if (mc_count) {
  2241. struct netdev_hw_addr *ha;
  2242. int i = 0;
  2243. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  2244. cmd->numaddr = cpu_to_le16(mc_count);
  2245. netdev_hw_addr_list_for_each(ha, mc_list) {
  2246. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  2247. }
  2248. }
  2249. return &cmd->header;
  2250. }
  2251. /*
  2252. * CMD_GET_STAT.
  2253. */
  2254. struct mwl8k_cmd_get_stat {
  2255. struct mwl8k_cmd_pkt header;
  2256. __le32 stats[64];
  2257. } __packed;
  2258. #define MWL8K_STAT_ACK_FAILURE 9
  2259. #define MWL8K_STAT_RTS_FAILURE 12
  2260. #define MWL8K_STAT_FCS_ERROR 24
  2261. #define MWL8K_STAT_RTS_SUCCESS 11
  2262. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  2263. struct ieee80211_low_level_stats *stats)
  2264. {
  2265. struct mwl8k_cmd_get_stat *cmd;
  2266. int rc;
  2267. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2268. if (cmd == NULL)
  2269. return -ENOMEM;
  2270. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  2271. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2272. rc = mwl8k_post_cmd(hw, &cmd->header);
  2273. if (!rc) {
  2274. stats->dot11ACKFailureCount =
  2275. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  2276. stats->dot11RTSFailureCount =
  2277. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  2278. stats->dot11FCSErrorCount =
  2279. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  2280. stats->dot11RTSSuccessCount =
  2281. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  2282. }
  2283. kfree(cmd);
  2284. return rc;
  2285. }
  2286. /*
  2287. * CMD_RADIO_CONTROL.
  2288. */
  2289. struct mwl8k_cmd_radio_control {
  2290. struct mwl8k_cmd_pkt header;
  2291. __le16 action;
  2292. __le16 control;
  2293. __le16 radio_on;
  2294. } __packed;
  2295. static int
  2296. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  2297. {
  2298. struct mwl8k_priv *priv = hw->priv;
  2299. struct mwl8k_cmd_radio_control *cmd;
  2300. int rc;
  2301. if (enable == priv->radio_on && !force)
  2302. return 0;
  2303. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2304. if (cmd == NULL)
  2305. return -ENOMEM;
  2306. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  2307. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2308. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2309. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  2310. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  2311. rc = mwl8k_post_cmd(hw, &cmd->header);
  2312. kfree(cmd);
  2313. if (!rc)
  2314. priv->radio_on = enable;
  2315. return rc;
  2316. }
  2317. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  2318. {
  2319. return mwl8k_cmd_radio_control(hw, 0, 0);
  2320. }
  2321. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  2322. {
  2323. return mwl8k_cmd_radio_control(hw, 1, 0);
  2324. }
  2325. static int
  2326. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  2327. {
  2328. struct mwl8k_priv *priv = hw->priv;
  2329. priv->radio_short_preamble = short_preamble;
  2330. return mwl8k_cmd_radio_control(hw, 1, 1);
  2331. }
  2332. /*
  2333. * CMD_RF_TX_POWER.
  2334. */
  2335. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  2336. struct mwl8k_cmd_rf_tx_power {
  2337. struct mwl8k_cmd_pkt header;
  2338. __le16 action;
  2339. __le16 support_level;
  2340. __le16 current_level;
  2341. __le16 reserved;
  2342. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  2343. } __packed;
  2344. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  2345. {
  2346. struct mwl8k_cmd_rf_tx_power *cmd;
  2347. int rc;
  2348. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2349. if (cmd == NULL)
  2350. return -ENOMEM;
  2351. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  2352. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2353. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2354. cmd->support_level = cpu_to_le16(dBm);
  2355. rc = mwl8k_post_cmd(hw, &cmd->header);
  2356. kfree(cmd);
  2357. return rc;
  2358. }
  2359. /*
  2360. * CMD_TX_POWER.
  2361. */
  2362. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  2363. struct mwl8k_cmd_tx_power {
  2364. struct mwl8k_cmd_pkt header;
  2365. __le16 action;
  2366. __le16 band;
  2367. __le16 channel;
  2368. __le16 bw;
  2369. __le16 sub_ch;
  2370. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  2371. } __packed;
  2372. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  2373. struct ieee80211_conf *conf,
  2374. unsigned short pwr)
  2375. {
  2376. struct ieee80211_channel *channel = conf->channel;
  2377. struct mwl8k_cmd_tx_power *cmd;
  2378. int rc;
  2379. int i;
  2380. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2381. if (cmd == NULL)
  2382. return -ENOMEM;
  2383. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  2384. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2385. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  2386. if (channel->band == IEEE80211_BAND_2GHZ)
  2387. cmd->band = cpu_to_le16(0x1);
  2388. else if (channel->band == IEEE80211_BAND_5GHZ)
  2389. cmd->band = cpu_to_le16(0x4);
  2390. cmd->channel = cpu_to_le16(channel->hw_value);
  2391. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2392. conf->channel_type == NL80211_CHAN_HT20) {
  2393. cmd->bw = cpu_to_le16(0x2);
  2394. } else {
  2395. cmd->bw = cpu_to_le16(0x4);
  2396. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2397. cmd->sub_ch = cpu_to_le16(0x3);
  2398. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2399. cmd->sub_ch = cpu_to_le16(0x1);
  2400. }
  2401. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  2402. cmd->power_level_list[i] = cpu_to_le16(pwr);
  2403. rc = mwl8k_post_cmd(hw, &cmd->header);
  2404. kfree(cmd);
  2405. return rc;
  2406. }
  2407. /*
  2408. * CMD_RF_ANTENNA.
  2409. */
  2410. struct mwl8k_cmd_rf_antenna {
  2411. struct mwl8k_cmd_pkt header;
  2412. __le16 antenna;
  2413. __le16 mode;
  2414. } __packed;
  2415. #define MWL8K_RF_ANTENNA_RX 1
  2416. #define MWL8K_RF_ANTENNA_TX 2
  2417. static int
  2418. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  2419. {
  2420. struct mwl8k_cmd_rf_antenna *cmd;
  2421. int rc;
  2422. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2423. if (cmd == NULL)
  2424. return -ENOMEM;
  2425. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  2426. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2427. cmd->antenna = cpu_to_le16(antenna);
  2428. cmd->mode = cpu_to_le16(mask);
  2429. rc = mwl8k_post_cmd(hw, &cmd->header);
  2430. kfree(cmd);
  2431. return rc;
  2432. }
  2433. /*
  2434. * CMD_SET_BEACON.
  2435. */
  2436. struct mwl8k_cmd_set_beacon {
  2437. struct mwl8k_cmd_pkt header;
  2438. __le16 beacon_len;
  2439. __u8 beacon[0];
  2440. };
  2441. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  2442. struct ieee80211_vif *vif, u8 *beacon, int len)
  2443. {
  2444. struct mwl8k_cmd_set_beacon *cmd;
  2445. int rc;
  2446. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  2447. if (cmd == NULL)
  2448. return -ENOMEM;
  2449. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  2450. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  2451. cmd->beacon_len = cpu_to_le16(len);
  2452. memcpy(cmd->beacon, beacon, len);
  2453. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2454. kfree(cmd);
  2455. return rc;
  2456. }
  2457. /*
  2458. * CMD_SET_PRE_SCAN.
  2459. */
  2460. struct mwl8k_cmd_set_pre_scan {
  2461. struct mwl8k_cmd_pkt header;
  2462. } __packed;
  2463. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  2464. {
  2465. struct mwl8k_cmd_set_pre_scan *cmd;
  2466. int rc;
  2467. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2468. if (cmd == NULL)
  2469. return -ENOMEM;
  2470. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  2471. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2472. rc = mwl8k_post_cmd(hw, &cmd->header);
  2473. kfree(cmd);
  2474. return rc;
  2475. }
  2476. /*
  2477. * CMD_SET_POST_SCAN.
  2478. */
  2479. struct mwl8k_cmd_set_post_scan {
  2480. struct mwl8k_cmd_pkt header;
  2481. __le32 isibss;
  2482. __u8 bssid[ETH_ALEN];
  2483. } __packed;
  2484. static int
  2485. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  2486. {
  2487. struct mwl8k_cmd_set_post_scan *cmd;
  2488. int rc;
  2489. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2490. if (cmd == NULL)
  2491. return -ENOMEM;
  2492. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  2493. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2494. cmd->isibss = 0;
  2495. memcpy(cmd->bssid, mac, ETH_ALEN);
  2496. rc = mwl8k_post_cmd(hw, &cmd->header);
  2497. kfree(cmd);
  2498. return rc;
  2499. }
  2500. /*
  2501. * CMD_SET_RF_CHANNEL.
  2502. */
  2503. struct mwl8k_cmd_set_rf_channel {
  2504. struct mwl8k_cmd_pkt header;
  2505. __le16 action;
  2506. __u8 current_channel;
  2507. __le32 channel_flags;
  2508. } __packed;
  2509. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  2510. struct ieee80211_conf *conf)
  2511. {
  2512. struct ieee80211_channel *channel = conf->channel;
  2513. struct mwl8k_cmd_set_rf_channel *cmd;
  2514. int rc;
  2515. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2516. if (cmd == NULL)
  2517. return -ENOMEM;
  2518. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  2519. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2520. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2521. cmd->current_channel = channel->hw_value;
  2522. if (channel->band == IEEE80211_BAND_2GHZ)
  2523. cmd->channel_flags |= cpu_to_le32(0x00000001);
  2524. else if (channel->band == IEEE80211_BAND_5GHZ)
  2525. cmd->channel_flags |= cpu_to_le32(0x00000004);
  2526. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2527. conf->channel_type == NL80211_CHAN_HT20)
  2528. cmd->channel_flags |= cpu_to_le32(0x00000080);
  2529. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2530. cmd->channel_flags |= cpu_to_le32(0x000001900);
  2531. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2532. cmd->channel_flags |= cpu_to_le32(0x000000900);
  2533. rc = mwl8k_post_cmd(hw, &cmd->header);
  2534. kfree(cmd);
  2535. return rc;
  2536. }
  2537. /*
  2538. * CMD_SET_AID.
  2539. */
  2540. #define MWL8K_FRAME_PROT_DISABLED 0x00
  2541. #define MWL8K_FRAME_PROT_11G 0x07
  2542. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  2543. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  2544. struct mwl8k_cmd_update_set_aid {
  2545. struct mwl8k_cmd_pkt header;
  2546. __le16 aid;
  2547. /* AP's MAC address (BSSID) */
  2548. __u8 bssid[ETH_ALEN];
  2549. __le16 protection_mode;
  2550. __u8 supp_rates[14];
  2551. } __packed;
  2552. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  2553. {
  2554. int i;
  2555. int j;
  2556. /*
  2557. * Clear nonstandard rates 4 and 13.
  2558. */
  2559. mask &= 0x1fef;
  2560. for (i = 0, j = 0; i < 14; i++) {
  2561. if (mask & (1 << i))
  2562. rates[j++] = mwl8k_rates_24[i].hw_value;
  2563. }
  2564. }
  2565. static int
  2566. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2567. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2568. {
  2569. struct mwl8k_cmd_update_set_aid *cmd;
  2570. u16 prot_mode;
  2571. int rc;
  2572. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2573. if (cmd == NULL)
  2574. return -ENOMEM;
  2575. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2576. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2577. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2578. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2579. if (vif->bss_conf.use_cts_prot) {
  2580. prot_mode = MWL8K_FRAME_PROT_11G;
  2581. } else {
  2582. switch (vif->bss_conf.ht_operation_mode &
  2583. IEEE80211_HT_OP_MODE_PROTECTION) {
  2584. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2585. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2586. break;
  2587. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2588. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2589. break;
  2590. default:
  2591. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2592. break;
  2593. }
  2594. }
  2595. cmd->protection_mode = cpu_to_le16(prot_mode);
  2596. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2597. rc = mwl8k_post_cmd(hw, &cmd->header);
  2598. kfree(cmd);
  2599. return rc;
  2600. }
  2601. /*
  2602. * CMD_SET_RATE.
  2603. */
  2604. struct mwl8k_cmd_set_rate {
  2605. struct mwl8k_cmd_pkt header;
  2606. __u8 legacy_rates[14];
  2607. /* Bitmap for supported MCS codes. */
  2608. __u8 mcs_set[16];
  2609. __u8 reserved[16];
  2610. } __packed;
  2611. static int
  2612. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2613. u32 legacy_rate_mask, u8 *mcs_rates)
  2614. {
  2615. struct mwl8k_cmd_set_rate *cmd;
  2616. int rc;
  2617. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2618. if (cmd == NULL)
  2619. return -ENOMEM;
  2620. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2621. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2622. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2623. memcpy(cmd->mcs_set, mcs_rates, 16);
  2624. rc = mwl8k_post_cmd(hw, &cmd->header);
  2625. kfree(cmd);
  2626. return rc;
  2627. }
  2628. /*
  2629. * CMD_FINALIZE_JOIN.
  2630. */
  2631. #define MWL8K_FJ_BEACON_MAXLEN 128
  2632. struct mwl8k_cmd_finalize_join {
  2633. struct mwl8k_cmd_pkt header;
  2634. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2635. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2636. } __packed;
  2637. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2638. int framelen, int dtim)
  2639. {
  2640. struct mwl8k_cmd_finalize_join *cmd;
  2641. struct ieee80211_mgmt *payload = frame;
  2642. int payload_len;
  2643. int rc;
  2644. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2645. if (cmd == NULL)
  2646. return -ENOMEM;
  2647. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2648. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2649. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2650. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2651. if (payload_len < 0)
  2652. payload_len = 0;
  2653. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2654. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2655. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2656. rc = mwl8k_post_cmd(hw, &cmd->header);
  2657. kfree(cmd);
  2658. return rc;
  2659. }
  2660. /*
  2661. * CMD_SET_RTS_THRESHOLD.
  2662. */
  2663. struct mwl8k_cmd_set_rts_threshold {
  2664. struct mwl8k_cmd_pkt header;
  2665. __le16 action;
  2666. __le16 threshold;
  2667. } __packed;
  2668. static int
  2669. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2670. {
  2671. struct mwl8k_cmd_set_rts_threshold *cmd;
  2672. int rc;
  2673. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2674. if (cmd == NULL)
  2675. return -ENOMEM;
  2676. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2677. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2678. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2679. cmd->threshold = cpu_to_le16(rts_thresh);
  2680. rc = mwl8k_post_cmd(hw, &cmd->header);
  2681. kfree(cmd);
  2682. return rc;
  2683. }
  2684. /*
  2685. * CMD_SET_SLOT.
  2686. */
  2687. struct mwl8k_cmd_set_slot {
  2688. struct mwl8k_cmd_pkt header;
  2689. __le16 action;
  2690. __u8 short_slot;
  2691. } __packed;
  2692. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2693. {
  2694. struct mwl8k_cmd_set_slot *cmd;
  2695. int rc;
  2696. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2697. if (cmd == NULL)
  2698. return -ENOMEM;
  2699. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2700. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2701. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2702. cmd->short_slot = short_slot_time;
  2703. rc = mwl8k_post_cmd(hw, &cmd->header);
  2704. kfree(cmd);
  2705. return rc;
  2706. }
  2707. /*
  2708. * CMD_SET_EDCA_PARAMS.
  2709. */
  2710. struct mwl8k_cmd_set_edca_params {
  2711. struct mwl8k_cmd_pkt header;
  2712. /* See MWL8K_SET_EDCA_XXX below */
  2713. __le16 action;
  2714. /* TX opportunity in units of 32 us */
  2715. __le16 txop;
  2716. union {
  2717. struct {
  2718. /* Log exponent of max contention period: 0...15 */
  2719. __le32 log_cw_max;
  2720. /* Log exponent of min contention period: 0...15 */
  2721. __le32 log_cw_min;
  2722. /* Adaptive interframe spacing in units of 32us */
  2723. __u8 aifs;
  2724. /* TX queue to configure */
  2725. __u8 txq;
  2726. } ap;
  2727. struct {
  2728. /* Log exponent of max contention period: 0...15 */
  2729. __u8 log_cw_max;
  2730. /* Log exponent of min contention period: 0...15 */
  2731. __u8 log_cw_min;
  2732. /* Adaptive interframe spacing in units of 32us */
  2733. __u8 aifs;
  2734. /* TX queue to configure */
  2735. __u8 txq;
  2736. } sta;
  2737. };
  2738. } __packed;
  2739. #define MWL8K_SET_EDCA_CW 0x01
  2740. #define MWL8K_SET_EDCA_TXOP 0x02
  2741. #define MWL8K_SET_EDCA_AIFS 0x04
  2742. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2743. MWL8K_SET_EDCA_TXOP | \
  2744. MWL8K_SET_EDCA_AIFS)
  2745. static int
  2746. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2747. __u16 cw_min, __u16 cw_max,
  2748. __u8 aifs, __u16 txop)
  2749. {
  2750. struct mwl8k_priv *priv = hw->priv;
  2751. struct mwl8k_cmd_set_edca_params *cmd;
  2752. int rc;
  2753. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2754. if (cmd == NULL)
  2755. return -ENOMEM;
  2756. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2757. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2758. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2759. cmd->txop = cpu_to_le16(txop);
  2760. if (priv->ap_fw) {
  2761. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2762. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2763. cmd->ap.aifs = aifs;
  2764. cmd->ap.txq = qnum;
  2765. } else {
  2766. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2767. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2768. cmd->sta.aifs = aifs;
  2769. cmd->sta.txq = qnum;
  2770. }
  2771. rc = mwl8k_post_cmd(hw, &cmd->header);
  2772. kfree(cmd);
  2773. return rc;
  2774. }
  2775. /*
  2776. * CMD_SET_WMM_MODE.
  2777. */
  2778. struct mwl8k_cmd_set_wmm_mode {
  2779. struct mwl8k_cmd_pkt header;
  2780. __le16 action;
  2781. } __packed;
  2782. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2783. {
  2784. struct mwl8k_priv *priv = hw->priv;
  2785. struct mwl8k_cmd_set_wmm_mode *cmd;
  2786. int rc;
  2787. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2788. if (cmd == NULL)
  2789. return -ENOMEM;
  2790. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2791. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2792. cmd->action = cpu_to_le16(!!enable);
  2793. rc = mwl8k_post_cmd(hw, &cmd->header);
  2794. kfree(cmd);
  2795. if (!rc)
  2796. priv->wmm_enabled = enable;
  2797. return rc;
  2798. }
  2799. /*
  2800. * CMD_MIMO_CONFIG.
  2801. */
  2802. struct mwl8k_cmd_mimo_config {
  2803. struct mwl8k_cmd_pkt header;
  2804. __le32 action;
  2805. __u8 rx_antenna_map;
  2806. __u8 tx_antenna_map;
  2807. } __packed;
  2808. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2809. {
  2810. struct mwl8k_cmd_mimo_config *cmd;
  2811. int rc;
  2812. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2813. if (cmd == NULL)
  2814. return -ENOMEM;
  2815. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2816. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2817. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2818. cmd->rx_antenna_map = rx;
  2819. cmd->tx_antenna_map = tx;
  2820. rc = mwl8k_post_cmd(hw, &cmd->header);
  2821. kfree(cmd);
  2822. return rc;
  2823. }
  2824. /*
  2825. * CMD_USE_FIXED_RATE (STA version).
  2826. */
  2827. struct mwl8k_cmd_use_fixed_rate_sta {
  2828. struct mwl8k_cmd_pkt header;
  2829. __le32 action;
  2830. __le32 allow_rate_drop;
  2831. __le32 num_rates;
  2832. struct {
  2833. __le32 is_ht_rate;
  2834. __le32 enable_retry;
  2835. __le32 rate;
  2836. __le32 retry_count;
  2837. } rate_entry[8];
  2838. __le32 rate_type;
  2839. __le32 reserved1;
  2840. __le32 reserved2;
  2841. } __packed;
  2842. #define MWL8K_USE_AUTO_RATE 0x0002
  2843. #define MWL8K_UCAST_RATE 0
  2844. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2845. {
  2846. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2847. int rc;
  2848. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2849. if (cmd == NULL)
  2850. return -ENOMEM;
  2851. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2852. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2853. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2854. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2855. rc = mwl8k_post_cmd(hw, &cmd->header);
  2856. kfree(cmd);
  2857. return rc;
  2858. }
  2859. /*
  2860. * CMD_USE_FIXED_RATE (AP version).
  2861. */
  2862. struct mwl8k_cmd_use_fixed_rate_ap {
  2863. struct mwl8k_cmd_pkt header;
  2864. __le32 action;
  2865. __le32 allow_rate_drop;
  2866. __le32 num_rates;
  2867. struct mwl8k_rate_entry_ap {
  2868. __le32 is_ht_rate;
  2869. __le32 enable_retry;
  2870. __le32 rate;
  2871. __le32 retry_count;
  2872. } rate_entry[4];
  2873. u8 multicast_rate;
  2874. u8 multicast_rate_type;
  2875. u8 management_rate;
  2876. } __packed;
  2877. static int
  2878. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2879. {
  2880. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2881. int rc;
  2882. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2883. if (cmd == NULL)
  2884. return -ENOMEM;
  2885. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2886. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2887. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2888. cmd->multicast_rate = mcast;
  2889. cmd->management_rate = mgmt;
  2890. rc = mwl8k_post_cmd(hw, &cmd->header);
  2891. kfree(cmd);
  2892. return rc;
  2893. }
  2894. /*
  2895. * CMD_ENABLE_SNIFFER.
  2896. */
  2897. struct mwl8k_cmd_enable_sniffer {
  2898. struct mwl8k_cmd_pkt header;
  2899. __le32 action;
  2900. } __packed;
  2901. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2902. {
  2903. struct mwl8k_cmd_enable_sniffer *cmd;
  2904. int rc;
  2905. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2906. if (cmd == NULL)
  2907. return -ENOMEM;
  2908. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2909. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2910. cmd->action = cpu_to_le32(!!enable);
  2911. rc = mwl8k_post_cmd(hw, &cmd->header);
  2912. kfree(cmd);
  2913. return rc;
  2914. }
  2915. struct mwl8k_cmd_update_mac_addr {
  2916. struct mwl8k_cmd_pkt header;
  2917. union {
  2918. struct {
  2919. __le16 mac_type;
  2920. __u8 mac_addr[ETH_ALEN];
  2921. } mbss;
  2922. __u8 mac_addr[ETH_ALEN];
  2923. };
  2924. } __packed;
  2925. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2926. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2927. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2928. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2929. static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
  2930. struct ieee80211_vif *vif, u8 *mac, bool set)
  2931. {
  2932. struct mwl8k_priv *priv = hw->priv;
  2933. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2934. struct mwl8k_cmd_update_mac_addr *cmd;
  2935. int mac_type;
  2936. int rc;
  2937. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2938. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2939. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2940. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2941. else
  2942. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2943. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2944. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2945. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2946. else
  2947. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2948. }
  2949. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2950. if (cmd == NULL)
  2951. return -ENOMEM;
  2952. if (set)
  2953. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2954. else
  2955. cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
  2956. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2957. if (priv->ap_fw) {
  2958. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2959. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2960. } else {
  2961. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2962. }
  2963. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2964. kfree(cmd);
  2965. return rc;
  2966. }
  2967. /*
  2968. * MWL8K_CMD_SET_MAC_ADDR.
  2969. */
  2970. static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2971. struct ieee80211_vif *vif, u8 *mac)
  2972. {
  2973. return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
  2974. }
  2975. /*
  2976. * MWL8K_CMD_DEL_MAC_ADDR.
  2977. */
  2978. static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
  2979. struct ieee80211_vif *vif, u8 *mac)
  2980. {
  2981. return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
  2982. }
  2983. /*
  2984. * CMD_SET_RATEADAPT_MODE.
  2985. */
  2986. struct mwl8k_cmd_set_rate_adapt_mode {
  2987. struct mwl8k_cmd_pkt header;
  2988. __le16 action;
  2989. __le16 mode;
  2990. } __packed;
  2991. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2992. {
  2993. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2994. int rc;
  2995. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2996. if (cmd == NULL)
  2997. return -ENOMEM;
  2998. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2999. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3000. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  3001. cmd->mode = cpu_to_le16(mode);
  3002. rc = mwl8k_post_cmd(hw, &cmd->header);
  3003. kfree(cmd);
  3004. return rc;
  3005. }
  3006. /*
  3007. * CMD_GET_WATCHDOG_BITMAP.
  3008. */
  3009. struct mwl8k_cmd_get_watchdog_bitmap {
  3010. struct mwl8k_cmd_pkt header;
  3011. u8 bitmap;
  3012. } __packed;
  3013. static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
  3014. {
  3015. struct mwl8k_cmd_get_watchdog_bitmap *cmd;
  3016. int rc;
  3017. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3018. if (cmd == NULL)
  3019. return -ENOMEM;
  3020. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
  3021. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3022. rc = mwl8k_post_cmd(hw, &cmd->header);
  3023. if (!rc)
  3024. *bitmap = cmd->bitmap;
  3025. kfree(cmd);
  3026. return rc;
  3027. }
  3028. #define MWL8K_WMM_QUEUE_NUMBER 3
  3029. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3030. u8 idx);
  3031. static void mwl8k_watchdog_ba_events(struct work_struct *work)
  3032. {
  3033. int rc;
  3034. u8 bitmap = 0, stream_index;
  3035. struct mwl8k_ampdu_stream *streams;
  3036. struct mwl8k_priv *priv =
  3037. container_of(work, struct mwl8k_priv, watchdog_ba_handle);
  3038. struct ieee80211_hw *hw = priv->hw;
  3039. int i;
  3040. u32 status = 0;
  3041. mwl8k_fw_lock(hw);
  3042. rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
  3043. if (rc)
  3044. goto done;
  3045. spin_lock(&priv->stream_lock);
  3046. /* the bitmap is the hw queue number. Map it to the ampdu queue. */
  3047. for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) {
  3048. if (bitmap & (1 << i)) {
  3049. stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) %
  3050. TOTAL_HW_TX_QUEUES;
  3051. streams = &priv->ampdu[stream_index];
  3052. if (streams->state == AMPDU_STREAM_ACTIVE) {
  3053. ieee80211_stop_tx_ba_session(streams->sta,
  3054. streams->tid);
  3055. spin_unlock(&priv->stream_lock);
  3056. mwl8k_destroy_ba(hw, stream_index);
  3057. spin_lock(&priv->stream_lock);
  3058. }
  3059. }
  3060. }
  3061. spin_unlock(&priv->stream_lock);
  3062. done:
  3063. atomic_dec(&priv->watchdog_event_pending);
  3064. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3065. iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG),
  3066. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3067. mwl8k_fw_unlock(hw);
  3068. return;
  3069. }
  3070. /*
  3071. * CMD_BSS_START.
  3072. */
  3073. struct mwl8k_cmd_bss_start {
  3074. struct mwl8k_cmd_pkt header;
  3075. __le32 enable;
  3076. } __packed;
  3077. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  3078. struct ieee80211_vif *vif, int enable)
  3079. {
  3080. struct mwl8k_cmd_bss_start *cmd;
  3081. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3082. struct mwl8k_priv *priv = hw->priv;
  3083. int rc;
  3084. if (enable && (priv->running_bsses & (1 << mwl8k_vif->macid)))
  3085. return 0;
  3086. if (!enable && !(priv->running_bsses & (1 << mwl8k_vif->macid)))
  3087. return 0;
  3088. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3089. if (cmd == NULL)
  3090. return -ENOMEM;
  3091. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  3092. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3093. cmd->enable = cpu_to_le32(enable);
  3094. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3095. kfree(cmd);
  3096. if (!rc) {
  3097. if (enable)
  3098. priv->running_bsses |= (1 << mwl8k_vif->macid);
  3099. else
  3100. priv->running_bsses &= ~(1 << mwl8k_vif->macid);
  3101. }
  3102. return rc;
  3103. }
  3104. static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, u32 bitmap)
  3105. {
  3106. struct mwl8k_priv *priv = hw->priv;
  3107. struct mwl8k_vif *mwl8k_vif, *tmp_vif;
  3108. struct ieee80211_vif *vif;
  3109. list_for_each_entry_safe(mwl8k_vif, tmp_vif, &priv->vif_list, list) {
  3110. vif = mwl8k_vif->vif;
  3111. if (!(bitmap & (1 << mwl8k_vif->macid)))
  3112. continue;
  3113. if (vif->type == NL80211_IFTYPE_AP)
  3114. mwl8k_cmd_bss_start(hw, vif, enable);
  3115. }
  3116. }
  3117. /*
  3118. * CMD_BASTREAM.
  3119. */
  3120. /*
  3121. * UPSTREAM is tx direction
  3122. */
  3123. #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
  3124. #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
  3125. enum ba_stream_action_type {
  3126. MWL8K_BA_CREATE,
  3127. MWL8K_BA_UPDATE,
  3128. MWL8K_BA_DESTROY,
  3129. MWL8K_BA_FLUSH,
  3130. MWL8K_BA_CHECK,
  3131. };
  3132. struct mwl8k_create_ba_stream {
  3133. __le32 flags;
  3134. __le32 idle_thrs;
  3135. __le32 bar_thrs;
  3136. __le32 window_size;
  3137. u8 peer_mac_addr[6];
  3138. u8 dialog_token;
  3139. u8 tid;
  3140. u8 queue_id;
  3141. u8 param_info;
  3142. __le32 ba_context;
  3143. u8 reset_seq_no_flag;
  3144. __le16 curr_seq_no;
  3145. u8 sta_src_mac_addr[6];
  3146. } __packed;
  3147. struct mwl8k_destroy_ba_stream {
  3148. __le32 flags;
  3149. __le32 ba_context;
  3150. } __packed;
  3151. struct mwl8k_cmd_bastream {
  3152. struct mwl8k_cmd_pkt header;
  3153. __le32 action;
  3154. union {
  3155. struct mwl8k_create_ba_stream create_params;
  3156. struct mwl8k_destroy_ba_stream destroy_params;
  3157. };
  3158. } __packed;
  3159. static int
  3160. mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3161. struct ieee80211_vif *vif)
  3162. {
  3163. struct mwl8k_cmd_bastream *cmd;
  3164. int rc;
  3165. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3166. if (cmd == NULL)
  3167. return -ENOMEM;
  3168. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3169. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3170. cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
  3171. cmd->create_params.queue_id = stream->idx;
  3172. memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
  3173. ETH_ALEN);
  3174. cmd->create_params.tid = stream->tid;
  3175. cmd->create_params.flags =
  3176. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
  3177. cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3178. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3179. kfree(cmd);
  3180. return rc;
  3181. }
  3182. static int
  3183. mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3184. u8 buf_size, struct ieee80211_vif *vif)
  3185. {
  3186. struct mwl8k_cmd_bastream *cmd;
  3187. int rc;
  3188. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3189. if (cmd == NULL)
  3190. return -ENOMEM;
  3191. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3192. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3193. cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
  3194. cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
  3195. cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
  3196. cmd->create_params.queue_id = stream->idx;
  3197. memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
  3198. cmd->create_params.tid = stream->tid;
  3199. cmd->create_params.curr_seq_no = cpu_to_le16(0);
  3200. cmd->create_params.reset_seq_no_flag = 1;
  3201. cmd->create_params.param_info =
  3202. (stream->sta->ht_cap.ampdu_factor &
  3203. IEEE80211_HT_AMPDU_PARM_FACTOR) |
  3204. ((stream->sta->ht_cap.ampdu_density << 2) &
  3205. IEEE80211_HT_AMPDU_PARM_DENSITY);
  3206. cmd->create_params.flags =
  3207. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
  3208. BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3209. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3210. wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
  3211. stream->sta->addr, stream->tid);
  3212. kfree(cmd);
  3213. return rc;
  3214. }
  3215. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3216. u8 idx)
  3217. {
  3218. struct mwl8k_cmd_bastream *cmd;
  3219. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3220. if (cmd == NULL)
  3221. return;
  3222. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3223. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3224. cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
  3225. cmd->destroy_params.ba_context = cpu_to_le32(idx);
  3226. mwl8k_post_cmd(hw, &cmd->header);
  3227. wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx);
  3228. kfree(cmd);
  3229. }
  3230. /*
  3231. * CMD_SET_NEW_STN.
  3232. */
  3233. struct mwl8k_cmd_set_new_stn {
  3234. struct mwl8k_cmd_pkt header;
  3235. __le16 aid;
  3236. __u8 mac_addr[6];
  3237. __le16 stn_id;
  3238. __le16 action;
  3239. __le16 rsvd;
  3240. __le32 legacy_rates;
  3241. __u8 ht_rates[4];
  3242. __le16 cap_info;
  3243. __le16 ht_capabilities_info;
  3244. __u8 mac_ht_param_info;
  3245. __u8 rev;
  3246. __u8 control_channel;
  3247. __u8 add_channel;
  3248. __le16 op_mode;
  3249. __le16 stbc;
  3250. __u8 add_qos_info;
  3251. __u8 is_qos_sta;
  3252. __le32 fw_sta_ptr;
  3253. } __packed;
  3254. #define MWL8K_STA_ACTION_ADD 0
  3255. #define MWL8K_STA_ACTION_REMOVE 2
  3256. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  3257. struct ieee80211_vif *vif,
  3258. struct ieee80211_sta *sta)
  3259. {
  3260. struct mwl8k_cmd_set_new_stn *cmd;
  3261. u32 rates;
  3262. int rc;
  3263. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3264. if (cmd == NULL)
  3265. return -ENOMEM;
  3266. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3267. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3268. cmd->aid = cpu_to_le16(sta->aid);
  3269. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  3270. cmd->stn_id = cpu_to_le16(sta->aid);
  3271. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  3272. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3273. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3274. else
  3275. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3276. cmd->legacy_rates = cpu_to_le32(rates);
  3277. if (sta->ht_cap.ht_supported) {
  3278. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  3279. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  3280. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  3281. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  3282. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  3283. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  3284. ((sta->ht_cap.ampdu_density & 7) << 2);
  3285. cmd->is_qos_sta = 1;
  3286. }
  3287. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3288. kfree(cmd);
  3289. return rc;
  3290. }
  3291. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  3292. struct ieee80211_vif *vif)
  3293. {
  3294. struct mwl8k_cmd_set_new_stn *cmd;
  3295. int rc;
  3296. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3297. if (cmd == NULL)
  3298. return -ENOMEM;
  3299. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3300. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3301. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  3302. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3303. kfree(cmd);
  3304. return rc;
  3305. }
  3306. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  3307. struct ieee80211_vif *vif, u8 *addr)
  3308. {
  3309. struct mwl8k_cmd_set_new_stn *cmd;
  3310. struct mwl8k_priv *priv = hw->priv;
  3311. int rc, i;
  3312. u8 idx;
  3313. spin_lock(&priv->stream_lock);
  3314. /* Destroy any active ampdu streams for this sta */
  3315. for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
  3316. struct mwl8k_ampdu_stream *s;
  3317. s = &priv->ampdu[i];
  3318. if (s->state != AMPDU_NO_STREAM) {
  3319. if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) {
  3320. if (s->state == AMPDU_STREAM_ACTIVE) {
  3321. idx = s->idx;
  3322. spin_unlock(&priv->stream_lock);
  3323. mwl8k_destroy_ba(hw, idx);
  3324. spin_lock(&priv->stream_lock);
  3325. } else if (s->state == AMPDU_STREAM_NEW) {
  3326. mwl8k_remove_stream(hw, s);
  3327. }
  3328. }
  3329. }
  3330. }
  3331. spin_unlock(&priv->stream_lock);
  3332. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3333. if (cmd == NULL)
  3334. return -ENOMEM;
  3335. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3336. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3337. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3338. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  3339. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3340. kfree(cmd);
  3341. return rc;
  3342. }
  3343. /*
  3344. * CMD_UPDATE_ENCRYPTION.
  3345. */
  3346. #define MAX_ENCR_KEY_LENGTH 16
  3347. #define MIC_KEY_LENGTH 8
  3348. struct mwl8k_cmd_update_encryption {
  3349. struct mwl8k_cmd_pkt header;
  3350. __le32 action;
  3351. __le32 reserved;
  3352. __u8 mac_addr[6];
  3353. __u8 encr_type;
  3354. } __packed;
  3355. struct mwl8k_cmd_set_key {
  3356. struct mwl8k_cmd_pkt header;
  3357. __le32 action;
  3358. __le32 reserved;
  3359. __le16 length;
  3360. __le16 key_type_id;
  3361. __le32 key_info;
  3362. __le32 key_id;
  3363. __le16 key_len;
  3364. __u8 key_material[MAX_ENCR_KEY_LENGTH];
  3365. __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
  3366. __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
  3367. __le16 tkip_rsc_low;
  3368. __le32 tkip_rsc_high;
  3369. __le16 tkip_tsc_low;
  3370. __le32 tkip_tsc_high;
  3371. __u8 mac_addr[6];
  3372. } __packed;
  3373. enum {
  3374. MWL8K_ENCR_ENABLE,
  3375. MWL8K_ENCR_SET_KEY,
  3376. MWL8K_ENCR_REMOVE_KEY,
  3377. MWL8K_ENCR_SET_GROUP_KEY,
  3378. };
  3379. #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
  3380. #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
  3381. #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
  3382. #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
  3383. #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
  3384. enum {
  3385. MWL8K_ALG_WEP,
  3386. MWL8K_ALG_TKIP,
  3387. MWL8K_ALG_CCMP,
  3388. };
  3389. #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
  3390. #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
  3391. #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
  3392. #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
  3393. #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
  3394. static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
  3395. struct ieee80211_vif *vif,
  3396. u8 *addr,
  3397. u8 encr_type)
  3398. {
  3399. struct mwl8k_cmd_update_encryption *cmd;
  3400. int rc;
  3401. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3402. if (cmd == NULL)
  3403. return -ENOMEM;
  3404. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3405. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3406. cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
  3407. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3408. cmd->encr_type = encr_type;
  3409. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3410. kfree(cmd);
  3411. return rc;
  3412. }
  3413. static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
  3414. u8 *addr,
  3415. struct ieee80211_key_conf *key)
  3416. {
  3417. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3418. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3419. cmd->length = cpu_to_le16(sizeof(*cmd) -
  3420. offsetof(struct mwl8k_cmd_set_key, length));
  3421. cmd->key_id = cpu_to_le32(key->keyidx);
  3422. cmd->key_len = cpu_to_le16(key->keylen);
  3423. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3424. switch (key->cipher) {
  3425. case WLAN_CIPHER_SUITE_WEP40:
  3426. case WLAN_CIPHER_SUITE_WEP104:
  3427. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
  3428. if (key->keyidx == 0)
  3429. cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
  3430. break;
  3431. case WLAN_CIPHER_SUITE_TKIP:
  3432. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
  3433. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3434. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3435. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3436. cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
  3437. | MWL8K_KEY_FLAG_TSC_VALID);
  3438. break;
  3439. case WLAN_CIPHER_SUITE_CCMP:
  3440. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
  3441. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3442. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3443. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3444. break;
  3445. default:
  3446. return -ENOTSUPP;
  3447. }
  3448. return 0;
  3449. }
  3450. static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
  3451. struct ieee80211_vif *vif,
  3452. u8 *addr,
  3453. struct ieee80211_key_conf *key)
  3454. {
  3455. struct mwl8k_cmd_set_key *cmd;
  3456. int rc;
  3457. int keymlen;
  3458. u32 action;
  3459. u8 idx;
  3460. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3461. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3462. if (cmd == NULL)
  3463. return -ENOMEM;
  3464. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3465. if (rc < 0)
  3466. goto done;
  3467. idx = key->keyidx;
  3468. if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3469. action = MWL8K_ENCR_SET_KEY;
  3470. else
  3471. action = MWL8K_ENCR_SET_GROUP_KEY;
  3472. switch (key->cipher) {
  3473. case WLAN_CIPHER_SUITE_WEP40:
  3474. case WLAN_CIPHER_SUITE_WEP104:
  3475. if (!mwl8k_vif->wep_key_conf[idx].enabled) {
  3476. memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
  3477. sizeof(*key) + key->keylen);
  3478. mwl8k_vif->wep_key_conf[idx].enabled = 1;
  3479. }
  3480. keymlen = key->keylen;
  3481. action = MWL8K_ENCR_SET_KEY;
  3482. break;
  3483. case WLAN_CIPHER_SUITE_TKIP:
  3484. keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
  3485. break;
  3486. case WLAN_CIPHER_SUITE_CCMP:
  3487. keymlen = key->keylen;
  3488. break;
  3489. default:
  3490. rc = -ENOTSUPP;
  3491. goto done;
  3492. }
  3493. memcpy(cmd->key_material, key->key, keymlen);
  3494. cmd->action = cpu_to_le32(action);
  3495. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3496. done:
  3497. kfree(cmd);
  3498. return rc;
  3499. }
  3500. static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
  3501. struct ieee80211_vif *vif,
  3502. u8 *addr,
  3503. struct ieee80211_key_conf *key)
  3504. {
  3505. struct mwl8k_cmd_set_key *cmd;
  3506. int rc;
  3507. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3508. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3509. if (cmd == NULL)
  3510. return -ENOMEM;
  3511. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3512. if (rc < 0)
  3513. goto done;
  3514. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  3515. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  3516. mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
  3517. cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
  3518. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3519. done:
  3520. kfree(cmd);
  3521. return rc;
  3522. }
  3523. static int mwl8k_set_key(struct ieee80211_hw *hw,
  3524. enum set_key_cmd cmd_param,
  3525. struct ieee80211_vif *vif,
  3526. struct ieee80211_sta *sta,
  3527. struct ieee80211_key_conf *key)
  3528. {
  3529. int rc = 0;
  3530. u8 encr_type;
  3531. u8 *addr;
  3532. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3533. if (vif->type == NL80211_IFTYPE_STATION)
  3534. return -EOPNOTSUPP;
  3535. if (sta == NULL)
  3536. addr = vif->addr;
  3537. else
  3538. addr = sta->addr;
  3539. if (cmd_param == SET_KEY) {
  3540. rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
  3541. if (rc)
  3542. goto out;
  3543. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
  3544. || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
  3545. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
  3546. else
  3547. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
  3548. rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
  3549. encr_type);
  3550. if (rc)
  3551. goto out;
  3552. mwl8k_vif->is_hw_crypto_enabled = true;
  3553. } else {
  3554. rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
  3555. if (rc)
  3556. goto out;
  3557. }
  3558. out:
  3559. return rc;
  3560. }
  3561. /*
  3562. * CMD_UPDATE_STADB.
  3563. */
  3564. struct ewc_ht_info {
  3565. __le16 control1;
  3566. __le16 control2;
  3567. __le16 control3;
  3568. } __packed;
  3569. struct peer_capability_info {
  3570. /* Peer type - AP vs. STA. */
  3571. __u8 peer_type;
  3572. /* Basic 802.11 capabilities from assoc resp. */
  3573. __le16 basic_caps;
  3574. /* Set if peer supports 802.11n high throughput (HT). */
  3575. __u8 ht_support;
  3576. /* Valid if HT is supported. */
  3577. __le16 ht_caps;
  3578. __u8 extended_ht_caps;
  3579. struct ewc_ht_info ewc_info;
  3580. /* Legacy rate table. Intersection of our rates and peer rates. */
  3581. __u8 legacy_rates[12];
  3582. /* HT rate table. Intersection of our rates and peer rates. */
  3583. __u8 ht_rates[16];
  3584. __u8 pad[16];
  3585. /* If set, interoperability mode, no proprietary extensions. */
  3586. __u8 interop;
  3587. __u8 pad2;
  3588. __u8 station_id;
  3589. __le16 amsdu_enabled;
  3590. } __packed;
  3591. struct mwl8k_cmd_update_stadb {
  3592. struct mwl8k_cmd_pkt header;
  3593. /* See STADB_ACTION_TYPE */
  3594. __le32 action;
  3595. /* Peer MAC address */
  3596. __u8 peer_addr[ETH_ALEN];
  3597. __le32 reserved;
  3598. /* Peer info - valid during add/update. */
  3599. struct peer_capability_info peer_info;
  3600. } __packed;
  3601. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  3602. #define MWL8K_STA_DB_DEL_ENTRY 2
  3603. /* Peer Entry flags - used to define the type of the peer node */
  3604. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  3605. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  3606. struct ieee80211_vif *vif,
  3607. struct ieee80211_sta *sta)
  3608. {
  3609. struct mwl8k_cmd_update_stadb *cmd;
  3610. struct peer_capability_info *p;
  3611. u32 rates;
  3612. int rc;
  3613. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3614. if (cmd == NULL)
  3615. return -ENOMEM;
  3616. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3617. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3618. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  3619. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  3620. p = &cmd->peer_info;
  3621. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  3622. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  3623. p->ht_support = sta->ht_cap.ht_supported;
  3624. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  3625. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  3626. ((sta->ht_cap.ampdu_density & 7) << 2);
  3627. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3628. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3629. else
  3630. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3631. legacy_rate_mask_to_array(p->legacy_rates, rates);
  3632. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  3633. p->interop = 1;
  3634. p->amsdu_enabled = 0;
  3635. rc = mwl8k_post_cmd(hw, &cmd->header);
  3636. if (!rc)
  3637. rc = p->station_id;
  3638. kfree(cmd);
  3639. return rc;
  3640. }
  3641. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  3642. struct ieee80211_vif *vif, u8 *addr)
  3643. {
  3644. struct mwl8k_cmd_update_stadb *cmd;
  3645. int rc;
  3646. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3647. if (cmd == NULL)
  3648. return -ENOMEM;
  3649. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3650. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3651. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  3652. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  3653. rc = mwl8k_post_cmd(hw, &cmd->header);
  3654. kfree(cmd);
  3655. return rc;
  3656. }
  3657. /*
  3658. * Interrupt handling.
  3659. */
  3660. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  3661. {
  3662. struct ieee80211_hw *hw = dev_id;
  3663. struct mwl8k_priv *priv = hw->priv;
  3664. u32 status;
  3665. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3666. if (!status)
  3667. return IRQ_NONE;
  3668. if (status & MWL8K_A2H_INT_TX_DONE) {
  3669. status &= ~MWL8K_A2H_INT_TX_DONE;
  3670. tasklet_schedule(&priv->poll_tx_task);
  3671. }
  3672. if (status & MWL8K_A2H_INT_RX_READY) {
  3673. status &= ~MWL8K_A2H_INT_RX_READY;
  3674. tasklet_schedule(&priv->poll_rx_task);
  3675. }
  3676. if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
  3677. iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG,
  3678. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3679. atomic_inc(&priv->watchdog_event_pending);
  3680. status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
  3681. ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
  3682. }
  3683. if (status)
  3684. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3685. if (status & MWL8K_A2H_INT_OPC_DONE) {
  3686. if (priv->hostcmd_wait != NULL)
  3687. complete(priv->hostcmd_wait);
  3688. }
  3689. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  3690. if (!mutex_is_locked(&priv->fw_mutex) &&
  3691. priv->radio_on && priv->pending_tx_pkts)
  3692. mwl8k_tx_start(priv);
  3693. }
  3694. return IRQ_HANDLED;
  3695. }
  3696. static void mwl8k_tx_poll(unsigned long data)
  3697. {
  3698. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3699. struct mwl8k_priv *priv = hw->priv;
  3700. int limit;
  3701. int i;
  3702. limit = 32;
  3703. spin_lock_bh(&priv->tx_lock);
  3704. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3705. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  3706. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  3707. complete(priv->tx_wait);
  3708. priv->tx_wait = NULL;
  3709. }
  3710. spin_unlock_bh(&priv->tx_lock);
  3711. if (limit) {
  3712. writel(~MWL8K_A2H_INT_TX_DONE,
  3713. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3714. } else {
  3715. tasklet_schedule(&priv->poll_tx_task);
  3716. }
  3717. }
  3718. static void mwl8k_rx_poll(unsigned long data)
  3719. {
  3720. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3721. struct mwl8k_priv *priv = hw->priv;
  3722. int limit;
  3723. limit = 32;
  3724. limit -= rxq_process(hw, 0, limit);
  3725. limit -= rxq_refill(hw, 0, limit);
  3726. if (limit) {
  3727. writel(~MWL8K_A2H_INT_RX_READY,
  3728. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3729. } else {
  3730. tasklet_schedule(&priv->poll_rx_task);
  3731. }
  3732. }
  3733. /*
  3734. * Core driver operations.
  3735. */
  3736. static void mwl8k_tx(struct ieee80211_hw *hw,
  3737. struct ieee80211_tx_control *control,
  3738. struct sk_buff *skb)
  3739. {
  3740. struct mwl8k_priv *priv = hw->priv;
  3741. int index = skb_get_queue_mapping(skb);
  3742. if (!priv->radio_on) {
  3743. wiphy_debug(hw->wiphy,
  3744. "dropped TX frame since radio disabled\n");
  3745. dev_kfree_skb(skb);
  3746. return;
  3747. }
  3748. mwl8k_txq_xmit(hw, index, control->sta, skb);
  3749. }
  3750. static int mwl8k_start(struct ieee80211_hw *hw)
  3751. {
  3752. struct mwl8k_priv *priv = hw->priv;
  3753. int rc;
  3754. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3755. IRQF_SHARED, MWL8K_NAME, hw);
  3756. if (rc) {
  3757. priv->irq = -1;
  3758. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3759. return -EIO;
  3760. }
  3761. priv->irq = priv->pdev->irq;
  3762. /* Enable TX reclaim and RX tasklets. */
  3763. tasklet_enable(&priv->poll_tx_task);
  3764. tasklet_enable(&priv->poll_rx_task);
  3765. /* Enable interrupts */
  3766. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3767. iowrite32(MWL8K_A2H_EVENTS,
  3768. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3769. rc = mwl8k_fw_lock(hw);
  3770. if (!rc) {
  3771. rc = mwl8k_cmd_radio_enable(hw);
  3772. if (!priv->ap_fw) {
  3773. if (!rc)
  3774. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  3775. if (!rc)
  3776. rc = mwl8k_cmd_set_pre_scan(hw);
  3777. if (!rc)
  3778. rc = mwl8k_cmd_set_post_scan(hw,
  3779. "\x00\x00\x00\x00\x00\x00");
  3780. }
  3781. if (!rc)
  3782. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  3783. if (!rc)
  3784. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  3785. mwl8k_fw_unlock(hw);
  3786. }
  3787. if (rc) {
  3788. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3789. free_irq(priv->pdev->irq, hw);
  3790. priv->irq = -1;
  3791. tasklet_disable(&priv->poll_tx_task);
  3792. tasklet_disable(&priv->poll_rx_task);
  3793. } else {
  3794. ieee80211_wake_queues(hw);
  3795. }
  3796. return rc;
  3797. }
  3798. static void mwl8k_stop(struct ieee80211_hw *hw)
  3799. {
  3800. struct mwl8k_priv *priv = hw->priv;
  3801. int i;
  3802. if (!priv->hw_restart_in_progress)
  3803. mwl8k_cmd_radio_disable(hw);
  3804. ieee80211_stop_queues(hw);
  3805. /* Disable interrupts */
  3806. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3807. if (priv->irq != -1) {
  3808. free_irq(priv->pdev->irq, hw);
  3809. priv->irq = -1;
  3810. }
  3811. /* Stop finalize join worker */
  3812. cancel_work_sync(&priv->finalize_join_worker);
  3813. cancel_work_sync(&priv->watchdog_ba_handle);
  3814. if (priv->beacon_skb != NULL)
  3815. dev_kfree_skb(priv->beacon_skb);
  3816. /* Stop TX reclaim and RX tasklets. */
  3817. tasklet_disable(&priv->poll_tx_task);
  3818. tasklet_disable(&priv->poll_rx_task);
  3819. /* Return all skbs to mac80211 */
  3820. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3821. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3822. }
  3823. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  3824. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  3825. struct ieee80211_vif *vif)
  3826. {
  3827. struct mwl8k_priv *priv = hw->priv;
  3828. struct mwl8k_vif *mwl8k_vif;
  3829. u32 macids_supported;
  3830. int macid, rc;
  3831. struct mwl8k_device_info *di;
  3832. /*
  3833. * Reject interface creation if sniffer mode is active, as
  3834. * STA operation is mutually exclusive with hardware sniffer
  3835. * mode. (Sniffer mode is only used on STA firmware.)
  3836. */
  3837. if (priv->sniffer_enabled) {
  3838. wiphy_info(hw->wiphy,
  3839. "unable to create STA interface because sniffer mode is enabled\n");
  3840. return -EINVAL;
  3841. }
  3842. di = priv->device_info;
  3843. switch (vif->type) {
  3844. case NL80211_IFTYPE_AP:
  3845. if (!priv->ap_fw && di->fw_image_ap) {
  3846. /* we must load the ap fw to meet this request */
  3847. if (!list_empty(&priv->vif_list))
  3848. return -EBUSY;
  3849. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3850. if (rc)
  3851. return rc;
  3852. }
  3853. macids_supported = priv->ap_macids_supported;
  3854. break;
  3855. case NL80211_IFTYPE_STATION:
  3856. if (priv->ap_fw && di->fw_image_sta) {
  3857. if (!list_empty(&priv->vif_list)) {
  3858. wiphy_warn(hw->wiphy, "AP interface is running.\n"
  3859. "Adding STA interface for WDS");
  3860. } else {
  3861. /* we must load the sta fw to
  3862. * meet this request.
  3863. */
  3864. rc = mwl8k_reload_firmware(hw,
  3865. di->fw_image_sta);
  3866. if (rc)
  3867. return rc;
  3868. }
  3869. }
  3870. macids_supported = priv->sta_macids_supported;
  3871. break;
  3872. default:
  3873. return -EINVAL;
  3874. }
  3875. macid = ffs(macids_supported & ~priv->macids_used);
  3876. if (!macid--)
  3877. return -EBUSY;
  3878. /* Setup driver private area. */
  3879. mwl8k_vif = MWL8K_VIF(vif);
  3880. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  3881. mwl8k_vif->vif = vif;
  3882. mwl8k_vif->macid = macid;
  3883. mwl8k_vif->seqno = 0;
  3884. memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
  3885. mwl8k_vif->is_hw_crypto_enabled = false;
  3886. /* Set the mac address. */
  3887. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  3888. if (priv->ap_fw)
  3889. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  3890. priv->macids_used |= 1 << mwl8k_vif->macid;
  3891. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  3892. return 0;
  3893. }
  3894. static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
  3895. {
  3896. /* Has ieee80211_restart_hw re-added the removed interfaces? */
  3897. if (!priv->macids_used)
  3898. return;
  3899. priv->macids_used &= ~(1 << vif->macid);
  3900. list_del(&vif->list);
  3901. }
  3902. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  3903. struct ieee80211_vif *vif)
  3904. {
  3905. struct mwl8k_priv *priv = hw->priv;
  3906. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3907. if (priv->ap_fw)
  3908. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  3909. mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
  3910. mwl8k_remove_vif(priv, mwl8k_vif);
  3911. }
  3912. static void mwl8k_hw_restart_work(struct work_struct *work)
  3913. {
  3914. struct mwl8k_priv *priv =
  3915. container_of(work, struct mwl8k_priv, fw_reload);
  3916. struct ieee80211_hw *hw = priv->hw;
  3917. struct mwl8k_device_info *di;
  3918. int rc;
  3919. /* If some command is waiting for a response, clear it */
  3920. if (priv->hostcmd_wait != NULL) {
  3921. complete(priv->hostcmd_wait);
  3922. priv->hostcmd_wait = NULL;
  3923. }
  3924. priv->hw_restart_owner = current;
  3925. di = priv->device_info;
  3926. mwl8k_fw_lock(hw);
  3927. if (priv->ap_fw)
  3928. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3929. else
  3930. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  3931. if (rc)
  3932. goto fail;
  3933. priv->hw_restart_owner = NULL;
  3934. priv->hw_restart_in_progress = false;
  3935. /*
  3936. * This unlock will wake up the queues and
  3937. * also opens the command path for other
  3938. * commands
  3939. */
  3940. mwl8k_fw_unlock(hw);
  3941. ieee80211_restart_hw(hw);
  3942. wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
  3943. return;
  3944. fail:
  3945. mwl8k_fw_unlock(hw);
  3946. wiphy_err(hw->wiphy, "Firmware restart failed\n");
  3947. }
  3948. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  3949. {
  3950. struct ieee80211_conf *conf = &hw->conf;
  3951. struct mwl8k_priv *priv = hw->priv;
  3952. int rc;
  3953. if (conf->flags & IEEE80211_CONF_IDLE) {
  3954. mwl8k_cmd_radio_disable(hw);
  3955. return 0;
  3956. }
  3957. rc = mwl8k_fw_lock(hw);
  3958. if (rc)
  3959. return rc;
  3960. rc = mwl8k_cmd_radio_enable(hw);
  3961. if (rc)
  3962. goto out;
  3963. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  3964. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  3965. if (rc)
  3966. goto out;
  3967. }
  3968. if (conf->power_level > 18)
  3969. conf->power_level = 18;
  3970. if (priv->ap_fw) {
  3971. if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
  3972. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  3973. if (rc)
  3974. goto out;
  3975. }
  3976. } else {
  3977. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  3978. if (rc)
  3979. goto out;
  3980. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  3981. }
  3982. out:
  3983. mwl8k_fw_unlock(hw);
  3984. return rc;
  3985. }
  3986. static void
  3987. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3988. struct ieee80211_bss_conf *info, u32 changed)
  3989. {
  3990. struct mwl8k_priv *priv = hw->priv;
  3991. u32 ap_legacy_rates = 0;
  3992. u8 ap_mcs_rates[16];
  3993. int rc;
  3994. if (mwl8k_fw_lock(hw))
  3995. return;
  3996. /*
  3997. * No need to capture a beacon if we're no longer associated.
  3998. */
  3999. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  4000. priv->capture_beacon = false;
  4001. /*
  4002. * Get the AP's legacy and MCS rates.
  4003. */
  4004. if (vif->bss_conf.assoc) {
  4005. struct ieee80211_sta *ap;
  4006. rcu_read_lock();
  4007. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  4008. if (ap == NULL) {
  4009. rcu_read_unlock();
  4010. goto out;
  4011. }
  4012. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  4013. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  4014. } else {
  4015. ap_legacy_rates =
  4016. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  4017. }
  4018. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  4019. rcu_read_unlock();
  4020. }
  4021. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  4022. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  4023. if (rc)
  4024. goto out;
  4025. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  4026. if (rc)
  4027. goto out;
  4028. }
  4029. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  4030. rc = mwl8k_set_radio_preamble(hw,
  4031. vif->bss_conf.use_short_preamble);
  4032. if (rc)
  4033. goto out;
  4034. }
  4035. if (changed & BSS_CHANGED_ERP_SLOT) {
  4036. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  4037. if (rc)
  4038. goto out;
  4039. }
  4040. if (vif->bss_conf.assoc &&
  4041. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  4042. BSS_CHANGED_HT))) {
  4043. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  4044. if (rc)
  4045. goto out;
  4046. }
  4047. if (vif->bss_conf.assoc &&
  4048. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  4049. /*
  4050. * Finalize the join. Tell rx handler to process
  4051. * next beacon from our BSSID.
  4052. */
  4053. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  4054. priv->capture_beacon = true;
  4055. }
  4056. out:
  4057. mwl8k_fw_unlock(hw);
  4058. }
  4059. static void
  4060. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4061. struct ieee80211_bss_conf *info, u32 changed)
  4062. {
  4063. int rc;
  4064. if (mwl8k_fw_lock(hw))
  4065. return;
  4066. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  4067. rc = mwl8k_set_radio_preamble(hw,
  4068. vif->bss_conf.use_short_preamble);
  4069. if (rc)
  4070. goto out;
  4071. }
  4072. if (changed & BSS_CHANGED_BASIC_RATES) {
  4073. int idx;
  4074. int rate;
  4075. /*
  4076. * Use lowest supported basic rate for multicasts
  4077. * and management frames (such as probe responses --
  4078. * beacons will always go out at 1 Mb/s).
  4079. */
  4080. idx = ffs(vif->bss_conf.basic_rates);
  4081. if (idx)
  4082. idx--;
  4083. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  4084. rate = mwl8k_rates_24[idx].hw_value;
  4085. else
  4086. rate = mwl8k_rates_50[idx].hw_value;
  4087. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  4088. }
  4089. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  4090. struct sk_buff *skb;
  4091. skb = ieee80211_beacon_get(hw, vif);
  4092. if (skb != NULL) {
  4093. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  4094. kfree_skb(skb);
  4095. }
  4096. }
  4097. if (changed & BSS_CHANGED_BEACON_ENABLED)
  4098. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  4099. out:
  4100. mwl8k_fw_unlock(hw);
  4101. }
  4102. static void
  4103. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4104. struct ieee80211_bss_conf *info, u32 changed)
  4105. {
  4106. struct mwl8k_priv *priv = hw->priv;
  4107. if (!priv->ap_fw)
  4108. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  4109. else
  4110. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  4111. }
  4112. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  4113. struct netdev_hw_addr_list *mc_list)
  4114. {
  4115. struct mwl8k_cmd_pkt *cmd;
  4116. /*
  4117. * Synthesize and return a command packet that programs the
  4118. * hardware multicast address filter. At this point we don't
  4119. * know whether FIF_ALLMULTI is being requested, but if it is,
  4120. * we'll end up throwing this packet away and creating a new
  4121. * one in mwl8k_configure_filter().
  4122. */
  4123. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  4124. return (unsigned long)cmd;
  4125. }
  4126. static int
  4127. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  4128. unsigned int changed_flags,
  4129. unsigned int *total_flags)
  4130. {
  4131. struct mwl8k_priv *priv = hw->priv;
  4132. /*
  4133. * Hardware sniffer mode is mutually exclusive with STA
  4134. * operation, so refuse to enable sniffer mode if a STA
  4135. * interface is active.
  4136. */
  4137. if (!list_empty(&priv->vif_list)) {
  4138. if (net_ratelimit())
  4139. wiphy_info(hw->wiphy,
  4140. "not enabling sniffer mode because STA interface is active\n");
  4141. return 0;
  4142. }
  4143. if (!priv->sniffer_enabled) {
  4144. if (mwl8k_cmd_enable_sniffer(hw, 1))
  4145. return 0;
  4146. priv->sniffer_enabled = true;
  4147. }
  4148. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  4149. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  4150. FIF_OTHER_BSS;
  4151. return 1;
  4152. }
  4153. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  4154. {
  4155. if (!list_empty(&priv->vif_list))
  4156. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  4157. return NULL;
  4158. }
  4159. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  4160. unsigned int changed_flags,
  4161. unsigned int *total_flags,
  4162. u64 multicast)
  4163. {
  4164. struct mwl8k_priv *priv = hw->priv;
  4165. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  4166. /*
  4167. * AP firmware doesn't allow fine-grained control over
  4168. * the receive filter.
  4169. */
  4170. if (priv->ap_fw) {
  4171. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  4172. kfree(cmd);
  4173. return;
  4174. }
  4175. /*
  4176. * Enable hardware sniffer mode if FIF_CONTROL or
  4177. * FIF_OTHER_BSS is requested.
  4178. */
  4179. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  4180. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  4181. kfree(cmd);
  4182. return;
  4183. }
  4184. /* Clear unsupported feature flags */
  4185. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  4186. if (mwl8k_fw_lock(hw)) {
  4187. kfree(cmd);
  4188. return;
  4189. }
  4190. if (priv->sniffer_enabled) {
  4191. mwl8k_cmd_enable_sniffer(hw, 0);
  4192. priv->sniffer_enabled = false;
  4193. }
  4194. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4195. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  4196. /*
  4197. * Disable the BSS filter.
  4198. */
  4199. mwl8k_cmd_set_pre_scan(hw);
  4200. } else {
  4201. struct mwl8k_vif *mwl8k_vif;
  4202. const u8 *bssid;
  4203. /*
  4204. * Enable the BSS filter.
  4205. *
  4206. * If there is an active STA interface, use that
  4207. * interface's BSSID, otherwise use a dummy one
  4208. * (where the OUI part needs to be nonzero for
  4209. * the BSSID to be accepted by POST_SCAN).
  4210. */
  4211. mwl8k_vif = mwl8k_first_vif(priv);
  4212. if (mwl8k_vif != NULL)
  4213. bssid = mwl8k_vif->vif->bss_conf.bssid;
  4214. else
  4215. bssid = "\x01\x00\x00\x00\x00\x00";
  4216. mwl8k_cmd_set_post_scan(hw, bssid);
  4217. }
  4218. }
  4219. /*
  4220. * If FIF_ALLMULTI is being requested, throw away the command
  4221. * packet that ->prepare_multicast() built and replace it with
  4222. * a command packet that enables reception of all multicast
  4223. * packets.
  4224. */
  4225. if (*total_flags & FIF_ALLMULTI) {
  4226. kfree(cmd);
  4227. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  4228. }
  4229. if (cmd != NULL) {
  4230. mwl8k_post_cmd(hw, cmd);
  4231. kfree(cmd);
  4232. }
  4233. mwl8k_fw_unlock(hw);
  4234. }
  4235. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  4236. {
  4237. return mwl8k_cmd_set_rts_threshold(hw, value);
  4238. }
  4239. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  4240. struct ieee80211_vif *vif,
  4241. struct ieee80211_sta *sta)
  4242. {
  4243. struct mwl8k_priv *priv = hw->priv;
  4244. if (priv->ap_fw)
  4245. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  4246. else
  4247. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  4248. }
  4249. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  4250. struct ieee80211_vif *vif,
  4251. struct ieee80211_sta *sta)
  4252. {
  4253. struct mwl8k_priv *priv = hw->priv;
  4254. int ret;
  4255. int i;
  4256. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  4257. struct ieee80211_key_conf *key;
  4258. if (!priv->ap_fw) {
  4259. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  4260. if (ret >= 0) {
  4261. MWL8K_STA(sta)->peer_id = ret;
  4262. if (sta->ht_cap.ht_supported)
  4263. MWL8K_STA(sta)->is_ampdu_allowed = true;
  4264. ret = 0;
  4265. }
  4266. } else {
  4267. ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  4268. }
  4269. for (i = 0; i < NUM_WEP_KEYS; i++) {
  4270. key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
  4271. if (mwl8k_vif->wep_key_conf[i].enabled)
  4272. mwl8k_set_key(hw, SET_KEY, vif, sta, key);
  4273. }
  4274. return ret;
  4275. }
  4276. static int mwl8k_conf_tx(struct ieee80211_hw *hw,
  4277. struct ieee80211_vif *vif, u16 queue,
  4278. const struct ieee80211_tx_queue_params *params)
  4279. {
  4280. struct mwl8k_priv *priv = hw->priv;
  4281. int rc;
  4282. rc = mwl8k_fw_lock(hw);
  4283. if (!rc) {
  4284. BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
  4285. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  4286. if (!priv->wmm_enabled)
  4287. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  4288. if (!rc) {
  4289. int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
  4290. rc = mwl8k_cmd_set_edca_params(hw, q,
  4291. params->cw_min,
  4292. params->cw_max,
  4293. params->aifs,
  4294. params->txop);
  4295. }
  4296. mwl8k_fw_unlock(hw);
  4297. }
  4298. return rc;
  4299. }
  4300. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  4301. struct ieee80211_low_level_stats *stats)
  4302. {
  4303. return mwl8k_cmd_get_stat(hw, stats);
  4304. }
  4305. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  4306. struct survey_info *survey)
  4307. {
  4308. struct mwl8k_priv *priv = hw->priv;
  4309. struct ieee80211_conf *conf = &hw->conf;
  4310. if (idx != 0)
  4311. return -ENOENT;
  4312. survey->channel = conf->channel;
  4313. survey->filled = SURVEY_INFO_NOISE_DBM;
  4314. survey->noise = priv->noise;
  4315. return 0;
  4316. }
  4317. #define MAX_AMPDU_ATTEMPTS 5
  4318. static int
  4319. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4320. enum ieee80211_ampdu_mlme_action action,
  4321. struct ieee80211_sta *sta, u16 tid, u16 *ssn,
  4322. u8 buf_size)
  4323. {
  4324. int i, rc = 0;
  4325. struct mwl8k_priv *priv = hw->priv;
  4326. struct mwl8k_ampdu_stream *stream;
  4327. u8 *addr = sta->addr, idx;
  4328. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  4329. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  4330. return -ENOTSUPP;
  4331. spin_lock(&priv->stream_lock);
  4332. stream = mwl8k_lookup_stream(hw, addr, tid);
  4333. switch (action) {
  4334. case IEEE80211_AMPDU_RX_START:
  4335. case IEEE80211_AMPDU_RX_STOP:
  4336. break;
  4337. case IEEE80211_AMPDU_TX_START:
  4338. /* By the time we get here the hw queues may contain outgoing
  4339. * packets for this RA/TID that are not part of this BA
  4340. * session. The hw will assign sequence numbers to these
  4341. * packets as they go out. So if we query the hw for its next
  4342. * sequence number and use that for the SSN here, it may end up
  4343. * being wrong, which will lead to sequence number mismatch at
  4344. * the recipient. To avoid this, we reset the sequence number
  4345. * to O for the first MPDU in this BA stream.
  4346. */
  4347. *ssn = 0;
  4348. if (stream == NULL) {
  4349. /* This means that somebody outside this driver called
  4350. * ieee80211_start_tx_ba_session. This is unexpected
  4351. * because we do our own rate control. Just warn and
  4352. * move on.
  4353. */
  4354. wiphy_warn(hw->wiphy, "Unexpected call to %s. "
  4355. "Proceeding anyway.\n", __func__);
  4356. stream = mwl8k_add_stream(hw, sta, tid);
  4357. }
  4358. if (stream == NULL) {
  4359. wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
  4360. rc = -EBUSY;
  4361. break;
  4362. }
  4363. stream->state = AMPDU_STREAM_IN_PROGRESS;
  4364. /* Release the lock before we do the time consuming stuff */
  4365. spin_unlock(&priv->stream_lock);
  4366. for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
  4367. /* Check if link is still valid */
  4368. if (!sta_info->is_ampdu_allowed) {
  4369. spin_lock(&priv->stream_lock);
  4370. mwl8k_remove_stream(hw, stream);
  4371. spin_unlock(&priv->stream_lock);
  4372. return -EBUSY;
  4373. }
  4374. rc = mwl8k_check_ba(hw, stream, vif);
  4375. /* If HW restart is in progress mwl8k_post_cmd will
  4376. * return -EBUSY. Avoid retrying mwl8k_check_ba in
  4377. * such cases
  4378. */
  4379. if (!rc || rc == -EBUSY)
  4380. break;
  4381. /*
  4382. * HW queues take time to be flushed, give them
  4383. * sufficient time
  4384. */
  4385. msleep(1000);
  4386. }
  4387. spin_lock(&priv->stream_lock);
  4388. if (rc) {
  4389. wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
  4390. " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
  4391. mwl8k_remove_stream(hw, stream);
  4392. rc = -EBUSY;
  4393. break;
  4394. }
  4395. ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
  4396. break;
  4397. case IEEE80211_AMPDU_TX_STOP_CONT:
  4398. case IEEE80211_AMPDU_TX_STOP_FLUSH:
  4399. case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
  4400. if (stream) {
  4401. if (stream->state == AMPDU_STREAM_ACTIVE) {
  4402. idx = stream->idx;
  4403. spin_unlock(&priv->stream_lock);
  4404. mwl8k_destroy_ba(hw, idx);
  4405. spin_lock(&priv->stream_lock);
  4406. }
  4407. mwl8k_remove_stream(hw, stream);
  4408. }
  4409. ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
  4410. break;
  4411. case IEEE80211_AMPDU_TX_OPERATIONAL:
  4412. BUG_ON(stream == NULL);
  4413. BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
  4414. spin_unlock(&priv->stream_lock);
  4415. rc = mwl8k_create_ba(hw, stream, buf_size, vif);
  4416. spin_lock(&priv->stream_lock);
  4417. if (!rc)
  4418. stream->state = AMPDU_STREAM_ACTIVE;
  4419. else {
  4420. idx = stream->idx;
  4421. spin_unlock(&priv->stream_lock);
  4422. mwl8k_destroy_ba(hw, idx);
  4423. spin_lock(&priv->stream_lock);
  4424. wiphy_debug(hw->wiphy,
  4425. "Failed adding stream for sta %pM tid %d\n",
  4426. addr, tid);
  4427. mwl8k_remove_stream(hw, stream);
  4428. }
  4429. break;
  4430. default:
  4431. rc = -ENOTSUPP;
  4432. }
  4433. spin_unlock(&priv->stream_lock);
  4434. return rc;
  4435. }
  4436. static const struct ieee80211_ops mwl8k_ops = {
  4437. .tx = mwl8k_tx,
  4438. .start = mwl8k_start,
  4439. .stop = mwl8k_stop,
  4440. .add_interface = mwl8k_add_interface,
  4441. .remove_interface = mwl8k_remove_interface,
  4442. .config = mwl8k_config,
  4443. .bss_info_changed = mwl8k_bss_info_changed,
  4444. .prepare_multicast = mwl8k_prepare_multicast,
  4445. .configure_filter = mwl8k_configure_filter,
  4446. .set_key = mwl8k_set_key,
  4447. .set_rts_threshold = mwl8k_set_rts_threshold,
  4448. .sta_add = mwl8k_sta_add,
  4449. .sta_remove = mwl8k_sta_remove,
  4450. .conf_tx = mwl8k_conf_tx,
  4451. .get_stats = mwl8k_get_stats,
  4452. .get_survey = mwl8k_get_survey,
  4453. .ampdu_action = mwl8k_ampdu_action,
  4454. };
  4455. static void mwl8k_finalize_join_worker(struct work_struct *work)
  4456. {
  4457. struct mwl8k_priv *priv =
  4458. container_of(work, struct mwl8k_priv, finalize_join_worker);
  4459. struct sk_buff *skb = priv->beacon_skb;
  4460. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  4461. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  4462. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  4463. mgmt->u.beacon.variable, len);
  4464. int dtim_period = 1;
  4465. if (tim && tim[1] >= 2)
  4466. dtim_period = tim[3];
  4467. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  4468. dev_kfree_skb(skb);
  4469. priv->beacon_skb = NULL;
  4470. }
  4471. enum {
  4472. MWL8363 = 0,
  4473. MWL8687,
  4474. MWL8366,
  4475. };
  4476. #define MWL8K_8366_AP_FW_API 3
  4477. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  4478. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  4479. static struct mwl8k_device_info mwl8k_info_tbl[] = {
  4480. [MWL8363] = {
  4481. .part_name = "88w8363",
  4482. .helper_image = "mwl8k/helper_8363.fw",
  4483. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  4484. },
  4485. [MWL8687] = {
  4486. .part_name = "88w8687",
  4487. .helper_image = "mwl8k/helper_8687.fw",
  4488. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  4489. },
  4490. [MWL8366] = {
  4491. .part_name = "88w8366",
  4492. .helper_image = "mwl8k/helper_8366.fw",
  4493. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  4494. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  4495. .fw_api_ap = MWL8K_8366_AP_FW_API,
  4496. .ap_rxd_ops = &rxd_8366_ap_ops,
  4497. },
  4498. };
  4499. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  4500. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  4501. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  4502. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  4503. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  4504. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  4505. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  4506. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  4507. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  4508. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  4509. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  4510. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  4511. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  4512. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  4513. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  4514. { },
  4515. };
  4516. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  4517. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  4518. {
  4519. int rc;
  4520. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  4521. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  4522. priv->fw_pref, priv->fw_alt);
  4523. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  4524. if (rc) {
  4525. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4526. pci_name(priv->pdev), priv->fw_alt);
  4527. return rc;
  4528. }
  4529. return 0;
  4530. }
  4531. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  4532. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  4533. {
  4534. struct mwl8k_priv *priv = context;
  4535. struct mwl8k_device_info *di = priv->device_info;
  4536. int rc;
  4537. switch (priv->fw_state) {
  4538. case FW_STATE_INIT:
  4539. if (!fw) {
  4540. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  4541. pci_name(priv->pdev), di->helper_image);
  4542. goto fail;
  4543. }
  4544. priv->fw_helper = fw;
  4545. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  4546. true);
  4547. if (rc && priv->fw_alt) {
  4548. rc = mwl8k_request_alt_fw(priv);
  4549. if (rc)
  4550. goto fail;
  4551. priv->fw_state = FW_STATE_LOADING_ALT;
  4552. } else if (rc)
  4553. goto fail;
  4554. else
  4555. priv->fw_state = FW_STATE_LOADING_PREF;
  4556. break;
  4557. case FW_STATE_LOADING_PREF:
  4558. if (!fw) {
  4559. if (priv->fw_alt) {
  4560. rc = mwl8k_request_alt_fw(priv);
  4561. if (rc)
  4562. goto fail;
  4563. priv->fw_state = FW_STATE_LOADING_ALT;
  4564. } else
  4565. goto fail;
  4566. } else {
  4567. priv->fw_ucode = fw;
  4568. rc = mwl8k_firmware_load_success(priv);
  4569. if (rc)
  4570. goto fail;
  4571. else
  4572. complete(&priv->firmware_loading_complete);
  4573. }
  4574. break;
  4575. case FW_STATE_LOADING_ALT:
  4576. if (!fw) {
  4577. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4578. pci_name(priv->pdev), di->helper_image);
  4579. goto fail;
  4580. }
  4581. priv->fw_ucode = fw;
  4582. rc = mwl8k_firmware_load_success(priv);
  4583. if (rc)
  4584. goto fail;
  4585. else
  4586. complete(&priv->firmware_loading_complete);
  4587. break;
  4588. default:
  4589. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  4590. MWL8K_NAME, priv->fw_state);
  4591. BUG_ON(1);
  4592. }
  4593. return;
  4594. fail:
  4595. priv->fw_state = FW_STATE_ERROR;
  4596. complete(&priv->firmware_loading_complete);
  4597. device_release_driver(&priv->pdev->dev);
  4598. mwl8k_release_firmware(priv);
  4599. }
  4600. #define MAX_RESTART_ATTEMPTS 1
  4601. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  4602. bool nowait)
  4603. {
  4604. struct mwl8k_priv *priv = hw->priv;
  4605. int rc;
  4606. int count = MAX_RESTART_ATTEMPTS;
  4607. retry:
  4608. /* Reset firmware and hardware */
  4609. mwl8k_hw_reset(priv);
  4610. /* Ask userland hotplug daemon for the device firmware */
  4611. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  4612. if (rc) {
  4613. wiphy_err(hw->wiphy, "Firmware files not found\n");
  4614. return rc;
  4615. }
  4616. if (nowait)
  4617. return rc;
  4618. /* Load firmware into hardware */
  4619. rc = mwl8k_load_firmware(hw);
  4620. if (rc)
  4621. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4622. /* Reclaim memory once firmware is successfully loaded */
  4623. mwl8k_release_firmware(priv);
  4624. if (rc && count) {
  4625. /* FW did not start successfully;
  4626. * lets try one more time
  4627. */
  4628. count--;
  4629. wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
  4630. msleep(20);
  4631. goto retry;
  4632. }
  4633. return rc;
  4634. }
  4635. static int mwl8k_init_txqs(struct ieee80211_hw *hw)
  4636. {
  4637. struct mwl8k_priv *priv = hw->priv;
  4638. int rc = 0;
  4639. int i;
  4640. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  4641. rc = mwl8k_txq_init(hw, i);
  4642. if (rc)
  4643. break;
  4644. if (priv->ap_fw)
  4645. iowrite32(priv->txq[i].txd_dma,
  4646. priv->sram + priv->txq_offset[i]);
  4647. }
  4648. return rc;
  4649. }
  4650. /* initialize hw after successfully loading a firmware image */
  4651. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  4652. {
  4653. struct mwl8k_priv *priv = hw->priv;
  4654. int rc = 0;
  4655. int i;
  4656. if (priv->ap_fw) {
  4657. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  4658. if (priv->rxd_ops == NULL) {
  4659. wiphy_err(hw->wiphy,
  4660. "Driver does not have AP firmware image support for this hardware\n");
  4661. rc = -ENOENT;
  4662. goto err_stop_firmware;
  4663. }
  4664. } else {
  4665. priv->rxd_ops = &rxd_sta_ops;
  4666. }
  4667. priv->sniffer_enabled = false;
  4668. priv->wmm_enabled = false;
  4669. priv->pending_tx_pkts = 0;
  4670. atomic_set(&priv->watchdog_event_pending, 0);
  4671. rc = mwl8k_rxq_init(hw, 0);
  4672. if (rc)
  4673. goto err_stop_firmware;
  4674. rxq_refill(hw, 0, INT_MAX);
  4675. /* For the sta firmware, we need to know the dma addresses of tx queues
  4676. * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
  4677. * prior to issuing this command. But for the AP case, we learn the
  4678. * total number of queues from the result CMD_GET_HW_SPEC, so for this
  4679. * case we must initialize the tx queues after.
  4680. */
  4681. priv->num_ampdu_queues = 0;
  4682. if (!priv->ap_fw) {
  4683. rc = mwl8k_init_txqs(hw);
  4684. if (rc)
  4685. goto err_free_queues;
  4686. }
  4687. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  4688. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4689. iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
  4690. MWL8K_A2H_INT_BA_WATCHDOG,
  4691. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  4692. iowrite32(MWL8K_A2H_INT_OPC_DONE,
  4693. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  4694. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  4695. IRQF_SHARED, MWL8K_NAME, hw);
  4696. if (rc) {
  4697. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  4698. goto err_free_queues;
  4699. }
  4700. /*
  4701. * When hw restart is requested,
  4702. * mac80211 will take care of clearing
  4703. * the ampdu streams, so do not clear
  4704. * the ampdu state here
  4705. */
  4706. if (!priv->hw_restart_in_progress)
  4707. memset(priv->ampdu, 0, sizeof(priv->ampdu));
  4708. /*
  4709. * Temporarily enable interrupts. Initial firmware host
  4710. * commands use interrupts and avoid polling. Disable
  4711. * interrupts when done.
  4712. */
  4713. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4714. /* Get config data, mac addrs etc */
  4715. if (priv->ap_fw) {
  4716. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  4717. if (!rc)
  4718. rc = mwl8k_init_txqs(hw);
  4719. if (!rc)
  4720. rc = mwl8k_cmd_set_hw_spec(hw);
  4721. } else {
  4722. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  4723. }
  4724. if (rc) {
  4725. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  4726. goto err_free_irq;
  4727. }
  4728. /* Turn radio off */
  4729. rc = mwl8k_cmd_radio_disable(hw);
  4730. if (rc) {
  4731. wiphy_err(hw->wiphy, "Cannot disable\n");
  4732. goto err_free_irq;
  4733. }
  4734. /* Clear MAC address */
  4735. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  4736. if (rc) {
  4737. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  4738. goto err_free_irq;
  4739. }
  4740. /* Configure Antennas */
  4741. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
  4742. if (rc)
  4743. wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
  4744. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  4745. if (rc)
  4746. wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
  4747. /* Disable interrupts */
  4748. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4749. free_irq(priv->pdev->irq, hw);
  4750. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  4751. priv->device_info->part_name,
  4752. priv->hw_rev, hw->wiphy->perm_addr,
  4753. priv->ap_fw ? "AP" : "STA",
  4754. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  4755. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  4756. return 0;
  4757. err_free_irq:
  4758. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4759. free_irq(priv->pdev->irq, hw);
  4760. err_free_queues:
  4761. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4762. mwl8k_txq_deinit(hw, i);
  4763. mwl8k_rxq_deinit(hw, 0);
  4764. err_stop_firmware:
  4765. mwl8k_hw_reset(priv);
  4766. return rc;
  4767. }
  4768. /*
  4769. * invoke mwl8k_reload_firmware to change the firmware image after the device
  4770. * has already been registered
  4771. */
  4772. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  4773. {
  4774. int i, rc = 0;
  4775. struct mwl8k_priv *priv = hw->priv;
  4776. struct mwl8k_vif *vif, *tmp_vif;
  4777. mwl8k_stop(hw);
  4778. mwl8k_rxq_deinit(hw, 0);
  4779. /*
  4780. * All the existing interfaces are re-added by the ieee80211_reconfig;
  4781. * which means driver should remove existing interfaces before calling
  4782. * ieee80211_restart_hw
  4783. */
  4784. if (priv->hw_restart_in_progress)
  4785. list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
  4786. mwl8k_remove_vif(priv, vif);
  4787. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4788. mwl8k_txq_deinit(hw, i);
  4789. rc = mwl8k_init_firmware(hw, fw_image, false);
  4790. if (rc)
  4791. goto fail;
  4792. rc = mwl8k_probe_hw(hw);
  4793. if (rc)
  4794. goto fail;
  4795. if (priv->hw_restart_in_progress)
  4796. return rc;
  4797. rc = mwl8k_start(hw);
  4798. if (rc)
  4799. goto fail;
  4800. rc = mwl8k_config(hw, ~0);
  4801. if (rc)
  4802. goto fail;
  4803. for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
  4804. rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
  4805. if (rc)
  4806. goto fail;
  4807. }
  4808. return rc;
  4809. fail:
  4810. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  4811. return rc;
  4812. }
  4813. static const struct ieee80211_iface_limit ap_if_limits[] = {
  4814. { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
  4815. { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) },
  4816. };
  4817. static const struct ieee80211_iface_combination ap_if_comb = {
  4818. .limits = ap_if_limits,
  4819. .n_limits = ARRAY_SIZE(ap_if_limits),
  4820. .max_interfaces = 8,
  4821. .num_different_channels = 1,
  4822. };
  4823. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  4824. {
  4825. struct ieee80211_hw *hw = priv->hw;
  4826. int i, rc;
  4827. rc = mwl8k_load_firmware(hw);
  4828. mwl8k_release_firmware(priv);
  4829. if (rc) {
  4830. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4831. return rc;
  4832. }
  4833. /*
  4834. * Extra headroom is the size of the required DMA header
  4835. * minus the size of the smallest 802.11 frame (CTS frame).
  4836. */
  4837. hw->extra_tx_headroom =
  4838. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  4839. hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
  4840. hw->channel_change_time = 10;
  4841. hw->queues = MWL8K_TX_WMM_QUEUES;
  4842. /* Set rssi values to dBm */
  4843. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
  4844. /*
  4845. * Ask mac80211 to not to trigger PS mode
  4846. * based on PM bit of incoming frames.
  4847. */
  4848. if (priv->ap_fw)
  4849. hw->flags |= IEEE80211_HW_AP_LINK_PS;
  4850. hw->vif_data_size = sizeof(struct mwl8k_vif);
  4851. hw->sta_data_size = sizeof(struct mwl8k_sta);
  4852. priv->macids_used = 0;
  4853. INIT_LIST_HEAD(&priv->vif_list);
  4854. /* Set default radio state and preamble */
  4855. priv->radio_on = false;
  4856. priv->radio_short_preamble = false;
  4857. /* Finalize join worker */
  4858. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  4859. /* Handle watchdog ba events */
  4860. INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
  4861. /* To reload the firmware if it crashes */
  4862. INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
  4863. /* TX reclaim and RX tasklets. */
  4864. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  4865. tasklet_disable(&priv->poll_tx_task);
  4866. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  4867. tasklet_disable(&priv->poll_rx_task);
  4868. /* Power management cookie */
  4869. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  4870. if (priv->cookie == NULL)
  4871. return -ENOMEM;
  4872. mutex_init(&priv->fw_mutex);
  4873. priv->fw_mutex_owner = NULL;
  4874. priv->fw_mutex_depth = 0;
  4875. priv->hostcmd_wait = NULL;
  4876. spin_lock_init(&priv->tx_lock);
  4877. spin_lock_init(&priv->stream_lock);
  4878. priv->tx_wait = NULL;
  4879. rc = mwl8k_probe_hw(hw);
  4880. if (rc)
  4881. goto err_free_cookie;
  4882. hw->wiphy->interface_modes = 0;
  4883. if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
  4884. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  4885. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  4886. hw->wiphy->iface_combinations = &ap_if_comb;
  4887. hw->wiphy->n_iface_combinations = 1;
  4888. }
  4889. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  4890. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  4891. rc = ieee80211_register_hw(hw);
  4892. if (rc) {
  4893. wiphy_err(hw->wiphy, "Cannot register device\n");
  4894. goto err_unprobe_hw;
  4895. }
  4896. return 0;
  4897. err_unprobe_hw:
  4898. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4899. mwl8k_txq_deinit(hw, i);
  4900. mwl8k_rxq_deinit(hw, 0);
  4901. err_free_cookie:
  4902. if (priv->cookie != NULL)
  4903. pci_free_consistent(priv->pdev, 4,
  4904. priv->cookie, priv->cookie_dma);
  4905. return rc;
  4906. }
  4907. static int mwl8k_probe(struct pci_dev *pdev,
  4908. const struct pci_device_id *id)
  4909. {
  4910. static int printed_version;
  4911. struct ieee80211_hw *hw;
  4912. struct mwl8k_priv *priv;
  4913. struct mwl8k_device_info *di;
  4914. int rc;
  4915. if (!printed_version) {
  4916. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  4917. printed_version = 1;
  4918. }
  4919. rc = pci_enable_device(pdev);
  4920. if (rc) {
  4921. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  4922. MWL8K_NAME);
  4923. return rc;
  4924. }
  4925. rc = pci_request_regions(pdev, MWL8K_NAME);
  4926. if (rc) {
  4927. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  4928. MWL8K_NAME);
  4929. goto err_disable_device;
  4930. }
  4931. pci_set_master(pdev);
  4932. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  4933. if (hw == NULL) {
  4934. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  4935. rc = -ENOMEM;
  4936. goto err_free_reg;
  4937. }
  4938. SET_IEEE80211_DEV(hw, &pdev->dev);
  4939. pci_set_drvdata(pdev, hw);
  4940. priv = hw->priv;
  4941. priv->hw = hw;
  4942. priv->pdev = pdev;
  4943. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  4944. priv->sram = pci_iomap(pdev, 0, 0x10000);
  4945. if (priv->sram == NULL) {
  4946. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  4947. rc = -EIO;
  4948. goto err_iounmap;
  4949. }
  4950. /*
  4951. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  4952. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  4953. */
  4954. priv->regs = pci_iomap(pdev, 1, 0x10000);
  4955. if (priv->regs == NULL) {
  4956. priv->regs = pci_iomap(pdev, 2, 0x10000);
  4957. if (priv->regs == NULL) {
  4958. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  4959. rc = -EIO;
  4960. goto err_iounmap;
  4961. }
  4962. }
  4963. /*
  4964. * Choose the initial fw image depending on user input. If a second
  4965. * image is available, make it the alternative image that will be
  4966. * loaded if the first one fails.
  4967. */
  4968. init_completion(&priv->firmware_loading_complete);
  4969. di = priv->device_info;
  4970. if (ap_mode_default && di->fw_image_ap) {
  4971. priv->fw_pref = di->fw_image_ap;
  4972. priv->fw_alt = di->fw_image_sta;
  4973. } else if (!ap_mode_default && di->fw_image_sta) {
  4974. priv->fw_pref = di->fw_image_sta;
  4975. priv->fw_alt = di->fw_image_ap;
  4976. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  4977. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  4978. priv->fw_pref = di->fw_image_sta;
  4979. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  4980. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  4981. priv->fw_pref = di->fw_image_ap;
  4982. }
  4983. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  4984. if (rc)
  4985. goto err_stop_firmware;
  4986. priv->hw_restart_in_progress = false;
  4987. priv->running_bsses = 0;
  4988. return rc;
  4989. err_stop_firmware:
  4990. mwl8k_hw_reset(priv);
  4991. err_iounmap:
  4992. if (priv->regs != NULL)
  4993. pci_iounmap(pdev, priv->regs);
  4994. if (priv->sram != NULL)
  4995. pci_iounmap(pdev, priv->sram);
  4996. pci_set_drvdata(pdev, NULL);
  4997. ieee80211_free_hw(hw);
  4998. err_free_reg:
  4999. pci_release_regions(pdev);
  5000. err_disable_device:
  5001. pci_disable_device(pdev);
  5002. return rc;
  5003. }
  5004. static void mwl8k_remove(struct pci_dev *pdev)
  5005. {
  5006. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  5007. struct mwl8k_priv *priv;
  5008. int i;
  5009. if (hw == NULL)
  5010. return;
  5011. priv = hw->priv;
  5012. wait_for_completion(&priv->firmware_loading_complete);
  5013. if (priv->fw_state == FW_STATE_ERROR) {
  5014. mwl8k_hw_reset(priv);
  5015. goto unmap;
  5016. }
  5017. ieee80211_stop_queues(hw);
  5018. ieee80211_unregister_hw(hw);
  5019. /* Remove TX reclaim and RX tasklets. */
  5020. tasklet_kill(&priv->poll_tx_task);
  5021. tasklet_kill(&priv->poll_rx_task);
  5022. /* Stop hardware */
  5023. mwl8k_hw_reset(priv);
  5024. /* Return all skbs to mac80211 */
  5025. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  5026. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  5027. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  5028. mwl8k_txq_deinit(hw, i);
  5029. mwl8k_rxq_deinit(hw, 0);
  5030. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  5031. unmap:
  5032. pci_iounmap(pdev, priv->regs);
  5033. pci_iounmap(pdev, priv->sram);
  5034. pci_set_drvdata(pdev, NULL);
  5035. ieee80211_free_hw(hw);
  5036. pci_release_regions(pdev);
  5037. pci_disable_device(pdev);
  5038. }
  5039. static struct pci_driver mwl8k_driver = {
  5040. .name = MWL8K_NAME,
  5041. .id_table = mwl8k_pci_id_table,
  5042. .probe = mwl8k_probe,
  5043. .remove = mwl8k_remove,
  5044. };
  5045. module_pci_driver(mwl8k_driver);
  5046. MODULE_DESCRIPTION(MWL8K_DESC);
  5047. MODULE_VERSION(MWL8K_VERSION);
  5048. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  5049. MODULE_LICENSE("GPL");