rt2x00queue.c 20 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/dma-mapping.h>
  24. #include "rt2x00.h"
  25. #include "rt2x00lib.h"
  26. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  27. struct queue_entry *entry)
  28. {
  29. struct sk_buff *skb;
  30. struct skb_frame_desc *skbdesc;
  31. unsigned int frame_size;
  32. unsigned int head_size = 0;
  33. unsigned int tail_size = 0;
  34. /*
  35. * The frame size includes descriptor size, because the
  36. * hardware directly receive the frame into the skbuffer.
  37. */
  38. frame_size = entry->queue->data_size + entry->queue->desc_size;
  39. /*
  40. * The payload should be aligned to a 4-byte boundary,
  41. * this means we need at least 3 bytes for moving the frame
  42. * into the correct offset.
  43. */
  44. head_size = 4;
  45. /*
  46. * For IV/EIV/ICV assembly we must make sure there is
  47. * at least 8 bytes bytes available in headroom for IV/EIV
  48. * and 8 bytes for ICV data as tailroon.
  49. */
  50. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  51. head_size += 8;
  52. tail_size += 8;
  53. }
  54. /*
  55. * Allocate skbuffer.
  56. */
  57. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  58. if (!skb)
  59. return NULL;
  60. /*
  61. * Make sure we not have a frame with the requested bytes
  62. * available in the head and tail.
  63. */
  64. skb_reserve(skb, head_size);
  65. skb_put(skb, frame_size);
  66. /*
  67. * Populate skbdesc.
  68. */
  69. skbdesc = get_skb_frame_desc(skb);
  70. memset(skbdesc, 0, sizeof(*skbdesc));
  71. skbdesc->entry = entry;
  72. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  73. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  74. skb->data,
  75. skb->len,
  76. DMA_FROM_DEVICE);
  77. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  78. }
  79. return skb;
  80. }
  81. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  82. {
  83. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  84. /*
  85. * If device has requested headroom, we should make sure that
  86. * is also mapped to the DMA so it can be used for transfering
  87. * additional descriptor information to the hardware.
  88. */
  89. skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
  90. skbdesc->skb_dma =
  91. dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
  92. /*
  93. * Restore data pointer to original location again.
  94. */
  95. skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
  96. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  97. }
  98. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  99. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  100. {
  101. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  102. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  103. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  104. DMA_FROM_DEVICE);
  105. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  106. }
  107. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  108. /*
  109. * Add headroom to the skb length, it has been removed
  110. * by the driver, but it was actually mapped to DMA.
  111. */
  112. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
  113. skb->len + rt2x00dev->hw->extra_tx_headroom,
  114. DMA_TO_DEVICE);
  115. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  116. }
  117. }
  118. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  119. {
  120. if (!skb)
  121. return;
  122. rt2x00queue_unmap_skb(rt2x00dev, skb);
  123. dev_kfree_skb_any(skb);
  124. }
  125. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  126. struct txentry_desc *txdesc)
  127. {
  128. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  129. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  130. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  131. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  132. struct ieee80211_rate *rate =
  133. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  134. const struct rt2x00_rate *hwrate;
  135. unsigned int data_length;
  136. unsigned int duration;
  137. unsigned int residual;
  138. unsigned long irqflags;
  139. memset(txdesc, 0, sizeof(*txdesc));
  140. /*
  141. * Initialize information from queue
  142. */
  143. txdesc->queue = entry->queue->qid;
  144. txdesc->cw_min = entry->queue->cw_min;
  145. txdesc->cw_max = entry->queue->cw_max;
  146. txdesc->aifs = entry->queue->aifs;
  147. /* Data length + CRC */
  148. data_length = entry->skb->len + 4;
  149. /*
  150. * Check whether this frame is to be acked.
  151. */
  152. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  153. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  154. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags) &&
  155. !entry->skb->do_not_encrypt) {
  156. /* Apply crypto specific descriptor information */
  157. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  158. /*
  159. * Extend frame length to include all encryption overhead
  160. * that will be added by the hardware.
  161. */
  162. data_length += rt2x00crypto_tx_overhead(tx_info);
  163. }
  164. /*
  165. * Check if this is a RTS/CTS frame
  166. */
  167. if (ieee80211_is_rts(hdr->frame_control) ||
  168. ieee80211_is_cts(hdr->frame_control)) {
  169. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  170. if (ieee80211_is_rts(hdr->frame_control))
  171. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  172. else
  173. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  174. if (tx_info->control.rts_cts_rate_idx >= 0)
  175. rate =
  176. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  177. }
  178. /*
  179. * Determine retry information.
  180. */
  181. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  182. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  183. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  184. /*
  185. * Check if more fragments are pending
  186. */
  187. if (ieee80211_has_morefrags(hdr->frame_control)) {
  188. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  189. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  190. }
  191. /*
  192. * Beacons and probe responses require the tsf timestamp
  193. * to be inserted into the frame.
  194. */
  195. if (ieee80211_is_beacon(hdr->frame_control) ||
  196. ieee80211_is_probe_resp(hdr->frame_control))
  197. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  198. /*
  199. * Determine with what IFS priority this frame should be send.
  200. * Set ifs to IFS_SIFS when the this is not the first fragment,
  201. * or this fragment came after RTS/CTS.
  202. */
  203. if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  204. txdesc->ifs = IFS_SIFS;
  205. } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) {
  206. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  207. txdesc->ifs = IFS_BACKOFF;
  208. } else {
  209. txdesc->ifs = IFS_SIFS;
  210. }
  211. /*
  212. * Hardware should insert sequence counter.
  213. * FIXME: We insert a software sequence counter first for
  214. * hardware that doesn't support hardware sequence counting.
  215. *
  216. * This is wrong because beacons are not getting sequence
  217. * numbers assigned properly.
  218. *
  219. * A secondary problem exists for drivers that cannot toggle
  220. * sequence counting per-frame, since those will override the
  221. * sequence counter given by mac80211.
  222. */
  223. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  224. if (likely(tx_info->control.vif)) {
  225. struct rt2x00_intf *intf;
  226. intf = vif_to_intf(tx_info->control.vif);
  227. spin_lock_irqsave(&intf->seqlock, irqflags);
  228. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  229. intf->seqno += 0x10;
  230. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  231. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  232. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  233. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  234. }
  235. }
  236. /*
  237. * PLCP setup
  238. * Length calculation depends on OFDM/CCK rate.
  239. */
  240. hwrate = rt2x00_get_rate(rate->hw_value);
  241. txdesc->signal = hwrate->plcp;
  242. txdesc->service = 0x04;
  243. if (hwrate->flags & DEV_RATE_OFDM) {
  244. __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
  245. txdesc->length_high = (data_length >> 6) & 0x3f;
  246. txdesc->length_low = data_length & 0x3f;
  247. } else {
  248. /*
  249. * Convert length to microseconds.
  250. */
  251. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  252. duration = GET_DURATION(data_length, hwrate->bitrate);
  253. if (residual != 0) {
  254. duration++;
  255. /*
  256. * Check if we need to set the Length Extension
  257. */
  258. if (hwrate->bitrate == 110 && residual <= 30)
  259. txdesc->service |= 0x80;
  260. }
  261. txdesc->length_high = (duration >> 8) & 0xff;
  262. txdesc->length_low = duration & 0xff;
  263. /*
  264. * When preamble is enabled we should set the
  265. * preamble bit for the signal.
  266. */
  267. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  268. txdesc->signal |= 0x08;
  269. }
  270. }
  271. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  272. struct txentry_desc *txdesc)
  273. {
  274. struct data_queue *queue = entry->queue;
  275. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  276. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  277. /*
  278. * All processing on the frame has been completed, this means
  279. * it is now ready to be dumped to userspace through debugfs.
  280. */
  281. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
  282. /*
  283. * Check if we need to kick the queue, there are however a few rules
  284. * 1) Don't kick beacon queue
  285. * 2) Don't kick unless this is the last in frame in a burst.
  286. * When the burst flag is set, this frame is always followed
  287. * by another frame which in some way are related to eachother.
  288. * This is true for fragments, RTS or CTS-to-self frames.
  289. * 3) Rule 2 can be broken when the available entries
  290. * in the queue are less then a certain threshold.
  291. */
  292. if (entry->queue->qid == QID_BEACON)
  293. return;
  294. if (rt2x00queue_threshold(queue) ||
  295. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  296. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  297. }
  298. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
  299. {
  300. struct ieee80211_tx_info *tx_info;
  301. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  302. struct txentry_desc txdesc;
  303. struct skb_frame_desc *skbdesc;
  304. unsigned int iv_len = 0;
  305. u8 rate_idx, rate_flags;
  306. if (unlikely(rt2x00queue_full(queue)))
  307. return -ENOBUFS;
  308. if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  309. ERROR(queue->rt2x00dev,
  310. "Arrived at non-free entry in the non-full queue %d.\n"
  311. "Please file bug report to %s.\n",
  312. queue->qid, DRV_PROJECT);
  313. return -EINVAL;
  314. }
  315. /*
  316. * Copy all TX descriptor information into txdesc,
  317. * after that we are free to use the skb->cb array
  318. * for our information.
  319. */
  320. entry->skb = skb;
  321. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  322. if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)
  323. iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
  324. /*
  325. * All information is retrieved from the skb->cb array,
  326. * now we should claim ownership of the driver part of that
  327. * array, preserving the bitrate index and flags.
  328. */
  329. tx_info = IEEE80211_SKB_CB(skb);
  330. rate_idx = tx_info->control.rates[0].idx;
  331. rate_flags = tx_info->control.rates[0].flags;
  332. skbdesc = get_skb_frame_desc(skb);
  333. memset(skbdesc, 0, sizeof(*skbdesc));
  334. skbdesc->entry = entry;
  335. skbdesc->tx_rate_idx = rate_idx;
  336. skbdesc->tx_rate_flags = rate_flags;
  337. /*
  338. * When hardware encryption is supported, and this frame
  339. * is to be encrypted, we should strip the IV/EIV data from
  340. * the frame so we can provide it to the driver seperately.
  341. */
  342. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  343. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  344. if (test_bit(CONFIG_CRYPTO_COPY_IV, &queue->rt2x00dev->flags))
  345. rt2x00crypto_tx_copy_iv(skb, iv_len);
  346. else
  347. rt2x00crypto_tx_remove_iv(skb, iv_len);
  348. }
  349. /*
  350. * It could be possible that the queue was corrupted and this
  351. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  352. * this frame will simply be dropped.
  353. */
  354. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
  355. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  356. entry->skb = NULL;
  357. return -EIO;
  358. }
  359. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  360. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  361. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  362. rt2x00queue_index_inc(queue, Q_INDEX);
  363. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  364. return 0;
  365. }
  366. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  367. struct ieee80211_vif *vif)
  368. {
  369. struct rt2x00_intf *intf = vif_to_intf(vif);
  370. struct skb_frame_desc *skbdesc;
  371. struct txentry_desc txdesc;
  372. __le32 desc[16];
  373. if (unlikely(!intf->beacon))
  374. return -ENOBUFS;
  375. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  376. if (!intf->beacon->skb)
  377. return -ENOMEM;
  378. /*
  379. * Copy all TX descriptor information into txdesc,
  380. * after that we are free to use the skb->cb array
  381. * for our information.
  382. */
  383. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  384. /*
  385. * For the descriptor we use a local array from where the
  386. * driver can move it to the correct location required for
  387. * the hardware.
  388. */
  389. memset(desc, 0, sizeof(desc));
  390. /*
  391. * Fill in skb descriptor
  392. */
  393. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  394. memset(skbdesc, 0, sizeof(*skbdesc));
  395. skbdesc->desc = desc;
  396. skbdesc->desc_len = intf->beacon->queue->desc_size;
  397. skbdesc->entry = intf->beacon;
  398. /*
  399. * Write TX descriptor into reserved room in front of the beacon.
  400. */
  401. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  402. /*
  403. * Send beacon to hardware.
  404. * Also enable beacon generation, which might have been disabled
  405. * by the driver during the config_beacon() callback function.
  406. */
  407. rt2x00dev->ops->lib->write_beacon(intf->beacon);
  408. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
  409. return 0;
  410. }
  411. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  412. const enum data_queue_qid queue)
  413. {
  414. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  415. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  416. return &rt2x00dev->tx[queue];
  417. if (!rt2x00dev->bcn)
  418. return NULL;
  419. if (queue == QID_BEACON)
  420. return &rt2x00dev->bcn[0];
  421. else if (queue == QID_ATIM && atim)
  422. return &rt2x00dev->bcn[1];
  423. return NULL;
  424. }
  425. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  426. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  427. enum queue_index index)
  428. {
  429. struct queue_entry *entry;
  430. unsigned long irqflags;
  431. if (unlikely(index >= Q_INDEX_MAX)) {
  432. ERROR(queue->rt2x00dev,
  433. "Entry requested from invalid index type (%d)\n", index);
  434. return NULL;
  435. }
  436. spin_lock_irqsave(&queue->lock, irqflags);
  437. entry = &queue->entries[queue->index[index]];
  438. spin_unlock_irqrestore(&queue->lock, irqflags);
  439. return entry;
  440. }
  441. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  442. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  443. {
  444. unsigned long irqflags;
  445. if (unlikely(index >= Q_INDEX_MAX)) {
  446. ERROR(queue->rt2x00dev,
  447. "Index change on invalid index type (%d)\n", index);
  448. return;
  449. }
  450. spin_lock_irqsave(&queue->lock, irqflags);
  451. queue->index[index]++;
  452. if (queue->index[index] >= queue->limit)
  453. queue->index[index] = 0;
  454. if (index == Q_INDEX) {
  455. queue->length++;
  456. } else if (index == Q_INDEX_DONE) {
  457. queue->length--;
  458. queue->count++;
  459. }
  460. spin_unlock_irqrestore(&queue->lock, irqflags);
  461. }
  462. static void rt2x00queue_reset(struct data_queue *queue)
  463. {
  464. unsigned long irqflags;
  465. spin_lock_irqsave(&queue->lock, irqflags);
  466. queue->count = 0;
  467. queue->length = 0;
  468. memset(queue->index, 0, sizeof(queue->index));
  469. spin_unlock_irqrestore(&queue->lock, irqflags);
  470. }
  471. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  472. {
  473. struct data_queue *queue;
  474. unsigned int i;
  475. queue_for_each(rt2x00dev, queue) {
  476. rt2x00queue_reset(queue);
  477. for (i = 0; i < queue->limit; i++) {
  478. queue->entries[i].flags = 0;
  479. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  480. }
  481. }
  482. }
  483. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  484. const struct data_queue_desc *qdesc)
  485. {
  486. struct queue_entry *entries;
  487. unsigned int entry_size;
  488. unsigned int i;
  489. rt2x00queue_reset(queue);
  490. queue->limit = qdesc->entry_num;
  491. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  492. queue->data_size = qdesc->data_size;
  493. queue->desc_size = qdesc->desc_size;
  494. /*
  495. * Allocate all queue entries.
  496. */
  497. entry_size = sizeof(*entries) + qdesc->priv_size;
  498. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  499. if (!entries)
  500. return -ENOMEM;
  501. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  502. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  503. ((__index) * (__psize)) )
  504. for (i = 0; i < queue->limit; i++) {
  505. entries[i].flags = 0;
  506. entries[i].queue = queue;
  507. entries[i].skb = NULL;
  508. entries[i].entry_idx = i;
  509. entries[i].priv_data =
  510. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  511. sizeof(*entries), qdesc->priv_size);
  512. }
  513. #undef QUEUE_ENTRY_PRIV_OFFSET
  514. queue->entries = entries;
  515. return 0;
  516. }
  517. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  518. struct data_queue *queue)
  519. {
  520. unsigned int i;
  521. if (!queue->entries)
  522. return;
  523. for (i = 0; i < queue->limit; i++) {
  524. if (queue->entries[i].skb)
  525. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  526. }
  527. }
  528. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  529. struct data_queue *queue)
  530. {
  531. unsigned int i;
  532. struct sk_buff *skb;
  533. for (i = 0; i < queue->limit; i++) {
  534. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  535. if (!skb)
  536. return -ENOMEM;
  537. queue->entries[i].skb = skb;
  538. }
  539. return 0;
  540. }
  541. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  542. {
  543. struct data_queue *queue;
  544. int status;
  545. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  546. if (status)
  547. goto exit;
  548. tx_queue_for_each(rt2x00dev, queue) {
  549. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  550. if (status)
  551. goto exit;
  552. }
  553. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  554. if (status)
  555. goto exit;
  556. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  557. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  558. rt2x00dev->ops->atim);
  559. if (status)
  560. goto exit;
  561. }
  562. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  563. if (status)
  564. goto exit;
  565. return 0;
  566. exit:
  567. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  568. rt2x00queue_uninitialize(rt2x00dev);
  569. return status;
  570. }
  571. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  572. {
  573. struct data_queue *queue;
  574. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  575. queue_for_each(rt2x00dev, queue) {
  576. kfree(queue->entries);
  577. queue->entries = NULL;
  578. }
  579. }
  580. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  581. struct data_queue *queue, enum data_queue_qid qid)
  582. {
  583. spin_lock_init(&queue->lock);
  584. queue->rt2x00dev = rt2x00dev;
  585. queue->qid = qid;
  586. queue->txop = 0;
  587. queue->aifs = 2;
  588. queue->cw_min = 5;
  589. queue->cw_max = 10;
  590. }
  591. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  592. {
  593. struct data_queue *queue;
  594. enum data_queue_qid qid;
  595. unsigned int req_atim =
  596. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  597. /*
  598. * We need the following queues:
  599. * RX: 1
  600. * TX: ops->tx_queues
  601. * Beacon: 1
  602. * Atim: 1 (if required)
  603. */
  604. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  605. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  606. if (!queue) {
  607. ERROR(rt2x00dev, "Queue allocation failed.\n");
  608. return -ENOMEM;
  609. }
  610. /*
  611. * Initialize pointers
  612. */
  613. rt2x00dev->rx = queue;
  614. rt2x00dev->tx = &queue[1];
  615. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  616. /*
  617. * Initialize queue parameters.
  618. * RX: qid = QID_RX
  619. * TX: qid = QID_AC_BE + index
  620. * TX: cw_min: 2^5 = 32.
  621. * TX: cw_max: 2^10 = 1024.
  622. * BCN: qid = QID_BEACON
  623. * ATIM: qid = QID_ATIM
  624. */
  625. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  626. qid = QID_AC_BE;
  627. tx_queue_for_each(rt2x00dev, queue)
  628. rt2x00queue_init(rt2x00dev, queue, qid++);
  629. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  630. if (req_atim)
  631. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  632. return 0;
  633. }
  634. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  635. {
  636. kfree(rt2x00dev->rx);
  637. rt2x00dev->rx = NULL;
  638. rt2x00dev->tx = NULL;
  639. rt2x00dev->bcn = NULL;
  640. }