be_main.c 49 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. MODULE_VERSION(DRV_VER);
  19. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  20. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  21. MODULE_AUTHOR("ServerEngines Corporation");
  22. MODULE_LICENSE("GPL");
  23. static unsigned int rx_frag_size = 2048;
  24. module_param(rx_frag_size, uint, S_IRUGO);
  25. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  26. #define BE_VENDOR_ID 0x19a2
  27. #define BE2_DEVICE_ID_1 0x0211
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE2_DEVICE_ID_1) },
  30. { 0 }
  31. };
  32. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  33. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  34. {
  35. struct be_dma_mem *mem = &q->dma_mem;
  36. if (mem->va)
  37. pci_free_consistent(adapter->pdev, mem->size,
  38. mem->va, mem->dma);
  39. }
  40. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  41. u16 len, u16 entry_size)
  42. {
  43. struct be_dma_mem *mem = &q->dma_mem;
  44. memset(q, 0, sizeof(*q));
  45. q->len = len;
  46. q->entry_size = entry_size;
  47. mem->size = len * entry_size;
  48. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  49. if (!mem->va)
  50. return -1;
  51. memset(mem->va, 0, mem->size);
  52. return 0;
  53. }
  54. static inline void *queue_head_node(struct be_queue_info *q)
  55. {
  56. return q->dma_mem.va + q->head * q->entry_size;
  57. }
  58. static inline void *queue_tail_node(struct be_queue_info *q)
  59. {
  60. return q->dma_mem.va + q->tail * q->entry_size;
  61. }
  62. static inline void queue_head_inc(struct be_queue_info *q)
  63. {
  64. index_inc(&q->head, q->len);
  65. }
  66. static inline void queue_tail_inc(struct be_queue_info *q)
  67. {
  68. index_inc(&q->tail, q->len);
  69. }
  70. static void be_intr_set(struct be_ctrl_info *ctrl, bool enable)
  71. {
  72. u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  73. u32 reg = ioread32(addr);
  74. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  75. if (!enabled && enable) {
  76. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  77. } else if (enabled && !enable) {
  78. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  79. } else {
  80. printk(KERN_WARNING DRV_NAME
  81. ": bad value in membar_int_ctrl reg=0x%x\n", reg);
  82. return;
  83. }
  84. iowrite32(reg, addr);
  85. }
  86. static void be_rxq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_RQ_RING_ID_MASK;
  90. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  91. iowrite32(val, ctrl->db + DB_RQ_OFFSET);
  92. }
  93. static void be_txq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  94. {
  95. u32 val = 0;
  96. val |= qid & DB_TXULP_RING_ID_MASK;
  97. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  98. iowrite32(val, ctrl->db + DB_TXULP1_OFFSET);
  99. }
  100. static void be_eq_notify(struct be_ctrl_info *ctrl, u16 qid,
  101. bool arm, bool clear_int, u16 num_popped)
  102. {
  103. u32 val = 0;
  104. val |= qid & DB_EQ_RING_ID_MASK;
  105. if (arm)
  106. val |= 1 << DB_EQ_REARM_SHIFT;
  107. if (clear_int)
  108. val |= 1 << DB_EQ_CLR_SHIFT;
  109. val |= 1 << DB_EQ_EVNT_SHIFT;
  110. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  111. iowrite32(val, ctrl->db + DB_EQ_OFFSET);
  112. }
  113. static void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid,
  114. bool arm, u16 num_popped)
  115. {
  116. u32 val = 0;
  117. val |= qid & DB_CQ_RING_ID_MASK;
  118. if (arm)
  119. val |= 1 << DB_CQ_REARM_SHIFT;
  120. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  121. iowrite32(val, ctrl->db + DB_CQ_OFFSET);
  122. }
  123. static int be_mac_addr_set(struct net_device *netdev, void *p)
  124. {
  125. struct be_adapter *adapter = netdev_priv(netdev);
  126. struct sockaddr *addr = p;
  127. int status = 0;
  128. if (netif_running(netdev)) {
  129. status = be_cmd_pmac_del(&adapter->ctrl, adapter->if_handle,
  130. adapter->pmac_id);
  131. if (status)
  132. return status;
  133. status = be_cmd_pmac_add(&adapter->ctrl, (u8 *)addr->sa_data,
  134. adapter->if_handle, &adapter->pmac_id);
  135. }
  136. if (!status)
  137. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  138. return status;
  139. }
  140. static void netdev_stats_update(struct be_adapter *adapter)
  141. {
  142. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  143. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  144. struct be_port_rxf_stats *port_stats =
  145. &rxf_stats->port[adapter->port_num];
  146. struct net_device_stats *dev_stats = &adapter->stats.net_stats;
  147. dev_stats->rx_packets = port_stats->rx_total_frames;
  148. dev_stats->tx_packets = port_stats->tx_unicastframes +
  149. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  150. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  151. (u64) port_stats->rx_bytes_lsd;
  152. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  153. (u64) port_stats->tx_bytes_lsd;
  154. /* bad pkts received */
  155. dev_stats->rx_errors = port_stats->rx_crc_errors +
  156. port_stats->rx_alignment_symbol_errors +
  157. port_stats->rx_in_range_errors +
  158. port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
  159. /* packet transmit problems */
  160. dev_stats->tx_errors = 0;
  161. /* no space in linux buffers */
  162. dev_stats->rx_dropped = 0;
  163. /* no space available in linux */
  164. dev_stats->tx_dropped = 0;
  165. dev_stats->multicast = port_stats->tx_multicastframes;
  166. dev_stats->collisions = 0;
  167. /* detailed rx errors */
  168. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  169. port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
  170. /* receive ring buffer overflow */
  171. dev_stats->rx_over_errors = 0;
  172. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  173. /* frame alignment errors */
  174. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  175. /* receiver fifo overrun */
  176. /* drops_no_pbuf is no per i/f, it's per BE card */
  177. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  178. port_stats->rx_input_fifo_overflow +
  179. rxf_stats->rx_drops_no_pbuf;
  180. /* receiver missed packetd */
  181. dev_stats->rx_missed_errors = 0;
  182. /* detailed tx_errors */
  183. dev_stats->tx_aborted_errors = 0;
  184. dev_stats->tx_carrier_errors = 0;
  185. dev_stats->tx_fifo_errors = 0;
  186. dev_stats->tx_heartbeat_errors = 0;
  187. dev_stats->tx_window_errors = 0;
  188. }
  189. static void be_link_status_update(struct be_adapter *adapter)
  190. {
  191. struct be_link_info *prev = &adapter->link;
  192. struct be_link_info now = { 0 };
  193. struct net_device *netdev = adapter->netdev;
  194. be_cmd_link_status_query(&adapter->ctrl, &now);
  195. /* If link came up or went down */
  196. if (now.speed != prev->speed && (now.speed == PHY_LINK_SPEED_ZERO ||
  197. prev->speed == PHY_LINK_SPEED_ZERO)) {
  198. if (now.speed == PHY_LINK_SPEED_ZERO) {
  199. netif_stop_queue(netdev);
  200. netif_carrier_off(netdev);
  201. printk(KERN_INFO "%s: Link down\n", netdev->name);
  202. } else {
  203. netif_start_queue(netdev);
  204. netif_carrier_on(netdev);
  205. printk(KERN_INFO "%s: Link up\n", netdev->name);
  206. }
  207. }
  208. *prev = now;
  209. }
  210. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  211. static void be_rx_eqd_update(struct be_adapter *adapter)
  212. {
  213. u32 eqd;
  214. struct be_ctrl_info *ctrl = &adapter->ctrl;
  215. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  216. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  217. /* Update once a second */
  218. if (((jiffies - stats->rx_fps_jiffies) < HZ) || rx_eq->enable_aic == 0)
  219. return;
  220. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  221. ((jiffies - stats->rx_fps_jiffies) / HZ);
  222. stats->rx_fps_jiffies = jiffies;
  223. stats->be_prev_rx_frags = stats->be_rx_frags;
  224. eqd = stats->be_rx_fps / 110000;
  225. eqd = eqd << 3;
  226. if (eqd > rx_eq->max_eqd)
  227. eqd = rx_eq->max_eqd;
  228. if (eqd < rx_eq->min_eqd)
  229. eqd = rx_eq->min_eqd;
  230. if (eqd < 10)
  231. eqd = 0;
  232. if (eqd != rx_eq->cur_eqd)
  233. be_cmd_modify_eqd(ctrl, rx_eq->q.id, eqd);
  234. rx_eq->cur_eqd = eqd;
  235. }
  236. static struct net_device_stats *be_get_stats(struct net_device *dev)
  237. {
  238. struct be_adapter *adapter = netdev_priv(dev);
  239. return &adapter->stats.net_stats;
  240. }
  241. static void be_tx_stats_update(struct be_adapter *adapter,
  242. u32 wrb_cnt, u32 copied, bool stopped)
  243. {
  244. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  245. stats->be_tx_reqs++;
  246. stats->be_tx_wrbs += wrb_cnt;
  247. stats->be_tx_bytes += copied;
  248. if (stopped)
  249. stats->be_tx_stops++;
  250. /* Update tx rate once in two seconds */
  251. if ((jiffies - stats->be_tx_jiffies) > 2 * HZ) {
  252. u32 r;
  253. r = (stats->be_tx_bytes - stats->be_tx_bytes_prev) /
  254. ((u32) (jiffies - stats->be_tx_jiffies) / HZ);
  255. r = (r / 1000000); /* M bytes/s */
  256. stats->be_tx_rate = (r * 8); /* M bits/s */
  257. stats->be_tx_jiffies = jiffies;
  258. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  259. }
  260. }
  261. /* Determine number of WRB entries needed to xmit data in an skb */
  262. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  263. {
  264. int cnt = 0;
  265. while (skb) {
  266. if (skb->len > skb->data_len)
  267. cnt++;
  268. cnt += skb_shinfo(skb)->nr_frags;
  269. skb = skb_shinfo(skb)->frag_list;
  270. }
  271. /* to account for hdr wrb */
  272. cnt++;
  273. if (cnt & 1) {
  274. /* add a dummy to make it an even num */
  275. cnt++;
  276. *dummy = true;
  277. } else
  278. *dummy = false;
  279. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  280. return cnt;
  281. }
  282. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  283. {
  284. wrb->frag_pa_hi = upper_32_bits(addr);
  285. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  286. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  287. }
  288. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  289. bool vlan, u32 wrb_cnt, u32 len)
  290. {
  291. memset(hdr, 0, sizeof(*hdr));
  292. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  293. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  294. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  295. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  296. hdr, skb_shinfo(skb)->gso_size);
  297. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  298. if (is_tcp_pkt(skb))
  299. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  300. else if (is_udp_pkt(skb))
  301. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  302. }
  303. if (vlan && vlan_tx_tag_present(skb)) {
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  305. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  306. hdr, vlan_tx_tag_get(skb));
  307. }
  308. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  309. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  310. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  311. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  312. }
  313. static int make_tx_wrbs(struct be_adapter *adapter,
  314. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  315. {
  316. u64 busaddr;
  317. u32 i, copied = 0;
  318. struct pci_dev *pdev = adapter->pdev;
  319. struct sk_buff *first_skb = skb;
  320. struct be_queue_info *txq = &adapter->tx_obj.q;
  321. struct be_eth_wrb *wrb;
  322. struct be_eth_hdr_wrb *hdr;
  323. atomic_add(wrb_cnt, &txq->used);
  324. hdr = queue_head_node(txq);
  325. queue_head_inc(txq);
  326. while (skb) {
  327. if (skb->len > skb->data_len) {
  328. int len = skb->len - skb->data_len;
  329. busaddr = pci_map_single(pdev, skb->data, len,
  330. PCI_DMA_TODEVICE);
  331. wrb = queue_head_node(txq);
  332. wrb_fill(wrb, busaddr, len);
  333. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  334. queue_head_inc(txq);
  335. copied += len;
  336. }
  337. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  338. struct skb_frag_struct *frag =
  339. &skb_shinfo(skb)->frags[i];
  340. busaddr = pci_map_page(pdev, frag->page,
  341. frag->page_offset,
  342. frag->size, PCI_DMA_TODEVICE);
  343. wrb = queue_head_node(txq);
  344. wrb_fill(wrb, busaddr, frag->size);
  345. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  346. queue_head_inc(txq);
  347. copied += frag->size;
  348. }
  349. skb = skb_shinfo(skb)->frag_list;
  350. }
  351. if (dummy_wrb) {
  352. wrb = queue_head_node(txq);
  353. wrb_fill(wrb, 0, 0);
  354. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  355. queue_head_inc(txq);
  356. }
  357. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  358. wrb_cnt, copied);
  359. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  360. return copied;
  361. }
  362. static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
  363. {
  364. struct be_adapter *adapter = netdev_priv(netdev);
  365. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  366. struct be_queue_info *txq = &tx_obj->q;
  367. u32 wrb_cnt = 0, copied = 0;
  368. u32 start = txq->head;
  369. bool dummy_wrb, stopped = false;
  370. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  371. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  372. /* record the sent skb in the sent_skb table */
  373. BUG_ON(tx_obj->sent_skb_list[start]);
  374. tx_obj->sent_skb_list[start] = skb;
  375. /* Ensure that txq has space for the next skb; Else stop the queue
  376. * *BEFORE* ringing the tx doorbell, so that we serialze the
  377. * tx compls of the current transmit which'll wake up the queue
  378. */
  379. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
  380. netif_stop_queue(netdev);
  381. stopped = true;
  382. }
  383. be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
  384. netdev->trans_start = jiffies;
  385. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  386. return NETDEV_TX_OK;
  387. }
  388. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  389. {
  390. struct be_adapter *adapter = netdev_priv(netdev);
  391. if (new_mtu < BE_MIN_MTU ||
  392. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  393. dev_info(&adapter->pdev->dev,
  394. "MTU must be between %d and %d bytes\n",
  395. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  396. return -EINVAL;
  397. }
  398. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  399. netdev->mtu, new_mtu);
  400. netdev->mtu = new_mtu;
  401. return 0;
  402. }
  403. /*
  404. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  405. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  406. * set the BE in promiscuous VLAN mode.
  407. */
  408. static void be_vid_config(struct net_device *netdev)
  409. {
  410. struct be_adapter *adapter = netdev_priv(netdev);
  411. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  412. u16 ntags = 0, i;
  413. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  414. /* Construct VLAN Table to give to HW */
  415. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  416. if (adapter->vlan_tag[i]) {
  417. vtag[ntags] = cpu_to_le16(i);
  418. ntags++;
  419. }
  420. }
  421. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  422. vtag, ntags, 1, 0);
  423. } else {
  424. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  425. NULL, 0, 1, 1);
  426. }
  427. }
  428. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  429. {
  430. struct be_adapter *adapter = netdev_priv(netdev);
  431. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  432. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  433. struct be_ctrl_info *ctrl = &adapter->ctrl;
  434. be_eq_notify(ctrl, rx_eq->q.id, false, false, 0);
  435. be_eq_notify(ctrl, tx_eq->q.id, false, false, 0);
  436. adapter->vlan_grp = grp;
  437. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  438. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  439. }
  440. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  441. {
  442. struct be_adapter *adapter = netdev_priv(netdev);
  443. adapter->num_vlans++;
  444. adapter->vlan_tag[vid] = 1;
  445. be_vid_config(netdev);
  446. }
  447. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  448. {
  449. struct be_adapter *adapter = netdev_priv(netdev);
  450. adapter->num_vlans--;
  451. adapter->vlan_tag[vid] = 0;
  452. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  453. be_vid_config(netdev);
  454. }
  455. static void be_set_multicast_filter(struct net_device *netdev)
  456. {
  457. struct be_adapter *adapter = netdev_priv(netdev);
  458. struct dev_mc_list *mc_ptr;
  459. u8 mac_addr[32][ETH_ALEN];
  460. int i = 0;
  461. if (netdev->flags & IFF_ALLMULTI) {
  462. /* set BE in Multicast promiscuous */
  463. be_cmd_mcast_mac_set(&adapter->ctrl,
  464. adapter->if_handle, NULL, 0, true);
  465. return;
  466. }
  467. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  468. memcpy(&mac_addr[i][0], mc_ptr->dmi_addr, ETH_ALEN);
  469. if (++i >= 32) {
  470. be_cmd_mcast_mac_set(&adapter->ctrl,
  471. adapter->if_handle, &mac_addr[0][0], i, false);
  472. i = 0;
  473. }
  474. }
  475. if (i) {
  476. /* reset the promiscuous mode also. */
  477. be_cmd_mcast_mac_set(&adapter->ctrl,
  478. adapter->if_handle, &mac_addr[0][0], i, false);
  479. }
  480. }
  481. static void be_set_multicast_list(struct net_device *netdev)
  482. {
  483. struct be_adapter *adapter = netdev_priv(netdev);
  484. if (netdev->flags & IFF_PROMISC) {
  485. be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 1);
  486. } else {
  487. be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 0);
  488. be_set_multicast_filter(netdev);
  489. }
  490. }
  491. static void be_rx_rate_update(struct be_adapter *adapter, u32 pktsize,
  492. u16 numfrags)
  493. {
  494. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  495. u32 rate;
  496. stats->be_rx_compl++;
  497. stats->be_rx_frags += numfrags;
  498. stats->be_rx_bytes += pktsize;
  499. /* Update the rate once in two seconds */
  500. if ((jiffies - stats->be_rx_jiffies) < 2 * HZ)
  501. return;
  502. rate = (stats->be_rx_bytes - stats->be_rx_bytes_prev) /
  503. ((u32) (jiffies - stats->be_rx_jiffies) / HZ);
  504. rate = (rate / 1000000); /* MB/Sec */
  505. stats->be_rx_rate = (rate * 8); /* Mega Bits/Sec */
  506. stats->be_rx_jiffies = jiffies;
  507. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  508. }
  509. static struct be_rx_page_info *
  510. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  511. {
  512. struct be_rx_page_info *rx_page_info;
  513. struct be_queue_info *rxq = &adapter->rx_obj.q;
  514. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  515. BUG_ON(!rx_page_info->page);
  516. if (rx_page_info->last_page_user)
  517. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  518. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  519. atomic_dec(&rxq->used);
  520. return rx_page_info;
  521. }
  522. /* Throwaway the data in the Rx completion */
  523. static void be_rx_compl_discard(struct be_adapter *adapter,
  524. struct be_eth_rx_compl *rxcp)
  525. {
  526. struct be_queue_info *rxq = &adapter->rx_obj.q;
  527. struct be_rx_page_info *page_info;
  528. u16 rxq_idx, i, num_rcvd;
  529. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  530. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  531. for (i = 0; i < num_rcvd; i++) {
  532. page_info = get_rx_page_info(adapter, rxq_idx);
  533. put_page(page_info->page);
  534. memset(page_info, 0, sizeof(*page_info));
  535. index_inc(&rxq_idx, rxq->len);
  536. }
  537. }
  538. /*
  539. * skb_fill_rx_data forms a complete skb for an ether frame
  540. * indicated by rxcp.
  541. */
  542. static void skb_fill_rx_data(struct be_adapter *adapter,
  543. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  544. {
  545. struct be_queue_info *rxq = &adapter->rx_obj.q;
  546. struct be_rx_page_info *page_info;
  547. u16 rxq_idx, i, num_rcvd;
  548. u32 pktsize, hdr_len, curr_frag_len;
  549. u8 *start;
  550. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  551. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  552. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  553. page_info = get_rx_page_info(adapter, rxq_idx);
  554. start = page_address(page_info->page) + page_info->page_offset;
  555. prefetch(start);
  556. /* Copy data in the first descriptor of this completion */
  557. curr_frag_len = min(pktsize, rx_frag_size);
  558. /* Copy the header portion into skb_data */
  559. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  560. memcpy(skb->data, start, hdr_len);
  561. skb->len = curr_frag_len;
  562. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  563. /* Complete packet has now been moved to data */
  564. put_page(page_info->page);
  565. skb->data_len = 0;
  566. skb->tail += curr_frag_len;
  567. } else {
  568. skb_shinfo(skb)->nr_frags = 1;
  569. skb_shinfo(skb)->frags[0].page = page_info->page;
  570. skb_shinfo(skb)->frags[0].page_offset =
  571. page_info->page_offset + hdr_len;
  572. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  573. skb->data_len = curr_frag_len - hdr_len;
  574. skb->tail += hdr_len;
  575. }
  576. memset(page_info, 0, sizeof(*page_info));
  577. if (pktsize <= rx_frag_size) {
  578. BUG_ON(num_rcvd != 1);
  579. return;
  580. }
  581. /* More frags present for this completion */
  582. pktsize -= curr_frag_len; /* account for above copied frag */
  583. for (i = 1; i < num_rcvd; i++) {
  584. index_inc(&rxq_idx, rxq->len);
  585. page_info = get_rx_page_info(adapter, rxq_idx);
  586. curr_frag_len = min(pktsize, rx_frag_size);
  587. skb_shinfo(skb)->frags[i].page = page_info->page;
  588. skb_shinfo(skb)->frags[i].page_offset = page_info->page_offset;
  589. skb_shinfo(skb)->frags[i].size = curr_frag_len;
  590. skb->len += curr_frag_len;
  591. skb->data_len += curr_frag_len;
  592. skb_shinfo(skb)->nr_frags++;
  593. pktsize -= curr_frag_len;
  594. memset(page_info, 0, sizeof(*page_info));
  595. }
  596. be_rx_rate_update(adapter, pktsize, num_rcvd);
  597. return;
  598. }
  599. /* Process the RX completion indicated by rxcp when LRO is disabled */
  600. static void be_rx_compl_process(struct be_adapter *adapter,
  601. struct be_eth_rx_compl *rxcp)
  602. {
  603. struct sk_buff *skb;
  604. u32 vtp, vid;
  605. int l4_cksm;
  606. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  607. vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  608. skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
  609. if (!skb) {
  610. if (net_ratelimit())
  611. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  612. be_rx_compl_discard(adapter, rxcp);
  613. return;
  614. }
  615. skb_reserve(skb, NET_IP_ALIGN);
  616. skb_fill_rx_data(adapter, skb, rxcp);
  617. if (l4_cksm && adapter->rx_csum)
  618. skb->ip_summed = CHECKSUM_UNNECESSARY;
  619. else
  620. skb->ip_summed = CHECKSUM_NONE;
  621. skb->truesize = skb->len + sizeof(struct sk_buff);
  622. skb->protocol = eth_type_trans(skb, adapter->netdev);
  623. skb->dev = adapter->netdev;
  624. if (vtp) {
  625. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  626. kfree_skb(skb);
  627. return;
  628. }
  629. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  630. vid = be16_to_cpu(vid);
  631. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  632. } else {
  633. netif_receive_skb(skb);
  634. }
  635. adapter->netdev->last_rx = jiffies;
  636. return;
  637. }
  638. /* Process the RX completion indicated by rxcp when LRO is enabled */
  639. static void be_rx_compl_process_lro(struct be_adapter *adapter,
  640. struct be_eth_rx_compl *rxcp)
  641. {
  642. struct be_rx_page_info *page_info;
  643. struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
  644. struct be_queue_info *rxq = &adapter->rx_obj.q;
  645. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  646. u16 i, rxq_idx = 0, vid;
  647. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  648. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  649. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  650. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  651. remaining = pkt_size;
  652. for (i = 0; i < num_rcvd; i++) {
  653. page_info = get_rx_page_info(adapter, rxq_idx);
  654. curr_frag_len = min(remaining, rx_frag_size);
  655. rx_frags[i].page = page_info->page;
  656. rx_frags[i].page_offset = page_info->page_offset;
  657. rx_frags[i].size = curr_frag_len;
  658. remaining -= curr_frag_len;
  659. index_inc(&rxq_idx, rxq->len);
  660. memset(page_info, 0, sizeof(*page_info));
  661. }
  662. if (likely(!vlanf)) {
  663. lro_receive_frags(&adapter->rx_obj.lro_mgr, rx_frags, pkt_size,
  664. pkt_size, NULL, 0);
  665. } else {
  666. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  667. vid = be16_to_cpu(vid);
  668. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  669. return;
  670. lro_vlan_hwaccel_receive_frags(&adapter->rx_obj.lro_mgr,
  671. rx_frags, pkt_size, pkt_size, adapter->vlan_grp,
  672. vid, NULL, 0);
  673. }
  674. be_rx_rate_update(adapter, pkt_size, num_rcvd);
  675. return;
  676. }
  677. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  678. {
  679. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  680. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  681. return NULL;
  682. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  683. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  684. queue_tail_inc(&adapter->rx_obj.cq);
  685. return rxcp;
  686. }
  687. static inline struct page *be_alloc_pages(u32 size)
  688. {
  689. gfp_t alloc_flags = GFP_ATOMIC;
  690. u32 order = get_order(size);
  691. if (order > 0)
  692. alloc_flags |= __GFP_COMP;
  693. return alloc_pages(alloc_flags, order);
  694. }
  695. /*
  696. * Allocate a page, split it to fragments of size rx_frag_size and post as
  697. * receive buffers to BE
  698. */
  699. static void be_post_rx_frags(struct be_adapter *adapter)
  700. {
  701. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  702. struct be_rx_page_info *page_info = NULL;
  703. struct be_queue_info *rxq = &adapter->rx_obj.q;
  704. struct page *pagep = NULL;
  705. struct be_eth_rx_d *rxd;
  706. u64 page_dmaaddr = 0, frag_dmaaddr;
  707. u32 posted, page_offset = 0;
  708. page_info = &page_info_tbl[rxq->head];
  709. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  710. if (!pagep) {
  711. pagep = be_alloc_pages(adapter->big_page_size);
  712. if (unlikely(!pagep)) {
  713. drvr_stats(adapter)->be_ethrx_post_fail++;
  714. break;
  715. }
  716. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  717. adapter->big_page_size,
  718. PCI_DMA_FROMDEVICE);
  719. page_info->page_offset = 0;
  720. } else {
  721. get_page(pagep);
  722. page_info->page_offset = page_offset + rx_frag_size;
  723. }
  724. page_offset = page_info->page_offset;
  725. page_info->page = pagep;
  726. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  727. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  728. rxd = queue_head_node(rxq);
  729. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  730. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  731. queue_head_inc(rxq);
  732. /* Any space left in the current big page for another frag? */
  733. if ((page_offset + rx_frag_size + rx_frag_size) >
  734. adapter->big_page_size) {
  735. pagep = NULL;
  736. page_info->last_page_user = true;
  737. }
  738. page_info = &page_info_tbl[rxq->head];
  739. }
  740. if (pagep)
  741. page_info->last_page_user = true;
  742. if (posted) {
  743. atomic_add(posted, &rxq->used);
  744. be_rxq_notify(&adapter->ctrl, rxq->id, posted);
  745. } else if (atomic_read(&rxq->used) == 0) {
  746. /* Let be_worker replenish when memory is available */
  747. adapter->rx_post_starved = true;
  748. }
  749. return;
  750. }
  751. static struct be_eth_tx_compl *
  752. be_tx_compl_get(struct be_adapter *adapter)
  753. {
  754. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  755. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  756. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  757. return NULL;
  758. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  759. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  760. queue_tail_inc(tx_cq);
  761. return txcp;
  762. }
  763. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  764. {
  765. struct be_queue_info *txq = &adapter->tx_obj.q;
  766. struct be_eth_wrb *wrb;
  767. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  768. struct sk_buff *sent_skb;
  769. u64 busaddr;
  770. u16 cur_index, num_wrbs = 0;
  771. cur_index = txq->tail;
  772. sent_skb = sent_skbs[cur_index];
  773. BUG_ON(!sent_skb);
  774. sent_skbs[cur_index] = NULL;
  775. do {
  776. cur_index = txq->tail;
  777. wrb = queue_tail_node(txq);
  778. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  779. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  780. if (busaddr != 0) {
  781. pci_unmap_single(adapter->pdev, busaddr,
  782. wrb->frag_len, PCI_DMA_TODEVICE);
  783. }
  784. num_wrbs++;
  785. queue_tail_inc(txq);
  786. } while (cur_index != last_index);
  787. atomic_sub(num_wrbs, &txq->used);
  788. kfree_skb(sent_skb);
  789. }
  790. static void be_rx_q_clean(struct be_adapter *adapter)
  791. {
  792. struct be_rx_page_info *page_info;
  793. struct be_queue_info *rxq = &adapter->rx_obj.q;
  794. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  795. struct be_eth_rx_compl *rxcp;
  796. u16 tail;
  797. /* First cleanup pending rx completions */
  798. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  799. be_rx_compl_discard(adapter, rxcp);
  800. be_cq_notify(&adapter->ctrl, rx_cq->id, true, 1);
  801. }
  802. /* Then free posted rx buffer that were not used */
  803. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  804. for (; tail != rxq->head; index_inc(&tail, rxq->len)) {
  805. page_info = get_rx_page_info(adapter, tail);
  806. put_page(page_info->page);
  807. memset(page_info, 0, sizeof(*page_info));
  808. }
  809. BUG_ON(atomic_read(&rxq->used));
  810. }
  811. static void be_tx_q_clean(struct be_adapter *adapter)
  812. {
  813. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  814. struct sk_buff *sent_skb;
  815. struct be_queue_info *txq = &adapter->tx_obj.q;
  816. u16 last_index;
  817. bool dummy_wrb;
  818. while (atomic_read(&txq->used)) {
  819. sent_skb = sent_skbs[txq->tail];
  820. last_index = txq->tail;
  821. index_adv(&last_index,
  822. wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
  823. be_tx_compl_process(adapter, last_index);
  824. }
  825. }
  826. static void be_tx_queues_destroy(struct be_adapter *adapter)
  827. {
  828. struct be_queue_info *q;
  829. q = &adapter->tx_obj.q;
  830. if (q->created)
  831. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_TXQ);
  832. be_queue_free(adapter, q);
  833. q = &adapter->tx_obj.cq;
  834. if (q->created)
  835. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  836. be_queue_free(adapter, q);
  837. /* No more tx completions can be rcvd now; clean up if there are
  838. * any pending completions or pending tx requests */
  839. be_tx_q_clean(adapter);
  840. q = &adapter->tx_eq.q;
  841. if (q->created)
  842. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  843. be_queue_free(adapter, q);
  844. }
  845. static int be_tx_queues_create(struct be_adapter *adapter)
  846. {
  847. struct be_queue_info *eq, *q, *cq;
  848. adapter->tx_eq.max_eqd = 0;
  849. adapter->tx_eq.min_eqd = 0;
  850. adapter->tx_eq.cur_eqd = 96;
  851. adapter->tx_eq.enable_aic = false;
  852. /* Alloc Tx Event queue */
  853. eq = &adapter->tx_eq.q;
  854. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  855. return -1;
  856. /* Ask BE to create Tx Event queue */
  857. if (be_cmd_eq_create(&adapter->ctrl, eq, adapter->tx_eq.cur_eqd))
  858. goto tx_eq_free;
  859. /* Alloc TX eth compl queue */
  860. cq = &adapter->tx_obj.cq;
  861. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  862. sizeof(struct be_eth_tx_compl)))
  863. goto tx_eq_destroy;
  864. /* Ask BE to create Tx eth compl queue */
  865. if (be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3))
  866. goto tx_cq_free;
  867. /* Alloc TX eth queue */
  868. q = &adapter->tx_obj.q;
  869. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  870. goto tx_cq_destroy;
  871. /* Ask BE to create Tx eth queue */
  872. if (be_cmd_txq_create(&adapter->ctrl, q, cq))
  873. goto tx_q_free;
  874. return 0;
  875. tx_q_free:
  876. be_queue_free(adapter, q);
  877. tx_cq_destroy:
  878. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  879. tx_cq_free:
  880. be_queue_free(adapter, cq);
  881. tx_eq_destroy:
  882. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  883. tx_eq_free:
  884. be_queue_free(adapter, eq);
  885. return -1;
  886. }
  887. static void be_rx_queues_destroy(struct be_adapter *adapter)
  888. {
  889. struct be_queue_info *q;
  890. q = &adapter->rx_obj.q;
  891. if (q->created) {
  892. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_RXQ);
  893. be_rx_q_clean(adapter);
  894. }
  895. be_queue_free(adapter, q);
  896. q = &adapter->rx_obj.cq;
  897. if (q->created)
  898. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  899. be_queue_free(adapter, q);
  900. q = &adapter->rx_eq.q;
  901. if (q->created)
  902. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  903. be_queue_free(adapter, q);
  904. }
  905. static int be_rx_queues_create(struct be_adapter *adapter)
  906. {
  907. struct be_queue_info *eq, *q, *cq;
  908. int rc;
  909. adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
  910. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  911. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  912. adapter->rx_eq.min_eqd = 0;
  913. adapter->rx_eq.cur_eqd = 0;
  914. adapter->rx_eq.enable_aic = true;
  915. /* Alloc Rx Event queue */
  916. eq = &adapter->rx_eq.q;
  917. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  918. sizeof(struct be_eq_entry));
  919. if (rc)
  920. return rc;
  921. /* Ask BE to create Rx Event queue */
  922. rc = be_cmd_eq_create(&adapter->ctrl, eq, adapter->rx_eq.cur_eqd);
  923. if (rc)
  924. goto rx_eq_free;
  925. /* Alloc RX eth compl queue */
  926. cq = &adapter->rx_obj.cq;
  927. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  928. sizeof(struct be_eth_rx_compl));
  929. if (rc)
  930. goto rx_eq_destroy;
  931. /* Ask BE to create Rx eth compl queue */
  932. rc = be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3);
  933. if (rc)
  934. goto rx_cq_free;
  935. /* Alloc RX eth queue */
  936. q = &adapter->rx_obj.q;
  937. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  938. if (rc)
  939. goto rx_cq_destroy;
  940. /* Ask BE to create Rx eth queue */
  941. rc = be_cmd_rxq_create(&adapter->ctrl, q, cq->id, rx_frag_size,
  942. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  943. if (rc)
  944. goto rx_q_free;
  945. return 0;
  946. rx_q_free:
  947. be_queue_free(adapter, q);
  948. rx_cq_destroy:
  949. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  950. rx_cq_free:
  951. be_queue_free(adapter, cq);
  952. rx_eq_destroy:
  953. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  954. rx_eq_free:
  955. be_queue_free(adapter, eq);
  956. return rc;
  957. }
  958. static bool event_get(struct be_eq_obj *eq_obj, u16 *rid)
  959. {
  960. struct be_eq_entry *entry = queue_tail_node(&eq_obj->q);
  961. u32 evt = entry->evt;
  962. if (!evt)
  963. return false;
  964. evt = le32_to_cpu(evt);
  965. *rid = (evt >> EQ_ENTRY_RES_ID_SHIFT) & EQ_ENTRY_RES_ID_MASK;
  966. entry->evt = 0;
  967. queue_tail_inc(&eq_obj->q);
  968. return true;
  969. }
  970. static int event_handle(struct be_ctrl_info *ctrl,
  971. struct be_eq_obj *eq_obj)
  972. {
  973. u16 rid = 0, num = 0;
  974. while (event_get(eq_obj, &rid))
  975. num++;
  976. /* We can see an interrupt and no event */
  977. be_eq_notify(ctrl, eq_obj->q.id, true, true, num);
  978. if (num)
  979. napi_schedule(&eq_obj->napi);
  980. return num;
  981. }
  982. static irqreturn_t be_intx(int irq, void *dev)
  983. {
  984. struct be_adapter *adapter = dev;
  985. struct be_ctrl_info *ctrl = &adapter->ctrl;
  986. int rx, tx;
  987. tx = event_handle(ctrl, &adapter->tx_eq);
  988. rx = event_handle(ctrl, &adapter->rx_eq);
  989. if (rx || tx)
  990. return IRQ_HANDLED;
  991. else
  992. return IRQ_NONE;
  993. }
  994. static irqreturn_t be_msix_rx(int irq, void *dev)
  995. {
  996. struct be_adapter *adapter = dev;
  997. event_handle(&adapter->ctrl, &adapter->rx_eq);
  998. return IRQ_HANDLED;
  999. }
  1000. static irqreturn_t be_msix_tx(int irq, void *dev)
  1001. {
  1002. struct be_adapter *adapter = dev;
  1003. event_handle(&adapter->ctrl, &adapter->tx_eq);
  1004. return IRQ_HANDLED;
  1005. }
  1006. static inline bool do_lro(struct be_adapter *adapter,
  1007. struct be_eth_rx_compl *rxcp)
  1008. {
  1009. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1010. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1011. if (err)
  1012. drvr_stats(adapter)->be_rxcp_err++;
  1013. return (!tcp_frame || err || (adapter->max_rx_coal <= 1)) ?
  1014. false : true;
  1015. }
  1016. int be_poll_rx(struct napi_struct *napi, int budget)
  1017. {
  1018. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1019. struct be_adapter *adapter =
  1020. container_of(rx_eq, struct be_adapter, rx_eq);
  1021. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1022. struct be_eth_rx_compl *rxcp;
  1023. u32 work_done;
  1024. for (work_done = 0; work_done < budget; work_done++) {
  1025. rxcp = be_rx_compl_get(adapter);
  1026. if (!rxcp)
  1027. break;
  1028. if (do_lro(adapter, rxcp))
  1029. be_rx_compl_process_lro(adapter, rxcp);
  1030. else
  1031. be_rx_compl_process(adapter, rxcp);
  1032. }
  1033. lro_flush_all(&adapter->rx_obj.lro_mgr);
  1034. /* Refill the queue */
  1035. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1036. be_post_rx_frags(adapter);
  1037. /* All consumed */
  1038. if (work_done < budget) {
  1039. napi_complete(napi);
  1040. be_cq_notify(&adapter->ctrl, rx_cq->id, true, work_done);
  1041. } else {
  1042. /* More to be consumed; continue with interrupts disabled */
  1043. be_cq_notify(&adapter->ctrl, rx_cq->id, false, work_done);
  1044. }
  1045. return work_done;
  1046. }
  1047. /* For TX we don't honour budget; consume everything */
  1048. int be_poll_tx(struct napi_struct *napi, int budget)
  1049. {
  1050. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1051. struct be_adapter *adapter =
  1052. container_of(tx_eq, struct be_adapter, tx_eq);
  1053. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  1054. struct be_queue_info *tx_cq = &tx_obj->cq;
  1055. struct be_queue_info *txq = &tx_obj->q;
  1056. struct be_eth_tx_compl *txcp;
  1057. u32 num_cmpl = 0;
  1058. u16 end_idx;
  1059. while ((txcp = be_tx_compl_get(adapter))) {
  1060. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1061. wrb_index, txcp);
  1062. be_tx_compl_process(adapter, end_idx);
  1063. num_cmpl++;
  1064. }
  1065. /* As Tx wrbs have been freed up, wake up netdev queue if
  1066. * it was stopped due to lack of tx wrbs.
  1067. */
  1068. if (netif_queue_stopped(adapter->netdev) &&
  1069. atomic_read(&txq->used) < txq->len / 2) {
  1070. netif_wake_queue(adapter->netdev);
  1071. }
  1072. napi_complete(napi);
  1073. be_cq_notify(&adapter->ctrl, tx_cq->id, true, num_cmpl);
  1074. drvr_stats(adapter)->be_tx_events++;
  1075. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1076. return 1;
  1077. }
  1078. static void be_worker(struct work_struct *work)
  1079. {
  1080. struct be_adapter *adapter =
  1081. container_of(work, struct be_adapter, work.work);
  1082. int status;
  1083. /* Check link */
  1084. be_link_status_update(adapter);
  1085. /* Get Stats */
  1086. status = be_cmd_get_stats(&adapter->ctrl, &adapter->stats.cmd);
  1087. if (!status)
  1088. netdev_stats_update(adapter);
  1089. /* Set EQ delay */
  1090. be_rx_eqd_update(adapter);
  1091. if (adapter->rx_post_starved) {
  1092. adapter->rx_post_starved = false;
  1093. be_post_rx_frags(adapter);
  1094. }
  1095. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1096. }
  1097. static void be_msix_enable(struct be_adapter *adapter)
  1098. {
  1099. int i, status;
  1100. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1101. adapter->msix_entries[i].entry = i;
  1102. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1103. BE_NUM_MSIX_VECTORS);
  1104. if (status == 0)
  1105. adapter->msix_enabled = true;
  1106. return;
  1107. }
  1108. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1109. {
  1110. return adapter->msix_entries[eq_id -
  1111. 8 * adapter->ctrl.pci_func].vector;
  1112. }
  1113. static int be_msix_register(struct be_adapter *adapter)
  1114. {
  1115. struct net_device *netdev = adapter->netdev;
  1116. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1117. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1118. int status, vec;
  1119. sprintf(tx_eq->desc, "%s-tx", netdev->name);
  1120. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1121. status = request_irq(vec, be_msix_tx, 0, tx_eq->desc, adapter);
  1122. if (status)
  1123. goto err;
  1124. sprintf(rx_eq->desc, "%s-rx", netdev->name);
  1125. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1126. status = request_irq(vec, be_msix_rx, 0, rx_eq->desc, adapter);
  1127. if (status) { /* Free TX IRQ */
  1128. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1129. free_irq(vec, adapter);
  1130. goto err;
  1131. }
  1132. return 0;
  1133. err:
  1134. dev_warn(&adapter->pdev->dev,
  1135. "MSIX Request IRQ failed - err %d\n", status);
  1136. pci_disable_msix(adapter->pdev);
  1137. adapter->msix_enabled = false;
  1138. return status;
  1139. }
  1140. static int be_irq_register(struct be_adapter *adapter)
  1141. {
  1142. struct net_device *netdev = adapter->netdev;
  1143. int status;
  1144. if (adapter->msix_enabled) {
  1145. status = be_msix_register(adapter);
  1146. if (status == 0)
  1147. goto done;
  1148. }
  1149. /* INTx */
  1150. netdev->irq = adapter->pdev->irq;
  1151. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1152. adapter);
  1153. if (status) {
  1154. dev_err(&adapter->pdev->dev,
  1155. "INTx request IRQ failed - err %d\n", status);
  1156. return status;
  1157. }
  1158. done:
  1159. adapter->isr_registered = true;
  1160. return 0;
  1161. }
  1162. static void be_irq_unregister(struct be_adapter *adapter)
  1163. {
  1164. struct net_device *netdev = adapter->netdev;
  1165. int vec;
  1166. if (!adapter->isr_registered)
  1167. return;
  1168. /* INTx */
  1169. if (!adapter->msix_enabled) {
  1170. free_irq(netdev->irq, adapter);
  1171. goto done;
  1172. }
  1173. /* MSIx */
  1174. vec = be_msix_vec_get(adapter, adapter->tx_eq.q.id);
  1175. free_irq(vec, adapter);
  1176. vec = be_msix_vec_get(adapter, adapter->rx_eq.q.id);
  1177. free_irq(vec, adapter);
  1178. done:
  1179. adapter->isr_registered = false;
  1180. return;
  1181. }
  1182. static int be_open(struct net_device *netdev)
  1183. {
  1184. struct be_adapter *adapter = netdev_priv(netdev);
  1185. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1186. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1187. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1188. u32 if_flags;
  1189. int status;
  1190. if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
  1191. BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
  1192. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1193. status = be_cmd_if_create(ctrl, if_flags, netdev->dev_addr,
  1194. false/* pmac_invalid */, &adapter->if_handle,
  1195. &adapter->pmac_id);
  1196. if (status != 0)
  1197. goto do_none;
  1198. be_vid_config(netdev);
  1199. status = be_cmd_set_flow_control(ctrl, true, true);
  1200. if (status != 0)
  1201. goto if_destroy;
  1202. status = be_tx_queues_create(adapter);
  1203. if (status != 0)
  1204. goto if_destroy;
  1205. status = be_rx_queues_create(adapter);
  1206. if (status != 0)
  1207. goto tx_qs_destroy;
  1208. /* First time posting */
  1209. be_post_rx_frags(adapter);
  1210. napi_enable(&rx_eq->napi);
  1211. napi_enable(&tx_eq->napi);
  1212. be_irq_register(adapter);
  1213. be_intr_set(ctrl, true);
  1214. /* The evt queues are created in the unarmed state; arm them */
  1215. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  1216. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  1217. /* The compl queues are created in the unarmed state; arm them */
  1218. be_cq_notify(ctrl, adapter->rx_obj.cq.id, true, 0);
  1219. be_cq_notify(ctrl, adapter->tx_obj.cq.id, true, 0);
  1220. be_link_status_update(adapter);
  1221. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1222. return 0;
  1223. tx_qs_destroy:
  1224. be_tx_queues_destroy(adapter);
  1225. if_destroy:
  1226. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1227. do_none:
  1228. return status;
  1229. }
  1230. static int be_close(struct net_device *netdev)
  1231. {
  1232. struct be_adapter *adapter = netdev_priv(netdev);
  1233. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1234. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1235. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1236. int vec;
  1237. cancel_delayed_work(&adapter->work);
  1238. netif_stop_queue(netdev);
  1239. netif_carrier_off(netdev);
  1240. adapter->link.speed = PHY_LINK_SPEED_ZERO;
  1241. be_intr_set(ctrl, false);
  1242. if (adapter->msix_enabled) {
  1243. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1244. synchronize_irq(vec);
  1245. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1246. synchronize_irq(vec);
  1247. } else {
  1248. synchronize_irq(netdev->irq);
  1249. }
  1250. be_irq_unregister(adapter);
  1251. napi_disable(&rx_eq->napi);
  1252. napi_disable(&tx_eq->napi);
  1253. be_rx_queues_destroy(adapter);
  1254. be_tx_queues_destroy(adapter);
  1255. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1256. return 0;
  1257. }
  1258. static int be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
  1259. void **ip_hdr, void **tcpudp_hdr,
  1260. u64 *hdr_flags, void *priv)
  1261. {
  1262. struct ethhdr *eh;
  1263. struct vlan_ethhdr *veh;
  1264. struct iphdr *iph;
  1265. u8 *va = page_address(frag->page) + frag->page_offset;
  1266. unsigned long ll_hlen;
  1267. prefetch(va);
  1268. eh = (struct ethhdr *)va;
  1269. *mac_hdr = eh;
  1270. ll_hlen = ETH_HLEN;
  1271. if (eh->h_proto != htons(ETH_P_IP)) {
  1272. if (eh->h_proto == htons(ETH_P_8021Q)) {
  1273. veh = (struct vlan_ethhdr *)va;
  1274. if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
  1275. return -1;
  1276. ll_hlen += VLAN_HLEN;
  1277. } else {
  1278. return -1;
  1279. }
  1280. }
  1281. *hdr_flags = LRO_IPV4;
  1282. iph = (struct iphdr *)(va + ll_hlen);
  1283. *ip_hdr = iph;
  1284. if (iph->protocol != IPPROTO_TCP)
  1285. return -1;
  1286. *hdr_flags |= LRO_TCP;
  1287. *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
  1288. return 0;
  1289. }
  1290. static void be_lro_init(struct be_adapter *adapter, struct net_device *netdev)
  1291. {
  1292. struct net_lro_mgr *lro_mgr;
  1293. lro_mgr = &adapter->rx_obj.lro_mgr;
  1294. lro_mgr->dev = netdev;
  1295. lro_mgr->features = LRO_F_NAPI;
  1296. lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
  1297. lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
  1298. lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
  1299. lro_mgr->lro_arr = adapter->rx_obj.lro_desc;
  1300. lro_mgr->get_frag_header = be_get_frag_header;
  1301. lro_mgr->max_aggr = BE_MAX_FRAGS_PER_FRAME;
  1302. }
  1303. static struct net_device_ops be_netdev_ops = {
  1304. .ndo_open = be_open,
  1305. .ndo_stop = be_close,
  1306. .ndo_start_xmit = be_xmit,
  1307. .ndo_get_stats = be_get_stats,
  1308. .ndo_set_rx_mode = be_set_multicast_list,
  1309. .ndo_set_mac_address = be_mac_addr_set,
  1310. .ndo_change_mtu = be_change_mtu,
  1311. .ndo_validate_addr = eth_validate_addr,
  1312. .ndo_vlan_rx_register = be_vlan_register,
  1313. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1314. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1315. };
  1316. static void be_netdev_init(struct net_device *netdev)
  1317. {
  1318. struct be_adapter *adapter = netdev_priv(netdev);
  1319. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1320. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
  1321. NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
  1322. netdev->flags |= IFF_MULTICAST;
  1323. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1324. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1325. be_lro_init(adapter, netdev);
  1326. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1327. BE_NAPI_WEIGHT);
  1328. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx,
  1329. BE_NAPI_WEIGHT);
  1330. netif_carrier_off(netdev);
  1331. netif_stop_queue(netdev);
  1332. }
  1333. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1334. {
  1335. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1336. if (ctrl->csr)
  1337. iounmap(ctrl->csr);
  1338. if (ctrl->db)
  1339. iounmap(ctrl->db);
  1340. if (ctrl->pcicfg)
  1341. iounmap(ctrl->pcicfg);
  1342. }
  1343. static int be_map_pci_bars(struct be_adapter *adapter)
  1344. {
  1345. u8 __iomem *addr;
  1346. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1347. pci_resource_len(adapter->pdev, 2));
  1348. if (addr == NULL)
  1349. return -ENOMEM;
  1350. adapter->ctrl.csr = addr;
  1351. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1352. 128 * 1024);
  1353. if (addr == NULL)
  1354. goto pci_map_err;
  1355. adapter->ctrl.db = addr;
  1356. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1357. pci_resource_len(adapter->pdev, 1));
  1358. if (addr == NULL)
  1359. goto pci_map_err;
  1360. adapter->ctrl.pcicfg = addr;
  1361. return 0;
  1362. pci_map_err:
  1363. be_unmap_pci_bars(adapter);
  1364. return -ENOMEM;
  1365. }
  1366. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1367. {
  1368. struct be_dma_mem *mem = &adapter->ctrl.mbox_mem_alloced;
  1369. be_unmap_pci_bars(adapter);
  1370. if (mem->va)
  1371. pci_free_consistent(adapter->pdev, mem->size,
  1372. mem->va, mem->dma);
  1373. }
  1374. /* Initialize the mbox required to send cmds to BE */
  1375. static int be_ctrl_init(struct be_adapter *adapter)
  1376. {
  1377. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1378. struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
  1379. struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
  1380. int status;
  1381. u32 val;
  1382. status = be_map_pci_bars(adapter);
  1383. if (status)
  1384. return status;
  1385. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1386. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1387. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1388. if (!mbox_mem_alloc->va) {
  1389. be_unmap_pci_bars(adapter);
  1390. return -1;
  1391. }
  1392. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1393. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1394. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1395. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1396. spin_lock_init(&ctrl->cmd_lock);
  1397. val = ioread32(ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
  1398. ctrl->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) &
  1399. MEMBAR_CTRL_INT_CTRL_PFUNC_MASK;
  1400. return 0;
  1401. }
  1402. static void be_stats_cleanup(struct be_adapter *adapter)
  1403. {
  1404. struct be_stats_obj *stats = &adapter->stats;
  1405. struct be_dma_mem *cmd = &stats->cmd;
  1406. if (cmd->va)
  1407. pci_free_consistent(adapter->pdev, cmd->size,
  1408. cmd->va, cmd->dma);
  1409. }
  1410. static int be_stats_init(struct be_adapter *adapter)
  1411. {
  1412. struct be_stats_obj *stats = &adapter->stats;
  1413. struct be_dma_mem *cmd = &stats->cmd;
  1414. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1415. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1416. if (cmd->va == NULL)
  1417. return -1;
  1418. return 0;
  1419. }
  1420. static void __devexit be_remove(struct pci_dev *pdev)
  1421. {
  1422. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1423. if (!adapter)
  1424. return;
  1425. unregister_netdev(adapter->netdev);
  1426. be_stats_cleanup(adapter);
  1427. be_ctrl_cleanup(adapter);
  1428. if (adapter->msix_enabled) {
  1429. pci_disable_msix(adapter->pdev);
  1430. adapter->msix_enabled = false;
  1431. }
  1432. pci_set_drvdata(pdev, NULL);
  1433. pci_release_regions(pdev);
  1434. pci_disable_device(pdev);
  1435. free_netdev(adapter->netdev);
  1436. }
  1437. static int be_hw_up(struct be_adapter *adapter)
  1438. {
  1439. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1440. int status;
  1441. status = be_cmd_POST(ctrl);
  1442. if (status)
  1443. return status;
  1444. status = be_cmd_get_fw_ver(ctrl, adapter->fw_ver);
  1445. if (status)
  1446. return status;
  1447. status = be_cmd_query_fw_cfg(ctrl, &adapter->port_num);
  1448. return status;
  1449. }
  1450. static int __devinit be_probe(struct pci_dev *pdev,
  1451. const struct pci_device_id *pdev_id)
  1452. {
  1453. int status = 0;
  1454. struct be_adapter *adapter;
  1455. struct net_device *netdev;
  1456. struct be_ctrl_info *ctrl;
  1457. u8 mac[ETH_ALEN];
  1458. status = pci_enable_device(pdev);
  1459. if (status)
  1460. goto do_none;
  1461. status = pci_request_regions(pdev, DRV_NAME);
  1462. if (status)
  1463. goto disable_dev;
  1464. pci_set_master(pdev);
  1465. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1466. if (netdev == NULL) {
  1467. status = -ENOMEM;
  1468. goto rel_reg;
  1469. }
  1470. adapter = netdev_priv(netdev);
  1471. adapter->pdev = pdev;
  1472. pci_set_drvdata(pdev, adapter);
  1473. adapter->netdev = netdev;
  1474. be_msix_enable(adapter);
  1475. status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  1476. if (!status) {
  1477. netdev->features |= NETIF_F_HIGHDMA;
  1478. } else {
  1479. status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1480. if (status) {
  1481. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1482. goto free_netdev;
  1483. }
  1484. }
  1485. ctrl = &adapter->ctrl;
  1486. status = be_ctrl_init(adapter);
  1487. if (status)
  1488. goto free_netdev;
  1489. status = be_stats_init(adapter);
  1490. if (status)
  1491. goto ctrl_clean;
  1492. status = be_hw_up(adapter);
  1493. if (status)
  1494. goto stats_clean;
  1495. status = be_cmd_mac_addr_query(ctrl, mac, MAC_ADDRESS_TYPE_NETWORK,
  1496. true /* permanent */, 0);
  1497. if (status)
  1498. goto stats_clean;
  1499. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1500. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1501. be_netdev_init(netdev);
  1502. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1503. status = register_netdev(netdev);
  1504. if (status != 0)
  1505. goto stats_clean;
  1506. dev_info(&pdev->dev, BE_NAME " port %d\n", adapter->port_num);
  1507. return 0;
  1508. stats_clean:
  1509. be_stats_cleanup(adapter);
  1510. ctrl_clean:
  1511. be_ctrl_cleanup(adapter);
  1512. free_netdev:
  1513. free_netdev(adapter->netdev);
  1514. rel_reg:
  1515. pci_release_regions(pdev);
  1516. disable_dev:
  1517. pci_disable_device(pdev);
  1518. do_none:
  1519. dev_warn(&pdev->dev, BE_NAME " initialization failed\n");
  1520. return status;
  1521. }
  1522. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1523. {
  1524. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1525. struct net_device *netdev = adapter->netdev;
  1526. netif_device_detach(netdev);
  1527. if (netif_running(netdev)) {
  1528. rtnl_lock();
  1529. be_close(netdev);
  1530. rtnl_unlock();
  1531. }
  1532. pci_save_state(pdev);
  1533. pci_disable_device(pdev);
  1534. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1535. return 0;
  1536. }
  1537. static int be_resume(struct pci_dev *pdev)
  1538. {
  1539. int status = 0;
  1540. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1541. struct net_device *netdev = adapter->netdev;
  1542. netif_device_detach(netdev);
  1543. status = pci_enable_device(pdev);
  1544. if (status)
  1545. return status;
  1546. pci_set_power_state(pdev, 0);
  1547. pci_restore_state(pdev);
  1548. if (netif_running(netdev)) {
  1549. rtnl_lock();
  1550. be_open(netdev);
  1551. rtnl_unlock();
  1552. }
  1553. netif_device_attach(netdev);
  1554. return 0;
  1555. }
  1556. static struct pci_driver be_driver = {
  1557. .name = DRV_NAME,
  1558. .id_table = be_dev_ids,
  1559. .probe = be_probe,
  1560. .remove = be_remove,
  1561. .suspend = be_suspend,
  1562. .resume = be_resume
  1563. };
  1564. static int __init be_init_module(void)
  1565. {
  1566. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1567. && rx_frag_size != 2048) {
  1568. printk(KERN_WARNING DRV_NAME
  1569. " : Module param rx_frag_size must be 2048/4096/8192."
  1570. " Using 2048\n");
  1571. rx_frag_size = 2048;
  1572. }
  1573. /* Ensure rx_frag_size is aligned to chache line */
  1574. if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) {
  1575. printk(KERN_WARNING DRV_NAME
  1576. " : Bad module param rx_frag_size. Using 2048\n");
  1577. rx_frag_size = 2048;
  1578. }
  1579. return pci_register_driver(&be_driver);
  1580. }
  1581. module_init(be_init_module);
  1582. static void __exit be_exit_module(void)
  1583. {
  1584. pci_unregister_driver(&be_driver);
  1585. }
  1586. module_exit(be_exit_module);