mfp.c 5.7 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/mfp.c
  3. *
  4. * PXA3xx Multi-Function Pin Support
  5. *
  6. * Copyright (C) 2007 Marvell Internation Ltd.
  7. *
  8. * 2007-08-21: eric miao <eric.miao@marvell.com>
  9. * initial version
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/kernel.h>
  17. #include <linux/init.h>
  18. #include <linux/io.h>
  19. #include <linux/sysdev.h>
  20. #include <asm/hardware.h>
  21. #include <asm/arch/mfp.h>
  22. #include <asm/arch/mfp-pxa3xx.h>
  23. /* mfp_spin_lock is used to ensure that MFP register configuration
  24. * (most likely a read-modify-write operation) is atomic, and that
  25. * mfp_table[] is consistent
  26. */
  27. static DEFINE_SPINLOCK(mfp_spin_lock);
  28. static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE);
  29. struct pxa3xx_mfp_pin {
  30. unsigned long config; /* -1 for not configured */
  31. unsigned long mfpr_off; /* MFPRxx Register offset */
  32. unsigned long mfpr_run; /* Run-Mode Register Value */
  33. unsigned long mfpr_lpm; /* Low Power Mode Register Value */
  34. };
  35. static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX];
  36. /* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
  37. const static unsigned long mfpr_lpm[] = {
  38. MFPR_LPM_INPUT,
  39. MFPR_LPM_DRIVE_LOW,
  40. MFPR_LPM_DRIVE_HIGH,
  41. MFPR_LPM_PULL_LOW,
  42. MFPR_LPM_PULL_HIGH,
  43. MFPR_LPM_FLOAT,
  44. };
  45. /* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
  46. const static unsigned long mfpr_pull[] = {
  47. MFPR_PULL_NONE,
  48. MFPR_PULL_LOW,
  49. MFPR_PULL_HIGH,
  50. MFPR_PULL_BOTH,
  51. };
  52. /* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
  53. const static unsigned long mfpr_edge[] = {
  54. MFPR_EDGE_NONE,
  55. MFPR_EDGE_RISE,
  56. MFPR_EDGE_FALL,
  57. MFPR_EDGE_BOTH,
  58. };
  59. #define mfpr_readl(off) \
  60. __raw_readl(mfpr_mmio_base + (off))
  61. #define mfpr_writel(off, val) \
  62. __raw_writel(val, mfpr_mmio_base + (off))
  63. #define mfp_configured(p) ((p)->config != -1)
  64. /*
  65. * perform a read-back of any MFPR register to make sure the
  66. * previous writings are finished
  67. */
  68. #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
  69. static inline void __mfp_config_run(struct pxa3xx_mfp_pin *p)
  70. {
  71. if (mfp_configured(p))
  72. mfpr_writel(p->mfpr_off, p->mfpr_run);
  73. }
  74. static inline void __mfp_config_lpm(struct pxa3xx_mfp_pin *p)
  75. {
  76. if (mfp_configured(p)) {
  77. unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR;
  78. if (mfpr_clr != p->mfpr_run)
  79. mfpr_writel(p->mfpr_off, mfpr_clr);
  80. if (p->mfpr_lpm != mfpr_clr)
  81. mfpr_writel(p->mfpr_off, p->mfpr_lpm);
  82. }
  83. }
  84. void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num)
  85. {
  86. unsigned long flags;
  87. int i;
  88. spin_lock_irqsave(&mfp_spin_lock, flags);
  89. for (i = 0; i < num; i++, mfp_cfgs++) {
  90. unsigned long tmp, c = *mfp_cfgs;
  91. struct pxa3xx_mfp_pin *p;
  92. int pin, af, drv, lpm, edge, pull;
  93. pin = MFP_PIN(c);
  94. BUG_ON(pin >= MFP_PIN_MAX);
  95. p = &mfp_table[pin];
  96. af = MFP_AF(c);
  97. drv = MFP_DS(c);
  98. lpm = MFP_LPM_STATE(c);
  99. edge = MFP_LPM_EDGE(c);
  100. pull = MFP_PULL(c);
  101. /* run-mode pull settings will conflict with MFPR bits of
  102. * low power mode state, calculate mfpr_run and mfpr_lpm
  103. * individually if pull != MFP_PULL_NONE
  104. */
  105. tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
  106. if (likely(pull == MFP_PULL_NONE)) {
  107. p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
  108. p->mfpr_lpm = p->mfpr_run;
  109. } else {
  110. p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
  111. p->mfpr_run = tmp | mfpr_pull[pull];
  112. }
  113. p->config = c; __mfp_config_run(p);
  114. }
  115. mfpr_sync();
  116. spin_unlock_irqrestore(&mfp_spin_lock, flags);
  117. }
  118. unsigned long pxa3xx_mfp_read(int mfp)
  119. {
  120. unsigned long val, flags;
  121. BUG_ON(mfp >= MFP_PIN_MAX);
  122. spin_lock_irqsave(&mfp_spin_lock, flags);
  123. val = mfpr_readl(mfp_table[mfp].mfpr_off);
  124. spin_unlock_irqrestore(&mfp_spin_lock, flags);
  125. return val;
  126. }
  127. void pxa3xx_mfp_write(int mfp, unsigned long val)
  128. {
  129. unsigned long flags;
  130. BUG_ON(mfp >= MFP_PIN_MAX);
  131. spin_lock_irqsave(&mfp_spin_lock, flags);
  132. mfpr_writel(mfp_table[mfp].mfpr_off, val);
  133. mfpr_sync();
  134. spin_unlock_irqrestore(&mfp_spin_lock, flags);
  135. }
  136. void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map)
  137. {
  138. struct pxa3xx_mfp_addr_map *p;
  139. unsigned long offset, flags;
  140. int i;
  141. spin_lock_irqsave(&mfp_spin_lock, flags);
  142. for (p = map; p->start != MFP_PIN_INVALID; p++) {
  143. offset = p->offset;
  144. i = p->start;
  145. do {
  146. mfp_table[i].mfpr_off = offset;
  147. mfp_table[i].mfpr_run = 0;
  148. mfp_table[i].mfpr_lpm = 0;
  149. offset += 4; i++;
  150. } while ((i <= p->end) && (p->end != -1));
  151. }
  152. spin_unlock_irqrestore(&mfp_spin_lock, flags);
  153. }
  154. void __init pxa3xx_init_mfp(void)
  155. {
  156. int i;
  157. for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
  158. mfp_table[i].config = -1;
  159. }
  160. #ifdef CONFIG_PM
  161. /*
  162. * Configure the MFPs appropriately for suspend/resume.
  163. * FIXME: this should probably depend on which system state we're
  164. * entering - for instance, we might not want to place MFP pins in
  165. * a pull-down mode if they're an active low chip select, and we're
  166. * just entering standby.
  167. */
  168. static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state)
  169. {
  170. int pin;
  171. for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) {
  172. struct pxa3xx_mfp_pin *p = &mfp_table[pin];
  173. __mfp_config_lpm(p);
  174. }
  175. return 0;
  176. }
  177. static int pxa3xx_mfp_resume(struct sys_device *d)
  178. {
  179. int pin;
  180. for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) {
  181. struct pxa3xx_mfp_pin *p = &mfp_table[pin];
  182. __mfp_config_run(p);
  183. }
  184. return 0;
  185. }
  186. static struct sysdev_class mfp_sysclass = {
  187. set_kset_name("mfp"),
  188. .suspend = pxa3xx_mfp_suspend,
  189. .resume = pxa3xx_mfp_resume,
  190. };
  191. static struct sys_device mfp_device = {
  192. .id = 0,
  193. .cls = &mfp_sysclass,
  194. };
  195. static int __init mfp_init_devicefs(void)
  196. {
  197. sysdev_class_register(&mfp_sysclass);
  198. return sysdev_register(&mfp_device);
  199. }
  200. device_initcall(mfp_init_devicefs);
  201. #endif