parse-events.l 4.6 KB

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  1. %option prefix="parse_events_"
  2. %option stack
  3. %{
  4. #include <errno.h>
  5. #include "../perf.h"
  6. #include "parse-events-bison.h"
  7. #include "parse-events.h"
  8. static int __value(char *str, int base, int token)
  9. {
  10. long num;
  11. errno = 0;
  12. num = strtoul(str, NULL, base);
  13. if (errno)
  14. return PE_ERROR;
  15. parse_events_lval.num = num;
  16. return token;
  17. }
  18. static int value(int base)
  19. {
  20. return __value(parse_events_text, base, PE_VALUE);
  21. }
  22. static int raw(void)
  23. {
  24. return __value(parse_events_text + 1, 16, PE_RAW);
  25. }
  26. static int str(int token)
  27. {
  28. parse_events_lval.str = strdup(parse_events_text);
  29. return token;
  30. }
  31. static int sym(int type, int config)
  32. {
  33. parse_events_lval.num = (type << 16) + config;
  34. return PE_VALUE_SYM;
  35. }
  36. static int term(int type)
  37. {
  38. parse_events_lval.num = type;
  39. return PE_TERM;
  40. }
  41. %}
  42. %x mem
  43. num_dec [0-9]+
  44. num_hex 0x[a-fA-F0-9]+
  45. num_raw_hex [a-fA-F0-9]+
  46. name [a-zA-Z_*?][a-zA-Z0-9_*?]*
  47. modifier_event [ukhpGH]{1,8}
  48. modifier_bp [rwx]
  49. %%
  50. cpu-cycles|cycles { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_CPU_CYCLES); }
  51. stalled-cycles-frontend|idle-cycles-frontend { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND); }
  52. stalled-cycles-backend|idle-cycles-backend { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_STALLED_CYCLES_BACKEND); }
  53. instructions { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_INSTRUCTIONS); }
  54. cache-references { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_CACHE_REFERENCES); }
  55. cache-misses { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_CACHE_MISSES); }
  56. branch-instructions|branches { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_BRANCH_INSTRUCTIONS); }
  57. branch-misses { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_BRANCH_MISSES); }
  58. bus-cycles { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_BUS_CYCLES); }
  59. ref-cycles { return sym(PERF_TYPE_HARDWARE, PERF_COUNT_HW_REF_CPU_CYCLES); }
  60. cpu-clock { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_CPU_CLOCK); }
  61. task-clock { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_TASK_CLOCK); }
  62. page-faults|faults { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_PAGE_FAULTS); }
  63. minor-faults { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_PAGE_FAULTS_MIN); }
  64. major-faults { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_PAGE_FAULTS_MAJ); }
  65. context-switches|cs { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_CONTEXT_SWITCHES); }
  66. cpu-migrations|migrations { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_CPU_MIGRATIONS); }
  67. alignment-faults { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_ALIGNMENT_FAULTS); }
  68. emulation-faults { return sym(PERF_TYPE_SOFTWARE, PERF_COUNT_SW_EMULATION_FAULTS); }
  69. L1-dcache|l1-d|l1d|L1-data |
  70. L1-icache|l1-i|l1i|L1-instruction |
  71. LLC|L2 |
  72. dTLB|d-tlb|Data-TLB |
  73. iTLB|i-tlb|Instruction-TLB |
  74. branch|branches|bpu|btb|bpc |
  75. node { return str(PE_NAME_CACHE_TYPE); }
  76. load|loads|read |
  77. store|stores|write |
  78. prefetch|prefetches |
  79. speculative-read|speculative-load |
  80. refs|Reference|ops|access |
  81. misses|miss { return str(PE_NAME_CACHE_OP_RESULT); }
  82. /*
  83. * These are event config hardcoded term names to be specified
  84. * within xxx/.../ syntax. So far we dont clash with other names,
  85. * so we can put them here directly. In case the we have a conflict
  86. * in future, this needs to go into '//' condition block.
  87. */
  88. config { return term(PARSE_EVENTS__TERM_TYPE_CONFIG); }
  89. config1 { return term(PARSE_EVENTS__TERM_TYPE_CONFIG1); }
  90. config2 { return term(PARSE_EVENTS__TERM_TYPE_CONFIG2); }
  91. name { return term(PARSE_EVENTS__TERM_TYPE_NAME); }
  92. period { return term(PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD); }
  93. branch_type { return term(PARSE_EVENTS__TERM_TYPE_BRANCH_SAMPLE_TYPE); }
  94. mem: { BEGIN(mem); return PE_PREFIX_MEM; }
  95. r{num_raw_hex} { return raw(); }
  96. {num_dec} { return value(10); }
  97. {num_hex} { return value(16); }
  98. {modifier_event} { return str(PE_MODIFIER_EVENT); }
  99. {name} { return str(PE_NAME); }
  100. "/" { return '/'; }
  101. - { return '-'; }
  102. , { return ','; }
  103. : { return ':'; }
  104. = { return '='; }
  105. <mem>{
  106. {modifier_bp} { return str(PE_MODIFIER_BP); }
  107. : { return ':'; }
  108. {num_dec} { return value(10); }
  109. {num_hex} { return value(16); }
  110. /*
  111. * We need to separate 'mem:' scanner part, in order to get specific
  112. * modifier bits parsed out. Otherwise we would need to handle PE_NAME
  113. * and we'd need to parse it manually. During the escape from <mem>
  114. * state we need to put the escaping char back, so we dont miss it.
  115. */
  116. . { unput(*parse_events_text); BEGIN(INITIAL); }
  117. /*
  118. * We destroy the scanner after reaching EOF,
  119. * but anyway just to be sure get back to INIT state.
  120. */
  121. <<EOF>> { BEGIN(INITIAL); }
  122. }
  123. %%
  124. int parse_events_wrap(void)
  125. {
  126. return 1;
  127. }