microcode_intel.c 15 KB

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  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * This driver allows to upgrade microcode on Intel processors
  8. * belonging to IA-32 family - PentiumPro, Pentium II,
  9. * Pentium III, Xeon, Pentium 4, etc.
  10. *
  11. * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
  12. * Software Developer's Manual
  13. * Order Number 253668 or free download from:
  14. *
  15. * http://developer.intel.com/design/pentium4/manuals/253668.htm
  16. *
  17. * For more information, go to http://www.urbanmyth.org/microcode
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License
  21. * as published by the Free Software Foundation; either version
  22. * 2 of the License, or (at your option) any later version.
  23. *
  24. * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
  25. * Initial release.
  26. * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
  27. * Added read() support + cleanups.
  28. * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
  29. * Added 'device trimming' support. open(O_WRONLY) zeroes
  30. * and frees the saved copy of applied microcode.
  31. * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
  32. * Made to use devfs (/dev/cpu/microcode) + cleanups.
  33. * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
  34. * Added misc device support (now uses both devfs and misc).
  35. * Added MICROCODE_IOCFREE ioctl to clear memory.
  36. * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
  37. * Messages for error cases (non Intel & no suitable microcode).
  38. * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
  39. * Removed ->release(). Removed exclusive open and status bitmap.
  40. * Added microcode_rwsem to serialize read()/write()/ioctl().
  41. * Removed global kernel lock usage.
  42. * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
  43. * Write 0 to 0x8B msr and then cpuid before reading revision,
  44. * so that it works even if there were no update done by the
  45. * BIOS. Otherwise, reading from 0x8B gives junk (which happened
  46. * to be 0 on my machine which is why it worked even when I
  47. * disabled update by the BIOS)
  48. * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
  49. * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
  50. * Tigran Aivazian <tigran@veritas.com>
  51. * Intel Pentium 4 processor support and bugfixes.
  52. * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
  53. * Bugfix for HT (Hyper-Threading) enabled processors
  54. * whereby processor resources are shared by all logical processors
  55. * in a single CPU package.
  56. * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
  57. * Tigran Aivazian <tigran@veritas.com>,
  58. * Serialize updates as required on HT processors due to speculative
  59. * nature of implementation.
  60. * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
  61. * Fix the panic when writing zero-length microcode chunk.
  62. * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
  63. * Jun Nakajima <jun.nakajima@intel.com>
  64. * Support for the microcode updates in the new format.
  65. * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
  66. * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
  67. * because we no longer hold a copy of applied microcode
  68. * in kernel memory.
  69. * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
  70. * Fix sigmatch() macro to handle old CPUs with pf == 0.
  71. * Thanks to Stuart Swales for pointing out this bug.
  72. */
  73. //#define DEBUG /* pr_debug */
  74. #include <linux/capability.h>
  75. #include <linux/kernel.h>
  76. #include <linux/init.h>
  77. #include <linux/sched.h>
  78. #include <linux/smp_lock.h>
  79. #include <linux/cpumask.h>
  80. #include <linux/module.h>
  81. #include <linux/slab.h>
  82. #include <linux/vmalloc.h>
  83. #include <linux/miscdevice.h>
  84. #include <linux/spinlock.h>
  85. #include <linux/mm.h>
  86. #include <linux/fs.h>
  87. #include <linux/mutex.h>
  88. #include <linux/cpu.h>
  89. #include <linux/firmware.h>
  90. #include <linux/platform_device.h>
  91. #include <asm/msr.h>
  92. #include <asm/uaccess.h>
  93. #include <asm/processor.h>
  94. #include <asm/microcode.h>
  95. MODULE_DESCRIPTION("Microcode Update Driver");
  96. MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
  97. MODULE_LICENSE("GPL");
  98. #define DEFAULT_UCODE_DATASIZE (2000) /* 2000 bytes */
  99. #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel)) /* 48 bytes */
  100. #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE) /* 2048 bytes */
  101. #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable)) /* 20 bytes */
  102. #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature)) /* 12 bytes */
  103. #define DWSIZE (sizeof(u32))
  104. #define get_totalsize(mc) \
  105. (((struct microcode_intel *)mc)->hdr.totalsize ? \
  106. ((struct microcode_intel *)mc)->hdr.totalsize : \
  107. DEFAULT_UCODE_TOTALSIZE)
  108. #define get_datasize(mc) \
  109. (((struct microcode_intel *)mc)->hdr.datasize ? \
  110. ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
  111. #define sigmatch(s1, s2, p1, p2) \
  112. (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
  113. #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
  114. /* serialize access to the physical write to MSR 0x79 */
  115. static DEFINE_SPINLOCK(microcode_update_lock);
  116. /* no concurrent ->write()s are allowed on /dev/cpu/microcode */
  117. extern struct mutex microcode_mutex;
  118. extern struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
  119. void collect_cpu_info(int cpu_num)
  120. {
  121. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  122. struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
  123. unsigned int val[2];
  124. /* We should bind the task to the CPU */
  125. BUG_ON(raw_smp_processor_id() != cpu_num);
  126. uci->pf = uci->rev = 0;
  127. uci->mc.mc_intel = NULL;
  128. uci->valid = 1;
  129. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  130. cpu_has(c, X86_FEATURE_IA64)) {
  131. printk(KERN_ERR "microcode: CPU%d not a capable Intel "
  132. "processor\n", cpu_num);
  133. uci->valid = 0;
  134. return;
  135. }
  136. uci->sig = cpuid_eax(0x00000001);
  137. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  138. /* get processor flags from MSR 0x17 */
  139. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  140. uci->pf = 1 << ((val[1] >> 18) & 7);
  141. }
  142. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  143. /* see notes above for revision 1.07. Apparent chip bug */
  144. sync_core();
  145. /* get the current revision from MSR 0x8B */
  146. rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
  147. pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
  148. uci->sig, uci->pf, uci->rev);
  149. }
  150. static inline int microcode_update_match(int cpu_num,
  151. struct microcode_header_intel *mc_header, int sig, int pf)
  152. {
  153. struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
  154. if (!sigmatch(sig, uci->sig, pf, uci->pf)
  155. || mc_header->rev <= uci->rev)
  156. return 0;
  157. return 1;
  158. }
  159. int microcode_sanity_check(void *mc)
  160. {
  161. struct microcode_header_intel *mc_header = mc;
  162. struct extended_sigtable *ext_header = NULL;
  163. struct extended_signature *ext_sig;
  164. unsigned long total_size, data_size, ext_table_size;
  165. int sum, orig_sum, ext_sigcount = 0, i;
  166. total_size = get_totalsize(mc_header);
  167. data_size = get_datasize(mc_header);
  168. if (data_size + MC_HEADER_SIZE > total_size) {
  169. printk(KERN_ERR "microcode: error! "
  170. "Bad data size in microcode data file\n");
  171. return -EINVAL;
  172. }
  173. if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
  174. printk(KERN_ERR "microcode: error! "
  175. "Unknown microcode update format\n");
  176. return -EINVAL;
  177. }
  178. ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
  179. if (ext_table_size) {
  180. if ((ext_table_size < EXT_HEADER_SIZE)
  181. || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
  182. printk(KERN_ERR "microcode: error! "
  183. "Small exttable size in microcode data file\n");
  184. return -EINVAL;
  185. }
  186. ext_header = mc + MC_HEADER_SIZE + data_size;
  187. if (ext_table_size != exttable_size(ext_header)) {
  188. printk(KERN_ERR "microcode: error! "
  189. "Bad exttable size in microcode data file\n");
  190. return -EFAULT;
  191. }
  192. ext_sigcount = ext_header->count;
  193. }
  194. /* check extended table checksum */
  195. if (ext_table_size) {
  196. int ext_table_sum = 0;
  197. int *ext_tablep = (int *)ext_header;
  198. i = ext_table_size / DWSIZE;
  199. while (i--)
  200. ext_table_sum += ext_tablep[i];
  201. if (ext_table_sum) {
  202. printk(KERN_WARNING "microcode: aborting, "
  203. "bad extended signature table checksum\n");
  204. return -EINVAL;
  205. }
  206. }
  207. /* calculate the checksum */
  208. orig_sum = 0;
  209. i = (MC_HEADER_SIZE + data_size) / DWSIZE;
  210. while (i--)
  211. orig_sum += ((int *)mc)[i];
  212. if (orig_sum) {
  213. printk(KERN_ERR "microcode: aborting, bad checksum\n");
  214. return -EINVAL;
  215. }
  216. if (!ext_table_size)
  217. return 0;
  218. /* check extended signature checksum */
  219. for (i = 0; i < ext_sigcount; i++) {
  220. ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
  221. EXT_SIGNATURE_SIZE * i;
  222. sum = orig_sum
  223. - (mc_header->sig + mc_header->pf + mc_header->cksum)
  224. + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
  225. if (sum) {
  226. printk(KERN_ERR "microcode: aborting, bad checksum\n");
  227. return -EINVAL;
  228. }
  229. }
  230. return 0;
  231. }
  232. /*
  233. * return 0 - no update found
  234. * return 1 - found update
  235. * return < 0 - error
  236. */
  237. int get_matching_microcode(void *mc, int cpu)
  238. {
  239. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  240. struct microcode_header_intel *mc_header = mc;
  241. struct extended_sigtable *ext_header;
  242. unsigned long total_size = get_totalsize(mc_header);
  243. int ext_sigcount, i;
  244. struct extended_signature *ext_sig;
  245. void *new_mc;
  246. if (microcode_update_match(cpu, mc_header,
  247. mc_header->sig, mc_header->pf))
  248. goto find;
  249. if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
  250. return 0;
  251. ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
  252. ext_sigcount = ext_header->count;
  253. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  254. for (i = 0; i < ext_sigcount; i++) {
  255. if (microcode_update_match(cpu, mc_header,
  256. ext_sig->sig, ext_sig->pf))
  257. goto find;
  258. ext_sig++;
  259. }
  260. return 0;
  261. find:
  262. pr_debug("microcode: CPU%d found a matching microcode update with"
  263. " version 0x%x (current=0x%x)\n", cpu, mc_header->rev, uci->rev);
  264. new_mc = vmalloc(total_size);
  265. if (!new_mc) {
  266. printk(KERN_ERR "microcode: error! Can not allocate memory\n");
  267. return -ENOMEM;
  268. }
  269. /* free previous update file */
  270. vfree(uci->mc.mc_intel);
  271. memcpy(new_mc, mc, total_size);
  272. uci->mc.mc_intel = new_mc;
  273. return 1;
  274. }
  275. void apply_microcode(int cpu)
  276. {
  277. unsigned long flags;
  278. unsigned int val[2];
  279. int cpu_num = raw_smp_processor_id();
  280. struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
  281. /* We should bind the task to the CPU */
  282. BUG_ON(cpu_num != cpu);
  283. if (uci->mc.mc_intel == NULL)
  284. return;
  285. /* serialize access to the physical write to MSR 0x79 */
  286. spin_lock_irqsave(&microcode_update_lock, flags);
  287. /* write microcode via MSR 0x79 */
  288. wrmsr(MSR_IA32_UCODE_WRITE,
  289. (unsigned long) uci->mc.mc_intel->bits,
  290. (unsigned long) uci->mc.mc_intel->bits >> 16 >> 16);
  291. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  292. /* see notes above for revision 1.07. Apparent chip bug */
  293. sync_core();
  294. /* get the current revision from MSR 0x8B */
  295. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  296. spin_unlock_irqrestore(&microcode_update_lock, flags);
  297. if (val[1] != uci->mc.mc_intel->hdr.rev) {
  298. printk(KERN_ERR "microcode: CPU%d update from revision "
  299. "0x%x to 0x%x failed\n", cpu_num, uci->rev, val[1]);
  300. return;
  301. }
  302. printk(KERN_INFO "microcode: CPU%d updated from revision "
  303. "0x%x to 0x%x, date = %08x \n",
  304. cpu_num, uci->rev, val[1], uci->mc.mc_intel->hdr.date);
  305. uci->rev = val[1];
  306. }
  307. #ifdef CONFIG_MICROCODE_OLD_INTERFACE
  308. extern void __user *user_buffer; /* user area microcode data buffer */
  309. extern unsigned int user_buffer_size; /* it's size */
  310. long get_next_ucode(void **mc, long offset)
  311. {
  312. struct microcode_header_intel mc_header;
  313. unsigned long total_size;
  314. /* No more data */
  315. if (offset >= user_buffer_size)
  316. return 0;
  317. if (copy_from_user(&mc_header, user_buffer + offset, MC_HEADER_SIZE)) {
  318. printk(KERN_ERR "microcode: error! Can not read user data\n");
  319. return -EFAULT;
  320. }
  321. total_size = get_totalsize(&mc_header);
  322. if (offset + total_size > user_buffer_size) {
  323. printk(KERN_ERR "microcode: error! Bad total size in microcode "
  324. "data file\n");
  325. return -EINVAL;
  326. }
  327. *mc = vmalloc(total_size);
  328. if (!*mc)
  329. return -ENOMEM;
  330. if (copy_from_user(*mc, user_buffer + offset, total_size)) {
  331. printk(KERN_ERR "microcode: error! Can not read user data\n");
  332. vfree(*mc);
  333. return -EFAULT;
  334. }
  335. return offset + total_size;
  336. }
  337. #endif
  338. static long get_next_ucode_from_buffer(void **mc, const u8 *buf,
  339. unsigned long size, long offset)
  340. {
  341. struct microcode_header_intel *mc_header;
  342. unsigned long total_size;
  343. /* No more data */
  344. if (offset >= size)
  345. return 0;
  346. mc_header = (struct microcode_header_intel *)(buf + offset);
  347. total_size = get_totalsize(mc_header);
  348. if (offset + total_size > size) {
  349. printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
  350. return -EINVAL;
  351. }
  352. *mc = vmalloc(total_size);
  353. if (!*mc) {
  354. printk(KERN_ERR "microcode: error! Can not allocate memory\n");
  355. return -ENOMEM;
  356. }
  357. memcpy(*mc, buf + offset, total_size);
  358. return offset + total_size;
  359. }
  360. /* fake device for request_firmware */
  361. extern struct platform_device *microcode_pdev;
  362. int cpu_request_microcode(int cpu)
  363. {
  364. char name[30];
  365. struct cpuinfo_x86 *c = &cpu_data(cpu);
  366. const struct firmware *firmware;
  367. const u8 *buf;
  368. unsigned long size;
  369. long offset = 0;
  370. int error;
  371. void *mc;
  372. /* We should bind the task to the CPU */
  373. BUG_ON(cpu != raw_smp_processor_id());
  374. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  375. c->x86, c->x86_model, c->x86_mask);
  376. error = request_firmware(&firmware, name, &microcode_pdev->dev);
  377. if (error) {
  378. pr_debug("microcode: data file %s load failed\n", name);
  379. return error;
  380. }
  381. buf = firmware->data;
  382. size = firmware->size;
  383. while ((offset = get_next_ucode_from_buffer(&mc, buf, size, offset))
  384. > 0) {
  385. error = microcode_sanity_check(mc);
  386. if (error)
  387. break;
  388. error = get_matching_microcode(mc, cpu);
  389. if (error < 0)
  390. break;
  391. /*
  392. * It's possible the data file has multiple matching ucode,
  393. * lets keep searching till the latest version
  394. */
  395. if (error == 1) {
  396. apply_microcode(cpu);
  397. error = 0;
  398. }
  399. vfree(mc);
  400. }
  401. if (offset > 0)
  402. vfree(mc);
  403. if (offset < 0)
  404. error = offset;
  405. release_firmware(firmware);
  406. return error;
  407. }
  408. int apply_microcode_check_cpu(int cpu)
  409. {
  410. struct cpuinfo_x86 *c = &cpu_data(cpu);
  411. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  412. cpumask_t old;
  413. cpumask_of_cpu_ptr(newmask, cpu);
  414. unsigned int val[2];
  415. int err = 0;
  416. /* Check if the microcode is available */
  417. if (!uci->mc.mc_intel)
  418. return 0;
  419. old = current->cpus_allowed;
  420. set_cpus_allowed_ptr(current, newmask);
  421. /* Check if the microcode we have in memory matches the CPU */
  422. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  423. cpu_has(c, X86_FEATURE_IA64) || uci->sig != cpuid_eax(0x00000001))
  424. err = -EINVAL;
  425. if (!err && ((c->x86_model >= 5) || (c->x86 > 6))) {
  426. /* get processor flags from MSR 0x17 */
  427. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  428. if (uci->pf != (1 << ((val[1] >> 18) & 7)))
  429. err = -EINVAL;
  430. }
  431. if (!err) {
  432. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  433. /* see notes above for revision 1.07. Apparent chip bug */
  434. sync_core();
  435. /* get the current revision from MSR 0x8B */
  436. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  437. if (uci->rev != val[1])
  438. err = -EINVAL;
  439. }
  440. if (!err)
  441. apply_microcode(cpu);
  442. else
  443. printk(KERN_ERR "microcode: Could not apply microcode to CPU%d:"
  444. " sig=0x%x, pf=0x%x, rev=0x%x\n",
  445. cpu, uci->sig, uci->pf, uci->rev);
  446. set_cpus_allowed_ptr(current, &old);
  447. return err;
  448. }
  449. void microcode_fini_cpu(int cpu)
  450. {
  451. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  452. mutex_lock(&microcode_mutex);
  453. uci->valid = 0;
  454. kfree(uci->mc.mc_intel);
  455. uci->mc.mc_intel = NULL;
  456. mutex_unlock(&microcode_mutex);
  457. }