sdio.c 22 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/card.h>
  17. #include <linux/mmc/mmc.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include <linux/mmc/sdio_ids.h>
  21. #include <linux/mmc/sdio.h>
  22. #include <linux/mmc/sd.h>
  23. #include "htc_hif.h"
  24. #include "hif-ops.h"
  25. #include "target.h"
  26. #include "debug.h"
  27. struct ath6kl_sdio {
  28. struct sdio_func *func;
  29. spinlock_t lock;
  30. /* free list */
  31. struct list_head bus_req_freeq;
  32. /* available bus requests */
  33. struct bus_request bus_req[BUS_REQUEST_MAX_NUM];
  34. struct ath6kl *ar;
  35. u8 *dma_buffer;
  36. /* scatter request list head */
  37. struct list_head scat_req;
  38. spinlock_t scat_lock;
  39. bool is_disabled;
  40. atomic_t irq_handling;
  41. const struct sdio_device_id *id;
  42. struct work_struct wr_async_work;
  43. struct list_head wr_asyncq;
  44. spinlock_t wr_async_lock;
  45. };
  46. #define CMD53_ARG_READ 0
  47. #define CMD53_ARG_WRITE 1
  48. #define CMD53_ARG_BLOCK_BASIS 1
  49. #define CMD53_ARG_FIXED_ADDRESS 0
  50. #define CMD53_ARG_INCR_ADDRESS 1
  51. static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar)
  52. {
  53. return ar->hif_priv;
  54. }
  55. /*
  56. * Macro to check if DMA buffer is WORD-aligned and DMA-able.
  57. * Most host controllers assume the buffer is DMA'able and will
  58. * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid
  59. * check fails on stack memory.
  60. */
  61. static inline bool buf_needs_bounce(u8 *buf)
  62. {
  63. return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf);
  64. }
  65. static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar)
  66. {
  67. struct ath6kl_mbox_info *mbox_info = &ar->mbox_info;
  68. /* EP1 has an extended range */
  69. mbox_info->htc_addr = HIF_MBOX_BASE_ADDR;
  70. mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR;
  71. mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH;
  72. mbox_info->block_size = HIF_MBOX_BLOCK_SIZE;
  73. mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR;
  74. mbox_info->gmbox_sz = HIF_GMBOX_WIDTH;
  75. }
  76. static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func,
  77. u8 mode, u8 opcode, u32 addr,
  78. u16 blksz)
  79. {
  80. *arg = (((rw & 1) << 31) |
  81. ((func & 0x7) << 28) |
  82. ((mode & 1) << 27) |
  83. ((opcode & 1) << 26) |
  84. ((addr & 0x1FFFF) << 9) |
  85. (blksz & 0x1FF));
  86. }
  87. static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw,
  88. unsigned int address,
  89. unsigned char val)
  90. {
  91. const u8 func = 0;
  92. *arg = ((write & 1) << 31) |
  93. ((func & 0x7) << 28) |
  94. ((raw & 1) << 27) |
  95. (1 << 26) |
  96. ((address & 0x1FFFF) << 9) |
  97. (1 << 8) |
  98. (val & 0xFF);
  99. }
  100. static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card,
  101. unsigned int address,
  102. unsigned char byte)
  103. {
  104. struct mmc_command io_cmd;
  105. memset(&io_cmd, 0, sizeof(io_cmd));
  106. ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
  107. io_cmd.opcode = SD_IO_RW_DIRECT;
  108. io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
  109. return mmc_wait_for_cmd(card->host, &io_cmd, 0);
  110. }
  111. static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio)
  112. {
  113. struct bus_request *bus_req;
  114. unsigned long flag;
  115. spin_lock_irqsave(&ar_sdio->lock, flag);
  116. if (list_empty(&ar_sdio->bus_req_freeq)) {
  117. spin_unlock_irqrestore(&ar_sdio->lock, flag);
  118. return NULL;
  119. }
  120. bus_req = list_first_entry(&ar_sdio->bus_req_freeq,
  121. struct bus_request, list);
  122. list_del(&bus_req->list);
  123. spin_unlock_irqrestore(&ar_sdio->lock, flag);
  124. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req);
  125. return bus_req;
  126. }
  127. static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio,
  128. struct bus_request *bus_req)
  129. {
  130. unsigned long flag;
  131. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req);
  132. spin_lock_irqsave(&ar_sdio->lock, flag);
  133. list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq);
  134. spin_unlock_irqrestore(&ar_sdio->lock, flag);
  135. }
  136. static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req,
  137. struct mmc_data *data)
  138. {
  139. struct scatterlist *sg;
  140. int i;
  141. data->blksz = HIF_MBOX_BLOCK_SIZE;
  142. data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE;
  143. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  144. "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n",
  145. (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr,
  146. data->blksz, data->blocks, scat_req->len,
  147. scat_req->scat_entries);
  148. data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE :
  149. MMC_DATA_READ;
  150. /* fill SG entries */
  151. sg = scat_req->sgentries;
  152. sg_init_table(sg, scat_req->scat_entries);
  153. /* assemble SG list */
  154. for (i = 0; i < scat_req->scat_entries; i++, sg++) {
  155. if ((unsigned long)scat_req->scat_list[i].buf & 0x3)
  156. /*
  157. * Some scatter engines can handle unaligned
  158. * buffers, print this as informational only.
  159. */
  160. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  161. "(%s) scatter buffer is unaligned 0x%p\n",
  162. scat_req->req & HIF_WRITE ? "WR" : "RD",
  163. scat_req->scat_list[i].buf);
  164. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
  165. i, scat_req->scat_list[i].buf,
  166. scat_req->scat_list[i].len);
  167. sg_set_buf(sg, scat_req->scat_list[i].buf,
  168. scat_req->scat_list[i].len);
  169. }
  170. /* set scatter-gather table for request */
  171. data->sg = scat_req->sgentries;
  172. data->sg_len = scat_req->scat_entries;
  173. }
  174. static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio,
  175. struct bus_request *req)
  176. {
  177. struct mmc_request mmc_req;
  178. struct mmc_command cmd;
  179. struct mmc_data data;
  180. struct hif_scatter_req *scat_req;
  181. u8 opcode, rw;
  182. int status;
  183. scat_req = req->scat_req;
  184. memset(&mmc_req, 0, sizeof(struct mmc_request));
  185. memset(&cmd, 0, sizeof(struct mmc_command));
  186. memset(&data, 0, sizeof(struct mmc_data));
  187. ath6kl_sdio_setup_scat_data(scat_req, &data);
  188. opcode = (scat_req->req & HIF_FIXED_ADDRESS) ?
  189. CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS;
  190. rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ;
  191. /* Fixup the address so that the last byte will fall on MBOX EOM */
  192. if (scat_req->req & HIF_WRITE) {
  193. if (scat_req->addr == HIF_MBOX_BASE_ADDR)
  194. scat_req->addr += HIF_MBOX_WIDTH - scat_req->len;
  195. else
  196. /* Uses extended address range */
  197. scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len;
  198. }
  199. /* set command argument */
  200. ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num,
  201. CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr,
  202. data.blocks);
  203. cmd.opcode = SD_IO_RW_EXTENDED;
  204. cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
  205. mmc_req.cmd = &cmd;
  206. mmc_req.data = &data;
  207. mmc_set_data_timeout(&data, ar_sdio->func->card);
  208. /* synchronous call to process request */
  209. mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req);
  210. status = cmd.error ? cmd.error : data.error;
  211. scat_req->status = status;
  212. if (scat_req->status)
  213. ath6kl_err("Scatter write request failed:%d\n",
  214. scat_req->status);
  215. if (scat_req->req & HIF_ASYNCHRONOUS)
  216. scat_req->complete(scat_req);
  217. return status;
  218. }
  219. /* clean up scatter support */
  220. static void ath6kl_sdio_cleanup_scat_resource(struct ath6kl_sdio *ar_sdio)
  221. {
  222. struct hif_scatter_req *s_req, *tmp_req;
  223. unsigned long flag;
  224. /* empty the free list */
  225. spin_lock_irqsave(&ar_sdio->scat_lock, flag);
  226. list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) {
  227. list_del(&s_req->list);
  228. spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
  229. if (s_req->busrequest)
  230. ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest);
  231. kfree(s_req->virt_dma_buf);
  232. kfree(s_req->sgentries);
  233. kfree(s_req);
  234. spin_lock_irqsave(&ar_sdio->scat_lock, flag);
  235. }
  236. spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
  237. }
  238. /* setup of HIF scatter resources */
  239. static int ath6kl_sdio_setup_scat_resource(struct ath6kl_sdio *ar_sdio,
  240. struct hif_dev_scat_sup_info *pinfo)
  241. {
  242. struct hif_scatter_req *s_req;
  243. struct bus_request *bus_req;
  244. int i, scat_req_sz, scat_list_sz, sg_sz;
  245. /* check if host supports scatter and it meets our requirements */
  246. if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
  247. ath6kl_err("hif-scatter: host only supports scatter of : %d entries, need: %d\n",
  248. ar_sdio->func->card->host->max_segs,
  249. MAX_SCATTER_ENTRIES_PER_REQ);
  250. return -EINVAL;
  251. }
  252. ath6kl_dbg(ATH6KL_DBG_ANY,
  253. "hif-scatter enabled: max scatter req : %d entries: %d\n",
  254. MAX_SCATTER_REQUESTS, MAX_SCATTER_ENTRIES_PER_REQ);
  255. scat_list_sz = (MAX_SCATTER_ENTRIES_PER_REQ - 1) *
  256. sizeof(struct hif_scatter_item);
  257. scat_req_sz = sizeof(*s_req) + scat_list_sz;
  258. sg_sz = sizeof(struct scatterlist) * MAX_SCATTER_ENTRIES_PER_REQ;
  259. for (i = 0; i < MAX_SCATTER_REQUESTS; i++) {
  260. /* allocate the scatter request */
  261. s_req = kzalloc(scat_req_sz, GFP_KERNEL);
  262. if (!s_req)
  263. goto fail_setup_scat;
  264. /* allocate sglist */
  265. s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL);
  266. if (!s_req->sgentries) {
  267. kfree(s_req);
  268. goto fail_setup_scat;
  269. }
  270. /* allocate a bus request for this scatter request */
  271. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  272. if (!bus_req) {
  273. kfree(s_req->sgentries);
  274. kfree(s_req);
  275. goto fail_setup_scat;
  276. }
  277. /* assign the scatter request to this bus request */
  278. bus_req->scat_req = s_req;
  279. s_req->busrequest = bus_req;
  280. /* add it to the scatter pool */
  281. hif_scatter_req_add(ar_sdio->ar, s_req);
  282. }
  283. pinfo->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ;
  284. pinfo->max_xfer_szper_scatreq = MAX_SCATTER_REQ_TRANSFER_SIZE;
  285. return 0;
  286. fail_setup_scat:
  287. ath6kl_err("hif-scatter: failed to alloc scatter resources !\n");
  288. ath6kl_sdio_cleanup_scat_resource(ar_sdio);
  289. return -ENOMEM;
  290. }
  291. static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
  292. u32 len, u32 request)
  293. {
  294. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  295. u8 *tbuf = NULL;
  296. int ret;
  297. bool bounced = false;
  298. if (request & HIF_BLOCK_BASIS)
  299. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  300. if (buf_needs_bounce(buf)) {
  301. if (!ar_sdio->dma_buffer)
  302. return -ENOMEM;
  303. tbuf = ar_sdio->dma_buffer;
  304. memcpy(tbuf, buf, len);
  305. bounced = true;
  306. } else
  307. tbuf = buf;
  308. sdio_claim_host(ar_sdio->func);
  309. if (request & HIF_WRITE) {
  310. if (addr >= HIF_MBOX_BASE_ADDR &&
  311. addr <= HIF_MBOX_END_ADDR)
  312. addr += (HIF_MBOX_WIDTH - len);
  313. if (addr == HIF_MBOX0_EXT_BASE_ADDR)
  314. addr += HIF_MBOX0_EXT_WIDTH - len;
  315. if (request & HIF_FIXED_ADDRESS)
  316. ret = sdio_writesb(ar_sdio->func, addr, tbuf, len);
  317. else
  318. ret = sdio_memcpy_toio(ar_sdio->func, addr, tbuf, len);
  319. } else {
  320. if (request & HIF_FIXED_ADDRESS)
  321. ret = sdio_readsb(ar_sdio->func, tbuf, addr, len);
  322. else
  323. ret = sdio_memcpy_fromio(ar_sdio->func, tbuf,
  324. addr, len);
  325. if (bounced)
  326. memcpy(buf, tbuf, len);
  327. }
  328. sdio_release_host(ar_sdio->func);
  329. return ret;
  330. }
  331. static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio,
  332. struct bus_request *req)
  333. {
  334. if (req->scat_req)
  335. ath6kl_sdio_scat_rw(ar_sdio, req);
  336. else {
  337. void *context;
  338. int status;
  339. status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address,
  340. req->buffer, req->length,
  341. req->request);
  342. context = req->packet;
  343. ath6kl_sdio_free_bus_req(ar_sdio, req);
  344. ath6kldev_rw_comp_handler(context, status);
  345. }
  346. }
  347. static void ath6kl_sdio_write_async_work(struct work_struct *work)
  348. {
  349. struct ath6kl_sdio *ar_sdio;
  350. unsigned long flags;
  351. struct bus_request *req, *tmp_req;
  352. ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work);
  353. sdio_claim_host(ar_sdio->func);
  354. spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
  355. list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
  356. list_del(&req->list);
  357. spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
  358. __ath6kl_sdio_write_async(ar_sdio, req);
  359. spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
  360. }
  361. spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
  362. sdio_release_host(ar_sdio->func);
  363. }
  364. static void ath6kl_sdio_irq_handler(struct sdio_func *func)
  365. {
  366. int status;
  367. struct ath6kl_sdio *ar_sdio;
  368. ar_sdio = sdio_get_drvdata(func);
  369. atomic_set(&ar_sdio->irq_handling, 1);
  370. /*
  371. * Release the host during interrups so we can pick it back up when
  372. * we process commands.
  373. */
  374. sdio_release_host(ar_sdio->func);
  375. status = ath6kldev_intr_bh_handler(ar_sdio->ar);
  376. sdio_claim_host(ar_sdio->func);
  377. atomic_set(&ar_sdio->irq_handling, 0);
  378. WARN_ON(status && status != -ECANCELED);
  379. }
  380. static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio)
  381. {
  382. struct sdio_func *func = ar_sdio->func;
  383. int ret = 0;
  384. if (!ar_sdio->is_disabled)
  385. return 0;
  386. sdio_claim_host(func);
  387. ret = sdio_enable_func(func);
  388. if (ret) {
  389. ath6kl_err("Unable to enable sdio func: %d)\n", ret);
  390. sdio_release_host(func);
  391. return ret;
  392. }
  393. sdio_release_host(func);
  394. /*
  395. * Wait for hardware to initialise. It should take a lot less than
  396. * 10 ms but let's be conservative here.
  397. */
  398. msleep(10);
  399. ar_sdio->is_disabled = false;
  400. return ret;
  401. }
  402. static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio)
  403. {
  404. int ret;
  405. if (ar_sdio->is_disabled)
  406. return 0;
  407. /* Disable the card */
  408. sdio_claim_host(ar_sdio->func);
  409. ret = sdio_disable_func(ar_sdio->func);
  410. sdio_release_host(ar_sdio->func);
  411. if (ret)
  412. return ret;
  413. ar_sdio->is_disabled = true;
  414. return ret;
  415. }
  416. static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
  417. u32 length, u32 request,
  418. struct htc_packet *packet)
  419. {
  420. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  421. struct bus_request *bus_req;
  422. unsigned long flags;
  423. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  424. if (!bus_req)
  425. return -ENOMEM;
  426. bus_req->address = address;
  427. bus_req->buffer = buffer;
  428. bus_req->length = length;
  429. bus_req->request = request;
  430. bus_req->packet = packet;
  431. spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
  432. list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq);
  433. spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
  434. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  435. return 0;
  436. }
  437. static void ath6kl_sdio_irq_enable(struct ath6kl *ar)
  438. {
  439. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  440. int ret;
  441. sdio_claim_host(ar_sdio->func);
  442. /* Register the isr */
  443. ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler);
  444. if (ret)
  445. ath6kl_err("Failed to claim sdio irq: %d\n", ret);
  446. sdio_release_host(ar_sdio->func);
  447. }
  448. static void ath6kl_sdio_irq_disable(struct ath6kl *ar)
  449. {
  450. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  451. int ret;
  452. sdio_claim_host(ar_sdio->func);
  453. /* Mask our function IRQ */
  454. while (atomic_read(&ar_sdio->irq_handling)) {
  455. sdio_release_host(ar_sdio->func);
  456. schedule_timeout(HZ / 10);
  457. sdio_claim_host(ar_sdio->func);
  458. }
  459. ret = sdio_release_irq(ar_sdio->func);
  460. if (ret)
  461. ath6kl_err("Failed to release sdio irq: %d\n", ret);
  462. sdio_release_host(ar_sdio->func);
  463. }
  464. static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar)
  465. {
  466. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  467. struct hif_scatter_req *node = NULL;
  468. unsigned long flag;
  469. spin_lock_irqsave(&ar_sdio->scat_lock, flag);
  470. if (!list_empty(&ar_sdio->scat_req)) {
  471. node = list_first_entry(&ar_sdio->scat_req,
  472. struct hif_scatter_req, list);
  473. list_del(&node->list);
  474. }
  475. spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
  476. return node;
  477. }
  478. static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar,
  479. struct hif_scatter_req *s_req)
  480. {
  481. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  482. unsigned long flag;
  483. spin_lock_irqsave(&ar_sdio->scat_lock, flag);
  484. list_add_tail(&s_req->list, &ar_sdio->scat_req);
  485. spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
  486. }
  487. static int ath6kl_sdio_enable_scatter(struct ath6kl *ar,
  488. struct hif_dev_scat_sup_info *info)
  489. {
  490. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  491. int ret;
  492. ret = ath6kl_sdio_setup_scat_resource(ar_sdio, info);
  493. return ret;
  494. }
  495. /* scatter gather read write request */
  496. static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar,
  497. struct hif_scatter_req *scat_req)
  498. {
  499. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  500. u32 request = scat_req->req;
  501. int status = 0;
  502. unsigned long flags;
  503. if (!scat_req->len)
  504. return -EINVAL;
  505. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  506. "hif-scatter: total len: %d scatter entries: %d\n",
  507. scat_req->len, scat_req->scat_entries);
  508. if (request & HIF_SYNCHRONOUS) {
  509. sdio_claim_host(ar_sdio->func);
  510. status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest);
  511. sdio_release_host(ar_sdio->func);
  512. } else {
  513. spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
  514. list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq);
  515. spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
  516. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  517. }
  518. return status;
  519. }
  520. static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
  521. {
  522. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  523. ath6kl_sdio_cleanup_scat_resource(ar_sdio);
  524. }
  525. static const struct ath6kl_hif_ops ath6kl_sdio_ops = {
  526. .read_write_sync = ath6kl_sdio_read_write_sync,
  527. .write_async = ath6kl_sdio_write_async,
  528. .irq_enable = ath6kl_sdio_irq_enable,
  529. .irq_disable = ath6kl_sdio_irq_disable,
  530. .scatter_req_get = ath6kl_sdio_scatter_req_get,
  531. .scatter_req_add = ath6kl_sdio_scatter_req_add,
  532. .enable_scatter = ath6kl_sdio_enable_scatter,
  533. .scat_req_rw = ath6kl_sdio_async_rw_scatter,
  534. .cleanup_scatter = ath6kl_sdio_cleanup_scatter,
  535. };
  536. static int ath6kl_sdio_probe(struct sdio_func *func,
  537. const struct sdio_device_id *id)
  538. {
  539. int ret;
  540. struct ath6kl_sdio *ar_sdio;
  541. struct ath6kl *ar;
  542. int count;
  543. ath6kl_dbg(ATH6KL_DBG_TRC,
  544. "%s: func: 0x%X, vendor id: 0x%X, dev id: 0x%X, block size: 0x%X/0x%X\n",
  545. __func__, func->num, func->vendor,
  546. func->device, func->max_blksize, func->cur_blksize);
  547. ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL);
  548. if (!ar_sdio)
  549. return -ENOMEM;
  550. ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL);
  551. if (!ar_sdio->dma_buffer) {
  552. ret = -ENOMEM;
  553. goto err_hif;
  554. }
  555. ar_sdio->func = func;
  556. sdio_set_drvdata(func, ar_sdio);
  557. ar_sdio->id = id;
  558. ar_sdio->is_disabled = true;
  559. spin_lock_init(&ar_sdio->lock);
  560. spin_lock_init(&ar_sdio->scat_lock);
  561. spin_lock_init(&ar_sdio->wr_async_lock);
  562. INIT_LIST_HEAD(&ar_sdio->scat_req);
  563. INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
  564. INIT_LIST_HEAD(&ar_sdio->wr_asyncq);
  565. INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work);
  566. for (count = 0; count < BUS_REQUEST_MAX_NUM; count++)
  567. ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]);
  568. ar = ath6kl_core_alloc(&ar_sdio->func->dev);
  569. if (!ar) {
  570. ath6kl_err("Failed to alloc ath6kl core\n");
  571. ret = -ENOMEM;
  572. goto err_dma;
  573. }
  574. ar_sdio->ar = ar;
  575. ar->hif_priv = ar_sdio;
  576. ar->hif_ops = &ath6kl_sdio_ops;
  577. ath6kl_sdio_set_mbox_info(ar);
  578. sdio_claim_host(func);
  579. if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >=
  580. MANUFACTURER_ID_AR6003_BASE) {
  581. /* enable 4-bit ASYNC interrupt on AR6003 or later */
  582. ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card,
  583. CCCR_SDIO_IRQ_MODE_REG,
  584. SDIO_IRQ_MODE_ASYNC_4BIT_IRQ);
  585. if (ret) {
  586. ath6kl_err("Failed to enable 4-bit async irq mode %d\n",
  587. ret);
  588. sdio_release_host(func);
  589. goto err_dma;
  590. }
  591. ath6kl_dbg(ATH6KL_DBG_TRC, "4-bit async irq mode enabled\n");
  592. }
  593. /* give us some time to enable, in ms */
  594. func->enable_timeout = 100;
  595. sdio_release_host(func);
  596. ret = ath6kl_sdio_power_on(ar_sdio);
  597. if (ret)
  598. goto err_dma;
  599. sdio_claim_host(func);
  600. ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE);
  601. if (ret) {
  602. ath6kl_err("Set sdio block size %d failed: %d)\n",
  603. HIF_MBOX_BLOCK_SIZE, ret);
  604. sdio_release_host(func);
  605. goto err_off;
  606. }
  607. sdio_release_host(func);
  608. ret = ath6kl_core_init(ar);
  609. if (ret) {
  610. ath6kl_err("Failed to init ath6kl core\n");
  611. goto err_off;
  612. }
  613. return ret;
  614. err_off:
  615. ath6kl_sdio_power_off(ar_sdio);
  616. err_dma:
  617. kfree(ar_sdio->dma_buffer);
  618. err_hif:
  619. kfree(ar_sdio);
  620. return ret;
  621. }
  622. static void ath6kl_sdio_remove(struct sdio_func *func)
  623. {
  624. struct ath6kl_sdio *ar_sdio;
  625. ar_sdio = sdio_get_drvdata(func);
  626. ath6kl_stop_txrx(ar_sdio->ar);
  627. cancel_work_sync(&ar_sdio->wr_async_work);
  628. ath6kl_unavail_ev(ar_sdio->ar);
  629. ath6kl_sdio_power_off(ar_sdio);
  630. kfree(ar_sdio->dma_buffer);
  631. kfree(ar_sdio);
  632. }
  633. static const struct sdio_device_id ath6kl_sdio_devices[] = {
  634. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))},
  635. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))},
  636. {},
  637. };
  638. MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices);
  639. static struct sdio_driver ath6kl_sdio_driver = {
  640. .name = "ath6kl_sdio",
  641. .id_table = ath6kl_sdio_devices,
  642. .probe = ath6kl_sdio_probe,
  643. .remove = ath6kl_sdio_remove,
  644. };
  645. static int __init ath6kl_sdio_init(void)
  646. {
  647. int ret;
  648. ret = sdio_register_driver(&ath6kl_sdio_driver);
  649. if (ret)
  650. ath6kl_err("sdio driver registration failed: %d\n", ret);
  651. return ret;
  652. }
  653. static void __exit ath6kl_sdio_exit(void)
  654. {
  655. sdio_unregister_driver(&ath6kl_sdio_driver);
  656. }
  657. module_init(ath6kl_sdio_init);
  658. module_exit(ath6kl_sdio_exit);
  659. MODULE_AUTHOR("Atheros Communications, Inc.");
  660. MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices");
  661. MODULE_LICENSE("Dual BSD/GPL");
  662. MODULE_FIRMWARE(AR6003_REV2_OTP_FILE);
  663. MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE);
  664. MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE);
  665. MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE);
  666. MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE);
  667. MODULE_FIRMWARE(AR6003_REV3_OTP_FILE);
  668. MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE);
  669. MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE);
  670. MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE);
  671. MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE);